On Sunday, August 01, 2010 12:56:35 am Kirk Wallace did opine:
> On Sat, 2010-07-31 at 23:15 -0500, Jon Elson wrote:
> > I know a number of people are using my PWM servo amps with Mesa
> > controller boards.
> > A feature of the dumb control logic on the servo amp is that it needs
> > a short pulse in each direction
> > to clear the shutdown latches on the FET driver chips. I built a
> > little state machine into the driver to accomplish this, it is called
> > the "bootstrap" parameter. It gives 5% duty cycle pulses in each
> > direction on consecutive servo cycles, then goes to normal operation
> > as commanded by the PWM input. If you don't do this, the drive can
> > act like it is disabled until you attempt to move it both directions,
> > then it will suddenly come "live".
> >
> > So, has anyone written up a couple lines of HAL to do this, or how
> > else do you solve the problem?
> >
> > (This applies only to the brush version of the servo amp, the
> > brushless amp has a CPLD that manages this function.)
> >
> > Thanks,
> >
> > Jon
>
> Is this the high side bootstrap that creates the high side FET gate
> control voltage? This has always seemed to create more trouble than it
> is worth. Why not have another supply with the proper voltage and not
> have to deal with the bootstrap? Or use N and P FET's? I know the
> bootstrap method may save a portion of the parts cost, but for the
> product quantities for the CNC market, it doesn't seem worth it. I may
> be showing my ignorance here.
By normal fab techniques, there is not a P type FET, they all need a +
signal on the gate to turn them on. That said, a separate + and - 5 volt
supply winding whose center tap rail is common to the FET's source rail is
the much preferred method of deriving the high sides on pulse drive
voltage. I generally detest the bootstrap methods because the voltage so
developed isn't as dependable (IMO). The capacitors that are the
isolation/storage elements of a bootstrapped circuit are usually common
electrolytics, with their failure rates being 100x that of the
semiconductors involved. When a semiconductor in one of these circuits
fails, there is about a 100/1 chance a failing capacitor was the first
circuit fault.
Driving a power FET is almost a separate chapter in the design tomes, as
the gates in high powered versions of these can represent quite a large
capacitance just from the sheer size of all the actual gates in the
devices, with figures well above .05 microfarads, some of which gets
amplified by miller feedback effects as its turned on and off. In order to
minimize the junction heat during the on-off or off-on transitions, the
driving waveform must be very fast, and capable of charging or discharging
that large capacitance in nanoseconds. That implies a driver capable of
several amps with rise & fall times of 10 or so nanoseconds. Many a power
FET aka HEXFET has been destroyed by drivers that take a microsecond to
make that nominally 9 volt swing. 5 volt + to fully turn them on, and
about -4 to turn them absolutely off in the shortest time.
I'm with Kirk on this one, we are a relatively small market, one that will
never find a profit in 'simplicating' the right way out of a circuit, so it
should be done right, not to consumer grade standards but better.
--
Cheers, Gene
"There are four boxes to be used in defense of liberty:
soap, ballot, jury, and ammo. Please use in that order."
-Ed Howdershelt (Author)
marriage, n.:
Convertible bonds.
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