dave wrote: > On Sun, 20 Nov 2011 21:40:51 -0600 > Jon Elson <[email protected]> wrote: > > >> Kirk Wallace wrote: >> >>> I seem to recall the ARM chips had a cache between the core and the >>> I/O buss. I don't think it is a cache, exactly, but the I/O hardware is multiplexed between the banks. The original BeagleBoard could only update a GPIO pin every 240 ns, which isn't actually all that bad for most purposes. >>> I browsed some links to the Blackfin chips and wonder if >>> this link indicates a more direct link between the core and the PPI >>> and other I/O? >>> http://www.analog.com/en/processors-dsp/blackfin/adsp-bf537/processors/product.html >>> >>> >>> At 600MHz, these chips seem to scoot pretty well too. >>> >>> >> The Blackfin is almost certainly capable of much higher >> software-directed I/O. >> But, it is also a much harder chip to use, Harvard architecture and >> all, and may >> well not be able to run a Linux system. The Beagle Board has 256 MB >> of main memory, cache, USB and MMC (SD memory cards) all built in. >> >> Jon >> > > I believe there are linux ports for the blackfin but whether emc could > be adapted or one has to start all over I have no idea. > > Just being able to run a Linux Kernel is a big distance from having what you need to run a full Linux user system with RT and LinuxCNC. The Blackfin architecture may not run well when having to run code from large external memory. For running small routines of DSP tasks, these things absolutely scream, but may not be much better than the ARM chips for running big Linux tasks. And, the high-end ARMs also are quite impressive. Wow, on a CPU horsepower vs. Watts, the ARM is just amazing.
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