On 9/3/2012 4:51 PM, Michael Haberler wrote: > well, that seems to work just fine - no major surprises > > here's as screenshot from a logic analyzer connected to an Intel D5252 > parport, running the userland parport driver in sim mode > > http://static.mah.priv.at/public/uparport.png > > it's a 1kHz square; there are delays of up to 4ms in this trace.
Logic analyzers, oscilloscopes---I know the drill but I no longer have easy access to such instrumentation. Has anyone come up with simple (e.g., inexpensive) ways to measure latencies in the range we are interested in - say a range of 1K - 100K pulses per second with pulse widths on the order of microseconds. Back when the world was young and we wannabe researchers avidly read from cover to cover in each new data-book from the likes of TI and Motorola, I used to design and build comparable circuits, but then I had the bench instrumentation to test my testers, so to speak. Now I'm in a catch-22 situation. If I could turn back the clock, I'd probably use this problem as a reason to explore FPGA, but instead I'm noodling about using a Beaglebone or somesuch as a starter. Thoughts, anyone? Regards, Kent ------------------------------------------------------------------------------ Live Security Virtual Conference Exclusive live event will cover all the ways today's security and threat landscape has changed and how IT managers can respond. Discussions will include endpoint security, mobile security and the latest in malware threats. http://www.accelacomm.com/jaw/sfrnl04242012/114/50122263/ _______________________________________________ Emc-users mailing list Emc-users@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/emc-users
