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On 9/7/2012 9:04 AM, Kent A. Reed wrote:
> Has anyone come up with simple (e.g., inexpensive) ways to measure
>  latencies in the range we are interested in - say a range of 1K -
> 100K pulses per second with pulse widths on the order of
> microseconds.
> 
> Back when the world was young and we wannabe researchers avidly
> read from cover to cover in each new data-book from the likes of TI
> and Motorola, I used to design and build comparable circuits, but
> then I had the bench instrumentation to test my testers, so to
> speak. Now I'm in a catch-22 situation.
> 
> If I could turn back the clock, I'd probably use this problem as a
>  reason to explore FPGA, but instead I'm noodling about using a 
> Beaglebone or somesuch as a starter.
> 
> Thoughts, anyone?

I've crafted a variety of fine-scale time-sensing circuits using a
constant current to charge a cap.  Adjust the current and cap value to
the time-scale of interest and use some simple digital logic and CMOS
analog switches to craft some sample/hold logic appropriate to your
signal.  Buffer the cap with a CMOS op-amp to avoid loading the
sample/hold circuit and you can read out time with a volt meter.

...of course, you still need some sort of reference for calibration.

If you don't have a 'scope you could use a long (and hopefully fairly
accurate) SW generated pulse to calibrate the capacitor value using a
small current, then scale the current source to your range of
interest.  Accurate resistors are pretty available, while capacitor
tolerance is pretty lousy by comparison.

NOTE:  This technique works a *LOT* better in today's world with CMOS
analog switches and op-amps (and their pico-amp leakage current and
minimal charge injection) than back in the 'old days' when everything
was bipolar (or vacuum tube based!).  :)

- -- 
Charles Steinkuehler
char...@steinkuehler.net
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