Am 07.09.2012 um 16:37 schrieb Belli Button:

> Just about any cheap Digital scope will do this these days, set the display 
> to 'persist' and then measure the width of the line that forms.

for a one-shot measurement, that's fine; that doesnt extend to, say, measuring 
jitter or trapping trap outlyers

with new kernels, platforms and interface hardware I think the relevant 
measurement scenario at hand is more like the hardware side of what is laid of 
it this talk: 

http://www.google.com/url?sa=t&rct=j&q=&esrc=s&source=web&cd=1&cad=rja&ved=0CCMQFjAA&url=http%3A%2F%2Felinux.org%2Fimages%2F8%2F8e%2FReal-time_Measurement-ELC2010-final.pdf&ei=aRtKULTdA9PT4QTXyIHIBg&usg=AFQjCNHpTQ1iYevViznCNfXuaTXs2OGtEg&sig2=DL62aWSUFjlFmrJ951B1oA

- Michael

> 
> Greg
> 
> 
> ----- Original Message ----- 
> From: "Michael Haberler" <mai...@mah.priv.at>
> To: "Enhanced Machine Controller (EMC)" <emc-users@lists.sourceforge.net>
> Sent: Friday, September 07, 2012 4:17 PM
> Subject: Re: [Emc-users] [OT] measuring real-world latency,was Re: worsk: 
> sim parport component
> 
> 
>> 
>> Am 07.09.2012 um 16:04 schrieb Kent A. Reed:
>> 
>>> On 9/3/2012 4:51 PM, Michael Haberler wrote:
>>>> well, that seems to work just fine - no major surprises
>>>> 
>>>> here's as screenshot from a logic analyzer connected to an Intel D5252 
>>>> parport, running the userland parport driver in sim mode
>>>> 
>>>> http://static.mah.priv.at/public/uparport.png
>>>> 
>>>> it's a 1kHz square; there are delays of up to 4ms in this trace.
>>> 
>>> Logic analyzers, oscilloscopes---I know the drill but I no longer have
>>> easy access to such instrumentation.
>>> 
>>> Has anyone come up with simple (e.g., inexpensive) ways to measure
>>> latencies in the range we are interested in - say a range of 1K - 100K
>>> pulses per second with pulse widths on the order of microseconds.
>> 
>> I bit the bullet a while ago and got me an Intronix LogicPort at a setback 
>> of $385.- (http://www.pctestinstruments.com/);  but very robust, 
>> unfortunately locked in to Windows platform and hence unsuited for 
>> scripted interaction for automated tests; I've suggested a scripting api 
>> or at least documenting their USB interface to enable that but it seems 
>> they dont care - looks like their usage model idea revolves around 
>> "engineer in lab, with lab coat, in front of Windows PC"
>> 
>> http://www.sump.org/projects/analyzer/  might be a cheaper option
>> 
>> this german website has a few other project mentioned: 
>> http://www.mikrocontroller.net/articles/Logic_Analyzer#SUMP_Logic_Analyzer 
>> and down from there
>> 
>> -m
>> 
>>> 
>>> Back when the world was young and we wannabe researchers avidly read
>>> from cover to cover in each new data-book from the likes of TI and
>>> Motorola, I used to design and build comparable circuits, but then I had
>>> the bench instrumentation to test my testers, so to speak. Now I'm in a
>>> catch-22 situation.
>>> 
>>> If I could turn back the clock, I'd probably use this problem as a
>>> reason to explore FPGA, but instead I'm noodling about using a
>>> Beaglebone or somesuch as a starter.
>>> 
>>> Thoughts, anyone?
>>> 
>>> Regards,
>>> Kent
>>> 
>>> 
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