[Bug tree-optimization/122635] RISC-V: -mrvv-vector-bits=zvl introducing unoptimal vsetivli zero,0 and insns depending on AVL nops

[gkm at rivosinc dot com via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=122635

--- Comment #17 from Greg McGary <gkm at rivosinc dot com> ---
(In reply to Jeffrey A. Law from comment #15)
> I'd tend to go towards option #1 -- it fixes things at the root cause.

This is where constant propagation of the length operand of
MASK_LEN_{LOAD,STORE} occurs, which is the time can determine if one has zero
length:

tree_unroll_loops_completely
  cleanup_tree_cfg
    cleanup_tree_cfg_noloop
      cleanup_tree_cfg_bb
        merge_blocks
          gimple_merge_blocks
            replace_uses_by

Any advice on when/where/how to eliminate the dead statements?