[Bug tree-optimization/122635] RISC-V: -mrvv-vector-bits=zvl introducing unoptimal vsetivli zero,0 and insns depending on AVL nops

[pinskia at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=122635

--- Comment #10 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
(In reply to Greg McGary from comment #9)
> it needs to detect length zero, and return something that will tell its
> callers elide the entire statement. I have tried a couple things, but
> haven't gotten it right yet, as evidenced by assertions and/or SEGVs.

You might need to replace it with a GIMPLE_NOP (look for other places that do
gimple_build_nop).