> On Aug. 27, 2013, 8:59 a.m., Nilay Vaish wrote: > > I do not like that form WarnUnimpl being repeated all over the place. > > Can you try if something else works? > > Ali Saidi wrote: > I'm afraid that is somewhat like how the isa description language works. > Perhaps the unimplemented case could be the default and overwritten else > where, but i don't think it's going to improve the situation much.
On closer inspection, all the 'format WarnUnimpl' clauses are unnecessary. The old code was just setting the default format to WarnUnimpl, then overriding it in some cases with the Inst:: prefix (which is the default format outside of the 'format WarnUnimpl' block). So it's totally equivalent to get rid of the 'format WarnUnimpl' block, delete all the 'Inst::' prefixes, and add 'WarnUnimpl::' to the few unprefixed instruction declarations. I tried it, and it seems to work... I can't update this patch, but I'll upload another one. That said, I'm a little mystified how this code still works since the 'xc->syscall()' call seems to be missing entirely now. - Steve ----------------------------------------------------------- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/1939/#review4654 ----------------------------------------------------------- On June 28, 2013, 6:41 a.m., Christian Menard wrote: > > ----------------------------------------------------------- > This is an automatically generated e-mail. To reply, visit: > http://reviews.gem5.org/r/1939/ > ----------------------------------------------------------- > > (Updated June 28, 2013, 6:41 a.m.) > > > Review request for Default. > > > Repository: gem5 > > > Description > ------- > > This is an implementation of the x86 int3 and int immediate instructions for > long mode according to 'AMD64 Programmers Manual Volume 3'. I did not do any > heavy testing, but it works fine with the Fiasco.OC micro kernel > (http://os.inf.tu-dresden.de/fiasco/). I'm not sure if the changes to the > decoder (one_byte_opcodes.isa) break the way Linux-syscalls are currently > treated. So please have a look at it. > > > Diffs > ----- > > src/arch/x86/isa/decoder/one_byte_opcodes.isa UNKNOWN > > src/arch/x86/isa/insts/general_purpose/control_transfer/interrupts_and_exceptions.py > UNKNOWN > > Diff: http://reviews.gem5.org/r/1939/diff/ > > > Testing > ------- > > Test runs with Fiasco.OC micro kernel (http://os.inf.tu-dresden.de/fiasco/) > > > Thanks, > > Christian Menard > > _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
