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Review request for Default. Repository: gem5 Description ------- This is an implementation of the x86 int3 and int immediate instructions for long mode according to 'AMD64 Programmers Manual Volume 3'. I did not do any heavy testing, but it works fine with the Fiasco.OC micro kernel (http://os.inf.tu-dresden.de/fiasco/). I'm not sure if the changes to the decoder (one_byte_opcodes.isa) break the way Linux-syscalls are currently treated. So please have a look at it. Diffs ----- src/arch/x86/isa/decoder/one_byte_opcodes.isa c6b20fa84f21cec1a8607e47c8fab3aad6239d58 src/arch/x86/isa/insts/general_purpose/control_transfer/interrupts_and_exceptions.py c6b20fa84f21cec1a8607e47c8fab3aad6239d58 Diff: http://reviews.gem5.org/r/1939/diff/ Testing ------- Test runs with Fiasco.OC micro kernel (http://os.inf.tu-dresden.de/fiasco/) Thanks, Christian Menard _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
