> On Oct. 18, 2015, 5:44 a.m., Nilay Vaish wrote: > > configs/common/HMC.py, line 194 > > <http://reviews.gem5.org/r/2986/diff/8/?file=50344#file50344line194> > > > > How about having system.hmc.controller? It seems strange that this > > particular component is being treated differently compared all other > > components.
In principle, HMCController is a separate component which should sit between the host processors and the HMC device(s). It may be integrated with the host side SoC, but for sure it is not located on the HMC device itself.In current simulation configuration, this does not make much difference, but in a multi-HMC system there is not necessarily a one-to-one correspondense between HMCs and HMCControllers. We could connect one HMCController to more than one HMC device. This is because the serial links on HMC are very flexible each one capable of addressing the whole address space, so in theory it is possible to connect HMCs, HMCControllers, and host processors in many different topologies and configurations. For this reason, I suggest to keep HMCController as a separate component and leave it out from HMC subsystem. - Erfan ----------------------------------------------------------- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/2986/#review7386 ----------------------------------------------------------- On Oct. 17, 2015, 7:11 p.m., Erfan Azarkhish wrote: > > ----------------------------------------------------------- > This is an automatically generated e-mail. To reply, visit: > http://reviews.gem5.org/r/2986/ > ----------------------------------------------------------- > > (Updated Oct. 17, 2015, 7:11 p.m.) > > > Review request for Default. > > > Repository: gem5 > > > Description > ------- > > Changeset 11174:28f05276748f > --------------------------- > mem: Simple HMC Model > > This patch enables modeling a complete Hybrid Memory Cube (HMC) device. It > highly reuses the existing components in gem5's general memory system with > some small modifications. This changeset requires an additional patch (2993) > for modeling the serial links. > > > Diffs > ----- > > src/mem/hmc_controller.hh PRE-CREATION > src/mem/hmc_controller.cc PRE-CREATION > src/mem/xbar.hh 3a4d1b5cd05c > configs/common/MemConfig.py 3a4d1b5cd05c > configs/example/fs.py 3a4d1b5cd05c > src/mem/DRAMCtrl.py 3a4d1b5cd05c > src/mem/HMCController.py PRE-CREATION > src/mem/SConscript 3a4d1b5cd05c > configs/common/HMC.py PRE-CREATION > > Diff: http://reviews.gem5.org/r/2986/diff/ > > > Testing > ------- > > gem5 compiles > fs.py executes and Linux boots correctly. > hmctest.py executes correctly, and stats correlate with cycle-accurate > simulation > > > Thanks, > > Erfan Azarkhish > > _______________________________________________ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev
