> On 2010-07-10 09:59:37, Steve Reinhardt wrote: > > OK, looking a little closer I see that Impl is also used to get the DynInst > > type... but many of the methods called on DynInst (isUncondControl(), > > isCall(), isReturn()) are also StaticInst methods, and some of the others > > (like readPC()) are just used for DPRINTFs (and how is readPC() different > > from the PC that's passed in?). The only exception I see is seqNum. > > > > I would suggest passing in a StaticInstPtr instead of a DynInstPtr, and add > > another argument for seqNum. This makes the predictor much more independent > > of the CPU model. Then I'm pretty sure you can get rid of the template. > > > > I actually got started down this path looking at how you had to add an > > include of static_inst.hh for the warm() method, and wondering how the > > bpred got away without knowing what a static inst was prior to this...
Ok, I can have a go at simpifying the branch predictor like this. I don't think that should be too much work and would probably help when it comes to integration with the in-order CPU too. I'll also get rid of those unnecessary calls and things you've mentioned above. - Timothy ----------------------------------------------------------- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/47/#review68 ----------------------------------------------------------- On 2010-07-09 18:08:18, Timothy Jones wrote: > > ----------------------------------------------------------- > This is an automatically generated e-mail. To reply, visit: > http://reviews.m5sim.org/r/47/ > ----------------------------------------------------------- > > (Updated 2010-07-09 18:08:18) > > > Review request for Default. > > > Summary > ------- > > BranchPred: Take the branch predictor out of O3CPU and make it a stand-alone > SimObject. This then allows the same branch predictor to be shared amongst > several CPUs. > > This patch is unfinished. I would like to take the branch predictor out of > the inorder CPU as well, but want comments on whether this is the best > approach to take first. > > > Diffs > ----- > > src/cpu/o3/O3CPU.py 249f174e6f37 > src/cpu/o3/SConscript 249f174e6f37 > src/cpu/o3/bpred_unit.hh 249f174e6f37 > src/cpu/o3/bpred_unit.cc 249f174e6f37 > src/cpu/o3/bpred_unit_impl.hh 249f174e6f37 > src/cpu/o3/cpu_builder.cc 249f174e6f37 > src/cpu/o3/cpu_policy.hh 249f174e6f37 > src/cpu/o3/fetch.hh 249f174e6f37 > src/cpu/o3/fetch_impl.hh 249f174e6f37 > src/cpu/pred/BaseBPredUnit.py PRE-CREATION > src/cpu/pred/SConscript 249f174e6f37 > src/cpu/pred/base.hh PRE-CREATION > src/cpu/pred/base.cc PRE-CREATION > src/cpu/pred/bpred_unit.hh PRE-CREATION > src/cpu/pred/bpred_unit.cc PRE-CREATION > src/cpu/pred/bpred_unit_impl.hh PRE-CREATION > src/cpu/pred/builder.cc PRE-CREATION > > Diff: http://reviews.m5sim.org/r/47/diff > > > Testing > ------- > > > Thanks, > > Timothy > > _______________________________________________ m5-dev mailing list m5-dev@m5sim.org http://m5sim.org/mailman/listinfo/m5-dev
