On 17/07/2010 07:52, Korey Sewell wrote:
With this new revision I have removed the template from the branch predictor and fixed it to use StaticInstPtr instead of a dynamic one. I've removed the functions that were never called and made a couple of the other fixes that were mentioned in the reviews. I've also taken the local and tournament predictors and made them inherited classes of the predictor that override key functions. Great! If everyone is happy with this, I'll work on removing the code from the in-order CPU and making it use this predictor instead. A hint for this is that the InOrderCPU was passing the nextPC to the branch predictor instead of the PC, so there is a ras statement there that you'll need to be aware of to update. Also, the BTB accesses use the asid instead of the tid (to accomodate multithreading) so please dont remove that. There may be some model specific callbacks to the InOrderCPU that will have to be abstracted but I'm not sure. Let me know if there are any InOrderCPU implementation questions and thanks for the help!
Cool, thanks for the heads-up on that, Korey :-) I'll bear this in mind. Cheers Tim -- Timothy M. Jones http://homepages.inf.ed.ac.uk/tjones1 The University of Edinburgh is a charitable body, registered in Scotland, with registration number SC005336. _______________________________________________ m5-dev mailing list m5-dev@m5sim.org http://m5sim.org/mailman/listinfo/m5-dev