I didn't issue any SVC The code blew up under TESTAUTH at the fifth instruction after the expansion of the SETFRR macro
I normally get 0F8 when I am in XMEM mode and issue a SVC I didn't abended on a SVC I abended whitin STM of the SETFRR inst -----Original Message----- From: IBM Mainframe Discussion List [mailto:IBM-MAIN@bama.ua.edu] On Behalf Of Lizette Koehler Sent: Monday, October 17, 2011 10:54 PM To: IBM-MAIN@bama.ua.edu Subject: Re: SYSTEM ABEND CODE 0F8 REASON CODE 00000014 under TESTAUTH > Hi, > > > > I am trying to establish a FRR in a TSO command processor program that is not re- > entrant this is because > > Later I schedule a SRB and I want to use the routine I established as a FRR, as input > to the SRBFRRA parameter > Did you review the abend and code? S0F8 - 14 - THE SVC ISSUER HAD AN ENABLED UNLOCKED TASK MODE FRR. IE. EUT=YES WAS SPECIFIED ON THE SETFRR MACRO. Did it help? Are you a member of the assembler language newsgroup? You might have better response there or better assistance. assembler-l...@listserv.uga.edu Lizette ---------------------------------------------------------------------- For IBM-MAIN subscribe / signoff / archive access instructions, send email to lists...@bama.ua.edu with the message: GET IBM-MAIN INFO Search the archives at http://bama.ua.edu/archives/ibm-main.html ---------------------------------------------------------------------- For IBM-MAIN subscribe / signoff / archive access instructions, send email to lists...@bama.ua.edu with the message: GET IBM-MAIN INFO Search the archives at http://bama.ua.edu/archives/ibm-main.html
