I am trying to issue a branch entry form of a macro in a other address space since the specifications say PASN=HASN=SASN
SRB was the only way to go, the branch entry form of the macro was the only code in the SRB I figured I would set up a FRR So that if anything goes wrong RTM would give control to the FRR I could examine the SDWA for any problems -----Original Message----- From: IBM Mainframe Discussion List [mailto:IBM-MAIN@bama.ua.edu] On Behalf Of Chris Craddock Sent: Tuesday, October 18, 2011 12:05 AM To: IBM-MAIN@bama.ua.edu Subject: Re: SYSTEM ABEND CODE 0F8 REASON CODE 00000014 under TESTAUTH No, you werent where you thought you were in the code. The system doesn't lie about what happened. You can't issue any SVC instructions while you have an FRR on the stack, regardless of what kind of FRR you have. And don't forget you may be calling other system services whether you're aware of it or not. Leaving aside the general undesirability of testing SRB code by trial and error, If you did manage to get the SRB scheduled then two interesting things are happening to you. First you have another independent unit of work running (the SRB) which will muddy the waters because any error that befalls the SRB will be reflected back on the TCB you're running under so your debugging information is going to be quite confusing. Frankly you're kind of stumbling around in a coal mine with a flashlight even trying this. I would usually give a little sermon about all the things that can go horribly wrong. I will spare you that but here's the rub -- there's not a lot of chance you're going to suddenly converge on a solution that works. Tell us what problem you're trying to solve and maybe we can help you without trashing your system. Sent from my iPad On Oct 17, 2011, at 10:07 PM, Micheal Butz <michealb...@optonline.net> wrote: > I didn't issue any SVC > > The code blew up under TESTAUTH at the fifth instruction after the > expansion of the SETFRR macro > > I normally get 0F8 when I am in XMEM mode and issue a SVC I didn't abended > on a SVC I abended whitin STM of the SETFRR inst > > -----Original Message----- > From: IBM Mainframe Discussion List [mailto:IBM-MAIN@bama.ua.edu] On Behalf > Of Lizette Koehler > Sent: Monday, October 17, 2011 10:54 PM > To: IBM-MAIN@bama.ua.edu > Subject: Re: SYSTEM ABEND CODE 0F8 REASON CODE 00000014 under TESTAUTH > >> Hi, >> >> >> >> I am trying to establish a FRR in a TSO command processor program that is > not re- >> entrant this is because > >> >> Later I schedule a SRB and I want to use the routine I established as a > FRR, as input >> to the SRBFRRA parameter >> > > Did you review the abend and code? > S0F8 - 14 - THE SVC ISSUER HAD AN ENABLED UNLOCKED TASK MODE FRR. > IE. EUT=YES WAS SPECIFIED ON THE SETFRR MACRO. > > Did it help? > > Are you a member of the assembler language newsgroup? You might have better > response there or better assistance. assembler-l...@listserv.uga.edu ---------------------------------------------------------------------- For IBM-MAIN subscribe / signoff / archive access instructions, send email to lists...@bama.ua.edu with the message: GET IBM-MAIN INFO Search the archives at http://bama.ua.edu/archives/ibm-main.html ---------------------------------------------------------------------- For IBM-MAIN subscribe / signoff / archive access instructions, send email to lists...@bama.ua.edu with the message: GET IBM-MAIN INFO Search the archives at http://bama.ua.edu/archives/ibm-main.html
