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Could you elaborate on that? I understand that there is a savings if reentrant code can be reused without reloading (such as if it is resident in the LPA) but why would reentrant code be inherently faster than non-reentrant? There is certainly an additional overhead for GETMAIN, storage initialization, often an extra level of indirection, etc. Reentrant design often burns one more register, which may in turn lead to additional register save and restore operations. Reentrant code is typically more scattered in its storage references, which increases paging overhead (at least in theory).

It's an academic question, I admit. 99% of all assembler code is so fast it does not matter, and the 1% that matters can always be optimized despite any considerations for reentrance. I'm just curious about your assertion.
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It's a function of how the instruction fetch and data fetch caches are used inside the processor.

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