IBM Mainframe Discussion List <IBM-MAIN@BAMA.UA.EDU> wrote on 11/21/2007 05:14:56 AM: > I was reading the manual for an explanation of CPU lock: > > CPU lock -- provides MVS-recognized (valid) disablement for I/O and > external interrupts. > > The manual gives a further explanation: > > MVS does not guarantee preservation of the interrupt status of > programs that explicitly disable for I/O and external interrupts > through the STNSM instruction. > > > What does 'does not guarantee' mean?
It means that if you do a SETLOCK RELEASE for the CPU lock or a spin lock, or invoke some other function which does a SETLOCK RELEASE for the CPU lock or a spin lock, that may cause SETLOCK RELEASE to enable. SETLOCK RELEASE for the CPU lock or a spin lock will enable if the release results in a state where the CPU lcok is not held, no spin locks are held, and no super bits are on, and DISABLED is not specified on SETLOCK RELEASE. Jim Mulder z/OS System Test IBM Corp. Poughkeepsie, NY ---------------------------------------------------------------------- For IBM-MAIN subscribe / signoff / archive access instructions, send email to [EMAIL PROTECTED] with the message: GET IBM-MAIN INFO Search the archives at http://bama.ua.edu/archives/ibm-main.html
