I would think what you described might well work. I don't see any inherent
flaws in the process.

RLD "cards" are documented and not at all impossible to decode. You could
post the offending RLD here (in hex) and I'm sure folks would love to
demonstrate their skills.

You could also try a disassembler. (CBT tape has one, right?) Disassembled
object code is a real piece of cowstuff but you could re-assemble it and try
that approach.

What's the possibility that you garbled things in the editor, or somewhere
else along the way?

Charles

-----Original Message-----
From: IBM Mainframe Discussion List [mailto:IBM-MAIN@LISTSERV.UA.EDU] On
Behalf Of Roberto Halais
Sent: Friday, August 09, 2013 4:14 PM
To: IBM-MAIN@LISTSERV.UA.EDU
Subject: Linkage Editing VSE Phase in z/OS

Listers:

We are doing a VSE to z/OS conversion and had to do the following since we
have no source.

We punched out a CIL phase from a VSE system.

We put the phase in a z/os pds member (lrecl 80) and it looked like this:

Phase modname
ESD
TXT
RLD
END
/*

We edited the phase so that it looked like this:

ESD
TXT
RLD
END

We then tried to linkedit the phase with IEWL and got the following
messages:

z/OS V1 R13 BINDER     15:51:52 FRIDAY AUGUST  9, 2013

BATCH EMULATOR  JOB(LINKEDT2) STEP(LKED    ) PGM= IEWL

IEW2278I B352 INVOCATION PARAMETERS - XREF,LIST


IEW2359E 240B SECTION FA010 CONTAINS AN RLD WITH AN INVALID ADCON LOCATION.
 CLASS = B_TEXT, ELEMENT OFFSET = FFAFFF88 IEW2307E 1113 CURRENT INPUT
MODULE NOT INCLUDED BECAUSE OF INVALID DATA.

----------------------------------------------------------------------
For IBM-MAIN subscribe / signoff / archive access instructions,
send email to lists...@listserv.ua.edu with the message: INFO IBM-MAIN

Reply via email to