Hi,
Here is a new patch for enabling Back face coloring.
It is parts information from revenge dumps and parts guesswork.
It also fixes a bug in r300FrontFace or rather r300UpdateCulling. It
would only set GL_CW og GL_CCW if wee set some culling.
This patch gets wave and fog forking for me.
/Tommy
Tommy Schultz Lassen skrev:
> Hi,
>
> I as well would prefer to bee more certain.
>
> I still need to confirm R300_VAP_OUTPUT_VTX_FMT_0__PT_SIZE_PRESENT.
>
> When i have some more time i while cook up some code to exercise thees
> outputs. But if someone already has some code it would bee nice.
>
> Some testing on other ati cards than my X700 PCIE with some different
> apps would bee nice.
>
>
>
>
>
> Oliver McFadden skrev:
>
>> Hi,
>>
>> I would prefer if we could confirm the R300_VAP_OUTPUT_VTX_FMT_0 bits
>> before
>> merging this patch...
>>
>> Although r300_reg.h does mark many of the bits as guesses, so I'm not
>> apposed to
>> committing this patch now and figuring out all the bits later. As long
>> as you
>> have confirmed that the bits you have changed are correct.
>>
>>
>> On 6/10/07, Tommy Schultz Lassen <[EMAIL PROTECTED]> wrote:
>>
>>> Hi,
>>>
>>> Here is a new version of Back face color. It also enables FOGC out.
>>>
>>> VERT_RESULT_BFC1
>>> VERT_RESULT_PSIZ
>>> VERT_RESULT_COL1
>>>
>>> is pure guess work. If some one has a example that exercise some of
>>> those that wot help mi.
>>>
>>> VERT_RESULT_BFC0
>>>
>>> That is the only value where i can get Back faced to work for the
>>> moment.
>>>
>>> VERT_RESULT_FOGC
>>>
>>> That is the value where it seems to work for the moment. I have some
>>> indications that it is actually dependent on the the index used in
>>> r300_vertprog.c t_dst_index.
>>>
>>> Cut it bee that r300VAPOutputCntl0 and r300VAPOutputCntl1 depends on the
>>> values set in r300_vertprog.c t_dst_index?
>>>
>>>
>>>
>>>
>>>
>>> Oliver McFadden skrev:
>>>
>>>> Hi,
>>>>
>>>> I think something is wrong with the
>>>> R300_VAP_OUTPUT_VTX_FMT_0__COLOR_2_PRESENT
>>>> change you made. You changed this to (1 << 16) however this would
>>>> correspond to
>>>> the R300_VAP_OUTPUT_VTX_FMT_0__PT_SIZE_PRESENT define.
>>>>
>>>> So either your change is incorrect, or the defines for
>>>> R300_VAP_OUTPUT_VTX_FMT_0
>>>> are incorrect. It wouldn't surprise me if some of the bits for this
>>>> register are
>>>> not correct; as far as I know the driver hasn't previously supported
>>>> back-facing
>>>> color, so these bits may have been guessed based on the standard color
>>>> bit.
>>>>
>>>> I don't think it would be hard to write some OpenGL code for revenge
>>>> (my reverse
>>>> engineering tool) to test these bits, though.
>>>>
>>>>
>>>> On 6/8/07, Tommy Schultz Lassen <[EMAIL PROTECTED]> wrote:
>>>>
>>>>> Hi Oliver
>>>>>
>>>>> I got the checker board shown in wave :). The problem seems to bee
>>>>> missing VERT_RESULT_BFC0.
>>>>>
>>>>> I have attached a patch that gets VERT_RESULT_BFC0 a step closer.
>>>>>
>>>>> There is a couple of problems:
>>>>>
>>>>> 1) This patch makes the driver do state changes allot.
>>>>>
>>>>> 2) I fink there is something more basic wrong wit how wee handle
>>>>> VERT_RESULT.
>>>>>
>>>>> How do the chip now that the reg wee set in r300TranslateVertexShader
>>>>> with code like:
>>>>>
>>>>> vp->outputs[VERT_RESULT_BFC0] = cur_reg++;
>>>>>
>>>>> is for VERT_RESULT_BFC0.
>>>>>
>>>>>
>>>>> Any insights?
>>>>>
>>>>>
>>>>> The patch makes the tube in fog look read instead of green. NWN
>>>>>
>>> looks as
>>>
>>>>> it has for some time. OK but with weird colors on cloaks an some
>>>>> monsters.
>>>>>
>>>>> I am going to keep looking.
>>>>>
>>>>> /Tommy
>>>>>
>>>>>
>>>
>
>
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diff --git a/src/mesa/drivers/dri/r300/r300_emit.c b/src/mesa/drivers/dri/r300/r300_emit.c
index 229439d..f6b555a 100644
--- a/src/mesa/drivers/dri/r300/r300_emit.c
+++ b/src/mesa/drivers/dri/r300/r300_emit.c
@@ -299,16 +299,15 @@ GLuint r300VAPOutputCntl0(GLcontext * ctx, GLuint OutputsWritten)
if (OutputsWritten & (1 << VERT_RESULT_COL1))
ret |= R300_VAP_OUTPUT_VTX_FMT_0__COLOR_1_PRESENT;
-#if 0
if (OutputsWritten & (1 << VERT_RESULT_BFC0))
- ret |= R300_VAP_OUTPUT_VTX_FMT_0__COLOR_2_PRESENT;
+ ret |= (7 << 2);
if (OutputsWritten & (1 << VERT_RESULT_BFC1))
ret |= R300_VAP_OUTPUT_VTX_FMT_0__COLOR_3_PRESENT;
+#if 0
if (OutputsWritten & (1 << VERT_RESULT_FOGC)) ;
#endif
-
if (OutputsWritten & (1 << VERT_RESULT_PSIZ))
ret |= R300_VAP_OUTPUT_VTX_FMT_0__PT_SIZE_PRESENT;
diff --git a/src/mesa/drivers/dri/r300/r300_state.c b/src/mesa/drivers/dri/r300/r300_state.c
index b5cf21d..6e1eeb8 100644
--- a/src/mesa/drivers/dri/r300/r300_state.c
+++ b/src/mesa/drivers/dri/r300/r300_state.c
@@ -325,12 +325,11 @@ static void r300UpdateCulling(GLcontext * ctx)
val = R300_CULL_FRONT;
else
val = R300_CULL_BACK;
-
- if (ctx->Polygon.FrontFace == GL_CW)
- val |= R300_FRONT_FACE_CW;
- else
- val |= R300_FRONT_FACE_CCW;
}
+ if (ctx->Polygon.FrontFace == GL_CW)
+ val |= R300_FRONT_FACE_CW;
+ else
+ val |= R300_FRONT_FACE_CCW;
r300->hw.cul.cmd[R300_CUL_CULL] = val;
}
diff --git a/src/mesa/drivers/dri/r300/r300_vertprog.c b/src/mesa/drivers/dri/r300/r300_vertprog.c
index 16dddf6..3a2dc61 100644
--- a/src/mesa/drivers/dri/r300/r300_vertprog.c
+++ b/src/mesa/drivers/dri/r300/r300_vertprog.c
@@ -438,32 +438,44 @@ static void r300TranslateVertexShader(struct r300_vertex_program *vp,
assert(vp->key.OutputsWritten & (1 << VERT_RESULT_HPOS));
/* Assign outputs */
- if (vp->key.OutputsWritten & (1 << VERT_RESULT_HPOS))
- vp->outputs[VERT_RESULT_HPOS] = cur_reg++;
-
- if (vp->key.OutputsWritten & (1 << VERT_RESULT_PSIZ))
- vp->outputs[VERT_RESULT_PSIZ] = cur_reg++;
+ if (vp->key.OutputsWritten & (1 << VERT_RESULT_HPOS)){
+ vp->outputs[VERT_RESULT_HPOS] = cur_reg;
+ cur_reg=1;
+ }
- if (vp->key.OutputsWritten & (1 << VERT_RESULT_COL0))
- vp->outputs[VERT_RESULT_COL0] = cur_reg++;
+ if (vp->key.OutputsWritten & (1 << VERT_RESULT_COL0)){
+ vp->outputs[VERT_RESULT_COL0] = 1;
+ cur_reg=2;
+ }
- if (vp->key.OutputsWritten & (1 << VERT_RESULT_COL1))
- vp->outputs[VERT_RESULT_COL1] = cur_reg++;
+ if (vp->key.OutputsWritten & (1 << VERT_RESULT_COL1)){
+ vp->outputs[VERT_RESULT_COL1] = 2;
+ cur_reg=3;
+ }
-#if 0 /* Not supported yet */
- if (vp->key.OutputsWritten & (1 << VERT_RESULT_BFC0))
- vp->outputs[VERT_RESULT_BFC0] = cur_reg++;
+ if (vp->key.OutputsWritten & (1 << VERT_RESULT_BFC0)){
+ vp->outputs[VERT_RESULT_BFC0] = 3;
+ cur_reg=5;
+ }
- if (vp->key.OutputsWritten & (1 << VERT_RESULT_BFC1))
- vp->outputs[VERT_RESULT_BFC1] = cur_reg++;
+ if (vp->key.OutputsWritten & (1 << VERT_RESULT_BFC1)){
+ vp->outputs[VERT_RESULT_BFC1] = 4;
+ cur_reg=5;
+ }
+#if 0 /* Not supported yet */
if (vp->key.OutputsWritten & (1 << VERT_RESULT_FOGC))
vp->outputs[VERT_RESULT_FOGC] = cur_reg++;
#endif
+ if (vp->key.OutputsWritten & (1 << VERT_RESULT_PSIZ))
+ vp->outputs[VERT_RESULT_PSIZ] = cur_reg++;
+
+
for (i = VERT_RESULT_TEX0; i <= VERT_RESULT_TEX7; i++)
- if (vp->key.OutputsWritten & (1 << i))
+ if (vp->key.OutputsWritten & (1 << i)){
vp->outputs[i] = cur_reg++;
+ }
vp->translated = GL_TRUE;
vp->native = GL_TRUE;
@@ -1255,8 +1267,6 @@ void r300SelectVertexShader(r300ContextPtr r300)
vpc = (struct r300_vertex_program_cont *)ctx->VertexProgram._Current;
InputsRead = ctx->FragmentProgram._Current->Base.InputsRead;
- wanted_key.OutputsWritten |= 1 << VERT_RESULT_HPOS;
-
wpos_idx = -1;
if (InputsRead & FRAG_BIT_WPOS) {
for (i = 0; i < ctx->Const.MaxTextureUnits; i++)
@@ -1271,20 +1281,8 @@ void r300SelectVertexShader(r300ContextPtr r300)
InputsRead |= (FRAG_BIT_TEX0 << i);
wpos_idx = i;
}
-
- if (InputsRead & FRAG_BIT_COL0)
- wanted_key.OutputsWritten |= 1 << VERT_RESULT_COL0;
-
- if ((InputsRead & FRAG_BIT_COL1) /*||
- (InputsRead & FRAG_BIT_FOGC) */ )
- wanted_key.OutputsWritten |= 1 << VERT_RESULT_COL1;
-
- for (i = 0; i < ctx->Const.MaxTextureUnits; i++)
- if (InputsRead & (FRAG_BIT_TEX0 << i))
- wanted_key.OutputsWritten |=
- 1 << (VERT_RESULT_TEX0 + i);
-
wanted_key.InputsRead = vpc->mesa_program.Base.InputsRead;
+ wanted_key.OutputsWritten = vpc->mesa_program.Base.OutputsWritten;
if (vpc->mesa_program.IsPositionInvariant) {
/* we wan't position don't we ? */
wanted_key.InputsRead |= (1 << VERT_ATTRIB_POS);
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