Hi Syed, On Wed, Nov 22, 2017 at 11:38 AM Syed Syed <sy...@xilinx.com> wrote:
> >In particular, the PHY Address I'm trying to get u-boot to use is 0x7 but > it seems intent on using 0xE. I'm not sure I know how to force it to use > the right one, or make it auto-detect correctly. > > >I initially tried to override the default device tree by changing > "CONFIG_DEFAULT_DEVICE_TREE" to point to the one I added in my layer -- but > this causes bitbake to crash with a compilation failure, thinking that > because u-boot uses a copy of the device tree for the bootloader, that the > default xilinx one is pointing to 0xE. > Even if the default phy address passed to the u-boot is incorrect, there > is an auto-detect of phy address in the code. See relevant code here: > https://raw.githubusercontent.com/Xilinx/u-boot-xlnx/edc84517d690783b5352278e2369a8cc7b392f60/drivers/net/zynq_gem.c/phy_detection() > . > It seems your fsbl is not initializing GEM properly, probably a gpio pin. > See here: > https://forums.xilinx.com/t5/Embedded-Linux/Zynq-7010-u-boot-PHY-is-not-detected/td-p/804993 > > I was hoping that it wasn't the case that the FSBL was the problem. I have indeed seen that exact blog post. What seems to be troubling is that the FSBL I'm using is generated using 17.2 with Xilinx SDK - so I'm surprised this wouldn't just work out of the box. *Do you know what / where we can look in FSBL configuration (maybe in the BSP configuration) that might be the issue?* Thanks for the link to the code here: https://github.com/Xilinx/u-boot-xlnx/blob/edc84517d690783b5352278e2369a8cc7b392f60/drivers/net/zynq_gem.c#L246-L283 as this is what I thought u-boot was doing all along, and I was slightly worried that my custom u-boot DEFCONFIG (to disable SDHCI/MMC/SPL) was somehow breaking this. Thanks! Giordon > -syed > -- > _______________________________________________ > meta-xilinx mailing list > meta-xilinx@yoctoproject.org > https://lists.yoctoproject.org/listinfo/meta-xilinx >
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