Early Intel CPUs with Intel 64 lacked LAHF and SAHF instructions available in 
AMD64 until introduction of Pentium 4 G1 step in December 2005. LAHF and SAHF 
are load and store instructions, respectively, for certain status flags. 
These instructions are used for virtualization and floating-point condition 
handling.


I'll  find out model numbers soon



On Saturday 14 March 2009 17:20:25 Gonzalo Tornaria wrote:
> On Sat, Mar 14, 2009 at 1:45 PM, Jason Moxham <ja...@njkfrudils.plus.com> 
wrote:
> > I pretty sure all core2 cpus have lahf,sahf , it's just some Pentium D
> > dont have it . You can test the lahf_lm feature bit in cpuid to see if
> > it's got it
>
> Tested in:
>
> My laptop: model 6 / family 15 (core 2 duo T5300).
> My desktop is family 15 / model 6 (pentium D 930).
>
> The "lahf_lm" feature is present in both according to /proc/cpuinfo.
>
> Note that the laptop is "low end" core 2 (in the sense it has no VT
> extensions). The pentium D is "high end" (in the sense it has VT
> extensions --- low end would be pentium D 8xx). Maybe that makes a
> difference?
>
> OTOH, the kvm 64 bit virtual cpu (kvm 72) doesn't seem to know about
> the "lahf_lm" (meaning, it won't report it in cpuid, even if the host
> processor has it. I assume the instructions would work anyway.)
>
> Gonzalo
>
> 


--~--~---------~--~----~------------~-------~--~----~
You received this message because you are subscribed to the Google Groups 
"mpir-devel" group.
To post to this group, send email to mpir-devel@googlegroups.com
To unsubscribe from this group, send email to 
mpir-devel+unsubscr...@googlegroups.com
For more options, visit this group at 
http://groups.google.com/group/mpir-devel?hl=en
-~----------~----~----~----~------~----~------~--~---

Reply via email to