That's basically what I use in my designs. I'll highlight the differences: - I use a PMOS instead of PNP, mainly because it requires no drive-current. - R1 & R2 are replaced with a pot to make the current adjustable. - The above pot can driven from a small DC-DC converter (my preference), or between the HV supply & GND. There's essentially zero current for PMOS gate-drive, so high resistance values are fine. Not the case with PNP, though, due to finite base-currrent. - A zener diode is added to clamp any spikes that may arise at the gate of the PMOS device. It's a paranoia item. - A filter cap was added, in case there is unexpected noise from the DC DC converter, and also to suppress any very-short transient that may arise that are too fast for the zener to kick-in. (paranoia item). - A large resistor across the PMOS to bleed any potential ESD. Without it, there is a remote possibility of charge-buildup. (paranoia item)
So, this circuit is replicated for each anode. When multiple anodes are driven, they all share the same gate-drive signal, which I call PDRV on the attached schematic. -- You received this message because you are subscribed to the Google Groups "neonixie-l" group. To unsubscribe from this group and stop receiving emails from it, send an email to neonixie-l+unsubscr...@googlegroups.com. To post to this group, send an email to neonixie-l@googlegroups.com. To view this discussion on the web, visit https://groups.google.com/d/msgid/neonixie-l/fdb55e53-78ef-4c09-b908-42e051dd380c%40googlegroups.com. For more options, visit https://groups.google.com/d/optout.
