On Tuesday 13 September 2016 22:23:11 Matthias Welwarsky wrote: > On Tuesday 13 September 2016 20:08:46 David Ung wrote: > > FWIW, on linux as long as CONFIG_COMPAT is enabled, you can run both > > AArch64/32 userspace programs. But the mode switching is done at an > > exception level, so you can't interlink 64 and 32bit programs (unlike > > intermixing mips16 and mips32, or thumb and arm code). > > > > I had worked on the Pixel C, on that platform you get both 64 and 32bit > > set > > of libraries in the filesystem. On jetson tx1 would be the same. > > What might (should?) work in my particular case is, since I'm starting from > EL2: > > - Modify SPSR_EL2, setting bit 4 = 1 and bits 3:0 to some valid aarch32 mode > (0x3 - svc mode) > - set ELR_EL2 to a memory location with valid ARM code > - "ERET"
OK it "somewhat" worked. I get to Aarch32 state, but not at the place where I wanted to be but at 0x10, in ABT mode. I'd need to decode the fault syndrome to check what happened. But the main concern is met, which was demonstrating the broken state of AArch32 debugging :-) Slowly fixing the bits and pieces now, but it's really quite messy. BTW David, "Memory Access mode" works for both Aarch64 and -32 states, you just need to set up the addresses a bit differently. The actual copy loops are identical. BR, Matthias ------------------------------------------------------------------------------ _______________________________________________ OpenOCD-devel mailing list OpenOCD-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/openocd-devel
