On Wednesday 14 September 2016 08:12:01 Duane Ellis wrote: > >> What might (should?) work in my particular case is, since I'm starting > >> from > >> EL2: > >> > >> - Modify SPSR_EL2, setting bit 4 = 1 and bits 3:0 to some valid aarch32 > >> mode (0x3 - svc mode) > >> - set ELR_EL2 to a memory location with valid ARM code > >> - "ERET" > > > > OK it "somewhat" worked. I get to Aarch32 state, but not at the place > > where I wanted to be but at 0x10, in ABT mode. > > I think you also need to set/clear the HCR.RW (bit 31) which controls the > EL1 state: 32 or 64bit
It works now, the problem was that I didn't set up SPSR_EL2 correctly for returning to 32bit state: the T bit was set and so the PE was in Thumb state and went into an "Undefined instruction" exception, and then into an ABT exception when the exception vector contained only garbage. I think that the rest of the system was already configured for 32bit mode in EL1, didn't have to make any other changes. > > In summary: > SCR_EL3.RW (bit 10) controls EL2 - register width (32/64bit) > HCR_EL2.RW (bit 31) controls EL1/EL0 register with (32/64bit) > More interestingly - HCR is 64bits in 64bit state > But - is two different 32bit registers in 32bit state > I believe EL0 - 32/64bit is controlled via the “mode-field” in the PSW > register (it’s been a while…) > > Also - the SPSR register mode must match the corresponding RW bit in the > SCR or HCR register. Yes, SPSR[4] says if it's 32 bit or 64bit state. > > My earlier point was this (and I want to say it again, because I think it > every important) > > There are so many differences between arm32 & aarch64 - yes there are a > *FEW* things that are identical or could be reused > > However - stepping back and looking at the big picture - interweaving those > few things with “mode checks” will cause more problems and crazy code flow > paths then they are worth. So much so that aarch64 - support in its > entirety should be a standalone and not rely upon the “common arm” stuff. The Aarch32 PE state is quite different from Aarch64, of course. But the debug implementation not so much and many of the relevant system registers are mapped between their respective counterparts (e.g. CLIDR, CSSELR, ...). I don't yet see that a completely separate code module for aarch32 is required. BR, Matthias ------------------------------------------------------------------------------ _______________________________________________ OpenOCD-devel mailing list OpenOCD-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/openocd-devel
