Re: Using imcc as JIT optimizer

[Leopold Toetsch]

Leopold Toetsch wrote:


- do register allocation for JIT in imcc
- use the first N registers as MAPped processor registers


The "[RFC] imcc calling conventions" didn't get any response. Should I 
take this fact as an implict "yep, fine"?

Here is again the relevant part, which has implications on register 
renumbering, used for JIT optimization:

=head1 Parrot calling conventions (NCI)

Proposed syntax:

  $P0 = load_lib "libname"
  $P1 = dlfunc $P0, "funcname", "signature"
  .nciarg z     # I5
  .nciarg y     # I6
  .nciarg x     # I7
  ncicall $P1   # r = funcname(x, y, z)
  .nciresult r
A code snippet like:

        set I5, I0
        dlfunc P0, P1, "func", "ii"
        invoke
        set I6, I5
now comes out as:

        set ri1, ri0
        dlfunc P0, P1, "func", "ii"
        invoke
        set ri0, ri1
which is clearly not, what pdd03 is intending. For plain PASM at least 
the .nciarg/.nciresult are necessary, to mark these parrot registers as 
fix and to have some hint for imcc, that dlfunc is actually using these 
registers.

So there are some possibilities:
- disable register renumbering for all compilation units, where a 
B<invoke> is found
- do it right, i.e. implement above (or a similar) syntax and rewrite 
existing code

leo