Re: Using imcc as JIT optimizer

[Leopold Toetsch]

Gopal V wrote:

If memory serves me right, Leopold Toetsch wrote:


Ok .. well I sort of understood that the first N registers will be the
ones MAPped ?. So I thought re-ordering/sorting was the operation performed.


Yep. Register renumbering, so that the top N used (in terms of score) 
registers are I0, I1, ..In-1


Direct hardware maps (like using CX for loop count etc) will need to be
platform dependent ?. Or you could have a fixed reg that can be used for
loop count (and gets mapped on hardware appropriately). 


We currently don't have special registers, like %ecx for loops, they are 
not used in JIT either. My Pentium manual states, that these ops are not 
the fastest.
But in the long run, we should have some hints, that e.g. i386 needs 
%ecx as shift count, or that div uses %edx. But probably i386 is the 
only weird architecure with such ugly restrictions - and with far too 
few registers.


Loop info

Hmm.. this is what I said "sounds like a lot of work" ... which still 
remains true from my perspective :-)


There is still a lot of work, yes, but some things already are done:

	set I10, 10
x: 
if I10, ok
	branch y
ok: 
set I0, 1
	sub I10, I10, I0
	print I10
	print "\n"
	branch x
y:
	end

Ends up (with imcc -O2p) as:

        set I0, 10
        set I1, 1
x:
        unless I0, y
        sub I0, I1
        print I0
        print "\n"
        branch x
y:
        end
You can see:

opt1 sub I10, I10, I0 => sub I10, I0
if_branch if ... ok
label ok deleted
found invariant set I0, 1
inserting it in blk 0 after set I10, 10 

The latter one is working out from the most inner loop.


Gopal
leo