On 5/27/2026 1:13 PM, Philippe Mathieu-Daudé wrote: > From: Djordje Todorovic <[email protected]> > > Make data accesses honour the MSTATUS MBE/SBE/UBE endianness bits > instead of being hardcoded to little-endian. Update mo_endian_env() > to pick the bit corresponding to the current privilege level (MBE > for M, SBE for S, UBE for U). Remove the now unused mo_endian() > helper. > > Note, TB_FLAGS has no free bits, so the data endianness is carried > in the extended RISC-V TB flags stored in cs_base. It uses > EXT_TB_FLAGS.BIG_ENDIAN at bit 33, leaving bit 32 for > EXT_TB_FLAGS.ALTFMT. This keys TBs correctly on the current data > endianness. > > Instruction fetches remain MO_LE unconditionally; RISC-V instructions > are always little-endian per the ISA specification. Update the > disassembler comment to clarify that BFD_ENDIAN_LITTLE is correct. > > Signed-off-by: Djordje Todorovic <[email protected]> > Co-developed-by: Philippe Mathieu-Daudé <[email protected]> > Signed-off-by: Philippe Mathieu-Daudé <[email protected]> > --- > target/riscv/cpu.h | 1 + > target/riscv/internals.h | 29 +++++++++++++++++++++-------- > target/riscv/cpu.c | 7 ++----- > target/riscv/tcg/tcg-cpu.c | 2 ++ > target/riscv/translate.c | 15 ++------------- > 5 files changed, 28 insertions(+), 26 deletions(-) >
Patch 1 makes more sense with this one, but order is not too important. Reviewed-by: Pierrick Bouvier <[email protected]>
