The GICv5 specification has now been assigned its final document ID for a rev A.a spec version. This seems like a good point to add a pointer to the spec to the main source files.
Signed-off-by: Peter Maydell <[email protected]> --- hw/intc/arm_gicv5.c | 5 +++++ target/arm/tcg/gicv5-cpuif.c | 5 +++++ 2 files changed, 10 insertions(+) diff --git a/hw/intc/arm_gicv5.c b/hw/intc/arm_gicv5.c index 6b1dd04991..0fa3d6b601 100644 --- a/hw/intc/arm_gicv5.c +++ b/hw/intc/arm_gicv5.c @@ -4,6 +4,11 @@ * Copyright (c) 2025 Linaro Limited * * SPDX-License-Identifier: GPL-2.0-or-later + * + * The IRS is defined in IHI 111701 + * (ARM Generic Interrupt Controller Architecture Specification, + * GIC architecture version 5): + * https://developer.arm.com/documentation/111701/latest */ #include "qemu/osdep.h" diff --git a/target/arm/tcg/gicv5-cpuif.c b/target/arm/tcg/gicv5-cpuif.c index dd2f696511..891cb2d3b7 100644 --- a/target/arm/tcg/gicv5-cpuif.c +++ b/target/arm/tcg/gicv5-cpuif.c @@ -4,6 +4,11 @@ * Copyright (c) 2025 Linaro Limited * * SPDX-License-Identifier: GPL-2.0-or-later + * + * The cpu interface is defined in IHI 111701 + * (ARM Generic Interrupt Controller Architecture Specification, + * GIC architecture version 5): + * https://developer.arm.com/documentation/111701/latest */ #include "qemu/osdep.h" -- 2.43.0
