From: Richard Henderson <[email protected]>
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Richard Henderson <[email protected]>
Message-id: [email protected]
Signed-off-by: Peter Maydell <[email protected]>
---
target/arm/cpu-features.h | 5 ++++
target/arm/tcg/helper-sme-defs.h | 4 +++
target/arm/tcg/sme.decode | 1 +
target/arm/tcg/sme_helper.c | 42 ++++++++++++++++++++++++++++++++
target/arm/tcg/translate-sme.c | 8 ++++++
5 files changed, 60 insertions(+)
diff --git a/target/arm/cpu-features.h b/target/arm/cpu-features.h
index a07151e634..b4138e976b 100644
--- a/target/arm/cpu-features.h
+++ b/target/arm/cpu-features.h
@@ -1807,6 +1807,11 @@ isar_feature_aa64_sme_f16f16_or_f8f16(const
ARMISARegisters *id)
return isar_feature_aa64_sme_f16f16(id) || isar_feature_aa64_sme_f8f16(id);
}
+static inline bool isar_feature_aa64_sme_mop4_b16b16(const ARMISARegisters *id)
+{
+ return isar_feature_aa64_sme_mop4(id) && isar_feature_aa64_sme_b16b16(id);
+}
+
static inline bool isar_feature_aa64_sme_mop4_f16f16(const ARMISARegisters *id)
{
return isar_feature_aa64_sme_mop4(id) && isar_feature_aa64_sme_f16f16(id);
diff --git a/target/arm/tcg/helper-sme-defs.h b/target/arm/tcg/helper-sme-defs.h
index 8a2ff88d49..05ccb0d1e2 100644
--- a/target/arm/tcg/helper-sme-defs.h
+++ b/target/arm/tcg/helper-sme-defs.h
@@ -367,3 +367,7 @@ DEF_HELPER_FLAGS_5(sme_ah_fmop4s_ss, TCG_CALL_NO_RWG, void,
ptr, ptr, ptr, fpst,
DEF_HELPER_FLAGS_5(sme_fmop4a_dd, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, fpst,
i32)
DEF_HELPER_FLAGS_5(sme_fmop4s_dd, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, fpst,
i32)
DEF_HELPER_FLAGS_5(sme_ah_fmop4s_dd, TCG_CALL_NO_RWG, void, ptr, ptr, ptr,
fpst, i32)
+
+DEF_HELPER_FLAGS_5(sme_bfmop4a_hh, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, fpst,
i32)
+DEF_HELPER_FLAGS_5(sme_bfmop4s_hh, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, fpst,
i32)
+DEF_HELPER_FLAGS_5(sme_ah_bfmop4s_hh, TCG_CALL_NO_RWG, void, ptr, ptr, ptr,
fpst, i32)
diff --git a/target/arm/tcg/sme.decode b/target/arm/tcg/sme.decode
index 3b7d8e9430..6021803ca0 100644
--- a/target/arm/tcg/sme.decode
+++ b/target/arm/tcg/sme.decode
@@ -1101,6 +1101,7 @@ LUTI4_s_4b 1100 0000 1001 101 1 00 00 00 ....0
zd:5 \
@mop4_o3 .... .... ... m:1 .... .... .. n:1 ... . s:1 . zad:3 \
&mop4 zm=%mop4_zm zn=%mop4_zn
+BFMOP4_hh 1000 0001 001. ...0 0000 00.. ..0. 100. @mop4_o1
FMOP4_hh 1000 0001 000. ...0 0000 00.. ..0. 100. @mop4_o1
FMOP4_ss 1000 0000 000. ...0 0000 00.. ..0. 00.. @mop4_o2
FMOP4_dd 1000 0000 110. ...0 0000 00.. ..0. 1... @mop4_o3
diff --git a/target/arm/tcg/sme_helper.c b/target/arm/tcg/sme_helper.c
index 81ec7ccfa1..0de7dd84e5 100644
--- a/target/arm/tcg/sme_helper.c
+++ b/target/arm/tcg/sme_helper.c
@@ -2761,3 +2761,45 @@ void HELPER(sme_ah_fmop4s_dd)(void *vza, void *vzn, void
*vzm,
{
sme_mop4(vza, vzn, vzm, fpst, desc, sizeof(float64), inner_ah_fmop4s_dd);
}
+
+static void inner_bfmop4a_hh(void *vd, void *vn, void *vm, void *vinfo)
+{
+ bfloat16 *d = vd, *n = vn, *m = vm;
+ float_status *fpst = vinfo;
+
+ *d = bfloat16_muladd(*n, *m, *d, 0, fpst);
+}
+
+void HELPER(sme_bfmop4a_hh)(void *vza, void *vzn, void *vzm,
+ float_status *fpst, uint32_t desc)
+{
+ sme_mop4(vza, vzn, vzm, fpst, desc, sizeof(bfloat16), inner_bfmop4a_hh);
+}
+
+static void inner_bfmop4s_hh(void *vd, void *vn, void *vm, void *vinfo)
+{
+ bfloat16 *d = vd, *n = vn, *m = vm;
+ float_status *fpst = vinfo;
+
+ *d = bfloat16_muladd(bfloat16_chs(*n), *m, *d, 0, fpst);
+}
+
+void HELPER(sme_bfmop4s_hh)(void *vza, void *vzn, void *vzm,
+ float_status *fpst, uint32_t desc)
+{
+ sme_mop4(vza, vzn, vzm, fpst, desc, sizeof(bfloat16), inner_bfmop4s_hh);
+}
+
+static void inner_ah_bfmop4s_hh(void *vd, void *vn, void *vm, void *vinfo)
+{
+ bfloat16 *d = vd, *n = vn, *m = vm;
+ float_status *fpst = vinfo;
+
+ *d = bfloat16_muladd(*n, *m, *d, float_muladd_negate_product, fpst);
+}
+
+void HELPER(sme_ah_bfmop4s_hh)(void *vza, void *vzn, void *vzm,
+ float_status *fpst, uint32_t desc)
+{
+ sme_mop4(vza, vzn, vzm, fpst, desc, sizeof(bfloat16), inner_ah_bfmop4s_hh);
+}
diff --git a/target/arm/tcg/translate-sme.c b/target/arm/tcg/translate-sme.c
index b6c49b9993..f833975875 100644
--- a/target/arm/tcg/translate-sme.c
+++ b/target/arm/tcg/translate-sme.c
@@ -2025,6 +2025,14 @@ static bool do_mop4_fp(DisasContext *s, arg_mop4 *a,
MemOp esz,
return true;
}
+static gen_helper_gvec_3_ptr * const bfmop4_hh[3] = {
+ gen_helper_sme_bfmop4a_hh,
+ gen_helper_sme_bfmop4s_hh,
+ gen_helper_sme_ah_bfmop4s_hh
+};
+TRANS_FEAT(BFMOP4_hh, aa64_sme_mop4_b16b16,
+ do_mop4_fp, a, MO_16, FPST_ZA, bfmop4_hh)
+
static gen_helper_gvec_3_ptr * const fmop4_hh[3] = {
gen_helper_sme_fmop4a_hh,
gen_helper_sme_fmop4s_hh,
--
2.43.0
