On 7/7/2026 11:59 AM, Pierrick Bouvier wrote:
> On 7/6/2026 3:37 AM, Peter Maydell wrote:
>> From: Jim MacArthur <[email protected]>
>>
>> We autodetect the presence of FPRCVT in the test cross compiler,
>> which is a recent feature in GCC and not supported by many distros
>> yet. If this is in place, we compile the existing fcvt.c test with
>> an extra compiler flag which uses the new SIMD instructions; the
>> output from the test is unchanged.
>>
>
> Regarding the current work for moving tcg tests to meson, it creates an
> issue since compiler embedded in debian-all-test-cross does not support it.
>
> Should we update the gcc-aarch64-linux-gnu compiler to support it, so it
> runs out of the box? Else, this test is basically dead in our CI and
> most devs machine, until next debian lands.
>
Unfortunately, even debian sid does not have gcc-16 for aarch64 cross
compiler at the moment. I solved it by using a raw opcode for the
concerned instruction (see patch attached, I'll include in next version
of meson tcg-tests).
Regards,
Pierrick
From 644a413375aa935f766f29dd697dc00416738fe2 Mon Sep 17 00:00:00 2001
From: Pierrick Bouvier <[email protected]>
Date: Tue, 7 Jul 2026 13:47:08 -0700
Subject: [PATCH] tests/tcg/arm/fcvt.c: use raw opcode for FPRCVT
fcvtzs d0,s31 requires fprcvt support in compiler, which is only
available from gcc-16. Since our debian-all-test-cross container has
gcc-aarch64-14, this test will never run in CI.
Replace the concerned instruction with raw opcode, obtained from:
$ echo "fcvtzs d0, s31" | llvm-mc-22 -triple=aarch64 -mattr=fprcvt
--show-encoding
fcvtzs d0, s31 // encoding: [0xe0,0x03,0x36,0x9e]
Signed-off-by: Pierrick Bouvier <[email protected]>
---
tests/tcg/arm/fcvt.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/tests/tcg/arm/fcvt.c b/tests/tcg/arm/fcvt.c
index 7c0cc4367e7..8c81ba8a1bc 100644
--- a/tests/tcg/arm/fcvt.c
+++ b/tests/tcg/arm/fcvt.c
@@ -173,9 +173,11 @@ static void convert_single_to_integer(void)
output = input;
#else
#ifdef FPRCVT
- asm("fcvtzs d0, %s1\r\n"
+ asm("fmov s31, %s1\n\t"
+ /* "fcvtzs d0, s31\n\t" */
+ ".byte 0xe0,0x03,0x36,0x9e\n\t"
"fmov %0, d0" :
- "=r" (output) : "w" (input));
+ "=r" (output) : "w" (input) : "s31", "d0");
#else
asm("fcvtzs %0, %s1" : "=r" (output) : "w" (input));
#endif
--
2.47.3
