Rename from z2z to zzz to indicate zd and zn may not overlap. During decode, retain z2z name and duplicate the same field into zd and zn.
Signed-off-by: Richard Henderson <[email protected]> --- target/arm/tcg/translate-sme.c | 61 ++++++++++++++++------------------ target/arm/tcg/sme.decode | 5 ++- 2 files changed, 30 insertions(+), 36 deletions(-) diff --git a/target/arm/tcg/translate-sme.c b/target/arm/tcg/translate-sme.c index cee609cc07..5f02d462d3 100644 --- a/target/arm/tcg/translate-sme.c +++ b/target/arm/tcg/translate-sme.c @@ -718,36 +718,33 @@ TRANS_FEAT(SRSHL_n1, aa64_sme2, do_zzz_n1, a, gen_sme2_srshl) TRANS_FEAT(URSHL_n1, aa64_sme2, do_zzz_n1, a, gen_sme2_urshl) TRANS_FEAT(SQDMULH_n1, aa64_sme2, do_zzz_n1, a, gen_gvec_sve2_sqdmulh) -static bool do_z2z_nn(DisasContext *s, arg_z2z_en *a, GVecGen3Fn *fn) +static bool do_zzz_nn(DisasContext *s, arg_zzz_en *a, GVecGen3Fn *fn) { - int esz, dn, dm, vsz, n; + int esz = a->esz, vsz; if (!sme_sm_enabled_check(s)) { return true; } - esz = a->esz; - n = a->n; - dn = a->zdn; - dm = a->zm; vsz = streaming_vec_reg_size(s); - for (int i = 0; i < n; i++) { - int dofs = vec_full_reg_offset(s, dn + i); - int mofs = vec_full_reg_offset(s, dm + i); + for (int i = 0, n = a->n; i < n; i++) { + int dofs = vec_full_reg_offset(s, a->zd + i); + int nofs = vec_full_reg_offset(s, a->zn + i); + int mofs = vec_full_reg_offset(s, a->zm + i); - fn(esz, dofs, dofs, mofs, vsz, vsz); + fn(esz, dofs, nofs, mofs, vsz, vsz); } return true; } -TRANS_FEAT(SMAX_nn, aa64_sme2, do_z2z_nn, a, tcg_gen_gvec_smax) -TRANS_FEAT(SMIN_nn, aa64_sme2, do_z2z_nn, a, tcg_gen_gvec_smin) -TRANS_FEAT(UMAX_nn, aa64_sme2, do_z2z_nn, a, tcg_gen_gvec_umax) -TRANS_FEAT(UMIN_nn, aa64_sme2, do_z2z_nn, a, tcg_gen_gvec_umin) -TRANS_FEAT(SRSHL_nn, aa64_sme2, do_z2z_nn, a, gen_sme2_srshl) -TRANS_FEAT(URSHL_nn, aa64_sme2, do_z2z_nn, a, gen_sme2_urshl) -TRANS_FEAT(SQDMULH_nn, aa64_sme2, do_z2z_nn, a, gen_gvec_sve2_sqdmulh) +TRANS_FEAT(SMAX_nn, aa64_sme2, do_zzz_nn, a, tcg_gen_gvec_smax) +TRANS_FEAT(SMIN_nn, aa64_sme2, do_zzz_nn, a, tcg_gen_gvec_smin) +TRANS_FEAT(UMAX_nn, aa64_sme2, do_zzz_nn, a, tcg_gen_gvec_umax) +TRANS_FEAT(UMIN_nn, aa64_sme2, do_zzz_nn, a, tcg_gen_gvec_umin) +TRANS_FEAT(SRSHL_nn, aa64_sme2, do_zzz_nn, a, gen_sme2_srshl) +TRANS_FEAT(URSHL_nn, aa64_sme2, do_zzz_nn, a, gen_sme2_urshl) +TRANS_FEAT(SQDMULH_nn, aa64_sme2, do_zzz_nn, a, gen_gvec_sve2_sqdmulh) static bool do_zzz_n1_fpst(DisasContext *s, arg_zzz_en *a, gen_helper_gvec_3_ptr * const fns[4]) @@ -788,10 +785,10 @@ static bool do_zzz_n1_fpst(DisasContext *s, arg_zzz_en *a, return true; } -static bool do_z2z_nn_fpst(DisasContext *s, arg_z2z_en *a, +static bool do_zzz_nn_fpst(DisasContext *s, arg_zzz_en *a, gen_helper_gvec_3_ptr * const fns[4]) { - int esz = a->esz, n, dn, dm, vsz; + int esz = a->esz, vsz; gen_helper_gvec_3_ptr *fn = fns[esz]; TCGv_ptr fpst; @@ -806,16 +803,14 @@ static bool do_z2z_nn_fpst(DisasContext *s, arg_z2z_en *a, } fpst = fpstatus_ptr(esz == MO_16 ? FPST_A64_F16 : FPST_A64); - n = a->n; - dn = a->zdn; - dm = a->zm; vsz = streaming_vec_reg_size(s); - for (int i = 0; i < n; i++) { - int dofs = vec_full_reg_offset(s, dn + i); - int mofs = vec_full_reg_offset(s, dm + i); + for (int i = 0, n = a->n; i < n; i++) { + int dofs = vec_full_reg_offset(s, a->zd + i); + int nofs = vec_full_reg_offset(s, a->zn + i); + int mofs = vec_full_reg_offset(s, a->zm + i); - tcg_gen_gvec_3_ptr(dofs, dofs, mofs, fpst, vsz, vsz, 0, fn); + tcg_gen_gvec_3_ptr(dofs, nofs, mofs, fpst, vsz, vsz, 0, fn); } return true; } @@ -831,7 +826,7 @@ static gen_helper_gvec_3_ptr * const f_vector_fmax[2][4] = { gen_helper_gvec_ah_fmax_d }, }; TRANS_FEAT(FMAX_n1, aa64_sme2, do_zzz_n1_fpst, a, f_vector_fmax[s->fpcr_ah]) -TRANS_FEAT(FMAX_nn, aa64_sme2, do_z2z_nn_fpst, a, f_vector_fmax[s->fpcr_ah]) +TRANS_FEAT(FMAX_nn, aa64_sme2, do_zzz_nn_fpst, a, f_vector_fmax[s->fpcr_ah]) static gen_helper_gvec_3_ptr * const f_vector_fmin[2][4] = { { gen_helper_gvec_fmin_b16, @@ -844,7 +839,7 @@ static gen_helper_gvec_3_ptr * const f_vector_fmin[2][4] = { gen_helper_gvec_ah_fmin_d }, }; TRANS_FEAT(FMIN_n1, aa64_sme2, do_zzz_n1_fpst, a, f_vector_fmin[s->fpcr_ah]) -TRANS_FEAT(FMIN_nn, aa64_sme2, do_z2z_nn_fpst, a, f_vector_fmin[s->fpcr_ah]) +TRANS_FEAT(FMIN_nn, aa64_sme2, do_zzz_nn_fpst, a, f_vector_fmin[s->fpcr_ah]) static gen_helper_gvec_3_ptr * const f_vector_fmaxnm[4] = { gen_helper_gvec_fmaxnum_b16, @@ -853,7 +848,7 @@ static gen_helper_gvec_3_ptr * const f_vector_fmaxnm[4] = { gen_helper_gvec_fmaxnum_d, }; TRANS_FEAT(FMAXNM_n1, aa64_sme2, do_zzz_n1_fpst, a, f_vector_fmaxnm) -TRANS_FEAT(FMAXNM_nn, aa64_sme2, do_z2z_nn_fpst, a, f_vector_fmaxnm) +TRANS_FEAT(FMAXNM_nn, aa64_sme2, do_zzz_nn_fpst, a, f_vector_fmaxnm) static gen_helper_gvec_3_ptr * const f_vector_fminnm[4] = { gen_helper_gvec_fminnum_b16, @@ -862,7 +857,7 @@ static gen_helper_gvec_3_ptr * const f_vector_fminnm[4] = { gen_helper_gvec_fminnum_d, }; TRANS_FEAT(FMINNM_n1, aa64_sme2, do_zzz_n1_fpst, a, f_vector_fminnm) -TRANS_FEAT(FMINNM_nn, aa64_sme2, do_z2z_nn_fpst, a, f_vector_fminnm) +TRANS_FEAT(FMINNM_nn, aa64_sme2, do_zzz_nn_fpst, a, f_vector_fminnm) static gen_helper_gvec_3_ptr * const f_vector_famax[4] = { NULL, @@ -870,7 +865,7 @@ static gen_helper_gvec_3_ptr * const f_vector_famax[4] = { gen_helper_gvec_famax_s, gen_helper_gvec_famax_d, }; -TRANS_FEAT(FAMAX_nn, aa64_sme2_faminmax, do_z2z_nn_fpst, a, f_vector_famax) +TRANS_FEAT(FAMAX_nn, aa64_sme2_faminmax, do_zzz_nn_fpst, a, f_vector_famax) static gen_helper_gvec_3_ptr * const f_vector_famin[4] = { NULL, @@ -878,7 +873,7 @@ static gen_helper_gvec_3_ptr * const f_vector_famin[4] = { gen_helper_gvec_famin_s, gen_helper_gvec_famin_d, }; -TRANS_FEAT(FAMIN_nn, aa64_sme2_faminmax, do_z2z_nn_fpst, a, f_vector_famin) +TRANS_FEAT(FAMIN_nn, aa64_sme2_faminmax, do_zzz_nn_fpst, a, f_vector_famin) static gen_helper_gvec_3_ptr * const f_vector_fscale[4] = { NULL, @@ -887,7 +882,7 @@ static gen_helper_gvec_3_ptr * const f_vector_fscale[4] = { gen_helper_gvec_fscale_d, }; TRANS_FEAT(FSCALE_n1, aa64_sme2_f8cvt, do_zzz_n1_fpst, a, f_vector_fscale) -TRANS_FEAT(FSCALE_nn, aa64_sme2_f8cvt, do_z2z_nn_fpst, a, f_vector_fscale) +TRANS_FEAT(FSCALE_nn, aa64_sme2_f8cvt, do_zzz_nn_fpst, a, f_vector_fscale) /* Add/Sub vector Z[m] to each Z[n*N] with result in ZA[d*N]. */ static bool do_azz_n1(DisasContext *s, arg_azz_n *a, int esz, diff --git a/target/arm/tcg/sme.decode b/target/arm/tcg/sme.decode index 30946330ff..36fbe24faf 100644 --- a/target/arm/tcg/sme.decode +++ b/target/arm/tcg/sme.decode @@ -221,7 +221,6 @@ UMOPA2_s 1010000 1 10 0 ..... ... ... ..... . 10 .. @op_32 %zd_ax4 2:3 !function=times_4 &zzz_en zd zn zm esz n -&z2z_en zdn zm esz n @z2z_2x1 ....... . esz:2 .. zm:4 ....0. ..... .... . \ &zzz_en n=2 zd=%zd_ax2 zn=%zd_ax2 @@ -266,9 +265,9 @@ FSCALE_n1 1100000 1 .. 10 .... 1010.0 01100 .... 0 @z2z_4x1 %zm_ax4 18:3 !function=times_4 @z2z_2x2 ....... . esz:2 . ....0 ....0. ..... .... . \ - &z2z_en n=2 zdn=%zd_ax2 zm=%zm_ax2 + &zzz_en n=2 zd=%zd_ax2 zn=%zd_ax2 zm=%zm_ax2 @z2z_4x4 ....... . esz:2 . ...00 ....1. ..... ...0 . \ - &z2z_en n=4 zdn=%zd_ax4 zm=%zm_ax4 + &zzz_en n=4 zd=%zd_ax4 zn=%zd_ax4 zm=%zm_ax4 SMAX_nn 1100000 1 .. 1 ..... 1011.0 00000 .... 0 @z2z_2x2 SMAX_nn 1100000 1 .. 1 ..... 1011.0 00000 .... 0 @z2z_4x4 -- 2.43.0
