Split decode so that feature detection can be handled
external to do_zzz_{n1,nn}_fpst.Signed-off-by: Richard Henderson <[email protected]> --- target/arm/cpu-features.h | 5 ++ target/arm/tcg/translate-sme.c | 61 +++++++++++++---------- target/arm/tcg/sme.decode | 90 ++++++++++++++++++++++++++++------ 3 files changed, 115 insertions(+), 41 deletions(-) diff --git a/target/arm/cpu-features.h b/target/arm/cpu-features.h index 280ead6f9c..e444397a47 100644 --- a/target/arm/cpu-features.h +++ b/target/arm/cpu-features.h @@ -1743,6 +1743,11 @@ static inline bool isar_feature_aa64_sme2p2_or_sve2p2(const ARMISARegisters *id) return isar_feature_aa64_sme2p2(id) || isar_feature_aa64_sve2p2(id); } +static inline bool isar_feature_aa64_sme2_sve_b16b16(const ARMISARegisters *id) +{ + return isar_feature_aa64_sme2(id) && isar_feature_aa64_sve_b16b16(id); +} + static inline bool isar_feature_aa64_sme2_i16i64(const ARMISARegisters *id) { return isar_feature_aa64_sme2(id) && isar_feature_aa64_sme_i16i64(id); diff --git a/target/arm/tcg/translate-sme.c b/target/arm/tcg/translate-sme.c index ca88b3cdcc..379764da24 100644 --- a/target/arm/tcg/translate-sme.c +++ b/target/arm/tcg/translate-sme.c @@ -747,20 +747,15 @@ TRANS_FEAT(URSHL_nn, aa64_sme2, do_zzz_nn, a, gen_sme2_urshl) TRANS_FEAT(SQDMULH_nn, aa64_sme2, do_zzz_nn, a, gen_gvec_sve2_sqdmulh) static bool do_zzz_n1_fpst(DisasContext *s, arg_zzz_en *a, - gen_helper_gvec_3_ptr * const fns[4]) + gen_helper_gvec_3_ptr *fn) { int esz = a->esz, vsz, mofs; int overlap = -1; - gen_helper_gvec_3_ptr *fn = fns[esz]; TCGv_ptr fpst; if (fn == NULL) { return false; } - /* These insns use MO_8 to encode BFloat16. */ - if (esz == MO_8 && !dc_isar_feature(aa64_sve_b16b16, s)) { - return false; - } if (!sme_sm_enabled_check(s)) { return true; } @@ -786,18 +781,14 @@ static bool do_zzz_n1_fpst(DisasContext *s, arg_zzz_en *a, } static bool do_zzz_nn_fpst(DisasContext *s, arg_zzz_en *a, - gen_helper_gvec_3_ptr * const fns[4]) + gen_helper_gvec_3_ptr *fn) { int esz = a->esz, vsz; - gen_helper_gvec_3_ptr *fn = fns[esz]; TCGv_ptr fpst; if (fn == NULL) { return false; } - if (esz == MO_8 && !dc_isar_feature(aa64_sve_b16b16, s)) { - return false; - } if (!sme_sm_enabled_check(s)) { return true; } @@ -825,8 +816,14 @@ static gen_helper_gvec_3_ptr * const f_vector_fmax[2][4] = { gen_helper_gvec_ah_fmax_s, gen_helper_gvec_ah_fmax_d }, }; -TRANS_FEAT(FMAX_n1, aa64_sme2, do_zzz_n1_fpst, a, f_vector_fmax[s->fpcr_ah]) -TRANS_FEAT(FMAX_nn, aa64_sme2, do_zzz_nn_fpst, a, f_vector_fmax[s->fpcr_ah]) +TRANS_FEAT(BFMAX_n1, aa64_sme2_sve_b16b16, do_zzz_n1_fpst, a, + f_vector_fmax[s->fpcr_ah][0]) +TRANS_FEAT(FMAX_n1, aa64_sme2, do_zzz_n1_fpst, a, + f_vector_fmax[s->fpcr_ah][a->esz]) +TRANS_FEAT(BFMAX_nn, aa64_sme2_sve_b16b16, do_zzz_nn_fpst, a, + f_vector_fmax[s->fpcr_ah][0]) +TRANS_FEAT(FMAX_nn, aa64_sme2, do_zzz_nn_fpst, a, + f_vector_fmax[s->fpcr_ah][a->esz]) static gen_helper_gvec_3_ptr * const f_vector_fmin[2][4] = { { gen_helper_gvec_fmin_b16, @@ -838,26 +835,40 @@ static gen_helper_gvec_3_ptr * const f_vector_fmin[2][4] = { gen_helper_gvec_ah_fmin_s, gen_helper_gvec_ah_fmin_d }, }; -TRANS_FEAT(FMIN_n1, aa64_sme2, do_zzz_n1_fpst, a, f_vector_fmin[s->fpcr_ah]) -TRANS_FEAT(FMIN_nn, aa64_sme2, do_zzz_nn_fpst, a, f_vector_fmin[s->fpcr_ah]) +TRANS_FEAT(BFMIN_n1, aa64_sme2_sve_b16b16, do_zzz_n1_fpst, a, + f_vector_fmin[s->fpcr_ah][0]) +TRANS_FEAT(FMIN_n1, aa64_sme2, do_zzz_n1_fpst, a, + f_vector_fmin[s->fpcr_ah][a->esz]) +TRANS_FEAT(BFMIN_nn, aa64_sme2_sve_b16b16, do_zzz_nn_fpst, a, + f_vector_fmin[s->fpcr_ah][0]) +TRANS_FEAT(FMIN_nn, aa64_sme2, do_zzz_nn_fpst, a, + f_vector_fmin[s->fpcr_ah][a->esz]) static gen_helper_gvec_3_ptr * const f_vector_fmaxnm[4] = { - gen_helper_gvec_fmaxnum_b16, + NULL, gen_helper_gvec_fmaxnum_h, gen_helper_gvec_fmaxnum_s, gen_helper_gvec_fmaxnum_d, }; -TRANS_FEAT(FMAXNM_n1, aa64_sme2, do_zzz_n1_fpst, a, f_vector_fmaxnm) -TRANS_FEAT(FMAXNM_nn, aa64_sme2, do_zzz_nn_fpst, a, f_vector_fmaxnm) +TRANS_FEAT(BFMAXNM_n1, aa64_sme2_sve_b16b16, do_zzz_n1_fpst, a, + gen_helper_gvec_fmaxnum_b16) +TRANS_FEAT(FMAXNM_n1, aa64_sme2, do_zzz_n1_fpst, a, f_vector_fmaxnm[a->esz]) +TRANS_FEAT(BFMAXNM_nn, aa64_sme2_sve_b16b16, do_zzz_nn_fpst, a, + gen_helper_gvec_fmaxnum_b16) +TRANS_FEAT(FMAXNM_nn, aa64_sme2, do_zzz_nn_fpst, a, f_vector_fmaxnm[a->esz]) static gen_helper_gvec_3_ptr * const f_vector_fminnm[4] = { - gen_helper_gvec_fminnum_b16, + NULL, gen_helper_gvec_fminnum_h, gen_helper_gvec_fminnum_s, gen_helper_gvec_fminnum_d, }; -TRANS_FEAT(FMINNM_n1, aa64_sme2, do_zzz_n1_fpst, a, f_vector_fminnm) -TRANS_FEAT(FMINNM_nn, aa64_sme2, do_zzz_nn_fpst, a, f_vector_fminnm) +TRANS_FEAT(BFMINNM_n1, aa64_sme2_sve_b16b16, do_zzz_n1_fpst, a, + gen_helper_gvec_fminnum_b16) +TRANS_FEAT(FMINNM_n1, aa64_sme2, do_zzz_n1_fpst, a, f_vector_fminnm[a->esz]) +TRANS_FEAT(BFMINNM_nn, aa64_sme2_sve_b16b16, do_zzz_nn_fpst, a, + gen_helper_gvec_fminnum_b16) +TRANS_FEAT(FMINNM_nn, aa64_sme2, do_zzz_nn_fpst, a, f_vector_fminnm[a->esz]) static gen_helper_gvec_3_ptr * const f_vector_famax[4] = { NULL, @@ -865,7 +876,7 @@ static gen_helper_gvec_3_ptr * const f_vector_famax[4] = { gen_helper_gvec_famax_s, gen_helper_gvec_famax_d, }; -TRANS_FEAT(FAMAX_nn, aa64_sme2_faminmax, do_zzz_nn_fpst, a, f_vector_famax) +TRANS_FEAT(FAMAX_nn, aa64_sme2_faminmax, do_zzz_nn_fpst, a, f_vector_famax[a->esz]) static gen_helper_gvec_3_ptr * const f_vector_famin[4] = { NULL, @@ -873,7 +884,7 @@ static gen_helper_gvec_3_ptr * const f_vector_famin[4] = { gen_helper_gvec_famin_s, gen_helper_gvec_famin_d, }; -TRANS_FEAT(FAMIN_nn, aa64_sme2_faminmax, do_zzz_nn_fpst, a, f_vector_famin) +TRANS_FEAT(FAMIN_nn, aa64_sme2_faminmax, do_zzz_nn_fpst, a, f_vector_famin[a->esz]) static gen_helper_gvec_3_ptr * const f_vector_fscale[4] = { NULL, @@ -881,8 +892,8 @@ static gen_helper_gvec_3_ptr * const f_vector_fscale[4] = { gen_helper_gvec_fscale_s, gen_helper_gvec_fscale_d, }; -TRANS_FEAT(FSCALE_n1, aa64_sme2_f8cvt, do_zzz_n1_fpst, a, f_vector_fscale) -TRANS_FEAT(FSCALE_nn, aa64_sme2_f8cvt, do_zzz_nn_fpst, a, f_vector_fscale) +TRANS_FEAT(FSCALE_n1, aa64_sme2_f8cvt, do_zzz_n1_fpst, a, f_vector_fscale[a->esz]) +TRANS_FEAT(FSCALE_nn, aa64_sme2_f8cvt, do_zzz_nn_fpst, a, f_vector_fscale[a->esz]) /* Add/Sub vector Z[m] to each Z[n*N] with result in ZA[d*N]. */ static bool do_azz_n1(DisasContext *s, arg_azz_n *a, int esz, diff --git a/target/arm/tcg/sme.decode b/target/arm/tcg/sme.decode index 36fbe24faf..e1bef9987b 100644 --- a/target/arm/tcg/sme.decode +++ b/target/arm/tcg/sme.decode @@ -227,6 +227,11 @@ UMOPA2_s 1010000 1 10 0 ..... ... ... ..... . 10 .. @op_32 @z2z_4x1 ....... . esz:2 .. zm:4 ....1. ..... ...0 . \ &zzz_en n=4 zd=%zd_ax4 zn=%zd_ax4 +@z2z_2x1_e0 ....... . .. .. zm:4 ....0. ..... .... . \ + &zzz_en esz=0 n=2 zd=%zd_ax2 zn=%zd_ax2 +@z2z_4x1_e0 ....... . .. .. zm:4 ....1. ..... ...0 . \ + &zzz_en esz=0 n=4 zd=%zd_ax4 zn=%zd_ax4 + SMAX_n1 1100000 1 .. 10 .... 1010.0 00000 .... 0 @z2z_2x1 SMAX_n1 1100000 1 .. 10 .... 1010.0 00000 .... 0 @z2z_4x1 UMAX_n1 1100000 1 .. 10 .... 1010.0 00000 .... 1 @z2z_2x1 @@ -236,14 +241,38 @@ SMIN_n1 1100000 1 .. 10 .... 1010.0 00001 .... 0 @z2z_4x1 UMIN_n1 1100000 1 .. 10 .... 1010.0 00001 .... 1 @z2z_2x1 UMIN_n1 1100000 1 .. 10 .... 1010.0 00001 .... 1 @z2z_4x1 -FMAX_n1 1100000 1 .. 10 .... 1010.0 01000 .... 0 @z2z_2x1 -FMAX_n1 1100000 1 .. 10 .... 1010.0 01000 .... 0 @z2z_4x1 -FMIN_n1 1100000 1 .. 10 .... 1010.0 01000 .... 1 @z2z_2x1 -FMIN_n1 1100000 1 .. 10 .... 1010.0 01000 .... 1 @z2z_4x1 -FMAXNM_n1 1100000 1 .. 10 .... 1010.0 01001 .... 0 @z2z_2x1 -FMAXNM_n1 1100000 1 .. 10 .... 1010.0 01001 .... 0 @z2z_4x1 -FMINNM_n1 1100000 1 .. 10 .... 1010.0 01001 .... 1 @z2z_2x1 -FMINNM_n1 1100000 1 .. 10 .... 1010.0 01001 .... 1 @z2z_4x1 +{ + BFMAX_n1 1100000 1 00 10 .... 1010.0 01000 .... 0 @z2z_2x1_e0 + FMAX_n1 1100000 1 .. 10 .... 1010.0 01000 .... 0 @z2z_2x1 +} +{ + BFMAX_n1 1100000 1 00 10 .... 1010.0 01000 .... 0 @z2z_4x1_e0 + FMAX_n1 1100000 1 .. 10 .... 1010.0 01000 .... 0 @z2z_4x1 +} +{ + BFMIN_n1 1100000 1 00 10 .... 1010.0 01000 .... 1 @z2z_2x1_e0 + FMIN_n1 1100000 1 .. 10 .... 1010.0 01000 .... 1 @z2z_2x1 +} +{ + BFMIN_n1 1100000 1 00 10 .... 1010.0 01000 .... 1 @z2z_4x1_e0 + FMIN_n1 1100000 1 .. 10 .... 1010.0 01000 .... 1 @z2z_4x1 +} +{ + BFMAXNM_n1 1100000 1 00 10 .... 1010.0 01001 .... 0 @z2z_2x1_e0 + FMAXNM_n1 1100000 1 .. 10 .... 1010.0 01001 .... 0 @z2z_2x1 +} +{ + BFMAXNM_n1 1100000 1 00 10 .... 1010.0 01001 .... 0 @z2z_4x1_e0 + FMAXNM_n1 1100000 1 .. 10 .... 1010.0 01001 .... 0 @z2z_4x1 +} +{ + BFMINNM_n1 1100000 1 00 10 .... 1010.0 01001 .... 1 @z2z_2x1_e0 + FMINNM_n1 1100000 1 .. 10 .... 1010.0 01001 .... 1 @z2z_2x1 +} +{ + BFMINNM_n1 1100000 1 00 10 .... 1010.0 01001 .... 1 @z2z_4x1_e0 + FMINNM_n1 1100000 1 .. 10 .... 1010.0 01001 .... 1 @z2z_4x1 +} SRSHL_n1 1100000 1 .. 10 .... 1010.0 10001 .... 0 @z2z_2x1 SRSHL_n1 1100000 1 .. 10 .... 1010.0 10001 .... 0 @z2z_4x1 @@ -269,6 +298,11 @@ FSCALE_n1 1100000 1 .. 10 .... 1010.0 01100 .... 0 @z2z_4x1 @z2z_4x4 ....... . esz:2 . ...00 ....1. ..... ...0 . \ &zzz_en n=4 zd=%zd_ax4 zn=%zd_ax4 zm=%zm_ax4 +@z2z_2x2_e0 ....... . .. . ....0 ....0. ..... .... . \ + &zzz_en esz=0 n=2 zd=%zd_ax2 zn=%zd_ax2 zm=%zm_ax2 +@z2z_4x4_e0 ....... . .. . ...00 ....1. ..... ...0 . \ + &zzz_en esz=0 n=4 zd=%zd_ax4 zn=%zd_ax4 zm=%zm_ax4 + SMAX_nn 1100000 1 .. 1 ..... 1011.0 00000 .... 0 @z2z_2x2 SMAX_nn 1100000 1 .. 1 ..... 1011.0 00000 .... 0 @z2z_4x4 UMAX_nn 1100000 1 .. 1 ..... 1011.0 00000 .... 1 @z2z_2x2 @@ -278,14 +312,38 @@ SMIN_nn 1100000 1 .. 1 ..... 1011.0 00001 .... 0 @z2z_4x4 UMIN_nn 1100000 1 .. 1 ..... 1011.0 00001 .... 1 @z2z_2x2 UMIN_nn 1100000 1 .. 1 ..... 1011.0 00001 .... 1 @z2z_4x4 -FMAX_nn 1100000 1 .. 1 ..... 1011.0 01000 .... 0 @z2z_2x2 -FMAX_nn 1100000 1 .. 1 ..... 1011.0 01000 .... 0 @z2z_4x4 -FMIN_nn 1100000 1 .. 1 ..... 1011.0 01000 .... 1 @z2z_2x2 -FMIN_nn 1100000 1 .. 1 ..... 1011.0 01000 .... 1 @z2z_4x4 -FMAXNM_nn 1100000 1 .. 1 ..... 1011.0 01001 .... 0 @z2z_2x2 -FMAXNM_nn 1100000 1 .. 1 ..... 1011.0 01001 .... 0 @z2z_4x4 -FMINNM_nn 1100000 1 .. 1 ..... 1011.0 01001 .... 1 @z2z_2x2 -FMINNM_nn 1100000 1 .. 1 ..... 1011.0 01001 .... 1 @z2z_4x4 +{ + BFMAX_nn 1100000 1 00 1 ..... 1011.0 01000 .... 0 @z2z_2x2_e0 + FMAX_nn 1100000 1 .. 1 ..... 1011.0 01000 .... 0 @z2z_2x2 +} +{ + BFMAX_nn 1100000 1 00 1 ..... 1011.0 01000 .... 0 @z2z_4x4_e0 + FMAX_nn 1100000 1 .. 1 ..... 1011.0 01000 .... 0 @z2z_4x4 +} +{ + BFMIN_nn 1100000 1 00 1 ..... 1011.0 01000 .... 1 @z2z_2x2_e0 + FMIN_nn 1100000 1 .. 1 ..... 1011.0 01000 .... 1 @z2z_2x2 +} +{ + BFMIN_nn 1100000 1 00 1 ..... 1011.0 01000 .... 1 @z2z_4x4_e0 + FMIN_nn 1100000 1 .. 1 ..... 1011.0 01000 .... 1 @z2z_4x4 +} +{ + BFMAXNM_nn 1100000 1 00 1 ..... 1011.0 01001 .... 0 @z2z_2x2_e0 + FMAXNM_nn 1100000 1 .. 1 ..... 1011.0 01001 .... 0 @z2z_2x2 +} +{ + BFMAXNM_nn 1100000 1 00 1 ..... 1011.0 01001 .... 0 @z2z_4x4_e0 + FMAXNM_nn 1100000 1 .. 1 ..... 1011.0 01001 .... 0 @z2z_4x4 +} +{ + BFMINNM_nn 1100000 1 00 1 ..... 1011.0 01001 .... 1 @z2z_2x2_e0 + FMINNM_nn 1100000 1 .. 1 ..... 1011.0 01001 .... 1 @z2z_2x2 +} +{ + BFMINNM_nn 1100000 1 00 1 ..... 1011.0 01001 .... 1 @z2z_4x4_e0 + FMINNM_nn 1100000 1 .. 1 ..... 1011.0 01001 .... 1 @z2z_4x4 +} SRSHL_nn 1100000 1 .. 1 ..... 1011.0 10001 .... 0 @z2z_2x2 SRSHL_nn 1100000 1 .. 1 ..... 1011.0 10001 .... 0 @z2z_4x4 -- 2.43.0
