Rename from z2z to zzz to indicate zd and zn may not overlap. During decode, retain z2z name and duplicate the same field into zd and zn.
Signed-off-by: Richard Henderson <[email protected]> --- target/arm/tcg/translate-sme.c | 71 +++++++++++++++++----------------- target/arm/tcg/sme.decode | 8 ++-- 2 files changed, 39 insertions(+), 40 deletions(-) diff --git a/target/arm/tcg/translate-sme.c b/target/arm/tcg/translate-sme.c index fb296ae02f..cee609cc07 100644 --- a/target/arm/tcg/translate-sme.c +++ b/target/arm/tcg/translate-sme.c @@ -659,31 +659,30 @@ TRANS_FEAT(BMOPA, aa64_sme2, do_outprod, a, MO_32, gen_helper_sme2_bmopa_s) TRANS_FEAT(SMOPA2_s, aa64_sme2, do_outprod, a, MO_32, gen_helper_sme2_smopa2_s) TRANS_FEAT(UMOPA2_s, aa64_sme2, do_outprod, a, MO_32, gen_helper_sme2_umopa2_s) -static bool do_z2z_n1(DisasContext *s, arg_z2z_en *a, GVecGen3Fn *fn) +static bool do_zzz_n1(DisasContext *s, arg_zzz_en *a, GVecGen3Fn *fn) { - int esz, dn, vsz, mofs, n; - bool overlap = false; + int esz = a->esz, vsz, mofs; + int overlap = -1; if (!sme_sm_enabled_check(s)) { return true; } - esz = a->esz; - n = a->n; - dn = a->zdn; mofs = vec_full_reg_offset(s, a->zm); vsz = streaming_vec_reg_size(s); - for (int i = 0; i < n; i++) { - int dofs = vec_full_reg_offset(s, dn + i); + for (int i = 0, n = a->n; i < n; i++) { + int dofs = vec_full_reg_offset(s, a->zd + i); + int nofs = vec_full_reg_offset(s, a->zn + i); if (dofs == mofs) { - overlap = true; + overlap = i; } else { - fn(esz, dofs, dofs, mofs, vsz, vsz); + fn(esz, dofs, nofs, mofs, vsz, vsz); } } - if (overlap) { - fn(esz, mofs, mofs, mofs, vsz, vsz); + if (overlap >= 0) { + int nofs = vec_full_reg_offset(s, a->zn + overlap); + fn(esz, mofs, nofs, mofs, vsz, vsz); } return true; } @@ -710,14 +709,14 @@ static void gen_sme2_urshl(unsigned vece, uint32_t rd_ofs, uint32_t rn_ofs, tcg_gen_gvec_3_ool(rd_ofs, rn_ofs, rm_ofs, opr_sz, max_sz, 0, fns[vece]); } -TRANS_FEAT(ADD_n1, aa64_sme2, do_z2z_n1, a, tcg_gen_gvec_add) -TRANS_FEAT(SMAX_n1, aa64_sme2, do_z2z_n1, a, tcg_gen_gvec_smax) -TRANS_FEAT(SMIN_n1, aa64_sme2, do_z2z_n1, a, tcg_gen_gvec_smin) -TRANS_FEAT(UMAX_n1, aa64_sme2, do_z2z_n1, a, tcg_gen_gvec_umax) -TRANS_FEAT(UMIN_n1, aa64_sme2, do_z2z_n1, a, tcg_gen_gvec_umin) -TRANS_FEAT(SRSHL_n1, aa64_sme2, do_z2z_n1, a, gen_sme2_srshl) -TRANS_FEAT(URSHL_n1, aa64_sme2, do_z2z_n1, a, gen_sme2_urshl) -TRANS_FEAT(SQDMULH_n1, aa64_sme2, do_z2z_n1, a, gen_gvec_sve2_sqdmulh) +TRANS_FEAT(ADD_n1, aa64_sme2, do_zzz_n1, a, tcg_gen_gvec_add) +TRANS_FEAT(SMAX_n1, aa64_sme2, do_zzz_n1, a, tcg_gen_gvec_smax) +TRANS_FEAT(SMIN_n1, aa64_sme2, do_zzz_n1, a, tcg_gen_gvec_smin) +TRANS_FEAT(UMAX_n1, aa64_sme2, do_zzz_n1, a, tcg_gen_gvec_umax) +TRANS_FEAT(UMIN_n1, aa64_sme2, do_zzz_n1, a, tcg_gen_gvec_umin) +TRANS_FEAT(SRSHL_n1, aa64_sme2, do_zzz_n1, a, gen_sme2_srshl) +TRANS_FEAT(URSHL_n1, aa64_sme2, do_zzz_n1, a, gen_sme2_urshl) +TRANS_FEAT(SQDMULH_n1, aa64_sme2, do_zzz_n1, a, gen_gvec_sve2_sqdmulh) static bool do_z2z_nn(DisasContext *s, arg_z2z_en *a, GVecGen3Fn *fn) { @@ -750,11 +749,11 @@ TRANS_FEAT(SRSHL_nn, aa64_sme2, do_z2z_nn, a, gen_sme2_srshl) TRANS_FEAT(URSHL_nn, aa64_sme2, do_z2z_nn, a, gen_sme2_urshl) TRANS_FEAT(SQDMULH_nn, aa64_sme2, do_z2z_nn, a, gen_gvec_sve2_sqdmulh) -static bool do_z2z_n1_fpst(DisasContext *s, arg_z2z_en *a, +static bool do_zzz_n1_fpst(DisasContext *s, arg_zzz_en *a, gen_helper_gvec_3_ptr * const fns[4]) { - int esz = a->esz, n, dn, vsz, mofs; - bool overlap = false; + int esz = a->esz, vsz, mofs; + int overlap = -1; gen_helper_gvec_3_ptr *fn = fns[esz]; TCGv_ptr fpst; @@ -770,21 +769,21 @@ static bool do_z2z_n1_fpst(DisasContext *s, arg_z2z_en *a, } fpst = fpstatus_ptr(esz == MO_16 ? FPST_A64_F16 : FPST_A64); - n = a->n; - dn = a->zdn; mofs = vec_full_reg_offset(s, a->zm); vsz = streaming_vec_reg_size(s); - for (int i = 0; i < n; i++) { - int dofs = vec_full_reg_offset(s, dn + i); + for (int i = 0, n = a->n; i < n; i++) { + int dofs = vec_full_reg_offset(s, a->zd + i); + int nofs = vec_full_reg_offset(s, a->zn + i); if (dofs == mofs) { - overlap = true; + overlap = i; } else { - tcg_gen_gvec_3_ptr(dofs, dofs, mofs, fpst, vsz, vsz, 0, fn); + tcg_gen_gvec_3_ptr(dofs, nofs, mofs, fpst, vsz, vsz, 0, fn); } } - if (overlap) { - tcg_gen_gvec_3_ptr(mofs, mofs, mofs, fpst, vsz, vsz, 0, fn); + if (overlap >= 0) { + int nofs = vec_full_reg_offset(s, a->zn + overlap); + tcg_gen_gvec_3_ptr(mofs, nofs, mofs, fpst, vsz, vsz, 0, fn); } return true; } @@ -831,7 +830,7 @@ static gen_helper_gvec_3_ptr * const f_vector_fmax[2][4] = { gen_helper_gvec_ah_fmax_s, gen_helper_gvec_ah_fmax_d }, }; -TRANS_FEAT(FMAX_n1, aa64_sme2, do_z2z_n1_fpst, a, f_vector_fmax[s->fpcr_ah]) +TRANS_FEAT(FMAX_n1, aa64_sme2, do_zzz_n1_fpst, a, f_vector_fmax[s->fpcr_ah]) TRANS_FEAT(FMAX_nn, aa64_sme2, do_z2z_nn_fpst, a, f_vector_fmax[s->fpcr_ah]) static gen_helper_gvec_3_ptr * const f_vector_fmin[2][4] = { @@ -844,7 +843,7 @@ static gen_helper_gvec_3_ptr * const f_vector_fmin[2][4] = { gen_helper_gvec_ah_fmin_s, gen_helper_gvec_ah_fmin_d }, }; -TRANS_FEAT(FMIN_n1, aa64_sme2, do_z2z_n1_fpst, a, f_vector_fmin[s->fpcr_ah]) +TRANS_FEAT(FMIN_n1, aa64_sme2, do_zzz_n1_fpst, a, f_vector_fmin[s->fpcr_ah]) TRANS_FEAT(FMIN_nn, aa64_sme2, do_z2z_nn_fpst, a, f_vector_fmin[s->fpcr_ah]) static gen_helper_gvec_3_ptr * const f_vector_fmaxnm[4] = { @@ -853,7 +852,7 @@ static gen_helper_gvec_3_ptr * const f_vector_fmaxnm[4] = { gen_helper_gvec_fmaxnum_s, gen_helper_gvec_fmaxnum_d, }; -TRANS_FEAT(FMAXNM_n1, aa64_sme2, do_z2z_n1_fpst, a, f_vector_fmaxnm) +TRANS_FEAT(FMAXNM_n1, aa64_sme2, do_zzz_n1_fpst, a, f_vector_fmaxnm) TRANS_FEAT(FMAXNM_nn, aa64_sme2, do_z2z_nn_fpst, a, f_vector_fmaxnm) static gen_helper_gvec_3_ptr * const f_vector_fminnm[4] = { @@ -862,7 +861,7 @@ static gen_helper_gvec_3_ptr * const f_vector_fminnm[4] = { gen_helper_gvec_fminnum_s, gen_helper_gvec_fminnum_d, }; -TRANS_FEAT(FMINNM_n1, aa64_sme2, do_z2z_n1_fpst, a, f_vector_fminnm) +TRANS_FEAT(FMINNM_n1, aa64_sme2, do_zzz_n1_fpst, a, f_vector_fminnm) TRANS_FEAT(FMINNM_nn, aa64_sme2, do_z2z_nn_fpst, a, f_vector_fminnm) static gen_helper_gvec_3_ptr * const f_vector_famax[4] = { @@ -887,7 +886,7 @@ static gen_helper_gvec_3_ptr * const f_vector_fscale[4] = { gen_helper_gvec_fscale_s, gen_helper_gvec_fscale_d, }; -TRANS_FEAT(FSCALE_n1, aa64_sme2_f8cvt, do_z2z_n1_fpst, a, f_vector_fscale) +TRANS_FEAT(FSCALE_n1, aa64_sme2_f8cvt, do_zzz_n1_fpst, a, f_vector_fscale) TRANS_FEAT(FSCALE_nn, aa64_sme2_f8cvt, do_z2z_nn_fpst, a, f_vector_fscale) /* Add/Sub vector Z[m] to each Z[n*N] with result in ZA[d*N]. */ diff --git a/target/arm/tcg/sme.decode b/target/arm/tcg/sme.decode index e8176fffdb..30946330ff 100644 --- a/target/arm/tcg/sme.decode +++ b/target/arm/tcg/sme.decode @@ -220,11 +220,13 @@ UMOPA2_s 1010000 1 10 0 ..... ... ... ..... . 10 .. @op_32 %zd_ax2 1:4 !function=times_2 %zd_ax4 2:3 !function=times_4 +&zzz_en zd zn zm esz n &z2z_en zdn zm esz n + @z2z_2x1 ....... . esz:2 .. zm:4 ....0. ..... .... . \ - &z2z_en n=2 zdn=%zd_ax2 + &zzz_en n=2 zd=%zd_ax2 zn=%zd_ax2 @z2z_4x1 ....... . esz:2 .. zm:4 ....1. ..... ...0 . \ - &z2z_en n=4 zdn=%zd_ax4 + &zzz_en n=4 zd=%zd_ax4 zn=%zd_ax4 SMAX_n1 1100000 1 .. 10 .... 1010.0 00000 .... 0 @z2z_2x1 SMAX_n1 1100000 1 .. 10 .... 1010.0 00000 .... 0 @z2z_4x1 @@ -990,8 +992,6 @@ UZP_2 11000001 esz:2 1 zm:5 110100 zn:5 .... 1 \ UZP_2 11000001 00 1 zm:5 110101 zn:5 .... 1 \ &zzz_e zd=%zd_ax2 esz=4 -&zzz_en zd zn zm esz n - FCLAMP 11000001 esz:2 1 zm:5 110000 zn:5 .... 0 \ &zzz_en zd=%zd_ax2 n=2 FCLAMP 11000001 esz:2 1 zm:5 110010 zn:5 ...0 0 \ -- 2.43.0
