On Sun, 19 Jul 2026 at 18:49, Richard Henderson <[email protected]> wrote: > > Based-on: [email protected] > ("[PATCH for-11.2 00/10] target/arm: Implement FEAT_SME_TMOP") > > One final pair of insns, FMUL (multiple and single vectors) and > FMUL (multiple vectors), which are not covered by a sub-feature. > > Finishing SME2p2 allows us to finally enable SVE2p2 in -cpu max. > > > r~ > > > Richard Henderson (6): > target/arm: Split zdn in do_z2z_n1 and do_z2z_n1_fpst > target/arm: Split zdn in do_z2z_nn and do_z2z_nn_fpst > target/arm: Fix b16b16 feature test for SME2 BFCLAMP, BFMAX, BFMIN > target/arm: Split decode of BFloat SME FMAX/FMIN > target/arm: Implement FMUL (multiple/multiple and single vectors) > target/arm: Enable FEAT_SVE2p2 and FEAT_SME2p2 for -cpu ma
Given your reply to patch 4 I assume you'll respin this at some point, so I won't look at 4 or 5 until then. -- PMM
