Hi, My apologies. Please excuse what I meant to be a private comment.
Irrespectively Yours, John > -----Original Message----- > From: [email protected] [mailto:[email protected]] On Behalf > Of John E Drake > Sent: Friday, February 08, 2013 1:51 PM > To: [email protected] > Cc: Shankar Raman; [email protected] > Subject: RE: Power aware networks : Comments requested from routing > community > > Curtis, > > What I heard before joining Juniper was that they were quite happy that > Cisco made this acquisition because they don't use TCAM and they > thought Cisco wasted a lot of money on a suboptimal technology. > > Irrespectively Yours, > > John > > > > -----Original Message----- > > From: Curtis Villamizar [mailto:[email protected]] > > Sent: Friday, February 08, 2013 1:42 PM > > To: John E Drake > > Cc: Balaji venkat Venkataswami; Eric Osborne (eosborne); Shankar > > Raman; [email protected] > > Subject: Re: Power aware networks : Comments requested from routing > > community > > > > > > In message > > > <0182dea5604b3a44a2ee61f3ee3ed69e14515...@bl2prd0510mb349.namprd05.pro > > d > > .outlook.com> > > John E Drake writes: > > > > > > http://patft.uspto.gov/netacgi/nph- > > Parser?Sect1=3DPTO1&Sect2=3DHITOFF& > > > d=3DP= > > > > > > ALL&p=3D1&u=3D%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=3D1&f=3DG&l=3D50&s1=3D > > > 71625= > > > 72.PN.&OS=3DPN/7162572&RS=3DPN/7162572 > > > > > > Irrespectively Yours, > > > > > > John > > > > > > John, > > > > Thanks. A better TCAM. If anything the bashing of conventional TCAM > > in the background reinforces what I said about TCAM being power pigs. > > > > There are many disadvantages with the conventional ternary CAM > > structure, however. Since each cell contains two memory cells, and > a > > mask-and-compare circuit, implementation of a table of size > > w.times.2.sup.n requires w.times.2.sup.n+1 memory elements, and > > w.times.2.sup.n mask-and-compare circuits. Since every lookup in > the > > table requires the activation of all the cells, power consumption > is > > proportional to w.times.2.sup.n. For large values of n, the cost is > > considerable, and the power consumption is prohibitive. > > > > I'm quite sure radix trie is still more power efficient. > > > > A 4 bit radix trie (16 entry tables doing four binary radix trie > > operations at once) requires a maximum of 8 SRAM lookups, seldom more > > than 6, and often 4 or less. This can be pipelined using separate > > SRAM blocks per radix trie stage. Other highly creative lookup > > techniques exist. > > > > Curtis > > > _______________________________________________ > rtgwg mailing list > [email protected] > https://www.ietf.org/mailman/listinfo/rtgwg _______________________________________________ rtgwg mailing list [email protected] https://www.ietf.org/mailman/listinfo/rtgwg
