From: <[EMAIL PROTECTED]>
To: "Victor Iannello" <[EMAIL PROTECTED]>
Cc: <[EMAIL PROTECTED]>; "Norm Dresner" <[EMAIL PROTECTED]>; "rtlinux mailing
list" <[EMAIL PROTECTED]>
Sent: Wednesday, December 13, 2000 11:31 PM
Subject: Re: [rtl] Interrupt Jitter
> On Wed, Dec 13, 2000 at 04:39:32PM -0500, Victor Iannello wrote:
> > Isn't true that when the scheduler is in periodic mode, the timer is not
> > reprogrammed, but yet jitter of around 15 us can still be observed under
> > some circumstances. Why is this?
>
> Note that just _reading_ the damn thing can cause this delay.
>
I think a number of us are interested in better understanding the cause for
the interrupt jitter for in x86 boards. My observations with a Pentium 266
MHz motherboard are that under conditions of "no linux loading", the jitter
is no more than a couple of microseconds. With increased loading due to disk
and network activity, the jitter may increase to about 15 us. I observe
about the same variation in interrupt latency whether or not the timer is in
periodic or one-shot mode. However, when in periodic mode, the minimum
latency seems to decrease, which I attribute to the time needed to reprogram
the timer in one-shot mode.
If I understand correctly, you are attributing a large cause of the jitter
to be read and write operations to timer registers. Because a read of the
timer register(s) is performed even in periodic mode, there is corresponding
jitter.
In what routine is the timer read while in periodic mode? Why is that
necessary? Is there some synchronization that is performed between the timer
and the cycle clock in periodic mode that requires the timer to be read? Is
there a way to eliminate that operation? Would there still be large
variations in latency if the timer interrupt was simply handled without
read/write operations?
Thank you in advance for your comments.
Regards,
Victor Iannello
Synchrony Inc.
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