Paolo,
Paolo,
You are confirming what we suspected--the variation in time required to
access the timer is a symptom rather than the cause of the jitter. You
mention three possible causes at the hardware level--bus contention, DMA
steals, and cache disruption. We have done some experiments with the cache
turned off that have not improved jitter. So, we are probably at the
hardware limits of x86 board architecture. It never was designed for
cycle-by-cycle determinism.
Regards,
Victor Iannello
Synchrony Inc.
----- Original Message -----
From: "Paolo Mantegazza" <[EMAIL PROTECTED]>
To: "Victor Iannello" <[EMAIL PROTECTED]>; "rtlinux mailing
list" <[EMAIL PROTECTED]>
Sent: Thursday, December 14, 2000 8:14 AM
Subject: Re: [rtl] Interrupt Jitter
> Victor Iannello wrote:
> >
> > If I understand correctly, you are attributing a large cause of the
jitter
> > to be read and write operations to timer registers. Because a read of
the
> > timer register(s) is performed even in periodic mode, there is
corresponding
> > jitter.
>
> There is no timer reading in periodic mode. You are right when you say
> that the jitter is depending on system activity. In fact you are causing
> more interrupts and, even if it is true that Linux interrupt are
> deferred processing, they must be at least acknowledged. Nonetheless the
> jitter they cause is not enough to justify the highest peaks.
>
> However there is no chance to get the details of what is causing what:
> bus contention, DMA steals, cache disruption all cooperate to the mess.
>
> Note that the jitter is almost independet from the CPU clock. I also got
> the idea that having a timer on the PCI bus does not make any
> difference, the related interrupt will be signalled by the 8259 PIC
> anyhow.
>
> I always thought that if absolutely much less than 20 us jitter is
> needed you need something different from a general purpose computer.
> That is what DSPs were born for.
>
> Ciao, Paolo.
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