Victor Iannello wrote:
> 
> Paolo,
> 
> Paolo,
> 
> You are confirming what we suspected--the variation in time required to
> access the timer is a symptom rather than the cause of the jitter. You
> mention three possible causes at the hardware level--bus contention, DMA
> steals, and cache disruption. We have done some experiments with the cache
> turned off that have not improved jitter. So, we are probably at the
> hardware limits of x86 board architecture. It never was designed for
> cycle-by-cycle determinism.
> 

Agreed.

Note that I tried disabling the cache but rebooted immediately just
after looking at how long it took to boot,  I needed computational
power, not less than 15 us jitter.

I also suspect that what you say is not just an ix86 fault. From my
limited experience of PPC under RTAI it seems I got similar results.

Ciao, Paolo.
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