Re: [PATCH 01/12] ASoC: DaVinci: Added support for stereo I2S

2010-06-07 Thread Raffaele Recalcati 
Thank you for your fast reply.
I'm cleaning the patch and I'm searching a good mail client.

2010/6/7 Sergei Shtylyov 

> Hello.
>
> Raffaele Recalcati wrote:
>
>  From: Raffaele Recalcati > raffaele.recalc...@bticino.it>>
>>
>
>   I think "mailto:"; should be omitted.
>
>
>  Date: Thu, 3 Jun 2010 14:40:05 +0200
>> Subject: [PATCH 01/12] ASoC: DaVinci: Added support for stereo I2S
>>
>
>  - Frame Sync master and Clock master (internally generated)
>> - Frame Sync master and Clock slave
>>
>> Signed-off-by: Davide Bonfanti >
>
>   Where's your own signoff? Is it your patch or Davide's?
>
>  >
>>
>

It is my mail, and Davide has contributed to it.
I'm going on configuring git send email and I'll send you a first patch for
test.
I'm sorry for tha bad patch.

Bye,
Raffaele




>
>   Same about "mailto:";...
>
>
>  ---
>>  sound/soc/davinci/davinci-i2s.c |  137
>> ++-
>>  1 files changed, 121 insertions(+), 16 deletions(-)
>>
>> diff --git a/sound/soc/davinci/davinci-i2s.c
>> b/sound/soc/davinci/davinci-i2s.c
>> index adadcd3..c1281c5 100644
>> --- a/sound/soc/davinci/davinci-i2s.c
>> +++ b/sound/soc/davinci/davinci-i2s.c
>> @@ -9,6 +9,8 @@
>>  * published by the Free Software Foundation.
>>  */
>>  +#define DEBUG 3
>> +
>>  #include 
>>  #include 
>>  #include 
>> @@ -68,16 +70,23 @@
>>  #define DAVINCI_MCBSP_RCR_RDATDLY(v)((v) << 16)
>>  #define DAVINCI_MCBSP_RCR_RFIG(1 << 18)
>>  #define DAVINCI_MCBSP_RCR_RWDLEN2(v)((v) << 21)
>> +#define DAVINCI_MCBSP_RCR_RFRLEN2(v)((v) << 24)
>> +#define DAVINCI_MCBSP_RCR_RPHASE(1 << 31)
>>  #define DAVINCI_MCBSP_XCR_XWDLEN1(v)((v) << 5)
>>  #define DAVINCI_MCBSP_XCR_XFRLEN1(v)((v) << 8)
>>  #define DAVINCI_MCBSP_XCR_XDATDLY(v)((v) << 16)
>>  #define DAVINCI_MCBSP_XCR_XFIG(1 << 18)
>>  #define DAVINCI_MCBSP_XCR_XWDLEN2(v)((v) << 21)
>> +#define DAVINCI_MCBSP_XCR_XFRLEN2(v)((v) << 24)
>> +#define DAVINCI_MCBSP_XCR_XPHASE(1 << 31)
>> +
>>  +#define CLKGDV(v)(v) /* Bits 0:7 */
>>  #define DAVINCI_MCBSP_SRGR_FWID(v)((v) << 8)
>>  #define DAVINCI_MCBSP_SRGR_FPER(v)((v) << 16)
>>  #define DAVINCI_MCBSP_SRGR_FSGM(1 << 28)
>> +#define DAVINCI_MCBSP_SRGR_CLKSM(1 << 29)
>>  #define DAVINCI_MCBSP_PCR_CLKRP(1 << 0)
>>  #define DAVINCI_MCBSP_PCR_CLKXP(1 << 1)
>> @@ -89,6 +98,11 @@
>>  #define DAVINCI_MCBSP_PCR_FSRM(1 << 10)
>>  #define DAVINCI_MCBSP_PCR_FSXM(1 << 11)
>>  +/* this define works when both clock and FS are output for the cpu
>> +   and makes clock very fast (FS is not simmetrical, but sampling
>> +   frequency is better approximated */
>>
>
>   See chapter 8 of the Documentation/CodingStyle for the preferrable style
> of multi-line comments, it should be:
>
> /*
>  * blah
>  * blah
>  */
>
>
>  @@ -146,6 +160,14 @@ struct davinci_mcbsp_dev {
>> unsigned enable_channel_combine:1;
>>  };
>>  +struct davinci_mcbsp_data {
>> +unsigned intfmt;
>> +int clk_div;
>> +};
>> +
>> +static struct davinci_mcbsp_data mcbsp_data;
>> +
>> +
>>
>
>   Extra newline?
>
>
>   static inline void davinci_mcbsp_write_reg(struct davinci_mcbsp_dev *dev,
>>int reg, u32 val)
>>  {
>> @@ -197,7 +219,7 @@ static void davinci_mcbsp_start(struct
>> davinci_mcbsp_dev *dev,
>> int ret = platform->pcm_ops->trigger(substream,
>> SNDRV_PCM_TRIGGER_STOP);
>> if (ret < 0)
>> -printk(KERN_DEBUG "Playback DMA stop failed\n");
>> +pr_debug("Playback DMA stop failed\n");
>> }
>>  /* Enable the transmitter */
>>
>
>   Your mailer has converted all tabes to spaces. Patches can't be applied
> until you dealt with this and resend.
>
>
>  @@ -219,7 +241,7 @@ static void davinci_mcbsp_start(struct
>> davinci_mcbsp_dev *dev,
>> int ret = platform->pcm_ops->trigger(substream,
>> SNDRV_PCM_TRIGGER_START);
>> if (ret < 0)
>> -printk(KERN_DEBUG "Playback DMA start failed\n");
>> +pr_debug("Playback DMA start failed\n");
>>
>
>   Unrelated change.
>
>
>  }
>> }
>>  @@ -254,12 +276,15 @@ static int davinci_i2s_set_dai_fmt(struct
>> snd_soc_dai *cpu_dai,
>> struct davinci_mcbsp_dev *dev = cpu_dai->private_data;
>> unsigned int pcr;
>> unsigned int srgr;
>> -srgr = DAVINCI_MCBSP_SRGR_FSGM |
>> +srgr = DAVINCI_MCBSP_SRGR_FSGM |
>> DAVINCI_MCBSP_SRGR_FPER(DEFAULT_BITPERSAMPLE * 2 - 1) |
>> DAVINCI_MCBSP_SRGR_FWID(DEFAULT_BITPERSAMPLE - 1);
>> +/* Attention srgr is updated by hw_params! */
>>  +mcbsp_data.fmt = fmt;
>> /* set master/slave audio interface */
>> switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
>> +case SND_SOC_DAIFMT_CBS_CFM:
>> case SND_SOC_DAIFMT_CBS_CFS:
>> /* cpu is master */
>> pcr = DAVINCI_MCBSP_PCR_FSXM |
>> @@ -

Re: Touchscreen - MFD driver for TPS6507x family

2010-06-07 Thread n...@max01.eu 

Dear Nicolas,
 

> Hi,
>
> I downloaded and tried the kernel v2.6.34 from *
> linux/kernel/git/khilman/linux-davinci.git**/ *to get the touchscreen patch.
 
can you please tell me which kernel tree and branch you use, exactly, and what
your
.config file looks like?
 
I have trouble to get the touch-screen driver running on an OMAP-L138 EVM board.
 
Regards,
 
Bastian. 
 
 
 
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Re: Touchscreen - MFD driver for TPS6507x family

2010-06-07 Thread Nicolas Luna 
Hi Todd,

I got custum hardware based on OMAP-L138 EVM, with OMAPL138 and TPS65070.
It's ok you answered my question why the INT pins is not used.

I did more tests and you are right, the touchscreen driver is not locking
out all other access to the I2C bus, that was a mistake from my side. So
everything seems to be ok even if there's a lot a communication on the bus.

Thank you.

Nicolas



On Fri, Jun 4, 2010 at 4:33 PM, Todd Fischer wrote:

>  Hi Nicolas,
>
>
> On Fri, 2010-06-04 at 16:15 -0400, Nicolas Luna wrote:
>
> Hi,
>
>
>
>  I downloaded and tried the kernel v2.6.34 from *
> linux/kernel/git/khilman/linux-davinci.git**/ *to get the touchscreen
> patch. It is working well, but I wonder if it is normal that the touchscreen
> constantly use the I2C bus, even if I don't touch to the touchscreen.
>
> No, that is not normal.  The hardware I was using doesn't have the TPS6507x
> interrupt pin connected, so I couldn't test that code path (and thus didn't
> attempt to include it).  What hardware are you using?
>
>
>  Because of that, it is not possible to have an other device on the bus. Is
> there any specific reason why the driver do not use the INT pin from the
> TPS6507x to free a little bit the I2C bus.
>
>
> Also, I didn't think the driver was locking out all other access to the I2C
> bus.  I will enhance my test suite to check for that case.
>
> Todd
>
>  Thanks
>
>
>
>  Nicolas
>
>
>
>
>  ___
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>
>
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Re: DM365EVM USB on KHilman Git Tree

2010-06-07 Thread Sergei Shtylyov 

Hello.

Kieran Bingham wrote:


Anyone know why the USB is disabled on the DM365EVM in the Khilman tree:


on branch master @ 
git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-davinci.git



I've tried adding



static void dm365evm_usb_configure(void)
{
   davinci_cfg_reg(DM365_GPIO33);
   gpio_request(33, "usb");
   gpio_direction_output(33, 1);
   davinci_setup_usb(500, 8);
}



and calling that from within dm365_evm_init()



but it just causes the kernel to crash early on.


I'll have to get the CCS / JTAG out to find out where its stalled - but 
thought it was worth chasing on here


   You can patch printk() with printascii() call and enable 
CONFIG_DEBUG_LL in the Kernel hacking menu to get the early kernel log.


Has anyone tested the USB Host on the DM365EVM on the latest KHilman 
kernel?


   Apparently not, as it's still not enabled.


--
Regards


WBR, Sergei

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DM365EVM USB on KHilman Git Tree

2010-06-07 Thread Kieran Bingham 

Hi Guys,

Anyone know why the USB is disabled on the DM365EVM in the Khilman tree:

on branch master @ 
git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-davinci.git


I've tried adding

static void dm365evm_usb_configure(void)
{
   davinci_cfg_reg(DM365_GPIO33);
   gpio_request(33, "usb");
   gpio_direction_output(33, 1);
   davinci_setup_usb(500, 8);
}

and calling that from within dm365_evm_init()

but it just causes the kernel to crash early on.

I'll have to get the CCS / JTAG out to find out where its stalled - but 
thought it was worth chasing on here


Has anyone tested the USB Host on the DM365EVM on the latest KHilman kernel?
--
Regards

Kieran Bingham
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Re: [PATCH] DM365: fixed second serial port

2010-06-07 Thread Sergei Shtylyov 

Hello.

thomas.koel...@baslerweb.com wrote:


From: Thomas Koeller 



The register base address for the second serial port (UART1) was
wrong.



Signed-off-by: Thomas Koeller 
---
 arch/arm/mach-davinci/dm365.c |6 ++
 1 files changed, 6 insertions(+), 0 deletions(-)



diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
index a146849..cf08950 100644
--- a/arch/arm/mach-davinci/dm365.c
+++ b/arch/arm/mach-davinci/dm365.c
@@ -41,6 +41,9 @@
 
 #define DM365_REF_FREQ		2400	/* 24 MHz on the DM365 EVM */
 
+#undef DAVINCI_UART1_BASE	/* Value in serial.h is wrong for DM365 */

+#define DAVINCI_UART1_BASE (IO_PHYS + 0x106000)
+
 static struct pll_data pll1_data = {
.num= 1,
.phys_base  = DAVINCI_PLL1_BASE,
@@ -1020,6 +1023,9 @@ static struct davinci_timer_info dm365_timer_info = {
.clocksource_id = T0_TOP,
 };
 
+#undef DAVINCI_UART1_BASE	/* Value in serial.h is wrong for DM365 */

+#define DAVINCI_UART1_BASE (IO_PHYS + 0x106000)
+
 static struct plat_serial8250_port dm365_serial_platform_data[] = {
{
.mapbase= DAVINCI_UART0_BASE,


   Why do it twice in the same file?!

WBR, Sergei
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RE: usb 1-1: device descriptor read/64, error -110

2010-06-07 Thread Alok Kumar 
Thanks for the response.

 

My problem is this is not reproducible (once in 2-3 months). I noticed
this device (I have 2 like this different make) stopped recording and
dmesg has lots of error like below. Fsck.ext3  does not fix it.

 

Any suggestions what I could infer from these messages. 

 

a)  Periodic reset high speed USB device

--Syslog ---

 

4 16:21:47 (none) kernel: usb 1-1: reset high speed USB device using
musb_hdrc and address 2

Jun  4 17:44:32 (none) kernel: usb 1-1: reset high speed USB device
using musb_hdrc and address 2

Jun  4 19:07:17 (none) kernel: usb 1-1: reset high speed USB device
using musb_hdrc and address 2

 

b)  sd 0:0:0:0: [sda] Unhandled sense code

 

dmesg---
-

 

Sense Key : 0x7 [current]

sd 0:0:0:0: [sda] ASC=0x27 ASCQ=0x0

end_request: I/O error, dev sda, sector 1310951

sd 0:0:0:0: [sda] Unhandled sense code

sd 0:0:0:0: [sda] Result: hostbyte=0x00 driverbyte=0x08

sd 0:0:0:0: [sda] Sense Key : 0x7 [current]

sd 0:0:0:0: [sda] ASC=0x27 ASCQ=0x0

end_request: I/O error, dev sda, sector 1835111

sd 0:0:0:0: [sda] Unhandled sense code

sd 0:0:0:0: [sda] Result: hostbyte=0x00 driverbyte=0x08

sd 0:0:0:0: [sda] Sense Key : 0x7 [current]

sd 0:0:0:0: [sda] ASC=0x27 ASCQ=0x0

end_request: I/O error, dev sda, sector 1835143

sd 0:0:0:0: [sda] Unhandled sense code

sd 0:0:0:0: [sda] Result: hostbyte=0x00 driverbyte=0x08

sd 0:0:0:0: [sda] Sense Key : 0x7 [current]

sd 0:0:0:0: [sda] ASC=0x27 ASCQ=0x0

end_request: I/O error, dev sda, sector 1835159

sd 0:0:0:0: [sda] Unhandled sense code

sd 0:0:0:0: [sda] Result: hostbyte=0x00 driverbyte=0x08

sd 0:0:0:0: [sda] Sense Key : 0x7 [current]

sd 0:0:0:0: [sda] ASC=0x27 ASCQ=0x0

end_request: I/O error, dev sda, sector 1835183

sd 0:0:0:0: [sda] Unhandled sense code

sd 0:0:0:0: [sda] Result: hostbyte=0x00 driverbyte=0x08

sd 0:0:0:0: [sda] Sense Key : 0x7 [current]

sd 0:0:0:0: [sda] ASC=0x27 ASCQ=0x0

end_request: I/O error, dev sda, sector 1914463

sd 0:0:0:0: [sda] Unhandled sense code

sd 0:0:0:0: [sda] Result: hostbyte=0x00 driverbyte=0x08

sd 0:0:0:0: [sda] Sense Key : 0x7 [current]

sd 0:0:0:0: [sda] ASC=0x27 ASCQ=0x0

end_request: I/O error, dev sda, sector 1914543

sd 0:0:0:0: [sda] Unhandled sense code

sd 0:0:0:0: [sda] Result: hostbyte=0x00 driverbyte=0x08

sd 0:0:0:0: [sda] Sense Key : 0x7 [current]

sd 0:0:0:0: [sda] ASC=0x27 ASCQ=0x0

end_request: I/O error, dev sda, sector 1914623

sd 0:0:0:0: [sda] Unhandled sense code

sd 0:0:0:0: [sda] Result: hostbyte=0x00 driverbyte=0x08

sd 0:0:0:0: [sda] Sense Key : 0x7 [current]

sd 0:0:0:0: [sda] ASC=0x27 ASCQ=0x0

end_request: I/O error, dev sda, sector 2097223

sd 0:0:0:0: [sda] Unhandled sense code

sd 0:0:0:0: [sda] Result: hostbyte=0x00 driverbyte=0x08

sd 0:0:0:0: [sda] Sense Key : 0x7 [current]

sd 0:0:0:0: [sda] ASC=0x27 ASCQ=0x0

end_request: I/O error, dev sda, sector 2097239

sd 0:0:0:0: [sda] Unhandled sense code

sd 0:0:0:0: [sda] Result: hostbyte=0x00 driverbyte=0x08

sd 0:0:0:0: [sda] Sense Key : 0x7 [current]

sd 0:0:0:0: [sda] ASC=0x27 ASCQ=0x0

end_request: I/O error, dev sda, sector 2458087

sd 0:0:0:0: [sda] Unhandled sense code

sd 0:0:0:0: [sda] Result: hostbyte=0x00 driverbyte=0x08

sd 0:0:0:0: [sda] Sense Key : 0x7 [current]

sd 0:0:0:0: [sda] ASC=0x27 ASCQ=0x0

end_request: I/O error, dev sda, sector 2472839

sd 0:0:0:0: [sda] Unhandled sense code

sd 0:0:0:0: [sda] Result: hostbyte=0x00 driverbyte=0x08

sd 0:0:0:0: [sda] Sense Key : 0x7 [current]

sd 0:0:0:0: [sda] ASC=0x27 ASCQ=0x0

end_request: I/O error, dev sda, sector 2472903

sd 0:0:0:0: [sda] Unhandled sense code

sd 0:0:0:0: [sda] Result: hostbyte=0x00 driverbyte=0x08

sd 0:0:0:0: [sda] Sense Key : 0x7 [current]

sd 0:0:0:0: [sda] ASC=0x27 ASCQ=0x0

end_request: I/O error, dev sda, sector 3407935

sd 0:0:0:0: [sda] Unhandled sense code

sd 0:0:0:0: [sda] Result: hostbyte=0x00 driverbyte=0x08

sd 0:0:0:0: [sda] Sense Key : 0x7 [current]

sd 0:0:0:0: [sda] ASC=0x27 ASCQ=0x0

end_request: I/O error, dev sda, sector 3409287

sd 0:0:0:0: [sda] Unhandled sense code

sd 0:0:0:0: [sda] Result: hostbyte=0x00 driverbyte=0x08

sd 0:0:0:0: [sda] Sense Key : 0x7 [current]

sd 0:0:0:0: [sda] ASC=0x27 ASCQ=0x0

end_request: I/O error, dev sda, sector 3670079

sd 0:0:0:0: [sda] Unhandled sense code

sd 0:0:0:0: [sda] Result: hostbyte=0x00 driverbyte=0x08

sd 0:0:0:0: [sda] Sense Key : 0x7 [current]

sd 0:0:0:0: [sda] ASC=0x27 ASCQ=0x0

end_request: I/O error, dev sda, sector 3671591

sd 0:0:0:0: [sda] Unhandled sense code

sd 0:0:0:0: [sda] Result: hostbyte=0x00 driverbyte=0x08

sd 0:0:0:0: [sda] Sense Key : 0x7 [current]

sd 0:0:0:0: [sda] ASC=0x27 ASCQ=0x0

end_request: I/O error, dev sda, sector 63

sd 0:0:0:0: [sda] Unhandled sense code

sd 0:0:0:0: [sda] Result: hostbyte=0x00 driverbyte=0x08

sd 0:0:0:0: [sda] Sense Key : 0x7 [current]

sd 0:0:0:0: [sda] ASC=0x27 ASCQ=0x

[PATCH 2/3] davinci: spi: add replacement SPI driver

2010-06-07 Thread Brian Niebuhr 

Signed-off-by: Brian Niebuhr 
---
 arch/arm/mach-davinci/include/mach/spi.h |   41 +-
 drivers/spi/davinci_spi.c|  936 ++
 drivers/spi/davinci_spi.h|  186 ++
 3 files changed, 1149 insertions(+), 14 deletions(-)
 create mode 100644 drivers/spi/davinci_spi.c
 create mode 100644 drivers/spi/davinci_spi.h

diff --git a/arch/arm/mach-davinci/include/mach/spi.h 
b/arch/arm/mach-davinci/include/mach/spi.h
index 910efbf..10c39d8 100644
--- a/arch/arm/mach-davinci/include/mach/spi.h
+++ b/arch/arm/mach-davinci/include/mach/spi.h
@@ -19,26 +19,39 @@
 #ifndef __ARCH_ARM_DAVINCI_SPI_H
 #define __ARCH_ARM_DAVINCI_SPI_H
 
+#define SPI_INTERN_CS  0xFF
+
+/* resource flags for IORESOURCE_DMA resources */
+#define IORESOURCE_DMA_RX_CHAN 0x01
+#define IORESOURCE_DMA_TX_CHAN 0x02
+#define IORESOURCE_DMA_EVENT_Q 0x04
+
 enum {
-   SPI_VERSION_1, /* For DM355/DM365/DM6467 */
+   SPI_VERSION_1, /* For DM355/DM365/DM6467*/
SPI_VERSION_2, /* For DA8xx */
 };
 
 struct davinci_spi_platform_data {
u8  version;
-   u8  num_chipselect;
-   u8  wdelay;
-   u8  odd_parity;
-   u8  parity_enable;
-   u8  wait_enable;
-   u8  timer_disable;
-   u8  clk_internal;
-   u8  cs_hold;
-   u8  intr_level;
-   u8  poll_mode;
-   u8  use_dma;
-   u8  c2tdelay;
-   u8  t2cdelay;
+   u16 num_chipselect;
+   u8  *chip_sel;
+};
+
+struct davinci_spi_config {
+   u32 odd_parity:1;
+   u32 parity_enable:1;
+   u32 intr_level:1;
+   u32 io_type:2;
+#define SPI_IO_TYPE_INTR0
+#define SPI_IO_TYPE_POLL1
+#define SPI_IO_TYPE_DMA 2
+   u32 bytes_per_word:2;
+   u32 wdelay:6;
+   u32 timer_disable:1;
+   u8  c2t_delay;
+   u8  t2c_delay;
+   u8  t2e_delay;
+   u8  c2e_delay;
 };
 
 #endif /* __ARCH_ARM_DAVINCI_SPI_H */
diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c
new file mode 100644
index 000..0bed840
--- /dev/null
+++ b/drivers/spi/davinci_spi.c
@@ -0,0 +1,936 @@
+/*
+ * Copyright (C) 2009 Texas Instruments.
+ * Copyright (C) 2010 EF Johnson Technologies
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+#include "davinci_spi.h"
+
+#defineDAVINCI_SPI_NO_RESOURCE ((resource_size_t)-1)
+
+static void davinci_spi_rx_buf_u8(u32 data, struct davinci_spi *davinci_spi)
+{
+   if (davinci_spi->rx) {
+   u8 *rx = davinci_spi->rx;
+   *rx++ = (u8)data;
+   davinci_spi->rx = rx;
+   }
+}
+
+static void davinci_spi_rx_buf_u16(u32 data, struct davinci_spi *davinci_spi)
+{
+   if (davinci_spi->rx) {
+   u16 *rx = davinci_spi->rx;
+   *rx++ = (u16)data;
+   davinci_spi->rx = rx;
+   }
+}
+
+static u32 davinci_spi_tx_buf_u8(struct davinci_spi *davinci_spi)
+{
+   u32 data = 0;
+   if (davinci_spi->tx) {
+   const u8 *tx = davinci_spi->tx;
+   data = *tx++;
+   davinci_spi->tx = tx;
+   }
+   return data;
+}
+
+static u32 davinci_spi_tx_buf_u16(struct davinci_spi *davinci_spi)
+{
+   u32 data = 0;
+   if (davinci_spi->tx) {
+   const u16 *tx = davinci_spi->tx;
+   data = *tx++;
+   davinci_spi->tx = tx;
+   }
+   return data;
+}
+
+static inline void set_io_bits(void __iomem *addr, u32 bits)
+{
+   u32 v = ioread32(addr);
+
+   v |= bits;
+   iowrite32(v, addr);
+}
+
+static inline void clear_io_bits(void __iomem *addr, u32 bits)
+{
+   u32 v = ioread32(addr);
+
+   v &= ~bits;
+   iowrite32(v, addr);
+}
+
+/*
+ * Interface to control the chip select signal
+ */
+static void davinci_spi_chipselect(struct spi_device *spi, int value)
+{
+   struct davinci_spi *davinci_spi;
+   struct davinci_spi_platform_data *pdata;
+   u8 i, chip_sel = spi->chip_select;
+   u32 spidat1;
+   u16 spidat1_cfg;
+
+   davinci_spi = spi_master_get_devdata(spi->master);
+

[PATCH 1/3] davinci: spi: remove old Davinci SPI driver

2010-06-07 Thread Brian Niebuhr 

Signed-off-by: Brian Niebuhr 
---
 drivers/spi/davinci_spi.c | 1256 -
 1 files changed, 0 insertions(+), 1256 deletions(-)
 delete mode 100644 drivers/spi/davinci_spi.c

diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c
deleted file mode 100644
index 95afb6b..000
--- a/drivers/spi/davinci_spi.c
+++ /dev/null
@@ -1,1256 +0,0 @@
-/*
- * Copyright (C) 2009 Texas Instruments.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-
-#include 
-#include 
-
-#define SPI_NO_RESOURCE((resource_size_t)-1)
-
-#define SPI_MAX_CHIPSELECT 2
-
-#define CS_DEFAULT 0xFF
-
-#define SPI_BUFSIZ (SMP_CACHE_BYTES + 1)
-#define DAVINCI_DMA_DATA_TYPE_S8   0x01
-#define DAVINCI_DMA_DATA_TYPE_S16  0x02
-#define DAVINCI_DMA_DATA_TYPE_S32  0x04
-
-#define SPIFMT_PHASE_MASK  BIT(16)
-#define SPIFMT_POLARITY_MASK   BIT(17)
-#define SPIFMT_DISTIMER_MASK   BIT(18)
-#define SPIFMT_SHIFTDIR_MASK   BIT(20)
-#define SPIFMT_WAITENA_MASKBIT(21)
-#define SPIFMT_PARITYENA_MASK  BIT(22)
-#define SPIFMT_ODD_PARITY_MASK BIT(23)
-#define SPIFMT_WDELAY_MASK 0x3f00u
-#define SPIFMT_WDELAY_SHIFT24
-#define SPIFMT_CHARLEN_MASK0x001Fu
-
-/* SPIGCR1 */
-#define SPIGCR1_SPIENA_MASK0x0100u
-
-/* SPIPC0 */
-#define SPIPC0_DIFUN_MASK  BIT(11) /* MISO */
-#define SPIPC0_DOFUN_MASK  BIT(10) /* MOSI */
-#define SPIPC0_CLKFUN_MASK BIT(9)  /* CLK */
-#define SPIPC0_SPIENA_MASK BIT(8)  /* nREADY */
-#define SPIPC0_EN1FUN_MASK BIT(1)
-#define SPIPC0_EN0FUN_MASK BIT(0)
-
-#define SPIINT_MASKALL 0x0101035F
-#define SPI_INTLVL_1   0x01FFu
-#define SPI_INTLVL_0   0xu
-
-/* SPIDAT1 */
-#define SPIDAT1_CSHOLD_SHIFT   28
-#define SPIDAT1_CSNR_SHIFT 16
-#define SPIGCR1_CLKMOD_MASKBIT(1)
-#define SPIGCR1_MASTER_MASK BIT(0)
-#define SPIGCR1_LOOPBACK_MASK  BIT(16)
-
-/* SPIBUF */
-#define SPIBUF_TXFULL_MASK BIT(29)
-#define SPIBUF_RXEMPTY_MASKBIT(31)
-
-/* Error Masks */
-#define SPIFLG_DLEN_ERR_MASK   BIT(0)
-#define SPIFLG_TIMEOUT_MASKBIT(1)
-#define SPIFLG_PARERR_MASK BIT(2)
-#define SPIFLG_DESYNC_MASK BIT(3)
-#define SPIFLG_BITERR_MASK BIT(4)
-#define SPIFLG_OVRRUN_MASK BIT(6)
-#define SPIFLG_RX_INTR_MASKBIT(8)
-#define SPIFLG_TX_INTR_MASKBIT(9)
-#define SPIFLG_BUF_INIT_ACTIVE_MASKBIT(24)
-#define SPIFLG_MASK(SPIFLG_DLEN_ERR_MASK \
-   | SPIFLG_TIMEOUT_MASK | SPIFLG_PARERR_MASK \
-   | SPIFLG_DESYNC_MASK | SPIFLG_BITERR_MASK \
-   | SPIFLG_OVRRUN_MASK | SPIFLG_RX_INTR_MASK \
-   | SPIFLG_TX_INTR_MASK \
-   | SPIFLG_BUF_INIT_ACTIVE_MASK)
-
-#define SPIINT_DLEN_ERR_INTR   BIT(0)
-#define SPIINT_TIMEOUT_INTRBIT(1)
-#define SPIINT_PARERR_INTR BIT(2)
-#define SPIINT_DESYNC_INTR BIT(3)
-#define SPIINT_BITERR_INTR BIT(4)
-#define SPIINT_OVRRUN_INTR BIT(6)
-#define SPIINT_RX_INTR BIT(8)
-#define SPIINT_TX_INTR BIT(9)
-#define SPIINT_DMA_REQ_EN  BIT(16)
-#define SPIINT_ENABLE_HIGHZBIT(24)
-
-#define SPI_T2CDELAY_SHIFT 16
-#define SPI_C2TDELAY_SHIFT 24
-
-/* SPI Controller registers */
-#define SPIGCR00x00
-#define SPIGCR10x04
-#define SPIINT 0x08
-#define SPILVL 0x0c
-#define SPIFLG 0x10
-#define SPIPC0 0x14
-#define SPIPC1 0x18
-#define SPIPC2 0x1c
-#define SPIPC3 0x20
-#define SPIPC4 0x24
-#define SPIPC5 0x28
-#define SPIPC6 0x2c
-#define SPIPC7 0x30
-#define SPIPC8 0x34
-#define SPIDAT00x38
-#define SPIDAT10x3c
-#define SPIBUF 0x40
-#define SPIEMU 0x44
-#define SPIDELAY   0x48
-#define SPIDEF 0x4c
-#define SPIFMT00x50
-#define SPIFMT10x54
-#define SPIFMT20x58
-#define SPIFMT30x5c
-

[PATCH 0/3] davinci: spi: replace existing SPI driver

2010-06-07 Thread Brian Niebuhr 
NOTE

This patch requires the EDMA patch at:

http://linux.davincidsp.com/pipermail/davinci-linux-open-source/2010-March/018022.html

which has since been reverted out of the davinci kernel.


INTRODUCTION

I have been working on a custom OMAP-L138 board that has multiple spi
devices (seven) on one controller.  These devices have a wide range of
transfer parameters (speed, phase, polarity, internal and gpio chip
selects).  During my testing I found multiple errors in the davinci spi
driver as a result of this complex setup.  The primary issues were:

1. There is a race condition due to the SPIBUF read busy-waits for slow
devices
2. I found some DMA transfer length errors under some conditions
3. The chip select code caused extra byte transfers (with no chip
select active) due to writes to SPIDAT1
4. Several issues prevented using multiple SPI devices, especially
the DMA code, as disucussed previously on the davinci list.

The fixes to these problems were not simple.  I ended up making fairly
large changes to the driver, and those changes are contained in these
patches.  The full list of changes follows.

CHANGE LIST

1. davinci_spi_chipelect() now performs both activation and deactivation
of chip selects.  This lets spi_bitbang fully control chip
select activation, as intended by the SPI API.
2. Chip select activation does not cause extra writes to the SPI bus
3. Chip select activation does not use SPIDEF for control.  This change
will also allow for implementation of inverted (active high)
chip selects in the future.
4. Added back gpio chip select capability from the old driver
5. Fixed prescale calculation for non-integer fractions of spi clock
6. Allow specification of SPI transfer parameters on a per-device
(instead of per-controller) basis
7. Allow specification of polled, interrupt-based, or DMA operation on
a per-device basis
8. Allow DMA with when more than one device is connected
9. Combined pio and dma txrx_bufs functions into one since they share
large parts of their functionality, and to simplify item (8).
10. Use only SPIFMT0 to allow more than 4 devices

TESTING

I have tested the driver using a custom SPI stress test on my
OMAP-L138-based board with three devices connected.  I have tested
configurations with all three devices polled, all three interrupt-based,
all three DMA, and a mixture.

I have compiled with the davinci_all_defconfig, but I don't have EVMs
for the other davinci platforms to test with.

SUMMARY

This patch solves a lot of issues that should save a lot of people time
down the road.  Since I posted the original patch I have had at least 5
people contact me personally to get help applying the patch because SPI
was broken on their boards.  I have heard back from at least 2 that the
original patch worked for them.  

I appreciate any testing and feedback that others can provide.

Brian Niebuhr (3):
  davinci: spi: remove old Davinci SPI driver
  davinci: spi: add replacement SPI driver
  davinci: spi: modify platform data for updated SPI driver

 arch/arm/mach-davinci/board-dm355-evm.c |   10 +
 arch/arm/mach-davinci/board-dm355-leopard.c |   10 +
 arch/arm/mach-davinci/board-dm365-evm.c |   10 +
 arch/arm/mach-davinci/dm355.c   |6 -
 arch/arm/mach-davinci/dm365.c   |6 -
 arch/arm/mach-davinci/include/mach/spi.h|   41 +-
 drivers/spi/davinci_spi.c   | 1196 ++-
 drivers/spi/davinci_spi.h   |  186 +
 8 files changed, 681 insertions(+), 784 deletions(-)
 create mode 100644 drivers/spi/davinci_spi.h

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[PATCH 3/3] davinci: spi: modify platform data for updated SPI driver

2010-06-07 Thread Brian Niebuhr 

Signed-off-by: Brian Niebuhr 
---
 arch/arm/mach-davinci/board-dm355-evm.c |   10 ++
 arch/arm/mach-davinci/board-dm355-leopard.c |   10 ++
 arch/arm/mach-davinci/board-dm365-evm.c |   10 ++
 arch/arm/mach-davinci/dm355.c   |6 --
 arch/arm/mach-davinci/dm365.c   |6 --
 5 files changed, 30 insertions(+), 12 deletions(-)

diff --git a/arch/arm/mach-davinci/board-dm355-evm.c 
b/arch/arm/mach-davinci/board-dm355-evm.c
index a319101..2f4e2fd 100644
--- a/arch/arm/mach-davinci/board-dm355-evm.c
+++ b/arch/arm/mach-davinci/board-dm355-evm.c
@@ -32,6 +32,7 @@
 #include 
 #include 
 #include 
+#include 
 
 /* NOTE:  this is geared for the standard config, with a socketed
  * 2 GByte Micron NAND (MT29F16G08FAA) using 128KB sectors.  If you
@@ -300,10 +301,19 @@ static struct spi_eeprom at25640a = {
.flags  = EE_ADDR2,
 };
 
+static struct davinci_spi_config at25640a_spi_cfg = {
+   .parity_enable  = 0,
+   .intr_level = 0,
+   .io_type= SPI_IO_TYPE_DMA,
+   .wdelay = 0,
+   .timer_disable  = 1,
+};
+
 static struct spi_board_info dm355_evm_spi_info[] __initconst = {
{
.modalias   = "at25",
.platform_data  = &at25640a,
+   .controller_data = &at25640a_spi_cfg,
.max_speed_hz   = 10 * 1000 * 1000, /* at 3v3 */
.bus_num= 0,
.chip_select= 0,
diff --git a/arch/arm/mach-davinci/board-dm355-leopard.c 
b/arch/arm/mach-davinci/board-dm355-leopard.c
index f1d8132..04cd36d 100644
--- a/arch/arm/mach-davinci/board-dm355-leopard.c
+++ b/arch/arm/mach-davinci/board-dm355-leopard.c
@@ -29,6 +29,7 @@
 #include 
 #include 
 #include 
+#include 
 
 /* NOTE:  this is geared for the standard config, with a socketed
  * 2 GByte Micron NAND (MT29F16G08FAA) using 128KB sectors.  If you
@@ -222,10 +223,19 @@ static struct spi_eeprom at25640a = {
.flags  = EE_ADDR2,
 };
 
+struct davinci_spi_config at25640a_spi_cfg = {
+   .parity_enable  = 0,
+   .intr_level = 0,
+   .io_type= SPI_IO_TYPE_DMA,
+   .wdelay = 0,
+   .timer_disable  = 1,
+};
+
 static struct spi_board_info dm355_leopard_spi_info[] __initconst = {
{
.modalias   = "at25",
.platform_data  = &at25640a,
+   .controller_data = &at25640a_spi_cfg,
.max_speed_hz   = 10 * 1000 * 1000, /* at 3v3 */
.bus_num= 0,
.chip_select= 0,
diff --git a/arch/arm/mach-davinci/board-dm365-evm.c 
b/arch/arm/mach-davinci/board-dm365-evm.c
index fdb073e..a3621fa 100644
--- a/arch/arm/mach-davinci/board-dm365-evm.c
+++ b/arch/arm/mach-davinci/board-dm365-evm.c
@@ -39,6 +39,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include 
 
@@ -579,10 +580,19 @@ static struct spi_eeprom at25640 = {
.flags  = EE_ADDR2,
 };
 
+static struct davinci_spi_config at25640_spi_cfg = {
+   .parity_enable  = 0,
+   .intr_level = 0,
+   .io_type= SPI_IO_TYPE_DMA,
+   .wdelay = 0,
+   .timer_disable  = 1,
+};
+
 static struct spi_board_info dm365_evm_spi_info[] __initconst = {
{
.modalias   = "at25",
.platform_data  = &at25640,
+   .controller_data = &at25640_spi_cfg,
.max_speed_hz   = 10 * 1000 * 1000,
.bus_num= 0,
.chip_select= 0,
diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c
index 3834781..34bb038 100644
--- a/arch/arm/mach-davinci/dm355.c
+++ b/arch/arm/mach-davinci/dm355.c
@@ -412,12 +412,6 @@ static struct resource dm355_spi0_resources[] = {
 static struct davinci_spi_platform_data dm355_spi0_pdata = {
.version= SPI_VERSION_1,
.num_chipselect = 2,
-   .clk_internal   = 1,
-   .cs_hold= 1,
-   .intr_level = 0,
-   .poll_mode  = 1,/* 0 -> interrupt mode 1-> polling mode */
-   .c2tdelay   = 0,
-   .t2cdelay   = 0,
 };
 static struct platform_device dm355_spi0_device = {
.name = "spi_davinci",
diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
index a146849..0bd9f93 100644
--- a/arch/arm/mach-davinci/dm365.c
+++ b/arch/arm/mach-davinci/dm365.c
@@ -625,12 +625,6 @@ static u64 dm365_spi0_dma_mask = DMA_BIT_MASK(32);
 static struct davinci_spi_platform_data dm365_spi0_pdata = {
.version= SPI_VERSION_1,
.num_chipselect = 2,
-   .clk_internal   = 1,
-   .cs_hold= 1,
-   .intr_level = 0,
-   .poll_mode  = 1,/* 0 -> interrupt mode 1-> polling mode */
-   .c2tdelay   = 0,
-   .t2cdelay   = 0,
 };
 
 static struct resource dm365_spi0_resources[] = {
-- 
1.6.3.3

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[PATCH] DM365: fixed second serial port

2010-06-07 Thread thomas . koeller 
From: Thomas Koeller 

The register base address for the second serial port (UART1) was
wrong.

Signed-off-by: Thomas Koeller 
---
 arch/arm/mach-davinci/dm365.c |3 +++
 1 files changed, 3 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
index a146849..2a4e614 100644
--- a/arch/arm/mach-davinci/dm365.c
+++ b/arch/arm/mach-davinci/dm365.c
@@ -1020,6 +1020,9 @@ static struct davinci_timer_info dm365_timer_info = {
.clocksource_id = T0_TOP,
 };
 
+#undef DAVINCI_UART1_BASE  /* Value in serial.h is wrong for DM365 */
+#define DAVINCI_UART1_BASE (IO_PHYS + 0x106000)
+
 static struct plat_serial8250_port dm365_serial_platform_data[] = {
{
.mapbase= DAVINCI_UART0_BASE,
-- 
1.7.1

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Re: [PATCH] DM365: fixed second serial port

2010-06-07 Thread Thomas Koeller 
On Monday 07 June 2010 16:27:38 thomas.koel...@baslerweb.com wrote:
> From: Thomas Koeller 
>
> The register base address for the second serial port (UART1) was
> wrong.
>
> Signed-off-by: Thomas Koeller 
> ---
Still struggling with git - please ignore

Thomas
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Re: [PATCH] DM365: fixed second serial port

2010-06-07 Thread Thomas Koeller 
On Monday 07 June 2010 16:22:37 thomas.koel...@baslerweb.com wrote:
> From: Thomas Koeller 
>
> The register base address for the second serial port (UART1) was
> wrong.
>
> Signed-off-by: Thomas Koeller 
Sorry, was too quick to send. This patch is broken - please ignore.

Thomas
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[PATCH] DM365: fixed second serial port

2010-06-07 Thread thomas . koeller 
From: Thomas Koeller 

The register base address for the second serial port (UART1) was
wrong.

Signed-off-by: Thomas Koeller 
---
 arch/arm/mach-davinci/dm365.c |6 ++
 1 files changed, 6 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
index a146849..cf08950 100644
--- a/arch/arm/mach-davinci/dm365.c
+++ b/arch/arm/mach-davinci/dm365.c
@@ -41,6 +41,9 @@
 
 #define DM365_REF_FREQ 2400/* 24 MHz on the DM365 EVM */
 
+#undef DAVINCI_UART1_BASE  /* Value in serial.h is wrong for DM365 */
+#define DAVINCI_UART1_BASE (IO_PHYS + 0x106000)
+
 static struct pll_data pll1_data = {
.num= 1,
.phys_base  = DAVINCI_PLL1_BASE,
@@ -1020,6 +1023,9 @@ static struct davinci_timer_info dm365_timer_info = {
.clocksource_id = T0_TOP,
 };
 
+#undef DAVINCI_UART1_BASE  /* Value in serial.h is wrong for DM365 */
+#define DAVINCI_UART1_BASE (IO_PHYS + 0x106000)
+
 static struct plat_serial8250_port dm365_serial_platform_data[] = {
{
.mapbase= DAVINCI_UART0_BASE,
-- 
1.7.1

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[PATCH] DM365: fixed second serial port

2010-06-07 Thread thomas . koeller 
From: Thomas Koeller 

The register base address for the second serial port (UART1) was
wrong.

Signed-off-by: Thomas Koeller 
---
 arch/arm/mach-davinci/dm365.c |6 ++
 1 files changed, 6 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
index a146849..cf08950 100644
--- a/arch/arm/mach-davinci/dm365.c
+++ b/arch/arm/mach-davinci/dm365.c
@@ -41,6 +41,9 @@
 
 #define DM365_REF_FREQ 2400/* 24 MHz on the DM365 EVM */
 
+#undef DAVINCI_UART1_BASE  /* Value in serial.h is wrong for DM365 */
+#define DAVINCI_UART1_BASE (IO_PHYS + 0x106000)
+
 static struct pll_data pll1_data = {
.num= 1,
.phys_base  = DAVINCI_PLL1_BASE,
@@ -1020,6 +1023,9 @@ static struct davinci_timer_info dm365_timer_info = {
.clocksource_id = T0_TOP,
 };
 
+#undef DAVINCI_UART1_BASE  /* Value in serial.h is wrong for DM365 */
+#define DAVINCI_UART1_BASE (IO_PHYS + 0x106000)
+
 static struct plat_serial8250_port dm365_serial_platform_data[] = {
{
.mapbase= DAVINCI_UART0_BASE,
-- 
1.7.1

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Re: usb 1-1: device descriptor read/64, error -110

2010-06-07 Thread Steve Poulsen 

Can you measure the VBUS on a reboot and see if it is getting disabled?

On 06/07/2010 08:41 AM, Alok Kumar wrote:


Appreciate your responses.

When USB drive was in not detected state, I restarted the unit, a 
fresh power up did not fix the issue. However when we pulled out the 
USB key device and inserted again, it was detected, enumerated, 
mounted. Subsequent power up, did not show any issues (at least for 
time being)


The area, I don't understand how a re-inserting USB pen drive worked 
successfully(detected, enumerated, mounted) , but power reset to board 
did not fix the issue.


Any thoughts what I can do in this situation ?

Thanks

Alok

*From:* Stephen Berry [mailto:s...@i-d-2.com]
*Sent:* Friday, June 04, 2010 10:07 PM
*To:* Alok Kumar
*Cc:* davinci-linux-open-source@linux.davincidsp.com
*Subject:* Re: usb 1-1: device descriptor read/64, error -110

It looks like the device descriptor wasn't read correctly. Without 
that the kernel can't attach the device.


Did you try removing it and hot-plugging to see if it works?

If a USB device doesn't respond to configuration requests 
appropriately, then it is usually because it is :


a - damaged
b - the hardware (pen drive) has a power issue
c - firmware is too slow on the device to respond.

Try a new pen drive.

You can certainly detect that a device you expect isn't mounted, not 
sure how to tell udev to try to reconfigure it again after it failed 
the first time around...


Steve

On 6/4/2010 4:16 PM, Alok Kumar wrote:

Correction Error number is -110 (timeout)

*From:* Alok Kumar
*Sent:* Friday, June 04, 2010 4:25 PM
*To:* 'davinci-linux-open-source@linux.davincidsp.com 
'

*Subject:* usb 1-1: device descriptor read/64, error -11

Hi,

I am using Davinci 6446 with git tree kernel 2.6.30. We use USB drive 
(pen drive) to collect the data periodically.


Sometimes (once in 3-4 months) , after reboot an earlier working USB 
drive is not recognized (no /dev/sda1 etc)  and I see following errors 
and USB is was not detected.


*kernel: usb 1-1: new high speed USB device using musb_hdrc and address 2*

*kernel: Initializing USB Mass Storage driver...*

*kernel: usbcore: registered new interface driver usb-storage*

*kernel: USB Mass Storage support registered.*

*kernel: musb_h_ep0_irq 1067: no URB for end 0*

*kernel: usb 1-1: device descriptor read/64, error -11**0*

* *

I see some comments in musb/musb_host.c for 'no URB for end 0', saying 
this should never happen.


My question is how to fix this error. What kind of recovery mechanism 
, I can put to auto detect it and fix it.


Any help will be greatly appreciated.

Thanks

Alok

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RE: usb 1-1: device descriptor read/64, error -110

2010-06-07 Thread Alok Kumar 
Appreciate your responses.

 

When USB drive was in not detected state, I restarted the unit, a fresh
power up did not fix the issue. However when we pulled out the USB key
device and inserted again, it was detected, enumerated, mounted.
Subsequent power up, did not show any issues (at least for time being)

 

The area, I don't understand how a re-inserting USB pen drive worked
successfully(detected, enumerated, mounted) , but power reset to board
did not fix the issue.

 

Any thoughts what I can do in this situation ?

 

Thanks

Alok

 

 

 

From: Stephen Berry [mailto:s...@i-d-2.com] 
Sent: Friday, June 04, 2010 10:07 PM
To: Alok Kumar
Cc: davinci-linux-open-source@linux.davincidsp.com
Subject: Re: usb 1-1: device descriptor read/64, error -110

 

It looks like the device descriptor wasn't read correctly. Without that
the kernel can't attach the device.

Did you try removing it and hot-plugging to see if it works? 

If a USB device doesn't respond to configuration requests appropriately,
then it is usually because it is :

a - damaged
b - the hardware (pen drive) has a power issue
c - firmware is too slow on the device to respond.

Try a new pen drive.

You can certainly detect that a device you expect isn't mounted, not
sure how to tell udev to try to reconfigure it again after it failed the
first time around...

Steve

On 6/4/2010 4:16 PM, Alok Kumar wrote: 

Correction Error number is -110 (timeout)

 

From: Alok Kumar 
Sent: Friday, June 04, 2010 4:25 PM
To: 'davinci-linux-open-source@linux.davincidsp.com'
Subject: usb 1-1: device descriptor read/64, error -11

 

Hi,

 

I am using Davinci 6446 with git tree kernel 2.6.30. We use USB drive
(pen drive) to collect the data periodically.

Sometimes (once in 3-4 months) , after reboot an earlier working USB
drive is not recognized (no /dev/sda1 etc)  and I see following errors
and USB is was not detected.

 

kernel: usb 1-1: new high speed USB device using musb_hdrc and address 2

kernel: Initializing USB Mass Storage driver...

kernel: usbcore: registered new interface driver usb-storage

kernel: USB Mass Storage support registered.

kernel: musb_h_ep0_irq 1067: no URB for end 0

kernel: usb 1-1: device descriptor read/64, error -110

 

I see some comments in musb/musb_host.c for 'no URB for end 0', saying
this should never happen.

 

My question is how to fix this error. What kind of recovery mechanism ,
I can put to auto detect it and fix it.

Any help will be greatly appreciated.

 

Thanks

Alok

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attached hereto is intended only for the named recipient(s). It is the
property of Cernium Corporation and shall not be used, disclosed or
reproduced without the express written consent of Cernium Corporation.
If you are not the intended recipient (or the employee or agent
responsible for delivering this message in confidence to the intended
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If you have received this transmittal and/or attachments in error,
please notify me immediately by reply email or telephone and immediately
delete this message and all its attachments. Thank you. 

 
 
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Re: [PATCH 01/12] ASoC: DaVinci: Added support for stereo I2S

2010-06-07 Thread Sergei Shtylyov 

Hello.

Raffaele Recalcati wrote:

From: Raffaele Recalcati >


   I think "mailto:"; should be omitted.


Date: Thu, 3 Jun 2010 14:40:05 +0200
Subject: [PATCH 01/12] ASoC: DaVinci: Added support for stereo I2S



 - Frame Sync master and Clock master (internally generated)
 - Frame Sync master and Clock slave

Signed-off-by: Davide Bonfanti 

   Where's your own signoff? Is it your patch or Davide's?


>


   Same about "mailto:";...


---
 sound/soc/davinci/davinci-i2s.c |  137 
++-

 1 files changed, 121 insertions(+), 16 deletions(-)

diff --git a/sound/soc/davinci/davinci-i2s.c 
b/sound/soc/davinci/davinci-i2s.c

index adadcd3..c1281c5 100644
--- a/sound/soc/davinci/davinci-i2s.c
+++ b/sound/soc/davinci/davinci-i2s.c
@@ -9,6 +9,8 @@
  * published by the Free Software Foundation.
  */
 
+#define DEBUG 3

+
 #include 
 #include 
 #include 
@@ -68,16 +70,23 @@
 #define DAVINCI_MCBSP_RCR_RDATDLY(v)((v) << 16)
 #define DAVINCI_MCBSP_RCR_RFIG(1 << 18)
 #define DAVINCI_MCBSP_RCR_RWDLEN2(v)((v) << 21)
+#define DAVINCI_MCBSP_RCR_RFRLEN2(v)((v) << 24)
+#define DAVINCI_MCBSP_RCR_RPHASE(1 << 31)
 
 #define DAVINCI_MCBSP_XCR_XWDLEN1(v)((v) << 5)

 #define DAVINCI_MCBSP_XCR_XFRLEN1(v)((v) << 8)
 #define DAVINCI_MCBSP_XCR_XDATDLY(v)((v) << 16)
 #define DAVINCI_MCBSP_XCR_XFIG(1 << 18)
 #define DAVINCI_MCBSP_XCR_XWDLEN2(v)((v) << 21)
+#define DAVINCI_MCBSP_XCR_XFRLEN2(v)((v) << 24)
+#define DAVINCI_MCBSP_XCR_XPHASE(1 << 31)
+
 
+#define CLKGDV(v)(v) /* Bits 0:7 */

 #define DAVINCI_MCBSP_SRGR_FWID(v)((v) << 8)
 #define DAVINCI_MCBSP_SRGR_FPER(v)((v) << 16)
 #define DAVINCI_MCBSP_SRGR_FSGM(1 << 28)
+#define DAVINCI_MCBSP_SRGR_CLKSM(1 << 29)
 
 #define DAVINCI_MCBSP_PCR_CLKRP(1 << 0)

 #define DAVINCI_MCBSP_PCR_CLKXP(1 << 1)
@@ -89,6 +98,11 @@
 #define DAVINCI_MCBSP_PCR_FSRM(1 << 10)
 #define DAVINCI_MCBSP_PCR_FSXM(1 << 11)
 
+/* this define works when both clock and FS are output for the cpu

+   and makes clock very fast (FS is not simmetrical, but sampling
+   frequency is better approximated */


   See chapter 8 of the Documentation/CodingStyle for the preferrable 
style of multi-line comments, it should be:


/*
 * blah
 * blah
 */


@@ -146,6 +160,14 @@ struct davinci_mcbsp_dev {
 unsigned enable_channel_combine:1;
 };
 
+struct davinci_mcbsp_data {

+unsigned intfmt;
+int clk_div;
+};
+
+static struct davinci_mcbsp_data mcbsp_data;
+
+


   Extra newline?


 static inline void davinci_mcbsp_write_reg(struct davinci_mcbsp_dev *dev,
int reg, u32 val)
 {
@@ -197,7 +219,7 @@ static void davinci_mcbsp_start(struct 
davinci_mcbsp_dev *dev,

 int ret = platform->pcm_ops->trigger(substream,
 SNDRV_PCM_TRIGGER_STOP);
 if (ret < 0)
-printk(KERN_DEBUG "Playback DMA stop failed\n");
+pr_debug("Playback DMA stop failed\n");
 }
 
 /* Enable the transmitter */


   Your mailer has converted all tabes to spaces. Patches can't be 
applied until you dealt with this and resend.


@@ -219,7 +241,7 @@ static void davinci_mcbsp_start(struct 
davinci_mcbsp_dev *dev,

 int ret = platform->pcm_ops->trigger(substream,
 SNDRV_PCM_TRIGGER_START);
 if (ret < 0)
-printk(KERN_DEBUG "Playback DMA start failed\n");
+pr_debug("Playback DMA start failed\n");


   Unrelated change.


 }
 }
 
@@ -254,12 +276,15 @@ static int davinci_i2s_set_dai_fmt(struct 
snd_soc_dai *cpu_dai,

 struct davinci_mcbsp_dev *dev = cpu_dai->private_data;
 unsigned int pcr;
 unsigned int srgr;
-srgr = DAVINCI_MCBSP_SRGR_FSGM |
+srgr = DAVINCI_MCBSP_SRGR_FSGM |
 DAVINCI_MCBSP_SRGR_FPER(DEFAULT_BITPERSAMPLE * 2 - 1) |
 DAVINCI_MCBSP_SRGR_FWID(DEFAULT_BITPERSAMPLE - 1);
+/* Attention srgr is updated by hw_params! */
 
+mcbsp_data.fmt = fmt;

 /* set master/slave audio interface */
 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
+case SND_SOC_DAIFMT_CBS_CFM:
 case SND_SOC_DAIFMT_CBS_CFS:
 /* cpu is master */
 pcr = DAVINCI_MCBSP_PCR_FSXM |
@@ -279,7 +304,7 @@ static int davinci_i2s_set_dai_fmt(struct 
snd_soc_dai *cpu_dai,

 pcr = 0;
 break;
 default:
-printk(KERN_ERR "%s:bad master\n", __func__);
+dev_err(dev, "%s:bad master\n", __func__);


   Unrelated change.

@@ -310,7 +335,7 @@ static int davinci_i2s_set_dai_fmt(struct 
snd_soc_dai *cpu_dai,

 dev->mode = MOD_DSP_B;
 break;
 default:
-printk(KERN_ERR "%s:bad format\n", __func__);
+dev_err(dev, "%s:bad format\n", __func__);


   ... and again.


 return -EINVAL;
 }
 
@@ -372,6 +397,25 @@ static int d

RE: [PATCH 3/6] davinci: edma: clear events in edma_start()

2010-06-07 Thread Sudhakar Rajashekhara 
Hi,

On Sat, Jun 05, 2010 at 02:05:50, Brian Niebuhr wrote:
> > >> >> This patch causes that the sound can not work normally 
> > on OMAP_L138.
> > >> 
> > >> After revert it, the audio works fine.
> > >> 
> > >
> > > This patch works fine on DM644x which has McBSP but breaks 
> > audio on OMAP L138
> > > (as you had mentioned) which has McASP. Ideally McBSP/McASP 
> > should start after
> > > EDMA is started. If not then this patch clears the EDMA 
> > event which is actually
> > > set by McBSP/McASP. As this patch is working fine on 
> > DM644x, I think there is
> > > some issue in the audio driver which needs to be debugged.
> > 
> > In the mean time, I think it makes sense to revert $SUBJECT patch in
> > davinci git until the audio driver is debugged.
> 
> Kevin - 
> 
> What is the process or timeline for getting this patch reapplied?  I am
> working right now on resubmitting my patch for the Davinci SPI driver,
> however that driver won't work as is without this patch.  I could
> probably hack something into the SPI driver to compensate, however if
> all are agreed that drivers shouldn't rely on DMA events that occur
> before the DMA is started, then it seems better to handle the issue in
> the DMA driver as I did in the reverted patch.
> 

I debugged this further today and I noticed that the issue of audio not
playing was observed only on DA830 and DA850 but not on DM6467 which also
has McASP. The only difference between McASP present on DM6467 and DA8XX
was hardware FIFO support. So when I disabled hardware FIFO on DA8XX devices,
even with this patch, audio started working correctly. Debugging further, I
found that, after doing FIFO configurations, FIFO was being enabled in
davinci_hw_common_param() function of sound/soc/davinci/davinci-mcasp.c file.
This was causing an extra McASP EDMA event to occur which was getting cleared
during edma_start(). This resulted in a state where EDMA was waiting for an
EDMA event from McASP, but the event which was already there, had got cleared.
Following patch fixes this issue.

===
diff --git a/sound/soc/davinci/davinci-mcasp.c 
b/sound/soc/davinci/davinci-mcasp.c
index 79f0f4a..d395509 100644
--- a/sound/soc/davinci/davinci-mcasp.c
+++ b/sound/soc/davinci/davinci-mcasp.c
@@ -612,7 +612,6 @@ static void davinci_hw_common_param(struct 
davinci_audio_dev *dev, int stream)
NUMDMA_MASK);
mcasp_mod_bits(dev->base + DAVINCI_MCASP_WFIFOCTL,
((dev->txnumevt * tx_ser) << 8), NUMEVT_MASK);
-   mcasp_set_bits(dev->base + DAVINCI_MCASP_WFIFOCTL, FIFO_ENABLE);
}

if (dev->rxnumevt && stream == SNDRV_PCM_STREAM_CAPTURE) {
@@ -623,7 +622,6 @@ static void davinci_hw_common_param(struct 
davinci_audio_dev *dev, int stream)
NUMDMA_MASK);
mcasp_mod_bits(dev->base + DAVINCI_MCASP_RFIFOCTL,
((dev->rxnumevt * rx_ser) << 8), NUMEVT_MASK);
-   mcasp_set_bits(dev->base + DAVINCI_MCASP_RFIFOCTL, FIFO_ENABLE);
}
 }
===

I'll be submitting this patch to the list soon.

Regards,
Sudhakar


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RE: [PATCH] DM365: fixed second serial port

2010-06-07 Thread Nori, Sekhar 
On Fri, Jun 04, 2010 at 16:46:28, jean-philippe francois wrote:
> > Unless you insist, I would prefer to leave the define at its current place.
> > First of all, many people (including me) expect to find defines somewhere
> > near the beginning of a source file. More importantly, if a definition is
> > valid throughout the entire file, it is easier to later add code that also
> > depends on that definition, without having to move it again.
> >
>
> As far as I am concerned, when a define is used in a single place, I
> find it easier
> to have it near the place where it is used. And I don't think we will
> need to add further reference
> to this define, since the precise purpose of this platform data is to
> stop caring about the hardware
> base address.

Agree with jean-philippe here, that's the general rule we have
been following in DaVinci tree.

Thanks,
Sekhar
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[PATCH 12/12] regulator: add support for Dallas DS1803 dual digital potentiometer

2010-06-07 Thread Raffaele Recalcati 
From: Rodolfo Giometti 
Date: Fri, 4 Jun 2010 12:47:28 +0200
Subject: [PATCH 12/12] regulator: add support for Dallas DS1803 dual digital
potentiometer

Signed-off-by: Rodolfo Giometti 
Acked-by: Raffaele Recalcati 
Acked-by: Enrico Valtolina 
---
 drivers/regulator/Kconfig|7 ++
 drivers/regulator/Makefile   |1 +
 drivers/regulator/ds1803.c   |  204
++
 include/linux/regulator/ds1803.h |   41 
 4 files changed, 253 insertions(+), 0 deletions(-)
 create mode 100644 drivers/regulator/ds1803.c
 create mode 100644 include/linux/regulator/ds1803.h

diff --git a/drivers/regulator/Kconfig b/drivers/regulator/Kconfig
index 04f2e08..ebaf09b 100644
--- a/drivers/regulator/Kconfig
+++ b/drivers/regulator/Kconfig
@@ -201,5 +201,12 @@ config REGULATOR_88PM8607
 help
   This driver supports 88PM8607 voltage regulator chips.

+config REGULATOR_DS1803
+tristate "Dallas Maxim DS1803 addressable dual digital potentiometer"
+depends on I2C
+help
+  Say Y here to support the dual digital potentiometer on
+  Dallas Maxim DS1803
+
 endif

diff --git a/drivers/regulator/Makefile b/drivers/regulator/Makefile
index 4e7feec..c0fe050 100644
--- a/drivers/regulator/Makefile
+++ b/drivers/regulator/Makefile
@@ -31,5 +31,6 @@ obj-$(CONFIG_REGULATOR_AB3100) += ab3100.o
 obj-$(CONFIG_REGULATOR_TPS65023) += tps65023-regulator.o
 obj-$(CONFIG_REGULATOR_TPS6507X) += tps6507x-regulator.o
 obj-$(CONFIG_REGULATOR_88PM8607) += 88pm8607.o
+obj-$(CONFIG_REGULATOR_DS1803) += ds1803.o

 ccflags-$(CONFIG_REGULATOR_DEBUG) += -DDEBUG
diff --git a/drivers/regulator/ds1803.c b/drivers/regulator/ds1803.c
new file mode 100644
index 000..8621a59
--- /dev/null
+++ b/drivers/regulator/ds1803.c
@@ -0,0 +1,204 @@
+/*
+ * ds1803.c  --  Voltage regulation for the DS1803
+ *
+ * Copyright (C) 2009 Rodolfo Giometti 
+ * Copyright (C) 2009 Bticino S.p.A. 
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307
USA
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+struct ds1803_data {
+struct i2c_client *client;
+struct regulator_dev *rdev;
+
+unsigned int min_uV;/* voltage for selector value 0 */
+unsigned int max_uV;/* voltage for selector value 255 */
+unsigned int init_uV;/* initial voltage */
+};
+
+/*
+ * Low level functions
+ */
+
+static u8 ds1803_write_pot_lut[] = { 0xa9, 0xaa, /* both not supported */
};
+
+static int ds1803_set_voltage(struct regulator_dev *rdev,
+int min_uV, int max_uV)
+{
+struct ds1803_data *ds1803 = rdev_get_drvdata(rdev);
+struct i2c_client *client = ds1803->client;
+unsigned int id = rdev_get_id(rdev);
+int val;
+u8 buf[2] = { ds1803_write_pot_lut[id], 0 };
+struct i2c_msg msgs[1] = {
+{ client->addr  , 0, 2, buf },
+};
+int ret;
+
+
+val = (min_uV - ds1803->min_uV) * 255 / ds1803->max_uV;
+
+pr_notice("%s Writing %d to pot %d\n",__func__, val,id);
+
+if (val < 0 || val > 255)
+return -EINVAL;
+buf[1] = val;
+
+ret = i2c_transfer(client->adapter, &msgs[0], 1);
+if (ret != 1) {
+dev_err(&client->dev, "%s: write error\n", __func__);
+return -EIO;
+}
+
+return 0;
+}
+
+static int ds1803_list_voltage(struct regulator_dev *rdev, unsigned index)
+{
+struct ds1803_data *ds1803 = rdev_get_drvdata(rdev);
+
+return (ds1803->max_uV - ds1803->min_uV) * index / 255
++ ds1803->min_uV;
+}
+
+/*
+ * Regulator methods
+ */
+
+static struct regulator_ops ds1803_voltage_ops = {
+.set_voltage = ds1803_set_voltage,
+.list_voltage = ds1803_list_voltage,
+};
+
+static char *ds1803_names[] = {
+[DS1803_100K] = "trimmer_100k",
+[DS1803_50K] = "trimmer_50k",
+[DS1803_10K] = "trimmer_10k",
+};
+
+static struct regulator_desc ds1803_reg[] = {
+{
+.type = REGULATOR_VOLTAGE,
+.id = 0,
+.n_voltages = 256,
+.ops = &ds1803_voltage_ops,
+.owner = THIS_MODULE,
+},
+{
+.type = REGULATOR_VOLTAGE,
+.id = 1,
+.n_voltages = 256,
+.ops = &ds1803_voltage_ops,
+.owner = THIS_MODULE,
+},
+};
+
+static int ds1803_i2c_probe(struct i2c_client *client,
+  const struct

[PATCH 10/12] DaVinci: dm365: Added clokout2 management

2010-06-07 Thread Raffaele Recalcati 
From: Davide Bonfanti 
Date: Thu, 3 Jun 2010 14:26:26 +0200
Subject: [PATCH 10/12] DaVinci: dm365: Added clokout2 management

Signed-off-by: Raffaele Recalcati 
---
 arch/arm/mach-davinci/clock.c  |   62

 arch/arm/mach-davinci/clock.h  |6 +++
 arch/arm/mach-davinci/dm365.c  |   58 -
 arch/arm/mach-davinci/include/mach/clock.h |3 +
 4 files changed, 126 insertions(+), 3 deletions(-)

diff --git a/arch/arm/mach-davinci/clock.c b/arch/arm/mach-davinci/clock.c
index 054c303..f561b73 100644
--- a/arch/arm/mach-davinci/clock.c
+++ b/arch/arm/mach-davinci/clock.c
@@ -144,6 +144,68 @@ int clk_set_rate(struct clk *clk, unsigned long rate)
 }
 EXPORT_SYMBOL(clk_set_rate);

+
+int clkout_set_rate(struct clk *clk, unsigned long rate)
+{
+unsigned long flags;
+int ret = -EINVAL;
+int i, err, min_err, i_min_err;
+u32 regval;
+struct pll_data *pll;
+
+
+if (clk == NULL || IS_ERR(clk))
+return ret;
+pll = clk->parent->pll_data;
+regval = __raw_readl(IO_ADDRESS(clk->sec_div_reg));
+
+if (clk->sec_div_reg)
+{
+i_min_err = min_err = INT_MAX;
+for (i=clk->sec_div_reg_max; i>0; i--)
+{
+if (clk->set_rate)
+{
+ret = clk_set_rate(clk, rate * i) ;
+err = clk_get_rate(clk) - rate * i;
+if (abs(min_err) > abs(err))
+{
+min_err = err;
+i_min_err = i;
+}
+}
+}
+i = i_min_err;
+ret = clk->set_rate(clk, rate * i) ;
+
+regval &= ~(clk->sec_div_reg_max << clk->sec_div_reg_shift);
+regval |= (i-1) << clk->sec_div_reg_shift;
+__raw_writel(regval,  IO_ADDRESS(clk->sec_div_reg));
+regval = __raw_readl( IO_ADDRESS(clk->out_enable_reg));
+regval |= 1 << clk->out_enable_bit;
+__raw_writel(regval, IO_ADDRESS(clk->out_enable_reg));
+rate *= i;
+}
+else
+{
+if (clk->set_rate)
+ret = clk->set_rate(clk, rate);
+}
+
+spin_lock_irqsave(&clockfw_lock, flags);
+if (ret == 0) {
+if (clk->recalc)
+clk->rate = clk->recalc(clk);
+propagate_rate(clk);
+regval &= ~(1 << clk->out_enable_bit);
+__raw_writel(regval, IO_ADDRESS(clk->out_enable_reg));
+}
+spin_unlock_irqrestore(&clockfw_lock, flags);
+
+return ret;
+}
+EXPORT_SYMBOL(clkout_set_rate);
+
 int clk_set_parent(struct clk *clk, struct clk *parent)
 {
 unsigned long flags;
diff --git a/arch/arm/mach-davinci/clock.h b/arch/arm/mach-davinci/clock.h
index 01e3648..1ca14e7 100644
--- a/arch/arm/mach-davinci/clock.h
+++ b/arch/arm/mach-davinci/clock.h
@@ -95,6 +95,12 @@ struct clk {
 struct list_headchildnode;/* parent's child list node */
 struct pll_data *pll_data;
 u32 div_reg;
+u32sec_div_reg;
+u32sec_div_reg_max;
+u32 sec_div_reg_shift;
+u32 out_enable_reg;
+u32 out_enable_bit;
+
 unsigned long (*recalc) (struct clk *);
 int (*set_rate) (struct clk *clk, unsigned long rate);
 int (*round_rate) (struct clk *clk, unsigned long rate);
diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
index e4ead0a..9968c37 100644
--- a/arch/arm/mach-davinci/dm365.c
+++ b/arch/arm/mach-davinci/dm365.c
@@ -40,6 +40,21 @@
 #include "mux.h"

 #define DM365_REF_FREQ2400/* 24 MHz on the DM365 EVM */
+#define PINMUX00x00
+#define PINMUX10x04
+#define PINMUX20x08
+#define PINMUX30x0c
+#define PINMUX40x10
+#define INTMUX0x18
+#define EVTMUX0x1c
+#define PERI_CLKCTL0x48
+#define CLOCKOUT2EN 2
+#define CLOCKOUT1EN 1
+#define CLOCKOUT0EN 0
+
+
+int dm365_set_pll1_rate(struct clk *clk, unsigned long rate);
+

 static struct pll_data pll1_data = {
 .num= 1,
@@ -147,6 +162,20 @@ static struct clk pll1_sysclk9 = {
 .div_reg= PLLDIV9,
 };

+static struct clk clkout2_clk = {
+.name= "clkout2",
+.parent= &pll1_clk,
+.flags= CLK_PLL,
+.div_reg= PLLDIV9,
+.sec_div_reg= DAVINCI_SYSTEM_MODULE_BASE + PERI_CLKCTL,
+.sec_div_reg_max= 0x0F,
+.sec_div_reg_shift= 3,
+.out_enable_reg = DAVINCI_SYSTEM_MODULE_BASE + PERI_CLKCTL,
+.out_enable_bit= CLOCKOUT2EN,
+.set_rate   = dm365_set_pll1_rate,
+};
+
+
 static struct clk pll2_clk = {
 .name= "pll2",
 .parent= &ref_clk,
@@ -421,6 +450,7 @@ static struct clk_lookup dm365_clks[] = {
 CLK(NULL, "pll1_sysclk7", &pll1_sysclk7),
 CLK(NULL, "pll1_sysclk8", &pll1_sysclk8),
 CLK(NULL, "pll1_sysclk9", &pll1_sysclk9),
+CLK(NULL, "clkout2", &clkout2_clk),
 CLK(NULL, "pll2", &pll2_clk),
 CLK(NULL, "pll2_aux", &pll2_aux_clk),
 CLK(NULL, "clkout1", &clkout1_cl

[PATCH 01/12] ASoC: DaVinci: Added support for stereo I2S

2010-06-07 Thread Raffaele Recalcati 
From: Raffaele Recalcati 
Date: Thu, 3 Jun 2010 14:40:05 +0200
Subject: [PATCH 01/12] ASoC: DaVinci: Added support for stereo I2S

 - Frame Sync master and Clock master (internally generated)
 - Frame Sync master and Clock slave

Signed-off-by: Davide Bonfanti 
---
 sound/soc/davinci/davinci-i2s.c |  137
++-
 1 files changed, 121 insertions(+), 16 deletions(-)

diff --git a/sound/soc/davinci/davinci-i2s.c
b/sound/soc/davinci/davinci-i2s.c
index adadcd3..c1281c5 100644
--- a/sound/soc/davinci/davinci-i2s.c
+++ b/sound/soc/davinci/davinci-i2s.c
@@ -9,6 +9,8 @@
  * published by the Free Software Foundation.
  */

+#define DEBUG 3
+
 #include 
 #include 
 #include 
@@ -68,16 +70,23 @@
 #define DAVINCI_MCBSP_RCR_RDATDLY(v)((v) << 16)
 #define DAVINCI_MCBSP_RCR_RFIG(1 << 18)
 #define DAVINCI_MCBSP_RCR_RWDLEN2(v)((v) << 21)
+#define DAVINCI_MCBSP_RCR_RFRLEN2(v)((v) << 24)
+#define DAVINCI_MCBSP_RCR_RPHASE(1 << 31)

 #define DAVINCI_MCBSP_XCR_XWDLEN1(v)((v) << 5)
 #define DAVINCI_MCBSP_XCR_XFRLEN1(v)((v) << 8)
 #define DAVINCI_MCBSP_XCR_XDATDLY(v)((v) << 16)
 #define DAVINCI_MCBSP_XCR_XFIG(1 << 18)
 #define DAVINCI_MCBSP_XCR_XWDLEN2(v)((v) << 21)
+#define DAVINCI_MCBSP_XCR_XFRLEN2(v)((v) << 24)
+#define DAVINCI_MCBSP_XCR_XPHASE(1 << 31)
+

+#define CLKGDV(v)(v) /* Bits 0:7 */
 #define DAVINCI_MCBSP_SRGR_FWID(v)((v) << 8)
 #define DAVINCI_MCBSP_SRGR_FPER(v)((v) << 16)
 #define DAVINCI_MCBSP_SRGR_FSGM(1 << 28)
+#define DAVINCI_MCBSP_SRGR_CLKSM(1 << 29)

 #define DAVINCI_MCBSP_PCR_CLKRP(1 << 0)
 #define DAVINCI_MCBSP_PCR_CLKXP(1 << 1)
@@ -89,6 +98,11 @@
 #define DAVINCI_MCBSP_PCR_FSRM(1 << 10)
 #define DAVINCI_MCBSP_PCR_FSXM(1 << 11)

+/* this define works when both clock and FS are output for the cpu
+   and makes clock very fast (FS is not simmetrical, but sampling
+   frequency is better approximated */
+#define I2S_FAST_CLOCK
+
 enum {
 DAVINCI_MCBSP_WORD_8 = 0,
 DAVINCI_MCBSP_WORD_12,
@@ -146,6 +160,14 @@ struct davinci_mcbsp_dev {
 unsigned enable_channel_combine:1;
 };

+struct davinci_mcbsp_data {
+unsigned intfmt;
+int clk_div;
+};
+
+static struct davinci_mcbsp_data mcbsp_data;
+
+
 static inline void davinci_mcbsp_write_reg(struct davinci_mcbsp_dev *dev,
int reg, u32 val)
 {
@@ -197,7 +219,7 @@ static void davinci_mcbsp_start(struct davinci_mcbsp_dev
*dev,
 int ret = platform->pcm_ops->trigger(substream,
 SNDRV_PCM_TRIGGER_STOP);
 if (ret < 0)
-printk(KERN_DEBUG "Playback DMA stop failed\n");
+pr_debug("Playback DMA stop failed\n");
 }

 /* Enable the transmitter */
@@ -219,7 +241,7 @@ static void davinci_mcbsp_start(struct davinci_mcbsp_dev
*dev,
 int ret = platform->pcm_ops->trigger(substream,
 SNDRV_PCM_TRIGGER_START);
 if (ret < 0)
-printk(KERN_DEBUG "Playback DMA start failed\n");
+pr_debug("Playback DMA start failed\n");
 }
 }

@@ -254,12 +276,15 @@ static int davinci_i2s_set_dai_fmt(struct snd_soc_dai
*cpu_dai,
 struct davinci_mcbsp_dev *dev = cpu_dai->private_data;
 unsigned int pcr;
 unsigned int srgr;
-srgr = DAVINCI_MCBSP_SRGR_FSGM |
+srgr = DAVINCI_MCBSP_SRGR_FSGM |
 DAVINCI_MCBSP_SRGR_FPER(DEFAULT_BITPERSAMPLE * 2 - 1) |
 DAVINCI_MCBSP_SRGR_FWID(DEFAULT_BITPERSAMPLE - 1);
+/* Attention srgr is updated by hw_params! */

+mcbsp_data.fmt = fmt;
 /* set master/slave audio interface */
 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
+case SND_SOC_DAIFMT_CBS_CFM:
 case SND_SOC_DAIFMT_CBS_CFS:
 /* cpu is master */
 pcr = DAVINCI_MCBSP_PCR_FSXM |
@@ -279,7 +304,7 @@ static int davinci_i2s_set_dai_fmt(struct snd_soc_dai
*cpu_dai,
 pcr = 0;
 break;
 default:
-printk(KERN_ERR "%s:bad master\n", __func__);
+dev_err(dev, "%s:bad master\n", __func__);
 return -EINVAL;
 }

@@ -310,7 +335,7 @@ static int davinci_i2s_set_dai_fmt(struct snd_soc_dai
*cpu_dai,
 dev->mode = MOD_DSP_B;
 break;
 default:
-printk(KERN_ERR "%s:bad format\n", __func__);
+dev_err(dev, "%s:bad format\n", __func__);
 return -EINVAL;
 }

@@ -372,6 +397,25 @@ static int davinci_i2s_set_dai_fmt(struct snd_soc_dai
*cpu_dai,
 return 0;
 }

+static int davinci_i2s_dai_set_clkdiv (struct snd_soc_dai *cpu_dai,
+ int div_id, int div)
+{
+struct davinci_mcbsp_dev *dev = cpu_dai->private_data;
+int srgr;
+
+mcbsp_data.clk_div = div;
+/* register set in hw_params: not needed here
+srgr = davinci_mcbsp_read_reg(dev, DAVINCI_MCBSP_SRGR_REG);
+srgr |= CLKGDV(div - 1);
+davinci_mcbsp_write_reg(dev, DAVINCI_MCBSP_SRGR_REG, srgr);
+pr_debu

[PATCH 08/12] drivers: mfd: Kconfig Adding comment to MFD_DAVINCI_VOICECODEC

2010-06-07 Thread Raffaele Recalcati 
From: Raffaele Recalcati 
Date: Tue, 20 Apr 2010 08:23:56 +0200
Subject: [PATCH 08/12] drivers: mfd: Kconfig  Adding comment to
MFD_DAVINCI_VOICECODEC

It makes more clear the selection.
---
 drivers/mfd/Kconfig |2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
index dfbd03f..bf584f0 100644
--- a/drivers/mfd/Kconfig
+++ b/drivers/mfd/Kconfig
@@ -54,7 +54,7 @@ config MFD_SH_MOBILE_SDHI
   SuperH Mobile SoCs.

 config MFD_DAVINCI_VOICECODEC
-tristate
+tristate "DaVinci VoiceCodec"
 select MFD_CORE

 config MFD_DM355EVM_MSP
-- 
1.6.3.3
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[PATCH 09/12] mfd: update gfp/slab.h includes

2010-06-07 Thread Raffaele Recalcati 
From: Tejun Heo 
Date: Tue, 30 Mar 2010 02:52:40 +0900
Subject: [PATCH 09/12] mfd: update gfp/slab.h includes

Implicit slab.h inclusion via percpu.h is about to go away.  Make sure
gfp.h or slab.h is included as necessary.

Signed-off-by: Tejun Heo 
Acked-by: Samuel Ortiz 
Signed-off-by: Mark Brown 
---
 drivers/mfd/davinci_voicecodec.c |1 +
 1 files changed, 1 insertions(+), 0 deletions(-)

diff --git a/drivers/mfd/davinci_voicecodec.c
b/drivers/mfd/davinci_voicecodec.c
index 9886aa8..3e75f02 100644
--- a/drivers/mfd/davinci_voicecodec.c
+++ b/drivers/mfd/davinci_voicecodec.c
@@ -23,6 +23,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
-- 
1.6.3.3
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[PATCH 07/12] davinci: dm365: Fix UART0,1 register addresses

2010-06-07 Thread Raffaele Recalcati 
From: Davide Bonfanti 
Date: Fri, 4 Jun 2010 14:05:35 +0200
Subject: [PATCH 07/12] davinci: dm365: Fix UART0,1 register addresses

Signed-off-by: Raffaele Recalcati 
---
 arch/arm/mach-davinci/dm365.c   |4 ++--
 arch/arm/mach-davinci/include/mach/serial.h |3 +++
 2 files changed, 5 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
index 42fd4a4..e4ead0a 100644
--- a/arch/arm/mach-davinci/dm365.c
+++ b/arch/arm/mach-davinci/dm365.c
@@ -1024,7 +1024,7 @@ static struct davinci_timer_info dm365_timer_info = {

 static struct plat_serial8250_port dm365_serial_platform_data[] = {
 {
-.mapbase= DAVINCI_UART0_BASE,
+.mapbase= DM365_UART0_BASE,
 .irq= IRQ_UARTINT0,
 .flags= UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
   UPF_IOREMAP,
@@ -1032,7 +1032,7 @@ static struct plat_serial8250_port
dm365_serial_platform_data[] = {
 .regshift= 2,
 },
 {
-.mapbase= DAVINCI_UART1_BASE,
+.mapbase= DM365_UART1_BASE,
 .irq= IRQ_UARTINT1,
 .flags= UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
   UPF_IOREMAP,
diff --git a/arch/arm/mach-davinci/include/mach/serial.h
b/arch/arm/mach-davinci/include/mach/serial.h
index f6c4f34..ba8f230 100644
--- a/arch/arm/mach-davinci/include/mach/serial.h
+++ b/arch/arm/mach-davinci/include/mach/serial.h
@@ -17,6 +17,9 @@
 #define DAVINCI_UART1_BASE(IO_PHYS + 0x20400)
 #define DAVINCI_UART2_BASE(IO_PHYS + 0x20800)

+#define DM365_UART0_BASE 0x01C2
+#define DM365_UART1_BASE 0x01D06000
+
 #define DA8XX_UART0_BASE(IO_PHYS + 0x042000)
 #define DA8XX_UART1_BASE(IO_PHYS + 0x10c000)
 #define DA8XX_UART2_BASE(IO_PHYS + 0x10d000)
-- 
1.6.3.3
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[PATCH 05/12] mtd-nand: davinci: Added 16 bit wide bus for DaVinci bmx board

2010-06-07 Thread Raffaele Recalcati 
From: Davide Bonfanti 
Date: Fri, 4 Jun 2010 13:56:35 +0200
Subject: [PATCH 05/12] mtd-nand: davinci: Added 16 bit wide bus for DaVinci
bmx board

Signed-off-by: "Raffaele Recalcati "
---
 drivers/mtd/nand/davinci_nand.c |   40
+++
 1 files changed, 40 insertions(+), 0 deletions(-)

diff --git a/drivers/mtd/nand/davinci_nand.c
b/drivers/mtd/nand/davinci_nand.c
index 103235e..d29685d 100644
--- a/drivers/mtd/nand/davinci_nand.c
+++ b/drivers/mtd/nand/davinci_nand.c
@@ -508,6 +508,38 @@ static void __init nand_dm6446evm_flash_init(struct
davinci_nand_info *info)
 }
 }

+static void __init nand_bmx_flash_init(struct davinci_nand_info *info)
+{
+uint32_t regval, a1cr;
+
+/*
+ * NAND FLASH timings @ PLL1 == 459 MHz
+ *  - AEMIF.CLK freq   = PLL1/6 = 459/6 = 76.5 MHz
+ *  - AEMIF.CLK period = 1/76.5 MHz = 13.1 ns
+ */
+regval = 0
+| (0 << 31)   /* selectStrobe */
+| (1 << 30)   /* extWait (never with NAND) */
+| (0 << 26)   /* writeSetup  10 ns */
+| (4 << 20)   /* writeStrobe 40 ns */
+| (0 << 17)   /* writeHold   10 ns */
+| (0 << 13)   /* readSetup   10 ns */
+| (4 << 7)/* readStrobe  60 ns */
+| (0 << 4)/* readHold10 ns */
+| (1 << 2)/* turnAround  ?? ns */
+| (1 << 0)/* asyncSize   16-bit bus */
+;
+a1cr = davinci_nand_readl(info, A1CR_OFFSET);
+if (a1cr != regval) {
+dev_err(info->dev, "Warning: NAND config: Set A1CR " \
+   "reg to 0x%08x, was 0x%08x, should be done by " \
+   "bootloader.\n", regval, a1cr);
+davinci_nand_writel(info, A1CR_OFFSET, regval);
+}
+
+}
+
+
 /*--*/

 /* An ECC layout for using 4-bit ECC with small-page flash, storing
@@ -697,6 +729,14 @@ static int __init nand_davinci_probe(struct
platform_device *pdev)
  */
 if (machine_is_davinci_evm())
 nand_dm6446evm_flash_init(info);
+else if (machine_is_bmx())
+nand_bmx_flash_init(info); /* no reason to do this,
+* because the boot loader
+* is booting the kernel
+* that is in the nand flash
+* and so EMIF must already
+* configured
+*/

 spin_lock_irq(&davinci_nand_lock);

-- 
1.6.3.3
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[PATCH 06/12] fb: Added composite sync high active mode

2010-06-07 Thread Raffaele Recalcati 
From: Davide Bonfanti 
Date: Fri, 4 Jun 2010 14:30:12 +0200
Subject: [PATCH 06/12] fb: Added composite sync high active mode

---
 include/linux/fb.h |1 +
 1 files changed, 1 insertions(+), 0 deletions(-)

diff --git a/include/linux/fb.h b/include/linux/fb.h
index c10163b..578a8de 100644
--- a/include/linux/fb.h
+++ b/include/linux/fb.h
@@ -212,6 +212,7 @@ struct fb_bitfield {
 /* vtotal = 144d/288n/576i => PAL  */
 /* vtotal = 121d/242n/484i => NTSC */
 #define FB_SYNC_ON_GREEN32/* sync on green */
+#define FB_SYNC_PIXCLOCK_HIGH_ACT64/* composite sync high active
*/

 #define FB_VMODE_NONINTERLACED  0/* non interlaced */
 #define FB_VMODE_INTERLACED1/* interlaced*/
-- 
1.6.3.3
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[PATCH 04/12] ads7846: setting pen_down direction in input

2010-06-07 Thread Raffaele Recalcati 
From: Raffaele Recalcati 
Date: Fri, 4 Jun 2010 14:55:16 +0200
Subject: [PATCH 04/12] ads7846: setting pen_down direction in input

---
 drivers/input/touchscreen/ads7846.c |2 ++
 1 files changed, 2 insertions(+), 0 deletions(-)

diff --git a/drivers/input/touchscreen/ads7846.c
b/drivers/input/touchscreen/ads7846.c
index 532279c..226dbdc 100644
--- a/drivers/input/touchscreen/ads7846.c
+++ b/drivers/input/touchscreen/ads7846.c
@@ -872,6 +872,8 @@ static int __devinit setup_pendown(struct spi_device
*spi, struct ads7846 *ts)
 return err;
 }

+gpio_direction_input(pdata->gpio_pendown);
+
 ts->gpio_pendown = pdata->gpio_pendown;
 return 0;
 }
-- 
1.6.3.3
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[PATCH 03/12] davinci: dm365: Added swap between y and c data in isif port.

2010-06-07 Thread Raffaele Recalcati 
From: Raffaele Recalcati 
Date: Fri, 4 Jun 2010 14:23:30 +0200
Subject: [PATCH 03/12] davinci: dm365: Added swap between y and c data in
isif port.

---
 drivers/media/video/davinci/isif.c |6 +-
 include/media/davinci/isif.h   |2 ++
 include/media/davinci/vpfe_types.h |8 
 3 files changed, 15 insertions(+), 1 deletions(-)

diff --git a/drivers/media/video/davinci/isif.c
b/drivers/media/video/davinci/isif.c
index 29c29c6..120fcf0 100644
--- a/drivers/media/video/davinci/isif.c
+++ b/drivers/media/video/davinci/isif.c
@@ -105,6 +105,7 @@ static struct isif_oper_config {
 .hd_pol = VPFE_PINPOL_POSITIVE,
 .pix_order = CCDC_PIXORDER_CBYCRY,
 .buf_type = CCDC_BUFTYPE_FLD_INTERLEAVED,
+.ycswap = YCIN_NOT_SWP,
 },
 .bayer = {
 .pix_fmt = CCDC_PIXFMT_RAW,
@@ -864,6 +865,7 @@ static void isif_setfbaddr(unsigned long addr)
 static int isif_set_hw_if_params(struct vpfe_hw_if_param *params)
 {
 isif_cfg.if_type = params->if_type;
+isif_cfg.ycbcr.ycswap = params->ycswap;

 switch (params->if_type) {
 case VPFE_BT656:
@@ -914,7 +916,9 @@ static int isif_config_ycbcr(void)
 }
 modeset |= (VPFE_PINPOL_NEGATIVE << ISIF_VD_POL_SHIFT);
 regw(3, REC656IF);
-ccdcfg = ccdcfg | ISIF_DATA_PACK8 | ISIF_YCINSWP_YCBCR;
+ccdcfg = ccdcfg | ISIF_DATA_PACK8;
+if(params->ycswap == YCIN_SWP)
+ccdcfg |= ISIF_YCINSWP_YCBCR;
 break;
 case VPFE_BT656_10BIT:
 if (params->pix_fmt != CCDC_PIXFMT_YCBCR_8BIT) {
diff --git a/include/media/davinci/isif.h b/include/media/davinci/isif.h
index b0b74ad..b123f2c 100644
--- a/include/media/davinci/isif.h
+++ b/include/media/davinci/isif.h
@@ -466,6 +466,8 @@ struct isif_ycbcr_config {
 enum vpfe_pin_pol hd_pol;
 /* isif pix order. Only used for ycbcr capture */
 enum ccdc_pixorder pix_order;
+/* ccdc data connection. 8 bit ycbcr data bus connection */
+enum vpfe_data_swap ycswap;
 /* isif buffer type. Only used for ycbcr capture */
 enum ccdc_buftype buf_type;
 };
diff --git a/include/media/davinci/vpfe_types.h
b/include/media/davinci/vpfe_types.h
index 76fb74b..337c917 100644
--- a/include/media/davinci/vpfe_types.h
+++ b/include/media/davinci/vpfe_types.h
@@ -40,12 +40,20 @@ enum vpfe_hw_if_type {
 VPFE_BT656_10BIT
 };

+/* 8 bit interface can be swapped */
+enum vpfe_data_swap {
+YCIN_NOT_SWP,
+YCIN_SWP,
+};
+
 /* interface description */
 struct vpfe_hw_if_param {
 enum vpfe_hw_if_type if_type;
 enum vpfe_pin_pol hdpol;
 enum vpfe_pin_pol vdpol;
+enum vpfe_data_swap ycswap;
 };

+
 #endif
 #endif
-- 
1.6.3.3
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[PATCH 02/12] spi: davinci: Added support for chip select using gpio

2010-06-07 Thread Raffaele Recalcati 
From: Raffaele Recalcati 
Date: Fri, 4 Jun 2010 16:16:37 +0200
Subject: [PATCH 02/12] spi: davinci: Added support for chip select using
gpio

Signed-off-by: Davide Bonfanti 
---
 arch/arm/mach-davinci/dm365.c |   10 ++
 drivers/spi/davinci_spi.c |   26 +-
 2 files changed, 23 insertions(+), 13 deletions(-)

diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
index a146849..42fd4a4 100644
--- a/arch/arm/mach-davinci/dm365.c
+++ b/arch/arm/mach-davinci/dm365.c
@@ -677,10 +677,12 @@ void __init dm365_init_spi0(unsigned chipselect_mask,
 davinci_cfg_reg(DM365_SPI0_SDO);

 /* not all slaves will be wired up */
-if (chipselect_mask & BIT(0))
-davinci_cfg_reg(DM365_SPI0_SDENA0);
-if (chipselect_mask & BIT(1))
-davinci_cfg_reg(DM365_SPI0_SDENA1);
+if  (!((unsigned long) info->controller_data)) {
+if (chipselect_mask & BIT(0))
+davinci_cfg_reg(DM365_SPI0_SDENA0);
+if (chipselect_mask & BIT(1))
+davinci_cfg_reg(DM365_SPI0_SDENA1);
+}

 spi_register_board_info(info, len);

diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c
index 95afb6b..6a305ca 100644
--- a/drivers/spi/davinci_spi.c
+++ b/drivers/spi/davinci_spi.c
@@ -29,6 +29,7 @@
 #include 
 #include 

+#include 
 #include 
 #include 

@@ -270,18 +271,25 @@ static void davinci_spi_chipselect(struct spi_device
*spi, int value)
 pdata = davinci_spi->pdata;

 /*
- * Board specific chip select logic decides the polarity and cs
- * line for the controller
- */
+* Board specific chip select logic decides the polarity and cs
+* line for the controller
+*/
 if (value == BITBANG_CS_INACTIVE) {
-set_io_bits(davinci_spi->base + SPIDEF, CS_DEFAULT);
-
-data1_reg_val |= CS_DEFAULT << SPIDAT1_CSNR_SHIFT;
-iowrite32(data1_reg_val, davinci_spi->base + SPIDAT1);
+if  ((unsigned long) spi->controller_data) {
+gpio_set_value(spi->controller_data, !(spi->mode &
SPI_CS_HIGH));
+} else {
+set_io_bits(davinci_spi->base + SPIDEF, CS_DEFAULT);

+data1_reg_val |= CS_DEFAULT << SPIDAT1_CSNR_SHIFT;
+iowrite32(data1_reg_val, davinci_spi->base + SPIDAT1);
+}
 while ((ioread32(davinci_spi->base + SPIBUF)
-& SPIBUF_RXEMPTY_MASK) == 0)
+& SPIBUF_RXEMPTY_MASK) == 0)
 cpu_relax();
+} else {
+if  ((unsigned long) spi->controller_data) {
+gpio_set_value(spi->controller_data, (spi->mode &
SPI_CS_HIGH));
+}
 }
 }

-- 
1.6.3.3
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TPS6507x-ts driver failed with -121 on kernel v2.6.34-davinci1

2010-06-07 Thread n...@max01.eu 
Hello,

i try to get running the tps6507x-ts touchscreen driver on the Kevin Hilman
Davinci kernel tree
(git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-davinci.git).

I enabled the following parts in the kernelconfig:

Device Drivers - Multifunction Device Drivers - TPS6507x Power Management /
Touch Screen chips
Device Drivers - Input device support - Event Interface
Device Drivers - Input device support - Touchscreens - TPS6507x based
touchscreens


That gives a compile error : "can`t find" kzalloc and kfree!

After applying following patch the driver compiles.

diff --git a/drivers/mfd/tps6507x.c b/drivers/mfd/tps6507x.c
index dcddef0..dbaab1a 100644
--- a/drivers/mfd/tps6507x.c
+++ b/drivers/mfd/tps6507x.c
@@ -20,6 +20,7 @@
 #include 
 #include 
 #include 
+#include 
 
 static struct mfd_cell tps6507x_devs[] = {
    {


On runtime the kernel gives the following error:

tps6507x-ts: probe of tps6507x-ts failed with error -121

Any idea whats to do now?
Thank you very much,
 
regards
 
Bastian.
 
P.S.
Hardware:
OMAP-L138 Evm-Board with ui-board___
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