Re: [U-Boot] Question: Installing U-Boot on the Karo TX25

2012-03-26 Thread Züger Martin
On Thursday, March 22, 2012 4:06 PM, Stefano Babic wrote:
 Hi Martin,
Hello Stefano

 please do not remove the ML when you post an answer. Your experience can
 be helpful for other people, too.
Sorry about that, I just hit the replay button and didn't realized that the
answer went directly to you instead to the mailing list.

 Generally, they can share the same value, but they have different
 meaning. For TX25, the link address is set in board/karo/tx25/config.mk.
 However, this is the old way to do things. Currently,
 CONFIG_SYS_TEXT_BASE (link address) must be set into the board
 configuration file (tx25.h).
 CONFIG_SYS_NAND_U_BOOT_DST tells the first loader (nand_spl) where
 u-boot code must be copied. If u-boot has a small header that must be
 also copied, the two address are different. On tx25, they have the same
 value.
Thank you very much for your explanation. I'd like to learn how u-boot works
and how a board support package have to be implemented. Probably I'd better
choose another board if the BSP of the TX25 uses some deprecated ways.

Best regards,
Martin
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Re: [U-Boot] [PATCH 2/2] cmd_fat: add FAT write command

2012-03-26 Thread Anatolij Gustschin
On Mon, 26 Mar 2012 09:34:07 +0900
Kyungmin Park kyungmin.p...@samsung.com wrote:
...
  Hmm, emails to dg77@samsung.com address are now rejected:
  Recipient address rejected: User unknown (in reply to RCPT TO command)
 Hi,

Hi,

 FYI: Now Mr. Kim is left the company. So if any issue and codes from
 Mr. Kim, then let me follow up.

Thanks for the info. When compiling the FAT write code with newer
GCC 4.6.1 I've seen some warnings and fixed them by this patch [1].
Could you please look at this patch and if it is okay, then send
your Acked-by?

 Thank you,
 Kyungmin Park

Thanks,
Anatolij

[1] http://patchwork.ozlabs.org/patch/148551/
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Re: [U-Boot] [PATCH] doc: Fix some typos in different files

2012-03-26 Thread Anatolij Gustschin
On Sun, 25 Mar 2012 10:44:01 +0200
Thomas Weber tho...@tomweber.eu wrote:

 adresses/addresses
 alernate/alternate
 asssuming/assuming
 calcualted/calculated
 enviroment/environment
 evalutation/evaluation
 falsh/flash
 labled/labeled
 paramaters/parameters
 
 Signed-off-by: Thomas Weber tho...@tomweber.eu
 ---
  doc/README.AVR32-port-muxing |4 ++--
  doc/README.SNTP  |2 +-
  doc/README.Sandpoint8240 |6 +++---
  doc/README.at91  |6 +++---
  doc/README.ebony |2 +-
  doc/README.fsl-ddr   |4 ++--
  doc/README.mpc832xemds   |2 +-
  doc/README.mpc8360emds   |2 +-
  doc/README.mpc837xemds   |2 +-
  doc/README.mpc8544ds |2 +-
  doc/README.mpc8572ds |4 ++--
  doc/README.mpc85xxads|2 +-
  doc/README.mvbc_p|2 +-
  doc/README.mvblm7|4 ++--
  doc/README.mvsmr |2 +-
  doc/README.ocotea|2 +-
  doc/README.p2020rdb  |4 ++--
  17 files changed, 26 insertions(+), 26 deletions(-)

Acked-by: Anatolij Gustschin ag...@denx.de
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Re: [U-Boot] [PATCH v5] kirkwood: add NAS62x0 board support

2012-03-26 Thread Prafulla Wadaskar


 -Original Message-
 From: u-boot-boun...@lists.denx.de [mailto:u-boot-
 boun...@lists.denx.de] On Behalf Of Luka Perkov
 Sent: 26 March 2012 01:02
 To: u-boot@lists.denx.de
 Cc: drea...@doukki.net; gmbno...@gmail.com
 Subject: [U-Boot] [PATCH v5] kirkwood: add NAS62x0 board support
 
 Add support for new boards RaidSonic ICY BOX NAS6210 and NAS6220.
 
 Only difference between boards is number of SATA ports.
 
 More information about the boards can be found here:
 
 http://www.raidsonic.de/en/products/nas-systems.php?we_objectID=7036
 http://www.raidsonic.de/en/products/nas-systems.php?we_objectID=7515
 
 Signed-off-by: Luka Perkov ub...@lukaperkov.net
 Signed-off-by: Gerald Kerma drea...@doukki.net
 Signed-off-by: Simon Baatz gmbno...@gmail.com
 ---
 
 Changes from version v1:
 
  * use tools/checkpatch.pl to locate patch errors and fix them
  * add two entries in boards.cfg, one for each board
  * fixed CONFIG_RESET_PHY_R
  * don't define values for macros that enable features only
  * remove static RAM configuration
  * fix comments
  * use only CONFIG_ENV_OFFSET and remove CONFIG_ENV_ADDR
  * clean coding style
  * add entry in MAINTAINERS file
 
 Changes from version v2:
 
  * use defined() in macros for board selection for robustness
 
 Changes from version v3:
 
  * don't use utf8 for Geralds name
  * don't mix upper/lower case in kwbimage.cfg
  * fix prompt
 
 Changes from version v4:
  * fix board Makefile (clean and distclean)
  * use generic way to handle arch number of the board
  * fix MAINTAINERS file
  * move code from Marvell to raidsonic folder
  * use CONFIG_MACH_TYPE
  * set only necessary GPIOs
  * use link instead of address for license
  * add few links about board being supported for quick reference
  * add previous change logs
  * multiple updates to kwbimage.cfg, thank you Simon
 
 About kwbimage.cfg - first version was taken from sheevaplug with
 change only
 regarding memory. Now it's rewriten so it uses settings like
 manufacturer.
 
  MAINTAINERS |5 +
  board/raidsonic/ib62x0/Makefile |   43 +
  board/raidsonic/ib62x0/ib62x0.c |   79 
  board/raidsonic/ib62x0/ib62x0.h |   40 
  board/raidsonic/ib62x0/kwbimage.cfg |  172
 +++
  boards.cfg  |2 +
  include/configs/ib62x0.h|  172
 +++
  7 files changed, 513 insertions(+)
 

Hi Luka

This patch looks okay to me.

Just one concern, how you are taking care of machine-id?
Just curious to know:
Have you already registered for machine-ID for this board?
Is Linux kernel support for this board is done, is it being mainlined?

Regards..
Prafulla . . .
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[U-Boot] [PATCH] calimain, enbw_cmc: Fix typo in comments

2012-03-26 Thread Christian Riesch
Signed-off-by: Christian Riesch christian.rie...@omicron.at
Cc: Heiko Schocher h...@denx.de
Cc: Tom Rini tr...@ti.com
---
 board/enbw/enbw_cmc/enbw_cmc.c|2 +-
 board/omicron/calimain/calimain.c |2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/board/enbw/enbw_cmc/enbw_cmc.c b/board/enbw/enbw_cmc/enbw_cmc.c
index 16d1b08..6c0d931 100644
--- a/board/enbw/enbw_cmc/enbw_cmc.c
+++ b/board/enbw/enbw_cmc/enbw_cmc.c
@@ -525,7 +525,7 @@ void bootcount_store(ulong a)
 
/*
 * write RTC kick register to enable write
-* for RTC Scratch registers. Cratch0 and 1 are
+* for RTC Scratch registers. Scratch0 and 1 are
 * used for bootcount values.
 */
writel(RTC_KICK0R_WE, reg-kick0r);
diff --git a/board/omicron/calimain/calimain.c 
b/board/omicron/calimain/calimain.c
index 97ba74a..54415ce 100644
--- a/board/omicron/calimain/calimain.c
+++ b/board/omicron/calimain/calimain.c
@@ -166,7 +166,7 @@ void bootcount_store(ulong a)
 
/*
 * write RTC kick register to enable write
-* for RTC Scratch registers. Cratch0 and 1 are
+* for RTC Scratch registers. Scratch0 and 1 are
 * used for bootcount values.
 */
writel(RTC_KICK0R_WE, reg-kick0r);
-- 
1.7.0.4

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Re: [U-Boot] [PATCH V4] net: fec_mxc: allow use with cache enabled

2012-03-26 Thread Stefano Babic
On 26/03/2012 00:11, Eric Nelson wrote:
 Hi Marek,
 

Hi Eric,

 Have you had a chance to review this V4 patch for the fec_mxc driver?
 
 http://lists.denx.de/pipermail/u-boot/2012-March/120205.html

Marek has sent all cache relevant patches together in the same patchset.
If I am not wrong, your V4 was sent as :

http://patchwork.ozlabs.org/patch/147143/

and he added his own Ack.

 Note that Stefano pointed out yesterday that PPC doesn't properly
 implement invalidate_dcache_range.
 
 http://lists.denx.de/pipermail/u-boot/2012-March/120918.html
 
 I believe you mentioned previously that the fec_mxc driver was
 compatible with certain PPC SOCs, so this might temporarily block
 any such transition.

For FEC it is easier as for ESDHC. The controller on PowerPC has the
same name, but it is different - and there is  a different driver. The
fec_mxc.c is only for i.MX SOCs, and we are sure we do not break other
architectures, except i.MX. I know it breaks MX3x, I will check it.

The whole serie depends on the first patch:
http://patchwork.ozlabs.org/patch/147135/

This must be acked / merged by Albert, because it is for all arm926 SOCs.

Best regards,
Stefano Babic

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Re: [U-Boot] [PATCH 2/2] cmd_fat: add FAT write command

2012-03-26 Thread Kyungmin Park
Acked-by: Kyungmin Park kyungmin.p...@samsung.com

Maybe some debug codes are included.

On 3/26/12, Anatolij Gustschin ag...@denx.de wrote:
 On Mon, 26 Mar 2012 09:34:07 +0900
 Kyungmin Park kyungmin.p...@samsung.com wrote:
 ...
  Hmm, emails to dg77@samsung.com address are now rejected:
  Recipient address rejected: User unknown (in reply to RCPT TO command)
 Hi,

 Hi,

 FYI: Now Mr. Kim is left the company. So if any issue and codes from
 Mr. Kim, then let me follow up.

 Thanks for the info. When compiling the FAT write code with newer
 GCC 4.6.1 I've seen some warnings and fixed them by this patch [1].
 Could you please look at this patch and if it is okay, then send
 your Acked-by?

 Thank you,
 Kyungmin Park

 Thanks,
 Anatolij

 [1] http://patchwork.ozlabs.org/patch/148551/
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Re: [U-Boot] [PATCH 2/2] i.MX6: mx6q_sabrelite: add SATA bindings

2012-03-26 Thread Stefano Babic
On 26/03/2012 01:00, Eric Nelson wrote:
 V2 has been stripped of the board-independent changes and
 uses clrsetbits_le32() instead of twiddling bits by hand.
 
 Signed-off-by: Eric Nelson eric.nel...@boundarydevices.com
 ---

Hi Eric,

  board/freescale/mx6qsabrelite/mx6qsabrelite.c |   32 
 +
  include/configs/mx6qsabrelite.h   |   13 ++
  2 files changed, 45 insertions(+), 0 deletions(-)
 
 diff --git a/board/freescale/mx6qsabrelite/mx6qsabrelite.c 
 b/board/freescale/mx6qsabrelite/mx6qsabrelite.c
 index 1d09a72..afb1245 100644
 --- a/board/freescale/mx6qsabrelite/mx6qsabrelite.c
 +++ b/board/freescale/mx6qsabrelite/mx6qsabrelite.c
 @@ -25,6 +25,8 @@
  #include asm/arch/imx-regs.h
  #include asm/arch/mx6x_pins.h
  #include asm/arch/iomux-v3.h
 +#include asm/arch/ccm_regs.h
 +#include asm/arch/clock.h
  #include asm/errno.h
  #include asm/gpio.h
  #include mmc.h
 @@ -267,6 +269,32 @@ int board_eth_init(bd_t *bis)
   return 0;
  }
  
 +#ifdef CONFIG_CMD_SATA
 +
 +int setup_sata(void)
 +{
 + int rval = enable_sata_clock();

What about to return at this point if there is an error ?

Best regards,
Stefano Babic

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[U-Boot] [PATCH 1/4][v3] doc:Add documentation for e500 external debugger support

2012-03-26 Thread Prabhakar Kushwaha
This describes requirement of e500 and e500v2 processor to support external
debugger.

It also provide an insight of the configuration switch required and their
description.

Signed-off-by: Radu Lazarescu radu.lazare...@freescale.com
Signed-off-by: Marius Grigoras marius.grigo...@freescale.com
Signed-off-by: Prabhakar Kushwaha prabha...@freescale.com
---
  Based upon git://git.denx.de/u-boot.git branch master

 Changes for v2: 
- Recreated README.mpc85xx
- Added #define in README

 Changes for v3: Incorporated Scott's comments
- Moved config switch to 85xx CPU options
- Added TLB entry information

 Tested on
  - SoC having E500 Family processor (P1010RDB, BSC9131RDB)
  - SoC having E500MC Family processor (P4080DS, P3041DS)

 README |9 +++
 doc/README.mpc85xx |  161 
 2 files changed, 170 insertions(+), 0 deletions(-)
 create mode 100644 doc/README.mpc85xx

diff --git a/README b/README
index 1f8bd20..37d814b 100644
--- a/README
+++ b/README
@@ -374,6 +374,15 @@ The following options need to be configured:
Defines the string to utilize when trying to match PCIe device
tree nodes for the given platform.
 
+   CONFIG_SYS_PPC_E500_DEBUG_TLB
+
+   Enables a temporary TLB entry to be used during boot to work
+   around limitations in e500v1 and e500v2 external debugger
+   support. This reduces the portions of the boot code where
+   breakpoints and single stepping do not work.  The value of this
+   symbol should be set to the TLB1 entry to be used for this
+   purpose.
+
 - Intel Monahans options:
CONFIG_SYS_MONAHANS_RUN_MODE_OSC_RATIO
 
diff --git a/doc/README.mpc85xx b/doc/README.mpc85xx
new file mode 100644
index 000..3942477
--- /dev/null
+++ b/doc/README.mpc85xx
@@ -0,0 +1,161 @@
+External Debug Support
+--
+
+Freescale's e500v1 and e500v2 cores (used in mpc85xx chips) have some
+restrictions on external debugging (JTAG).  In particular, for the debugger to
+be able to receive control after a single step or breakpoint:
+   - MSR[DE] must be set
+   - A valid opcode must be fetchable, through the MMU, from the debug
+ exception vector (IVPR + IVOR15).
+
+To maximize the time during which this requirement is met, U-Boot sets MSR[DE]
+immediately on entry and keeps it set. It also uses a temporary TLB to keep a
+mapping to a valid opcode at the debug exception vector, even if we normally
+don't support exception vectors being used that early, and that's not the area
+where U-Boot currently executes from.
+
+Note that there may still be some small windows where debugging will not work,
+such as in between updating IVPR and IVOR15.
+
+Config Switches:
+
+
+Please refer README section MPC85xx External Debug Support
+
+Major Config Switches during various boot Modes
+--
+
+NOR boot
+!defined(CONFIG_SYS_RAMBOOT)
+NOR boot Secure
+!defined(CONFIG_SYS_RAMBOOT)  defined(CONFIG_SECURE_BOOT)
+RAMBOOT(SD, SPI  NAND boot)
+ defined(CONFIG_SYS_RAMBOOT)
+RAMBOOT Secure (SD, SPI  NAND)
+ defined(CONFIG_SYS_RAMBOOT)  defined(CONFIG_SECURE_BOOT)
+NAND SPL BOOT
+ defined(CONFIG_SYS_RAMBOOT)  defined(CONFIG_NAND_SPL)
+
+
+TLB Entries during u-boot execution
+---
+
+Note: Sequence number is in order of execution
+
+A) defined(CONFIG_SYS_RAMBOOT) i.e. SD, SPI, NAND RAMBOOT  NAND_SPL boot
+
+   1) TLB entry to overcome e500 v1/v2 debug restriction
+   Location   : Label _start_e500
+   TLB Entry  : CONFIG_SYS_PPC_E500_DEBUG_TLB
+   EPN --RPN : CONFIG_SYS_MONITOR_BASE -- CONFIG_SYS_MONITOR_BASE
+   Properties : 256K, AS0, I, IPROT
+
+   2) TLB entry for working in AS1
+   Location   : Label create_init_ram_area
+   TLB Entry  : 15
+   EPN --RPN : CONFIG_SYS_MONITOR_BASE -- CONFIG_SYS_MONITOR_BASE
+   Properties : 1M, AS1, I, G,IPROT
+
+   3) TLB entry for the stack during AS1
+   Location   : Lable create_init_ram_area
+   TLB Entry  : 14
+   EPN --RPN : CONFIG_SYS_INIT_RAM_ADDR -- CONFIG_SYS_INIT_RAM_ADDR
+   Properties : 16K, AS1, IPROT
+
+   4) TLB entry for CCSRBAR during AS1 execution
+   Location   : cpu_init_early_f
+   TLB Entry  : 13
+   EPN --RPN : CONFIG_SYS_CCSRBAR -- CONFIG_SYS_CCSRBAR
+   Properties : 1M, AS1, I, G
+
+   5) Invalidate unproctected TLB Entries
+   Location   : cpu_init_early_f
+   Invalidated: 13
+
+   6) Create TLB entries as per boards/freescale/board/tlb.c
+   Location   : cpu_init_early_f -- init_tlbs()
+   Properties : ..., AS0, ...
+  Please note It can overwrites previous TLB Entries.
+
+   7) Disable TLB Entries of AS1
+   Location   : cpu_init_f -- disable_tlb()
+  

[U-Boot] [PATCH 2/4][v2] powerpc/85xx:Fix MSR[DE] bit in MSR to support debugger

2012-03-26 Thread Prabhakar Kushwaha
Debugging of e500 and e500v1 processer requires MSR[DE] bit to be set always.
Where MSR = Machine State register

Make sure of MSR[DE] bit is set uniformaly across the different execution
address space i.e. AS0 and AS1.

Signed-off-by: Radu Lazarescu radu.lazare...@freescale.com
Signed-off-by: Catalin Udma catalin.u...@freescale.com
Signed-off-by: Marius Grigoras marius.grigo...@freescale.com
Signed-off-by: Prabhakar Kushwaha prabha...@freescale.com
---
  Based upon git://git.denx.de/u-boot.git branch master

 Changes for v2: 
- Avoid MSR_DE negation in arch_preboot
- Made MSR_DE set code independent of any #define

No change, Resending again

 Tested on
  - SoC having E500 Family processor (P1010RDB, BSC9131RDB)
  - SoC having E500MC Family processor (P4080DS, P3041DS)

 arch/powerpc/cpu/mpc85xx/cpu_init.c |2 +-
 arch/powerpc/cpu/mpc85xx/start.S|7 +--
 2 files changed, 6 insertions(+), 3 deletions(-)

diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c 
b/arch/powerpc/cpu/mpc85xx/cpu_init.c
index 2e4a06c..3bcbffa 100644
--- a/arch/powerpc/cpu/mpc85xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c
@@ -532,7 +532,7 @@ void arch_preboot_os(void)
 * disabled by the time we get called.
 */
msr = mfmsr();
-   msr = ~(MSR_ME|MSR_CE|MSR_DE);
+   msr = ~(MSR_ME|MSR_CE);
mtmsr(msr);
 
setup_ivors();
diff --git a/arch/powerpc/cpu/mpc85xx/start.S b/arch/powerpc/cpu/mpc85xx/start.S
index 7bfa2d5..597151b 100644
--- a/arch/powerpc/cpu/mpc85xx/start.S
+++ b/arch/powerpc/cpu/mpc85xx/start.S
@@ -82,6 +82,9 @@
.globl _start_e500
 
 _start_e500:
+/* Enable debug exception */
+   li  r1,MSR_DE
+   mtmsr   r1
 
 #if defined(CONFIG_SECURE_BOOT)  defined(CONFIG_E500MC)
/* ISBC uses L2 as stack.
@@ -729,8 +732,8 @@ create_init_ram_area:
msync
tlbwe
 
-   lis r6,MSR_IS|MSR_DS@h
-   ori r6,r6,MSR_IS|MSR_DS@l
+   lis r6,MSR_IS|MSR_DS|MSR_DE@h
+   ori r6,r6,MSR_IS|MSR_DS|MSR_DE@l
lis r7,switch_as@h
ori r7,r7,switch_as@l
 
-- 
1.7.5.4



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[U-Boot] [PATCH 4/4][v2] powerpc/85xx:Fix NAND code base to support debugger

2012-03-26 Thread Prabhakar Kushwaha
Update NAND code base to ovecome e500 and e500v2's second limitation i.e. IVPR
+ IVOR15 should be valid fetchable OP code address.

As NAND SPL does not compile vector table so making sure IVOR + IVOR15 points to
any fetchable valid data

Signed-off-by: Radu Lazarescu radu.lazare...@freescale.com
Signed-off-by: Marius Grigoras marius.grigo...@freescale.com
Signed-off-by: Prabhakar Kushwaha prabha...@freescale.com
---
  Based upon git://git.denx.de/u-boot.git branch master

  Changes for v2: 
- Removed unnecessary CONFIG_E500
- Avoid TLB creation for NAND_SPL

 Tested on
  - SoC having E500 Family processor (P1010RDB, BSC9131RDB)
  - SoC having E500MC Family processor (P4080DS, P3041DS)

 arch/powerpc/cpu/mpc85xx/start.S |   20 ++--
 1 files changed, 14 insertions(+), 6 deletions(-)

diff --git a/arch/powerpc/cpu/mpc85xx/start.S b/arch/powerpc/cpu/mpc85xx/start.S
index 1cfd08a..92d65af 100644
--- a/arch/powerpc/cpu/mpc85xx/start.S
+++ b/arch/powerpc/cpu/mpc85xx/start.S
@@ -182,7 +182,7 @@ l2_disabled:
andi.   r1,r3,L1CSR0_DCE@l
beq 2b
 
-#if defined(CONFIG_SYS_PPC_E500_DEBUG_TLB)
+#if defined(CONFIG_SYS_PPC_E500_DEBUG_TLB)  !defined(CONFIG_NAND_SPL)
 /*
  * TLB entry for debuggging in AS1
  * Create temporary TLB entry in AS0 to handle debug exception
@@ -1437,17 +1437,25 @@ relocate_code:
 7: sync/* Wait for all icbi to complete on bus */
isync
 
-   /*
-* Re-point the IVPR at RAM
-*/
-   mtspr   IVPR,r10
-
 /*
  * We are done. Do not return, instead branch to second part of board
  * initialization, now running from RAM.
  */
 
addir0,r10,in_ram - _start + _START_OFFSET
+
+#if defined(CONFIG_NAND_SPL)
+/*
+ * As IVPR is going to point RAM address,
+ * Make sure IVOR15 has valid opcode to support debugger
+ */
+   mtspr   IVOR15,r0
+#endif
+   /*
+* Re-point the IVPR at RAM
+*/
+   mtspr   IVPR,r10
+
mtlrr0
blr /* NEVER RETURNS! */
.globl  in_ram
-- 
1.7.5.4



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[U-Boot] [PATCH 3/4][v3] powerpc/85xx:Make debug exception vector accessible

2012-03-26 Thread Prabhakar Kushwaha
Debugging of e500 and e500v1 processer requires debug exception vecter (IVPR +
IVOR15) to have valid and fetchable OP code.

While executing in translated space (AS=1), whenever a debug exception is
generated, the MSR[DS/IS] gets cleared i.e. AS=0 and the processor tries to
fetch an instruction from the debug exception vector (IVPR + IVOR15); since now
we are in AS=0, the application needs to ensure the proper TLB configuration to
have (IVOR + IVOR15) accessible from AS=0 also.

Create a temporary TLB in AS0 to make sure debug exception verctor is
accessible on debug exception.

Signed-off-by: Radu Lazarescu radu.lazare...@freescale.com
Signed-off-by: Marius Grigoras marius.grigo...@freescale.com
Signed-off-by: Prabhakar Kushwaha prabha...@freescale.com
---
  Based upon git://git.denx.de/u-boot.git branch master

 Changes for v2: 
- Put Temporary TLB creation under #define

 Changes for v3: 
- Removed unnecessary CONFIG_E500
- Updated CONFG_SYS_RAMBOOT mas2 properties
- Added secure boot Debug TLB.
- Avoid temp TLB creation for NAND SPL
- removed unnecessary mas7 updation

  Tested on
  - SoC having E500 Family processor (P1010RDB, BSC9131RDB)
  - SoC having E500MC Family processor (P4080DS, P3041DS)

 arch/powerpc/cpu/mpc85xx/cpu_init_early.c |   32 +-
 arch/powerpc/cpu/mpc85xx/start.S  |   66 +
 arch/powerpc/include/asm/config_mpc85xx.h |3 +-
 3 files changed, 99 insertions(+), 2 deletions(-)

diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init_early.c 
b/arch/powerpc/cpu/mpc85xx/cpu_init_early.c
index 091af7c..dacfdd1 100644
--- a/arch/powerpc/cpu/mpc85xx/cpu_init_early.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu_init_early.c
@@ -1,5 +1,5 @@
 /*
- * Copyright 2009-2011 Freescale Semiconductor, Inc
+ * Copyright 2009-2012 Freescale Semiconductor, Inc
  *
  * This program is free software; you can redistribute it and/or
  * modify it under the terms of the GNU General Public License as
@@ -53,6 +53,36 @@ void setup_ifc(void)
 
asm volatile(isync;msync;tlbwe;isync);
 
+#if defined(CONFIG_SYS_PPC_E500_DEBUG_TLB)
+/*
+ * TLB entry for debuggging in AS1
+ * Create temporary TLB entry in AS0 to handle debug exception
+ * As on debug exception MSR is cleared i.e. Address space is changed
+ * to 0. A TLB entry (in AS0) is required to handle debug exception generated
+ * in AS1.
+ *
+ * TLB entry is created for IVPR + IVOR15 to map on valid OP code address
+ * bacause flash's physical address is going to change as
+ * CONFIG_SYS_FLASH_BASE_PHYS.
+ */
+   _mas0 = MAS0_TLBSEL(1) |
+   MAS0_ESEL(CONFIG_SYS_PPC_E500_DEBUG_TLB);
+   _mas1 = MAS1_VALID | MAS1_TID(0) | MAS1_IPROT |
+   MAS1_TSIZE(BOOKE_PAGESZ_4M);
+   _mas2 = FSL_BOOKE_MAS2(CONFIG_SYS_TEXT_BASE, MAS2_I|MAS2_G);
+   _mas3 = FSL_BOOKE_MAS3(flash_phys, 0, MAS3_SW|MAS3_SR|MAS3_SX);
+   _mas7 = FSL_BOOKE_MAS7(flash_phys);
+
+   mtspr(MAS0, _mas0);
+   mtspr(MAS1, _mas1);
+   mtspr(MAS2, _mas2);
+   mtspr(MAS3, _mas3);
+   mtspr(MAS7, _mas7);
+
+   asm volatile(isync;msync;tlbwe;isync);
+#endif
+
+   /* Change flash's physical address */
out_be32((ifc_regs-cspr_cs[0].cspr), CONFIG_SYS_CSPR0);
out_be32((ifc_regs-csor_cs[0].csor), CONFIG_SYS_CSOR0);
out_be32((ifc_regs-amask_cs[0].amask), CONFIG_SYS_AMASK0);
diff --git a/arch/powerpc/cpu/mpc85xx/start.S b/arch/powerpc/cpu/mpc85xx/start.S
index 597151b..1cfd08a 100644
--- a/arch/powerpc/cpu/mpc85xx/start.S
+++ b/arch/powerpc/cpu/mpc85xx/start.S
@@ -182,6 +182,72 @@ l2_disabled:
andi.   r1,r3,L1CSR0_DCE@l
beq 2b
 
+#if defined(CONFIG_SYS_PPC_E500_DEBUG_TLB)
+/*
+ * TLB entry for debuggging in AS1
+ * Create temporary TLB entry in AS0 to handle debug exception
+ * As on debug exception MSR is cleared i.e. Address space is changed
+ * to 0. A TLB entry (in AS0) is required to handle debug exception generated
+ * in AS1.
+ */
+
+   lis r6,FSL_BOOKE_MAS0(1,
+   CONFIG_SYS_PPC_E500_DEBUG_TLB, 0)@h
+   ori r6,r6,FSL_BOOKE_MAS0(1,
+   CONFIG_SYS_PPC_E500_DEBUG_TLB, 0)@l
+
+#if !defined(CONFIG_SYS_RAMBOOT)  !defined(CONFIG_SECURE_BOOT)
+/*
+ * TLB entry is created for IVPR + IVOR15 to map on valid OP code address
+ * bacause flash's virtual address maps to 0xff80 - 0x.
+ * and this window is outside of 4K boot window.
+ */
+   lis r7,FSL_BOOKE_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_4M)@h
+   ori r7,r7,FSL_BOOKE_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_4M)@l
+
+   lis r8,FSL_BOOKE_MAS2(CONFIG_SYS_MONITOR_BASE  0xffc0,
+   (MAS2_I|MAS2_G))@h
+   ori r8,r8,FSL_BOOKE_MAS2(CONFIG_SYS_MONITOR_BASE  0xffc0,
+   (MAS2_I|MAS2_G))@l
+
+   /* The 85xx has the default boot window 0xff80 - 0x */
+   

Re: [U-Boot] [PATCH V4 1/2] ext4fs ls load support

2012-03-26 Thread Wolfgang Denk
Dear UMA SHANKAR,

please do not top post / full quote.

In message 27542660.71361332746650945.JavaMail.weblogic@epml04 you wrote:

 Currently, Our ext4 implementation is capable of listing and reading (ls and 
 load) ext2 partitions as well. 
 But, we wanted the ext4 code to be separate from ext2 implementation. 

This does not make much sense to me.

 So, I propose, we can let both these implementations be there in
 uboot under different CONFIG Options (as is the case currently).

What would be the rationale here?

I think more and more people are going to use ext4.  It makes no sense
to have different commands and different options to support both ext2
(and ext3, to some degree) and ext4 (and ext3?) file systems.  And
especially, it makes no sense to dusplicate large amounts of code.

Please use common code whererver possible.

Best regards,

Wolfgang Denk

-- 
DENX Software Engineering GmbH, MD: Wolfgang Denk  Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
I knew then (in 1970) that a 4-kbyte minicomputer would cost as much
as a house. So I reasoned  that  after  college,  I'd  have  to  live
cheaply in an apartment and put all my money into owning a computer.
  - Apple co-founder Steve Wozniak, EE Times, June 6, 1988, pg 45
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Re: [U-Boot] [PATCH 2/2] cmd_fat: add FAT write command

2012-03-26 Thread Maximilian Schwerin
 -Ursprüngliche Nachricht-
 Von: Anatolij Gustschin [mailto:ag...@denx.de] 
 Gesendet: Montag, 26. März 2012 09:13
 An: Kyungmin Park
 Cc: Maximilian Schwerin; u-boot@lists.denx.de
 Betreff: Re: [U-Boot] [PATCH 2/2] cmd_fat: add FAT write command
 
 On Mon, 26 Mar 2012 09:34:07 +0900
 Kyungmin Park kyungmin.p...@samsung.com wrote:
 ...
   Hmm, emails to dg77@samsung.com address are now rejected:
   Recipient address rejected: User unknown (in reply to 
 RCPT TO command)
  Hi,
 
 Hi,
 
  FYI: Now Mr. Kim is left the company. So if any issue and codes from
  Mr. Kim, then let me follow up.
 
 Thanks for the info. When compiling the FAT write code with newer
 GCC 4.6.1 I've seen some warnings and fixed them by this patch [1].
 Could you please look at this patch and if it is okay, then send
 your Acked-by?
 
  Thank you,
  Kyungmin Park
 
 Thanks,
 Anatolij
 
 [1] http://patchwork.ozlabs.org/patch/148551/
 

Acked-by: Maximilian Schwerin m...@tigris.de


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[U-Boot] [PATCH V2] Enable high speed support for USB device framework and usbtty

2012-03-26 Thread Amit Virdi
From: Vipin KUMAR vipin.ku...@st.com

This patch adds the support for high speed in usb device framework and usbtty
driver. This feature has been kept within a macro CONFIG_USBD_HS, so the board
configuration files have to define this macro to enable high speed support.

Along with that specific peripheral drivers also need to define a function to
let the framework know that the enumeration has happened at high speed.
This function prototype is int is_usbd_high_speed(void)

Signed-off-by: Vipin Kumar vipin.ku...@st.com
Signed-off-by: Amit Virdi amit.vi...@st.com
---
 README|8 +++
 drivers/serial/usbtty.c   |   50 -
 drivers/serial/usbtty.h   |4 +++
 drivers/usb/gadget/core.c |1 -
 drivers/usb/gadget/ep0.c  |   23 +---
 include/usbdescriptors.h  |   15 +
 include/usbdevice.h   |   22 ++-
 7 files changed, 116 insertions(+), 7 deletions(-)

diff --git a/README b/README
index b69a3b6..0ab6892 100644
--- a/README
+++ b/README
@@ -1148,6 +1148,14 @@ The following options need to be configured:
Define this to have a tty type of device available to
talk to the UDC device
 
+   CONFIG_USBD_HS
+   Define this to enable the high speed support for usb
+   device and usbtty. If this feature is enabled, a routine
+   int is_usbd_high_speed(void)
+   also needs to be defined by the driver to dynamically 
poll
+   whether the enumeration has succeded at high speed or 
full
+   speed.
+
CONFIG_SYS_CONSOLE_IS_IN_ENV
Define this if you want stdin, stdout /or stderr to
be set to usbtty.
diff --git a/drivers/serial/usbtty.c b/drivers/serial/usbtty.c
index 550bc58..148d1a6 100644
--- a/drivers/serial/usbtty.c
+++ b/drivers/serial/usbtty.c
@@ -133,6 +133,19 @@ static struct usb_device_descriptor device_descriptor = {
 };
 
 
+#if defined(CONFIG_USBD_HS)
+static struct usb_qualifier_descriptor qualifier_descriptor = {
+   .bLength = sizeof(struct usb_qualifier_descriptor),
+   .bDescriptorType =  USB_DT_QUAL,
+   .bcdUSB =   cpu_to_le16(USB_BCD_VERSION),
+   .bDeviceClass = COMMUNICATIONS_DEVICE_CLASS,
+   .bDeviceSubClass =  0x00,
+   .bDeviceProtocol =  0x00,
+   .bMaxPacketSize0 =  EP0_MAX_PACKET_SIZE,
+   .bNumConfigurations =   NUM_CONFIGS
+};
+#endif
+
 /*
  * Static CDC ACM specific descriptors
  */
@@ -638,6 +651,9 @@ static void usbtty_init_instances (void)
memset (device_instance, 0, sizeof (struct usb_device_instance));
device_instance-device_state = STATE_INIT;
device_instance-device_descriptor = device_descriptor;
+#if defined(CONFIG_USBD_HS)
+   device_instance-qualifier_descriptor = qualifier_descriptor;
+#endif
device_instance-event = usbtty_event_handler;
device_instance-cdc_recv_setup = usbtty_cdc_setup;
device_instance-bus = bus_instance;
@@ -751,6 +767,10 @@ static void usbtty_init_terminal_type(short type)
device_descriptor.idProduct =
cpu_to_le16(CONFIG_USBD_PRODUCTID_CDCACM);
 
+#if defined(CONFIG_USBD_HS)
+   qualifier_descriptor.bDeviceClass =
+   COMMUNICATIONS_DEVICE_CLASS;
+#endif
/* Assign endpoint indices */
tx_endpoint = ACM_TX_ENDPOINT;
rx_endpoint = ACM_RX_ENDPOINT;
@@ -779,7 +799,9 @@ static void usbtty_init_terminal_type(short type)
device_descriptor.bDeviceClass = 0xFF;
device_descriptor.idProduct =
cpu_to_le16(CONFIG_USBD_PRODUCTID_GSERIAL);
-
+#if defined(CONFIG_USBD_HS)
+   qualifier_descriptor.bDeviceClass = 0xFF;
+#endif
/* Assign endpoint indices */
tx_endpoint = GSERIAL_TX_ENDPOINT;
rx_endpoint = GSERIAL_RX_ENDPOINT;
@@ -932,6 +954,9 @@ static int usbtty_configured (void)
 static void usbtty_event_handler (struct usb_device_instance *device,
  usb_device_event_t event, int data)
 {
+#if defined(CONFIG_USBD_HS)
+   int i;
+#endif
switch (event) {
case DEVICE_RESET:
case DEVICE_BUS_INACTIVE:
@@ -942,6 +967,29 @@ static void usbtty_event_handler (struct 
usb_device_instance *device,
break;
 
case DEVICE_ADDRESS_ASSIGNED:
+#if defined(CONFIG_USBD_HS)
+   /*
+* is_usbd_high_speed routine needs to be defined by
+* specific gadget driver
+* It returns TRUE if device enumerates at High speed
+* 

[U-Boot] [PATCH V2 0/8] net/designware: Bug fixes

2012-03-26 Thread Amit Virdi
This patchset does bug fixes for Synopsys' designware ethernet controller driver
in SPEAr SoCs.

Changes since V1: 
 - Added comment to explain the ratinale behind restoring hw mac address
 - Undefined TRUE/FALSE and used 1/0 instead while configuring phy

Amit Virdi (1):
  net/designware: Change timeout loop implementation

Armando Visconti (2):
  net/designware: Consecutive writes must have delay
  net/designware: Set ANAR to 0x1e1

Vikas Manocha (1):
  net/designware: Program phy registers when auto-negotiation is ON

Vipin KUMAR (3):
  net/designware: Fix to restore hw mac address
  net/designware: Fix the max frame length size
  net/designware: Phy address fix

Vipin Kumar (1):
  net/designware: Try configuring phy on each dw_eth_init

 drivers/net/designware.c |  128 --
 drivers/net/designware.h |3 +-
 2 files changed, 92 insertions(+), 39 deletions(-)

-- 
1.7.2.2

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[U-Boot] [PATCH V2 1/8] net/designware: Fix to restore hw mac address

2012-03-26 Thread Amit Virdi
From: Vipin KUMAR vipin.ku...@st.com

The network controller mac resets hardware address stored in MAC_HI and MAC_LO
registers if mac is resetted. So, hw mac address needs to be restored in case
mac is explicitly resetted from driver.

Signed-off-by: Vipin Kumar vipin.ku...@st.com
Signed-off-by: Amit Virdi amit.vi...@st.com
---
 drivers/net/designware.c |7 ++-
 1 files changed, 6 insertions(+), 1 deletions(-)

diff --git a/drivers/net/designware.c b/drivers/net/designware.c
index 1e34436..ea8a406 100644
--- a/drivers/net/designware.c
+++ b/drivers/net/designware.c
@@ -148,6 +148,9 @@ static int dw_eth_init(struct eth_device *dev, bd_t *bis)
if (mac_reset(dev)  0)
return -1;
 
+   /* Resore the HW MAC address as it has been lost during MAC reset */
+   dw_write_hwaddr(dev);
+
writel(FIXEDBURST | PRIORXTX_41 | BURST_16,
dma_p-busmode);
 
@@ -300,8 +303,10 @@ static int eth_mdio_write(struct eth_device *dev, u8 addr, 
u8 reg, u16 val)
writel(miiaddr | MII_CLKRANGE_150_250M | MII_BUSY, mac_p-miiaddr);
 
do {
-   if (!(readl(mac_p-miiaddr)  MII_BUSY))
+   if (!(readl(mac_p-miiaddr)  MII_BUSY)) {
ret = 0;
+   break;
+   }
udelay(1000);
} while (timeout--);
 
-- 
1.7.2.2

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[U-Boot] [PATCH V2 2/8] net/designware: Fix the max frame length size

2012-03-26 Thread Amit Virdi
From: Vipin KUMAR vipin.ku...@st.com

The max frame length for normal descriptor can be 0x7FF i.e 2047. It was wrongly
specified as 2048. Currently, the max descriptor length is around 1500, so
redefining the mask to 1600

Signed-off-by: Vipin Kumar vipin.ku...@st.com
Signed-off-by: Amit Virdi amit.vi...@st.com
---
 drivers/net/designware.h |2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/drivers/net/designware.h b/drivers/net/designware.h
index e5828a6..42133b3 100644
--- a/drivers/net/designware.h
+++ b/drivers/net/designware.h
@@ -121,7 +121,7 @@ struct eth_dma_regs {
 #define RXSTART(1  1)
 
 /* Descriptior related definitions */
-#define MAC_MAX_FRAME_SZ   (2048)
+#define MAC_MAX_FRAME_SZ   (1600)
 
 struct dmamacdescr {
u32 txrx_status;
-- 
1.7.2.2

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[U-Boot] [PATCH V2 4/8] net/designware: Consecutive writes must have delay

2012-03-26 Thread Amit Virdi
From: Armando Visconti armando.visco...@st.com

This patch solves a TX/RX problem which happens at 10Mbps, due to the
fact that we are not respecting 4 cyles of the phy_clk (2.5MHz) between
two consecutive writes on the same register.

Signed-off-by: Armando Visconti armando.visco...@st.com
Signed-off-by: Amit Virdi amit.vi...@st.com
---
 drivers/net/designware.c |3 +--
 1 files changed, 1 insertions(+), 2 deletions(-)

diff --git a/drivers/net/designware.c b/drivers/net/designware.c
index fc14b70..933032c 100644
--- a/drivers/net/designware.c
+++ b/drivers/net/designware.c
@@ -175,8 +175,7 @@ static int dw_eth_init(struct eth_device *dev, bd_t *bis)
writel(readl(dma_p-opmode) | RXSTART, dma_p-opmode);
writel(readl(dma_p-opmode) | TXSTART, dma_p-opmode);
 
-   writel(readl(mac_p-conf) | RXENABLE, mac_p-conf);
-   writel(readl(mac_p-conf) | TXENABLE, mac_p-conf);
+   writel(readl(mac_p-conf) | RXENABLE | TXENABLE, mac_p-conf);
 
return 0;
 }
-- 
1.7.2.2

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[U-Boot] [PATCH V2 3/8] net/designware: Phy address fix

2012-03-26 Thread Amit Virdi
From: Vipin KUMAR vipin.ku...@st.com

The code assumes the phy address to be  0, which is not true, the phy address
can be in the range 0-31.

Signed-off-by: Vipin Kumar vipin.ku...@st.com
Signed-off-by: Amit Virdi amit.vi...@st.com
---
 drivers/net/designware.c |2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/drivers/net/designware.c b/drivers/net/designware.c
index ea8a406..fc14b70 100644
--- a/drivers/net/designware.c
+++ b/drivers/net/designware.c
@@ -384,7 +384,7 @@ static int configure_phy(struct eth_device *dev)
 
 #if defined(CONFIG_DW_SEARCH_PHY)
phy_addr = find_phy(dev);
-   if (phy_addr  0)
+   if (phy_addr = 0)
priv-address = phy_addr;
else
return -1;
-- 
1.7.2.2

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[U-Boot] [PATCH V2 5/8] net/designware: Try configuring phy on each dw_eth_init

2012-03-26 Thread Amit Virdi
From: Vipin Kumar vipin.ku...@st.com

Phy autonegotiation works only when the ethernet cable is plugged in.
Since the phy was configured only at the init time, a plugged in cable
was necessary to initialize the phy properly.

This patch keeps a flag to check if the phy initialization has
succeeded, and calls configure_phy routine at every init if this flag
reports otherwise.

Signed-off-by: Vipin Kumar vipin.ku...@st.com
Signed-off-by: Amit Virdi amit.vi...@st.com
---
 drivers/net/designware.c |   50 ++---
 drivers/net/designware.h |1 +
 2 files changed, 30 insertions(+), 21 deletions(-)

diff --git a/drivers/net/designware.c b/drivers/net/designware.c
index 933032c..ebb1fff 100644
--- a/drivers/net/designware.c
+++ b/drivers/net/designware.c
@@ -32,6 +32,8 @@
 #include asm/io.h
 #include designware.h
 
+static int configure_phy(struct eth_device *dev);
+
 static void tx_descs_init(struct eth_device *dev)
 {
struct dw_eth_dev *priv = dev-priv;
@@ -144,6 +146,9 @@ static int dw_eth_init(struct eth_device *dev, bd_t *bis)
struct eth_dma_regs *dma_p = priv-dma_regs_p;
u32 conf;
 
+   if (priv-phy_configured != 1)
+   configure_phy(dev);
+
/* Reset ethernet hardware */
if (mac_reset(dev)  0)
return -1;
@@ -422,23 +427,26 @@ static int configure_phy(struct eth_device *dev)
eth_mdio_read(dev, phy_addr, MII_LPA, anlpar);
eth_mdio_read(dev, phy_addr, MII_STAT1000, btsr);
 
-   if (btsr  (PHY_1000BTSR_1000FD | PHY_1000BTSR_1000HD)) {
-   priv-speed = SPEED_1000M;
-   if (btsr  PHY_1000BTSR_1000FD)
-   priv-duplex = FULL_DUPLEX;
-   else
-   priv-duplex = HALF_DUPLEX;
-   } else {
-   if (anlpar  LPA_100)
-   priv-speed = SPEED_100M;
-   else
-   priv-speed = SPEED_10M;
-
-   if (anlpar  (LPA_10FULL | LPA_100FULL))
-   priv-duplex = FULL_DUPLEX;
-   else
-   priv-duplex = HALF_DUPLEX;
-   }
+   if (bmsr  BMSR_ANEGCOMPLETE) {
+   if (btsr  (PHY_1000BTSR_1000FD | PHY_1000BTSR_1000HD)) {
+   priv-speed = SPEED_1000M;
+   if (btsr  PHY_1000BTSR_1000FD)
+   priv-duplex = FULL_DUPLEX;
+   else
+   priv-duplex = HALF_DUPLEX;
+   } else {
+   if (anlpar  LPA_100)
+   priv-speed = SPEED_100M;
+   else
+   priv-speed = SPEED_10M;
+
+   if (anlpar  (LPA_10FULL | LPA_100FULL))
+   priv-duplex = FULL_DUPLEX;
+   else
+   priv-duplex = HALF_DUPLEX;
+   }
+   } else
+   return -1;
 #else
if (eth_mdio_read(dev, phy_addr, MII_BMCR, ctrl)  0)
return -1;
@@ -455,6 +463,8 @@ static int configure_phy(struct eth_device *dev)
else
priv-speed = SPEED_10M;
 #endif
+   priv-phy_configured = 1;
+
return 0;
 }
 
@@ -515,14 +525,12 @@ int designware_initialize(u32 id, ulong base_addr, u32 
phy_addr)
priv-dma_regs_p = (struct eth_dma_regs *)(base_addr +
DW_DMA_BASE_OFFSET);
priv-address = phy_addr;
+   priv-phy_configured = 0;
 
if (mac_reset(dev)  0)
return -1;
 
-   if (configure_phy(dev)  0) {
-   printf(Phy could not be configured\n);
-   return -1;
-   }
+   configure_phy(dev);
 
dev-init = dw_eth_init;
dev-send = dw_eth_send;
diff --git a/drivers/net/designware.h b/drivers/net/designware.h
index 42133b3..abf729d 100644
--- a/drivers/net/designware.h
+++ b/drivers/net/designware.h
@@ -238,6 +238,7 @@ struct dw_eth_dev {
u32 duplex;
u32 tx_currdescnum;
u32 rx_currdescnum;
+   u32 phy_configured;
u32 padding;
 
struct dmamacdescr tx_mac_descrtable[CONFIG_TX_DESCR_NUM];
-- 
1.7.2.2

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[U-Boot] [PATCH V2 7/8] net/designware: Set ANAR to 0x1e1

2012-03-26 Thread Amit Virdi
From: Armando Visconti armando.visco...@st.com

This patch forces the advertised capabilities during auto
negotiation to always be 10/100 Mbps and half/full as duplexing.

Signed-off-by: Armando Visconti armando.visco...@st.com
Signed-off-by: Amit Virdi amit.vi...@st.com
---
 drivers/net/designware.c |3 +++
 1 files changed, 3 insertions(+), 0 deletions(-)

diff --git a/drivers/net/designware.c b/drivers/net/designware.c
index 56f0c7a..987469a 100644
--- a/drivers/net/designware.c
+++ b/drivers/net/designware.c
@@ -399,6 +399,9 @@ static int configure_phy(struct eth_device *dev)
return -1;
 
 #if defined(CONFIG_DW_AUTONEG)
+   /* Set Auto-Neg Advertisement capabilities to 10/100 half/full */
+   eth_mdio_write(dev, phy_addr, MII_ADVERTISE, 0x1E1);
+
bmcr = BMCR_ANENABLE | BMCR_ANRESTART;
 #else
bmcr = BMCR_SPEED100 | BMCR_FULLDPLX;
-- 
1.7.2.2

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[U-Boot] [PATCH V2 6/8] net/designware: Program phy registers when auto-negotiation is ON

2012-03-26 Thread Amit Virdi
From: Vikas Manocha vikas.mano...@st.com

If AN(auto-negotiation) is ON, speed bit of control register are not
applicable.  Also phy registers were not getting programmed as per the
result of AN. This patch sets only AN bit  restart AN bit for AN ON
selection  programs PHY registers as per AN result.

Signed-off-by: Vikas Manocha vikas.mano...@st.com
Signed-off-by: Amit Virdi amit.vi...@st.com
---
 drivers/net/designware.c |   43 +--
 1 files changed, 29 insertions(+), 14 deletions(-)

diff --git a/drivers/net/designware.c b/drivers/net/designware.c
index ebb1fff..56f0c7a 100644
--- a/drivers/net/designware.c
+++ b/drivers/net/designware.c
@@ -399,8 +399,7 @@ static int configure_phy(struct eth_device *dev)
return -1;
 
 #if defined(CONFIG_DW_AUTONEG)
-   bmcr = BMCR_ANENABLE | BMCR_ANRESTART | BMCR_SPEED100 | \
-  BMCR_FULLDPLX | BMCR_SPEED1000;
+   bmcr = BMCR_ANENABLE | BMCR_ANRESTART;
 #else
bmcr = BMCR_SPEED100 | BMCR_FULLDPLX;
 
@@ -428,23 +427,39 @@ static int configure_phy(struct eth_device *dev)
eth_mdio_read(dev, phy_addr, MII_STAT1000, btsr);
 
if (bmsr  BMSR_ANEGCOMPLETE) {
-   if (btsr  (PHY_1000BTSR_1000FD | PHY_1000BTSR_1000HD)) {
+   if (btsr  PHY_1000BTSR_1000FD) {
priv-speed = SPEED_1000M;
-   if (btsr  PHY_1000BTSR_1000FD)
-   priv-duplex = FULL_DUPLEX;
-   else
-   priv-duplex = HALF_DUPLEX;
+   bmcr |= BMCR_SPEED1000;
+   priv-duplex = FULL_DUPLEX;
+   bmcr |= BMCR_FULLDPLX;
+   } else if (btsr  PHY_1000BTSR_1000HD) {
+   priv-speed = SPEED_1000M;
+   bmcr |= BMCR_SPEED1000;
+   priv-duplex = HALF_DUPLEX;
+   bmcr = ~BMCR_FULLDPLX;
+   } else if (anlpar  LPA_100FULL) {
+   priv-speed = SPEED_100M;
+   bmcr |= BMCR_SPEED100;
+   priv-duplex = FULL_DUPLEX;
+   bmcr |= BMCR_FULLDPLX;
+   } else if (anlpar  LPA_100HALF) {
+   priv-speed = SPEED_100M;
+   bmcr |= BMCR_SPEED100;
+   priv-duplex = HALF_DUPLEX;
+   bmcr = ~BMCR_FULLDPLX;
+   } else if (anlpar  LPA_10FULL) {
+   priv-speed = SPEED_10M;
+   bmcr = ~BMCR_SPEED100;
+   priv-duplex = FULL_DUPLEX;
+   bmcr |= BMCR_FULLDPLX;
} else {
-   if (anlpar  LPA_100)
-   priv-speed = SPEED_100M;
-   else
priv-speed = SPEED_10M;
-
-   if (anlpar  (LPA_10FULL | LPA_100FULL))
-   priv-duplex = FULL_DUPLEX;
-   else
+   bmcr = ~BMCR_SPEED100;
priv-duplex = HALF_DUPLEX;
+   bmcr = ~BMCR_FULLDPLX;
}
+   if (eth_mdio_write(dev, phy_addr, MII_BMCR, bmcr)  0)
+   return -1;
} else
return -1;
 #else
-- 
1.7.2.2

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Re: [U-Boot] [PATCH v2] lsxl: add support for lschlv2 and lsxhl

2012-03-26 Thread Michael Walle
On Fri, March 2, 2012 17:02, Michael Walle wrote:
 This patchset adds support for both the Linkstation Live (LS-CHLv2) and
 Linkstation Pro (LS-XHL) by Buffalo.

 Signed-off-by: Michael Walle mich...@walle.cc
 Cc: Prafulla Wadaskar prafu...@marvell.com
 Cc: Wolfgang Denk w...@denx.de
 ---

 v2:
  - add to buffalo vendor directory instead of Marvell
  - add both boards to MAINTAINERS
  - don't define values for feature macros
  - use tab for vertical alignment
  - remove static network configuration, instead introduce a rescue mode
  - add some convenience scripts
  - small cleanups

Ping :)

-- 
michael

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Re: [U-Boot] [PATCH v2] mvgbe: remove warning for unused methods

2012-03-26 Thread Prafulla Wadaskar


 -Original Message-
 From: Valentin Longchamp [mailto:valentin.longch...@keymile.com]
 Sent: 26 March 2012 15:32
 To: u-boot@lists.denx.de
 Cc: Stefan Bigler; Valentin Longchamp; Gerlando Falauto; Prafulla
 Wadaskar; Holger Brunck
 Subject: [PATCH v2] mvgbe: remove warning for unused methods
 
 From: Stefan Bigler stefan.big...@keymile.com
 
 Some baords may use the GBE interface but they have no
 phy connected to the interface and a direct MAC/MAC interface.
 For them we need to get rid of compiler warnings.
 
 Signed-off-by: Stefan Bigler stefan.big...@keymile.com
 Signed-off-by: Valentin Longchamp valentin.longch...@keymile.com
 cc: Gerlando Falauto gerlando.fala...@keymile.com
 cc: Prafulla Wadaskar prafu...@marvell.com
 cc: Holger Brunck holger.bru...@keymile.com
 ---
  drivers/net/mvgbe.c |2 ++
  1 files changed, 2 insertions(+), 0 deletions(-)
 
 diff --git a/drivers/net/mvgbe.c b/drivers/net/mvgbe.c
 index 1dcb700..df258b9 100644
 --- a/drivers/net/mvgbe.c
 +++ b/drivers/net/mvgbe.c
 @@ -52,6 +52,7 @@ DECLARE_GLOBAL_DATA_PTR;
  #define MV_PHY_ADR_REQUEST 0xee
  #define MVGBE_SMI_REG (((struct mvgbe_registers *)MVGBE0_BASE)-smi)
 
 +#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
  /*
   * smi_reg_read - miiphy_read callback function.
   *
 @@ -181,6 +182,7 @@ static int smi_reg_write(const char *devname, u8
 phy_adr, u8 reg_ofs, u16 data)
 
   return 0;
  }
 +#endif
 
  /* Stop and checks all queues */
  static void stop_queue(u32 * qreg)
 --
 1.7.1

Acked-by: Prafulla Wadaskar prafu...@marvell.com

Regards..
Prafulla . . .

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[U-Boot] [PATCH V2 8/8] net/designware: Change timeout loop implementation

2012-03-26 Thread Amit Virdi
The new implementation changes the timeout loop implementation to avoid 1 ms
delay in each failing test. It also configures the delay to 10usec.

Signed-off-by: Amit Virdi amit.vi...@st.com
---
 drivers/net/designware.c |   54 -
 1 files changed, 38 insertions(+), 16 deletions(-)

diff --git a/drivers/net/designware.c b/drivers/net/designware.c
index 987469a..e8e669b 100644
--- a/drivers/net/designware.c
+++ b/drivers/net/designware.c
@@ -108,16 +108,20 @@ static int mac_reset(struct eth_device *dev)
struct eth_mac_regs *mac_p = priv-mac_regs_p;
struct eth_dma_regs *dma_p = priv-dma_regs_p;
 
+   ulong start;
int timeout = CONFIG_MACRESET_TIMEOUT;
 
writel(DMAMAC_SRST, dma_p-busmode);
writel(MII_PORTSELECT, mac_p-conf);
 
-   do {
+   start = get_timer(0);
+   while (get_timer(start)  timeout) {
if (!(readl(dma_p-busmode)  DMAMAC_SRST))
return 0;
-   udelay(1000);
-   } while (timeout--);
+
+   /* Try again after 10usec */
+   udelay(10);
+   };
 
return -1;
 }
@@ -273,6 +277,7 @@ static int eth_mdio_read(struct eth_device *dev, u8 addr, 
u8 reg, u16 *val)
 {
struct dw_eth_dev *priv = dev-priv;
struct eth_mac_regs *mac_p = priv-mac_regs_p;
+   ulong start;
u32 miiaddr;
int timeout = CONFIG_MDIO_TIMEOUT;
 
@@ -281,13 +286,16 @@ static int eth_mdio_read(struct eth_device *dev, u8 addr, 
u8 reg, u16 *val)
 
writel(miiaddr | MII_CLKRANGE_150_250M | MII_BUSY, mac_p-miiaddr);
 
-   do {
+   start = get_timer(0);
+   while (get_timer(start)  timeout) {
if (!(readl(mac_p-miiaddr)  MII_BUSY)) {
*val = readl(mac_p-miidata);
return 0;
}
-   udelay(1000);
-   } while (timeout--);
+
+   /* Try again after 10usec */
+   udelay(10);
+   };
 
return -1;
 }
@@ -296,6 +304,7 @@ static int eth_mdio_write(struct eth_device *dev, u8 addr, 
u8 reg, u16 val)
 {
struct dw_eth_dev *priv = dev-priv;
struct eth_mac_regs *mac_p = priv-mac_regs_p;
+   ulong start;
u32 miiaddr;
int ret = -1, timeout = CONFIG_MDIO_TIMEOUT;
u16 value;
@@ -306,13 +315,16 @@ static int eth_mdio_write(struct eth_device *dev, u8 
addr, u8 reg, u16 val)
 
writel(miiaddr | MII_CLKRANGE_150_250M | MII_BUSY, mac_p-miiaddr);
 
-   do {
+   start = get_timer(0);
+   while (get_timer(start)  timeout) {
if (!(readl(mac_p-miiaddr)  MII_BUSY)) {
ret = 0;
break;
}
-   udelay(1000);
-   } while (timeout--);
+
+   /* Try again after 10usec */
+   udelay(10);
+   };
 
/* Needed as a fix for ST-Phy */
eth_mdio_read(dev, addr, reg, value);
@@ -353,18 +365,23 @@ static int dw_reset_phy(struct eth_device *dev)
 {
struct dw_eth_dev *priv = dev-priv;
u16 ctrl;
+   ulong start;
int timeout = CONFIG_PHYRESET_TIMEOUT;
u32 phy_addr = priv-address;
 
eth_mdio_write(dev, phy_addr, MII_BMCR, BMCR_RESET);
-   do {
+
+   start = get_timer(0);
+   while (get_timer(start)  timeout) {
eth_mdio_read(dev, phy_addr, MII_BMCR, ctrl);
if (!(ctrl  BMCR_RESET))
break;
-   udelay(1000);
-   } while (timeout--);
 
-   if (timeout  0)
+   /* Try again after 10usec */
+   udelay(10);
+   };
+
+   if (get_timer(start) = CONFIG_PHYRESET_TIMEOUT)
return -1;
 
 #ifdef CONFIG_PHY_RESET_DELAY
@@ -381,6 +398,7 @@ static int configure_phy(struct eth_device *dev)
 #if defined(CONFIG_DW_AUTONEG)
u16 bmsr;
u32 timeout;
+   ulong start;
u16 anlpar, btsr;
 #else
u16 ctrl;
@@ -419,12 +437,16 @@ static int configure_phy(struct eth_device *dev)
/* Read the phy status register and populate priv structure */
 #if defined(CONFIG_DW_AUTONEG)
timeout = CONFIG_AUTONEG_TIMEOUT;
-   do {
+   start = get_timer(0);
+
+   while (get_timer(start)  timeout) {
eth_mdio_read(dev, phy_addr, MII_BMSR, bmsr);
if (bmsr  BMSR_ANEGCOMPLETE)
break;
-   udelay(1000);
-   } while (timeout--);
+
+   /* Try again after 10usec */
+   udelay(10);
+   };
 
eth_mdio_read(dev, phy_addr, MII_LPA, anlpar);
eth_mdio_read(dev, phy_addr, MII_STAT1000, btsr);
-- 
1.7.2.2

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[U-Boot] Antwort: Re: NetConsole TFTP

2012-03-26 Thread Thomas Pohl
Dear Wolfgang,

Hm... you are not running mainline code, right?  Because we always
have a single network interface active at any time.

I am using mainline code (u-boot v2011.12) with 
P2020RDB-PC_SPIFLASH_config. Unfortunately it does not work as I thought, 
but fortunately we may have a solution (patch) to solve the problem.

Best regards,

Thomas Pohl




Von:Wolfgang Denk w...@denx.de
An: Thomas Pohl thomas.p...@sick.de
Kopie:  u-boot@lists.denx.de
Datum:  23.03.2012 20:47
Betreff:Re: [U-Boot] NetConsole  TFTP
Gesendet von:   u-boot-boun...@lists.denx.de



Dear Thomas,

In message 
of0b4b1e6c.b54b0c2d-onc12579ca.0038e059-c12579ca.0038f...@sick.de you 
wrote:

 Is it possible to use NetConsole and TFTP parallel at one Ethernet 
 interface? My fist thoughts were that this could be possible, because 
TFTP

Yes, this is supposed to work.  We've even seen running TFTP and
Netconsole over Ethernet over USB...

 and NetConsole use different ports. But out of the box the behavior is 
 different. In my tests TFTP tries to use another Ethernet interface 
 (eTSEC1) as the NetConsole (eTSEC0), but the final Hardware has only one 


Hm... you are not running mainline code, right?  Because we always
have a single network interface active at any time.

 Therefore I need a possibility to communicate with a target (via 
 NetConsole) and transfer the flash images (via TFTP). Has anybody 
 experiences with this? Is this possible with U-Boot? Maybe I am doing 
 something wrong?

I recommend you undo any modifications made to the network stack,
and/or try plain mainline code instead.

Best regards,

Wolfgang Denk

-- 
DENX Software Engineering GmbH, MD: Wolfgang Denk  Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
Premature optimization is the root of all evil. -- D.E. Knuth
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280355 
Vorstand: Dr. Robert Bauer (Vorsitzender)  -  Reinhard Bösl  -  Markus 
Paschmann  -  Markus Vatter 
Aufsichtsrat: Gisela Sick (Ehrenvorsitzende) - Klaus M. Bukenberger 
(Vorsitzender) 
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Re: [U-Boot] [PATCH] Enable high speed support for USB device framework and usbtty

2012-03-26 Thread Marek Vasut
Dear Amit Virdi,

 On 3/19/2012 3:58 PM, Marek Vasut wrote:
  Dear Shiraz Hashim,
  
  Hi Marek,
  
  On Mon, Mar 19, 2012 at 06:57:29AM +0800, Marek Vasut wrote:
  Hi,
  
  Yes, ep0.c has direct access to the device field. I'll omit the
  usbd_device_qualifier_descriptor function in V2.
  
  How's V2 going?
  
  Unfortunately Amit is not well and he is taking rest. He would resume
  on this from next week.
  
  Please forward him that I wish him getting better ASAP.
 
 Thanks for your wishes Marek, I'm well now and back to office!
 I shall finish sending V2 of all the patches I have sent till date,
 within a couple of days.
 

Good to see you back. Thanks for your efforts ;-)

Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH V4] net: fec_mxc: allow use with cache enabled

2012-03-26 Thread Marek Vasut
Dear Stefano Babic,

 On 26/03/2012 00:11, Eric Nelson wrote:
  Hi Marek,
 
 Hi Eric,
 
  Have you had a chance to review this V4 patch for the fec_mxc driver?
  
  http://lists.denx.de/pipermail/u-boot/2012-March/120205.html
 
 Marek has sent all cache relevant patches together in the same patchset.
 If I am not wrong, your V4 was sent as :

That's true ... also, I'm afraid the arm926ejs stuff won't be Acked by AA since 
he's gone ... somewhere, noone knows where :-(

 
 http://patchwork.ozlabs.org/patch/147143/
 
 and he added his own Ack.
 
  Note that Stefano pointed out yesterday that PPC doesn't properly
  implement invalidate_dcache_range.
  
  http://lists.denx.de/pipermail/u-boot/2012-March/120918.html
  
  I believe you mentioned previously that the fec_mxc driver was
  compatible with certain PPC SOCs, so this might temporarily block
  any such transition.
 
 For FEC it is easier as for ESDHC. The controller on PowerPC has the
 same name, but it is different - and there is  a different driver. The
 fec_mxc.c is only for i.MX SOCs, and we are sure we do not break other
 architectures, except i.MX. I know it breaks MX3x, I will check it.
 
 The whole serie depends on the first patch:
   http://patchwork.ozlabs.org/patch/147135/
 
 This must be acked / merged by Albert, because it is for all arm926 SOCs.
 
 Best regards,
 Stefano Babic

Best regards,
Marek Vasut
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Re: [U-Boot] BIOS EMULATOR driver

2012-03-26 Thread Marek Vasut
Dear Wolfgang Denk,

 Dear Viktor,
 
 In message 
cajxx_awwp1wslhu0e0dzk+zhayfjy+98aaco9f_6kxswzkk...@mail.gmail.com you wrote:
I'm working on one project about bios emulator and I notice that this
driver is linked for boards P1022DS and sequoia too, but they don't
really
use any methods of it. It's safe to remove this support from configs
files?
   
   Are you sure that the code is not used?
  
  I pretty sure because I try compile it without this driver and
  everything seems to be ok.
 
 In the given configurations, the BIOS code only gets built when you
 the ATI Radeon support is enabled, in which case it is needed.
 
 If you don't enable either, then it's fine as well - but then the BIOS
 code does not get built anyway.

But we probably want this driver to work, so ...

 
 Best regards,
 
 Wolfgang Denk

Best regards,
Marek Vasut
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Re: [U-Boot] Patch: Fix device enumeration through API.

2012-03-26 Thread Anatolij Gustschin
Hi Tim,

Thanks for the patch. Please see some comments below.

On Tue, 21 Feb 2012 22:34:35 -0800
Tim Kientzle kient...@freebsd.org wrote:

 The one-line patch below fixes device enumeration through the
 U-Boot API.
 
 Device enumeration crashes when the system in question doesn't
 have any RAM mapped to address zero (I discovered this on a
 BeagleBone board), since the enumeration calls get_dev with a
 NULL ifname sometimes which then gets passed down to strncmp().
 
 This fix simply ensures that get_dev returns NULL when invoked
 with a NULL ifname.
 
 This could also be fixed by reworking the device enumeration to
 never call get_dev with a NULL argument, but that's a much more
 extensive change.  (get_dev is called from several places and the
 code is driven by a list that's constructed in a way that naturally
 leaves lots of NULLs.)
 
 Cheers,
 
 Tim Kientzle
 
 diff --git a/disk/part.c b/disk/part.c
 index f07a17f..1a82539 100644
 --- a/disk/part.c
 +++ b/disk/part.c
 @@ -84,7 +84,7 @@ block_dev_desc_t *get_dev(char* ifname, int dev)
  #ifdef CONFIG_NEEDS_MANUAL_RELOC
   name += gd-reloc_off;
  #endif
 - while (drvr-name) {
 + while (ifname  drvr-name) {
   name = drvr-name;
   reloc_get_dev = drvr-get_dev;

I would prefer just checking for ifname == NULL at the top
of the function and not on each loop iteration. Also please
add your Signed-off-by when submitting patches.

Thanks,
Anatolij
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[U-Boot] [PATCH v2] spi/kirkwood: add weak functions board_spi_bus_claim/release

2012-03-26 Thread Valentin Longchamp
Some kirkwood based boards may need to implement such function due to
some HW designs.

Signed-off-by: Valentin Longchamp valentin.longch...@keymile.com
cc: Gerlando Falauto gerlando.fala...@keymile.com
cc: Prafulla Wadaskar prafu...@marvell.com
cc: Holger Brunck holger.bru...@keymile.com
---
 drivers/spi/kirkwood_spi.c |   12 +++-
 1 files changed, 11 insertions(+), 1 deletions(-)

diff --git a/drivers/spi/kirkwood_spi.c b/drivers/spi/kirkwood_spi.c
index db8ba8b..058dae2 100644
--- a/drivers/spi/kirkwood_spi.c
+++ b/drivers/spi/kirkwood_spi.c
@@ -86,13 +86,23 @@ void spi_free_slave(struct spi_slave *slave)
free(slave);
 }
 
-int spi_claim_bus(struct spi_slave *slave)
+__attribute__((weak)) int board_spi_claim_bus(struct spi_slave *slave)
 {
return 0;
 }
 
+int spi_claim_bus(struct spi_slave *slave)
+{
+   return board_spi_claim_bus(slave);
+}
+
+__attribute__((weak)) void board_spi_release_bus(struct spi_slave *slave)
+{
+}
+
 void spi_release_bus(struct spi_slave *slave)
 {
+   board_spi_release_bus(slave);
 }
 
 #ifndef CONFIG_SPI_CS_IS_VALID
-- 
1.7.1

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[U-Boot] [PATCH v2] mvgbe: remove warning for unused methods

2012-03-26 Thread Valentin Longchamp
From: Stefan Bigler stefan.big...@keymile.com

Some baords may use the GBE interface but they have no
phy connected to the interface and a direct MAC/MAC interface.
For them we need to get rid of compiler warnings.

Signed-off-by: Stefan Bigler stefan.big...@keymile.com
Signed-off-by: Valentin Longchamp valentin.longch...@keymile.com
cc: Gerlando Falauto gerlando.fala...@keymile.com
cc: Prafulla Wadaskar prafu...@marvell.com
cc: Holger Brunck holger.bru...@keymile.com
---
 drivers/net/mvgbe.c |2 ++
 1 files changed, 2 insertions(+), 0 deletions(-)

diff --git a/drivers/net/mvgbe.c b/drivers/net/mvgbe.c
index 1dcb700..df258b9 100644
--- a/drivers/net/mvgbe.c
+++ b/drivers/net/mvgbe.c
@@ -52,6 +52,7 @@ DECLARE_GLOBAL_DATA_PTR;
 #define MV_PHY_ADR_REQUEST 0xee
 #define MVGBE_SMI_REG (((struct mvgbe_registers *)MVGBE0_BASE)-smi)
 
+#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
 /*
  * smi_reg_read - miiphy_read callback function.
  *
@@ -181,6 +182,7 @@ static int smi_reg_write(const char *devname, u8 phy_adr, 
u8 reg_ofs, u16 data)
 
return 0;
 }
+#endif
 
 /* Stop and checks all queues */
 static void stop_queue(u32 * qreg)
-- 
1.7.1

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Re: [U-Boot] [PATCH 03/25] SPEAr: Place ethaddr write and read within CONFIG_CMD_NET

2012-03-26 Thread Amit Virdi

Hi Stefan,

Sorry for this delayed response, I'm back to office after almost 2 weeks.

On 3/7/2012 6:51 PM, Stefan Roese wrote:

On Wednesday 07 March 2012 13:03:52 Amit Virdi wrote:

From: Vipin KUMARvipin.ku...@st.com

ethaddr can be optionally read from i2c memory. So, chip_config command
supports reading/writing hw mac id into i2c memory. Placing this code
within CONFIG_CMD_NET as this would only be needed when network interface
is configured

Signed-off-by: Vipin Kumarvipin.ku...@st.com
Signed-off-by: Amit Virdiamit.vi...@st.com


I'm not really sure, why you have this special ethaddr handling in I2C prom
here at all. Isn't it enough to have the MAC address (ethaddr) stored in the
U-Boot environment (NOR, NAND, etc)? Why do you need this additional I2C
stuff? Could you please explain this?



Generally MAC addresses are stored in EEPROMs due to two reasons:
1. Special set of command sequences are required to erase data from an 
EEPROM

2. EEPROMs are cheaper

As a result, board manufacturers provide an EEPROM memory that contains 
MAC address and other vital board parameters. In such case, NAND/NOR 
memories may not have ethaddr stored. On SPEAr, I2C is used to access 
EEPROM. So this patch is required. Please let me know if I understood 
your question correctly and, hence, gave the right answer.


Thanks n Regards
Amit Virdi
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Re: [U-Boot] [PATCH] mkenvimage: fix usage message

2012-03-26 Thread Anatolij Gustschin
Hello Wolfgang,

On Fri,  2 Mar 2012 08:19:40 +0100
Wolfgang Denk w...@denx.de wrote:

 Don;t use argv[0] for usage() because it may or may not be clobbered
 by the previous call to basename().  Use prg instead as it is done
 in the rest of the code.
 
 Signed-off-by: Wolfgang Denk w...@denx.de
 ---
  tools/mkenvimage.c |2 +-
  1 files changed, 1 insertions(+), 1 deletions(-)

Applied to u-boot-staging.

Thanks,
Anatolij
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Re: [U-Boot] [PATCH resend] ARMV7/Vexpress: add missing get_ticks() and get_tbclk()

2012-03-26 Thread Anatolij Gustschin
Hi,

On Wed, 22 Feb 2012 22:56:31 +0800
walimis walimis...@gmail.com wrote:

 From: Liming Wang walimis...@gmail.com
 
 commit f31a911fe (arm, post: add missing post_time_ms for arm)
 enables get_ticks and get_tbclk for all arm based boards,
 arm/vexpress also needs these functions to work.
 
 Signed-off-by: Liming Wang walimis...@gmail.com
 ---
  board/armltd/vexpress/ca9x4_ct_vxp.c |   10 ++
  1 files changed, 10 insertions(+), 0 deletions(-)

Applied to u-boot-staging/ag...@denx.de. Thanks.

Anatolij
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Re: [U-Boot] [PATCH 04/25] SPEAr: Configure network support for spear SoCs

2012-03-26 Thread Amit Virdi

Hello Stefan,

On 3/7/2012 6:59 PM, Stefan Roese wrote:

On Wednesday 07 March 2012 13:03:53 Amit Virdi wrote:

From: Vipin KUMARvipin.ku...@st.com


Please find some comments below.


Signed-off-by: Vipin Kumarvipin.ku...@st.com
Signed-off-by: Amit Virdiamit.vi...@st.com
diff --git a/arch/arm/include/asm/arch-spear/hardware.h
b/arch/arm/include/asm/arch-spear/hardware.h index a6517b2..2b9cb0e 100644
--- a/arch/arm/include/asm/arch-spear/hardware.h
+++ b/arch/arm/include/asm/arch-spear/hardware.h
@@ -31,6 +31,7 @@
  #define CONFIG_SPEAR_SYSCNTLBASE  (0xFCA0)
  #define CONFIG_SPEAR_TIMERBASE(0xFC80)
  #define CONFIG_SPEAR_MISCBASE (0xFCA8)
+#define CONFIG_SPEAR_ETHBASE   (0xE080)


I would prefer if you removed these unneeded parentheses here:

#define CONFIG_SPEAR_ETHBASE0xE080

Perhaps best done by doing a cosmetic cleanup patch before the newly added
defines. I know that checkpatch doesn't complain about this, but these
parentheses really distract me. Not sure how other feel about it.



ok


+
+int board_eth_init(bd_t *bis)
+{
+#if defined(CONFIG_DESIGNWARE_ETH)
+   return designware_initialize(0, CONFIG_SPEAR_ETHBASE, CONFIG_DW0_PHY);
+#else
+   return -1;
+#endif
+}


This routine is added multiple times in this patch. Perhaps this can be moved
to a common/ file instead?



[...]


+
+int board_eth_init(bd_t *bis)
+{
+#if defined(CONFIG_DESIGNWARE_ETH)
+   return designware_initialize(0, CONFIG_SPEAR_ETHBASE, CONFIG_DW0_PHY);
+#else
+   return -1;
+#endif
+}


Here again.



[...]


+
+int board_eth_init(bd_t *bis)
+{
+#if defined(CONFIG_DESIGNWARE_ETH)
+   return designware_initialize(0, CONFIG_SPEAR_ETHBASE, CONFIG_DW0_PHY);
+#else
+   return -1;
+#endif
+}


And again.



[...]


diff --git a/board/spear/spear600/spear600.c
b/board/spear/spear600/spear600.c index 7cf63d6..5a32b7f 100644
--- a/board/spear/spear600/spear600.c
+++ b/board/spear/spear600/spear600.c
@@ -22,6 +22,7 @@
   */

  #includecommon.h
+#includenetdev.h
  #includenand.h
  #includeasm/io.h
  #includelinux/mtd/fsmc_nand.h
@@ -52,3 +53,12 @@ int board_nand_init(struct nand_chip *nand)
  #endif
return -1;
  }
+
+int board_eth_init(bd_t *bis)
+{
+#if defined(CONFIG_DESIGNWARE_ETH)
+   return designware_initialize(0, CONFIG_SPEAR_ETHBASE, CONFIG_DW0_PHY);
+#else
+   return -1;
+#endif
+}


and again.



Yes Stefan, it is planned. There's a lot of cleanup that is needed in 
the SPEAr platform code. I shall be sending another patchset after this 
patchset that adds new functionality and does the cleanup.


Can you accept this patch for the time being?



+/* Ethernet driver configuration */
+#define CONFIG_MII
+#define CONFIG_DESIGNWARE_ETH
+#define CONFIG_DW_SEARCH_PHY
+#define CONFIG_DW0_PHY 1
+#define CONFIG_NET_MULTI
+#define CONFIG_PHY_RESET_DELAY (1) /*

in usec */

Again, please remove these parentheses.



Sure!


Thanks
Amit Virdi
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Re: [U-Boot] [PATCH 04/25] SPEAr: Configure network support for spear SoCs

2012-03-26 Thread Stefan Roese
Hi Amit,

On Monday 26 March 2012 13:41:09 Amit Virdi wrote:
  +int board_eth_init(bd_t *bis)
  +{
  +#if defined(CONFIG_DESIGNWARE_ETH)
  +  return designware_initialize(0, CONFIG_SPEAR_ETHBASE, CONFIG_DW0_PHY);
  +#else
  +  return -1;
  +#endif
  +}
  
  and again.
 
 Yes Stefan, it is planned. There's a lot of cleanup that is needed in
 the SPEAr platform code. I shall be sending another patchset after this
 patchset that adds new functionality and does the cleanup.
 
 Can you accept this patch for the time being?

I can, yes. Only speaking for myself though.

Thanks,
Stefan

--
DENX Software Engineering GmbH,  MD: Wolfgang Denk  Detlev Zundel
HRB 165235 Munich,  Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-0 Fax: (+49)-8142-66989-80 Email: off...@denx.de
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Re: [U-Boot] [PATCH v2] MAKEALL: display SPL size if present

2012-03-26 Thread Anatolij Gustschin
Hello Scott,

On Mon, 20 Feb 2012 16:56:25 -0600
Scott Wood scottw...@freescale.com wrote:

 This makes it easier to detect changes in the SPL portion,
 as can currently be done for the main U-Boot image.
 
 Signed-off-by: Scott Wood scottw...@freescale.com
 ---
 v2: Only invoke size once.
 
  MAKEALL |8 ++--
  1 files changed, 6 insertions(+), 2 deletions(-)

Applied to u-boot-staging/ag...@denx.de. Thanks.

Anatolij
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Re: [U-Boot] [PATCH 08/25] SPEAr: Add configuration options for spear3xx and spear6xx boards

2012-03-26 Thread Amit Virdi

Dear Stefan,


diff --git a/board/spear/spear300/config.mk
b/board/spear/spear300/config.mk index 5848ef8..0706430 100644
--- a/board/spear/spear300/config.mk
+++ b/board/spear/spear300/config.mk
@@ -25,15 +25,4 @@

  CONFIG_SYS_TEXT_BASE = 0x0070

-ALL-y += $(obj)u-boot.img
-
-# Environment variables in NAND
-ifeq ($(ENV),NAND)
-PLATFORM_RELFLAGS += -DCONFIG_ENV_IS_IN_NAND
-else
-PLATFORM_RELFLAGS += -DCONFIG_ENV_IS_IN_FLASH
-endif
-
-ifeq ($(CONSOLE),USB)
-PLATFORM_RELFLAGS += -DCONFIG_SPEAR_USBTTY
-endif
+ALL += $(obj)u-boot.img


Can't you just remove this config.mk file completely? CONFIG_SYS_TEXT_BASE can
be moved to the config header instead. What else is this file needed for?



Could you please explain which config header you are referring to here? 
Do you mean include/configs/spear. ?


For SPEAr310 and SPEAr320, config.mk is needed to make image (by 
specifying FLASH=PNOR during compile time) that can access CFI compliant 
PNOR flash.



The same comment for all other config.mk files.



Thanks
Amit Virdi
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Re: [U-Boot] [PATCH 12/25] SPEAr: Enable usb device high speed support

2012-03-26 Thread Amit Virdi

Hello Stefan,

On 3/12/2012 6:09 PM, Amit Virdi wrote:

Hello Stefan,

On 3/7/2012 7:37 PM, Stefan Roese wrote:

On Wednesday 07 March 2012 13:04:01 Amit Virdi wrote:

From: Vipin KUMARvipin.ku...@st.com

This patch enables the support for usb high speed device for spear
platform
SOCs

Signed-off-by: Vipin Kumarvipin.ku...@st.com
Signed-off-by: Amit Virdiamit.vi...@st.com
---
include/configs/spear-common.h | 1 +
1 files changed, 1 insertions(+), 0 deletions(-)

diff --git a/include/configs/spear-common.h
b/include/configs/spear-common.h index 66cf19d..f4980b0 100644
--- a/include/configs/spear-common.h
+++ b/include/configs/spear-common.h
@@ -38,6 +38,7 @@
/* USBD driver configuration */
#define CONFIG_DW_UDC
#define CONFIG_USB_DEVICE
+#define CONFIG_USBD_HS


This define doesn't seem to be mentioned in the toplevel README file.
Please
add a short description there.



Sure.



The description of this flag is in the driver patch. Since that patch is 
not applied yet, so you couldn't see the description.


Thanks
Amit Virdi
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[U-Boot] [PATCH v2 06/19] arm/km: change maintainer for mgcoge3un

2012-03-26 Thread Valentin Longchamp
From: Holger Brunck holger.bru...@keymile.com

Signed-off-by: Holger Brunck holger.bru...@keymile.com
Signed-off-by: Valentin Longchamp valentin.longch...@keymile.com
cc: Heiko Schocher h...@denx.de
cc: Prafulla Wadaskar prafu...@marvell.com
cc: Gerlando Falauto gerlando.fala...@keymile.com
---
 MAINTAINERS |2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/MAINTAINERS b/MAINTAINERS
index 46f63a0..652113f 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -743,6 +743,7 @@ Sergey Lapin sla...@ossfans.org
 Valentin Longchamp valentin.longch...@keymile.com
 
km_kirkwood ARM926EJS (Kirkwood SoC)
+   mgcoge3un   ARM926EJS (Kirkwood SoC)
portl2  ARM926EJS (Kirkwood SoC)
 
 Nishanth Menon n...@ti.com
@@ -839,7 +840,6 @@ Heiko Schocher h...@denx.de
 
enbw_cmcARM926EJS (AM1808 SoC)
magnesium   i.MX27
-   mgcoge3un   ARM926EJS (Kirkwood SoC)
 
 Michael Schwingen mich...@schwingen.org
 
-- 
1.7.1

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[U-Boot] [PATCH v2 01/19] arm/km: add board type to boards.cfg

2012-03-26 Thread Valentin Longchamp
From: Holger Brunck holger.bru...@keymile.com

Some other kirkwood boards from keymile will follow. They will have some
small differences, but we want to use the km_kirkwood.h for all to
distinguish them. This patch a preparation for this.

Signed-off-by: Holger Brunck holger.bru...@keymile.com
Signed-off-by: Valentin Longchamp valentin.longch...@keymile.com
cc: Gerlando Falauto gerlando.fala...@keymile.com
cc: Prafulla Wadaskar prafu...@marvell.com
---
 boards.cfg|4 ++--
 include/configs/km_kirkwood.h |4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/boards.cfg b/boards.cfg
index ade2034..ccffd1a 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -137,8 +137,8 @@ hawkboard_uart   arm arm926ejs   
da8xxevmdavinci
 enbw_cmc arm arm926ejs   enbw_cmcenbw  
 davinci
 calimain arm arm926ejs   calimain
omicrondavinci
 dns325   arm arm926ejs   -   
d-link kirkwood
-km_kirkwood  arm arm926ejs   km_arm  
keymilekirkwood   km_kirkwood:KM_DISABLE_PCI
-km_kirkwood_pci  arm arm926ejs   km_arm  
keymilekirkwood   km_kirkwood:KM_RECONFIG_XLX
+km_kirkwood  arm arm926ejs   km_arm  
keymilekirkwoodkm_kirkwood:KM_KIRKWOOD,KM_DISABLE_PCI
+km_kirkwood_pci  arm arm926ejs   km_arm  
keymilekirkwoodkm_kirkwood:KM_KIRKWOOD_PCI,KM_RECONFIG_XLX
 mgcoge3unarm arm926ejs   km_arm  
keymilekirkwood
 portl2   arm arm926ejs   km_arm  
keymilekirkwood
 inetspace_v2 arm arm926ejs   netspace_v2 LaCie 
 kirkwood   lacie_kw:INETSPACE_V2
diff --git a/include/configs/km_kirkwood.h b/include/configs/km_kirkwood.h
index ed36124..f639edc 100644
--- a/include/configs/km_kirkwood.h
+++ b/include/configs/km_kirkwood.h
@@ -42,10 +42,10 @@
 /*
  * Version number information
  */
-#ifdef CONFIG_KM_DISABLE_PCI
+#if defined(CONFIG_KM_KIRKWOOD)
 #define CONFIG_IDENT_STRING\nKeymile Kirkwood
 #undef  CONFIG_KIRKWOOD_PCIE_INIT
-#else
+#elif defined(CONFIG_KM_KIRKWOOD_PCI)
 #define CONFIG_IDENT_STRING\nKeymile Kirkwood PCI
 #endif
 
-- 
1.7.1

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[U-Boot] [PATCH] OMAP I2C: fix handling of alen = 0

2012-03-26 Thread Daniel Mack
Allow raw I2C message transfers by setting the alen parameter to 0.
Currently, this doesn't work due to false assumptions to what is
appearantly considered a corner case.

With this patch applied, it is possible to send multibyte transfers
in one single transaction instead of using multiple STOP-bit-ommited
transfers.

Signed-off-by: Daniel Mack zon...@gmail.com
Cc: Dirk Behme dirk.be...@gmail.com
Cc: Igor Grinberg grinb...@compulab.co.il
Cc: Tom Rini tr...@ti.com
Cc: Steve Sakoman sako...@gmail.com
Cc: Michal Simek mon...@monstr.eu
Cc: Wolfgang Denk w...@denx.de
Cc: Tom Rix tom@windriver.com

---

On a OMAP3-based board, I needed raw I2C messages to configure
peripheral devices, and it turned out that the current omap-i2c
driver is not capable of send such due to assumption that are
made wrt register/payload data on the wire.

I couldn't figure who's best to take care for such a patch, so I
picked some people who have been working on this driver and
similar boards before.

Thanks for routing this in the right direction :)

 drivers/i2c/omap24xx_i2c.c |4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/i2c/omap24xx_i2c.c b/drivers/i2c/omap24xx_i2c.c
index f06af02..30914df 100644
--- a/drivers/i2c/omap24xx_i2c.c
+++ b/drivers/i2c/omap24xx_i2c.c
@@ -401,7 +401,7 @@ int i2c_write(uchar chip, uint addr, int alen, uchar 
*buffer, int len)
i2c_error = 1;
 
if (!i2c_error) {
-   if (status  I2C_STAT_XRDY) {
+   if (status  I2C_STAT_XRDY  alen  0) {
switch (alen) {
 #if defined(CONFIG_OMAP243X) || defined(CONFIG_OMAP34XX) || \
defined(CONFIG_AM33XX)
@@ -445,7 +445,7 @@ int i2c_write(uchar chip, uint addr, int alen, uchar 
*buffer, int len)
i2c_error = 1;
 
if (!i2c_error) {
-   for (i = ((alen  1) ? 0 : 1); i  len; i++) {
+   for (i = ((alen == 1) ? 1 : 0); i  len; i++) {
if (status  I2C_STAT_XRDY) {
 #if defined(CONFIG_OMAP243X) || defined(CONFIG_OMAP34XX) || \
defined(CONFIG_AM33XX)
-- 
1.7.7.6

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[U-Boot] [PATCH v2 13/19] arm/km: add kmnusa board support

2012-03-26 Thread Valentin Longchamp
From: Holger Brunck holger.bru...@keymile.com

This board is similar to portl2, but it has the u-boot environment
in a SPI NOR flash and not in an i2c eeprom like portl2 have.

Some other details:
 - IVM EEPROM is at adress: pca9547:70:9
 - PCI is enabled
 - PIGGY4 is connected via MV88E6352 simple switch. There is no phy
   between the simple switch and the kirkwood.

Signed-off-by: Holger Brunck holger.bru...@keymile.com
Signed-off-by: Valentin Longchamp valentin.longch...@keymile.com
cc: Gerlando Falauto gerlando.fala...@keymile.com
cc: Prafulla Wadaskar prafu...@marvell.com
---
 MAINTAINERS   |1 +
 board/keymile/km_arm/128M16-1.cfg |  290 +
 board/keymile/km_arm/km_arm.c |9 +-
 boards.cfg|1 +
 include/configs/km/km_arm.h   |   44 +-
 include/configs/km_kirkwood.h |   67 +++--
 6 files changed, 388 insertions(+), 24 deletions(-)
 create mode 100644 board/keymile/km_arm/128M16-1.cfg

diff --git a/MAINTAINERS b/MAINTAINERS
index 652113f..ddf9613 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -743,6 +743,7 @@ Sergey Lapin sla...@ossfans.org
 Valentin Longchamp valentin.longch...@keymile.com
 
km_kirkwood ARM926EJS (Kirkwood SoC)
+   kmnusa  ARM926EJS (Kirkwood SoC)
mgcoge3un   ARM926EJS (Kirkwood SoC)
portl2  ARM926EJS (Kirkwood SoC)
 
diff --git a/board/keymile/km_arm/128M16-1.cfg 
b/board/keymile/km_arm/128M16-1.cfg
new file mode 100644
index 000..cef8ea6
--- /dev/null
+++ b/board/keymile/km_arm/128M16-1.cfg
@@ -0,0 +1,290 @@
+#
+# (C) Copyright 2010
+# Heiko Schocher, DENX Software Engineering, h...@denx.de.
+#
+# (C) Copyright 2012
+# Valentin Longchamp, Keymile AG, valentin.longch...@keymile.com
+# Stefan Bigler, Keymile AG, stefan.big...@keymile.com
+#
+# (C) Copyright 2012
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+# MA 02110-1301 USA
+#
+# Refer docs/README.kwimage for more details about how-to configure
+# and create kirkwood boot image
+#
+
+# Boot Media configurations
+BOOT_FROM  spi # Boot from SPI flash
+
+DATA 0xFFD1 0x0111 # MPP Control 0 Register
+# bit 3-0:   2, MPPSel0  SPI_CSn  (1=NF_IO[2])
+# bit 7-4:   2, MPPSel1  SPI_SI   (1=NF_IO[3])
+# bit 12-8:  2, MPPSel2  SPI_SCK  (1=NF_IO[4])
+# bit 15-12: 2, MPPSel3  SPI_SO   (1=NF_IO[5])
+# bit 19-16: 1, MPPSel4  NF_IO[6]
+# bit 23-20: 1, MPPSel5  NF_IO[7]
+# bit 27-24: 1, MPPSel6  SYSRST_O
+# bit 31-28: 0, MPPSel7  GPO[7]
+
+DATA 0xFFD10004 0x03303300 # MPP Control 1 Register
+# bit 3-0:   0, MPPSel8 GPIO[8]
+# bit 7-4:   0, MPPSel9  GPIO[9]
+# bit 12-8:  3, MPPSel10 UA0_TXD
+# bit 15-12: 3, MPPSel11 UA0_RXD
+# bit 19-16: 0, MPPSel12 not connected
+# bit 23-20: 3, MPPSel13 UA1_TXD
+# bit 27-24: 3, MPPSel14 UA1_RXD
+# bit 31-28: 0, MPPSel15 GPIO[15]
+
+DATA 0xFFD10008 0x1100 # MPP Control 2 Register
+# bit 3-0:   0, MPPSel16 GPIO[16]
+# bit 7-4:   0, MPPSel17 not connected
+# bit 12-8:  1, MPPSel18 NF_IO[0]
+# bit 15-12: 1, MPPSel19 NF_IO[1]
+# bit 19-16: 0, MPPSel20 GPIO[20]
+# bit 23-20: 0, MPPSel21 GPIO[21]
+# bit 27-24: 0, MPPSel22 GPIO[22]
+# bit 31-28: 0, MPPSel23 GPIO[23]
+
+# MPP Control 3-6 Register untouched (MPP24-49)
+
+DATA 0xFFD100E0 0x1B1B1B1B # IO Configuration 0 Register
+# bit 2-0:   3, Reserved
+# bit 5-3:   3, Reserved
+# bit 6: 0, Reserved
+# bit 7: 0, RGMII-pads voltage = 3.3V
+# bit 10-8:  3, Reserved
+# bit 13-11: 3, Reserved
+# bit 14:0, Reserved
+# bit 15:0, MPP RGMII-pads voltage = 3.3V
+# bit 31-16  0x1B1B, Reserved
+
+DATA 0xFFD20134 0x # L2 RAM Timing 0 Register
+# bit 0-1:   2, Tag RAM RTC RAM0
+# bit 3-2:   1, Tag RAM WTC RAM0
+# bit 7-4:   6, Reserve
+# bit 9-8:   2, Valid RAM RTC RAM
+# bit 11-10: 1, Valid RAM WTC RAM
+# bit 13-12: 2, Dirty RAM RTC RAM
+# bit 15-14: 1, Dirty RAM WTC RAM
+# bit 17-16: 2, Data RAM RTC RAM0
+# bit 19-18: 1, Data RAM WTC RAM0
+# bit 21-20: 2, Data RAM RTC RAM1
+# bit 23-22: 1, Data RAM WTC RAM1
+# bit 25-24: 2, Data RAM RTC RAM2
+# bit 27-26: 1, Data RAM WTC RAM2
+# bit 29-28: 2, Data RAM RTC RAM3
+# bit 31-30: 1, Data RAM WTC RAM4
+
+DATA 0xFFD20138 0x # L2 RAM Timing 1 Register
+# bit 15-0:  ???, Reserve
+# bit 

[U-Boot] [PATCH v2 11/19] arm/kirkwood: protect the ENV_SPI #defines

2012-03-26 Thread Valentin Longchamp
So that they can be redefined by some boards specific values.

Signed-off-by: Valentin Longchamp valentin.longch...@keymile.com
Signed-off-by: Holger Brunck holger.bru...@keymile.com
cc: Gerlando Falauto gerlando.fala...@keymile.com
cc: Prafulla Wadaskar prafu...@marvell.com
---
 arch/arm/include/asm/arch-kirkwood/config.h |   12 +---
 1 files changed, 9 insertions(+), 3 deletions(-)

diff --git a/arch/arm/include/asm/arch-kirkwood/config.h 
b/arch/arm/include/asm/arch-kirkwood/config.h
index 91164eb..a9499b7 100644
--- a/arch/arm/include/asm/arch-kirkwood/config.h
+++ b/arch/arm/include/asm/arch-kirkwood/config.h
@@ -82,9 +82,15 @@
 #ifdef CONFIG_CMD_SF
 #define CONFIG_HARD_SPI1
 #define CONFIG_KIRKWOOD_SPI1
-#define CONFIG_ENV_SPI_BUS 0
-#define CONFIG_ENV_SPI_CS  0
-#define CONFIG_ENV_SPI_MAX_HZ  5000/*50Mhz */
+#ifndef CONFIG_ENV_SPI_BUS
+# define CONFIG_ENV_SPI_BUS0
+#endif
+#ifndef CONFIG_ENV_SPI_CS
+# define CONFIG_ENV_SPI_CS 0
+#endif
+#ifndef CONFIG_ENV_SPI_MAX_HZ
+# define CONFIG_ENV_SPI_MAX_HZ 5000
+#endif
 #endif
 
 /*
-- 
1.7.1

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[U-Boot] [PATCH v2 07/19] arm/km: remove CONFIG_RESET_PHY_R

2012-03-26 Thread Valentin Longchamp
From: Holger Brunck holger.bru...@keymile.com

This is already defined in the generic kirkwood header.

Signed-off-by: Holger Brunck holger.bru...@keymile.com
Signed-off-by: Valentin Longchamp valentin.longch...@keymile.com
cc: Gerlando Falauto gerlando.fala...@keymile.com
cc: Prafulla Wadaskar prafu...@marvell.com
---
 include/configs/km/km_arm.h |1 -
 1 files changed, 0 insertions(+), 1 deletions(-)

diff --git a/include/configs/km/km_arm.h b/include/configs/km/km_arm.h
index e46b510..7ef 100644
--- a/include/configs/km/km_arm.h
+++ b/include/configs/km/km_arm.h
@@ -164,7 +164,6 @@
 #define CONFIG_MVGBE_PORTS {1, 0}  /* enable port 0 only */
 #define CONFIG_PHY_BASE_ADR0
 #define CONFIG_ENV_OVERWRITE   /* ethaddr can be reprogrammed */
-#define CONFIG_RESET_PHY_R /* use reset_phy() to init 88E1118 PHY */
 
 /*
  * UBI related stuff
-- 
1.7.1

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[U-Boot] [PATCH v2 03/19] arm/km: rename CONFIG option CONFIG_KM_DEF_ENV_UPDATE

2012-03-26 Thread Valentin Longchamp
From: Holger Brunck holger.bru...@keymile.com

This config option sounds like the it is responsible for the
update of  the environment, but it is the u-boot update handling.
Therefore we adapt it to a more apropriate naming.

Signed-off-by: Holger Brunck holger.bru...@keymile.com
Signed-off-by: Valentin Longchamp valentin.longch...@keymile.com
cc: Gerlando Falauto gerlando.fala...@keymile.com
cc: Prafulla Wadaskar prafu...@marvell.com
---
 include/configs/km/km_arm.h |4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/include/configs/km/km_arm.h b/include/configs/km/km_arm.h
index c73a10c..e46b510 100644
--- a/include/configs/km/km_arm.h
+++ b/include/configs/km/km_arm.h
@@ -81,7 +81,7 @@
boot=bootm ${load_addr_r} - -\0   \
cramfsloadfdt=true\0  \
u-boot=xstr(CONFIG_HOSTNAME) /u-boot.kwb\0  \
-   CONFIG_KM_DEF_ENV_UPDATE\
+   CONFIG_KM_UPDATE_UBOOT  \

 
 #define CONFIG_SKIP_LOWLEVEL_INIT  /* disable board lowlevel_init */
@@ -235,7 +235,7 @@ int get_scl(void);
orion_nand:   \
-( CONFIG_KM_UBI_PARTITION_NAME )
 
-#defineCONFIG_KM_DEF_ENV_UPDATE
\
+#defineCONFIG_KM_UPDATE_UBOOT  
\
update=   \
spi on;sf probe 0;sf erase 0 5;   \
sf write ${load_addr_r} 0 ${filesize};\
-- 
1.7.1

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[U-Boot] [PATCH v2 02/19] arm/km: add piggy mac adress offset for mgcoge3un

2012-03-26 Thread Valentin Longchamp
From: Holger Brunck holger.bru...@keymile.com

On mgcoge3un the piggy mac adress is at offset 3.

Signed-off-by: Holger Brunck holger.bru...@keymile.com
Signed-off-by: Valentin Longchamp valentin.longch...@keymile.com
cc: Gerlando Falauto gerlando.fala...@keymile.com
cc: Prafulla Wadaskar prafu...@marvell.com
---
 include/configs/mgcoge3un.h |1 +
 1 files changed, 1 insertions(+), 0 deletions(-)

diff --git a/include/configs/mgcoge3un.h b/include/configs/mgcoge3un.h
index 797b0df..156821c 100644
--- a/include/configs/mgcoge3un.h
+++ b/include/configs/mgcoge3un.h
@@ -77,6 +77,7 @@
MVGBE_SET_MII_SPEED_TO_100)
 
 #define CONFIG_KM_BOARD_EXTRA_ENV  waitforne=true\0
+#define CONFIG_PIGGY_MAC_ADRESS_OFFSET  3
 
 /*
  * PCIe port not used on mgcoge3un
-- 
1.7.1

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[U-Boot] [PATCH v2 16/19] arm/km: remove portl2.h and use km_kirkwood instead

2012-03-26 Thread Valentin Longchamp
From: Holger Brunck holger.bru...@keymile.com

The additional headerfile is unneeded here, we can use the generic
km_kirkwood.h instead. And we can use the better config option
KM_PIGGY4_88E6061 for the specific features for boards with this
design in km_arm.c.

Signed-off-by: Holger Brunck holger.bru...@keymile.com
Signed-off-by: Valentin Longchamp valentin.longch...@keymile.com
cc: Gerlando Falauto gerlando.fala...@keymile.com
cc: Prafulla Wadaskar prafu...@marvell.com
---
 board/keymile/km_arm/km_arm.c |2 +-
 boards.cfg|2 +-
 include/configs/km_kirkwood.h |8 
 include/configs/portl2.h  |   85 -
 4 files changed, 10 insertions(+), 87 deletions(-)
 delete mode 100644 include/configs/portl2.h

diff --git a/board/keymile/km_arm/km_arm.c b/board/keymile/km_arm/km_arm.c
index c948b13..4b83439 100644
--- a/board/keymile/km_arm/km_arm.c
+++ b/board/keymile/km_arm/km_arm.c
@@ -333,7 +333,7 @@ void dram_init_banksize(void)
}
 }
 
-#if (defined(CONFIG_KM_MGCOGE3UN)|defined(CONFIG_PORTL2))
+#if (defined(CONFIG_KM_PIGGY4_88E6061))
 
 #definePHY_LED_SEL 0x18
 #define PHY_LED0_LINK  (0x5)
diff --git a/boards.cfg b/boards.cfg
index 867ac1c..3db7b66 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -142,7 +142,7 @@ km_kirkwood_pci  arm arm926ejs   km_arm 
 keymile
 kmnusa   arm arm926ejs   km_arm  
keymilekirkwoodkm_kirkwood:KM_NUSA
 mgcoge3unarm arm926ejs   km_arm  
keymilekirkwoodkm_kirkwood:KM_MGCOGE3UN
 kmcoge5unarm arm926ejs   km_arm  
keymilekirkwoodkm_kirkwood:KMCOGE5UN
-portl2   arm arm926ejs   km_arm  
keymilekirkwood
+portl2   arm arm926ejs   km_arm  
keymilekirkwoodkm_kirkwood:KM_PORTL2
 inetspace_v2 arm arm926ejs   netspace_v2 LaCie 
 kirkwood   lacie_kw:INETSPACE_V2
 net2big_v2   arm arm926ejs   net2big_v2  LaCie 
 kirkwood   lacie_kw:NET2BIG_V2
 netspace_max_v2  arm arm926ejs   netspace_v2 LaCie 
 kirkwood   lacie_kw:NETSPACE_MAX_V2
diff --git a/include/configs/km_kirkwood.h b/include/configs/km_kirkwood.h
index d1f3351..fbe714b 100644
--- a/include/configs/km_kirkwood.h
+++ b/include/configs/km_kirkwood.h
@@ -83,6 +83,14 @@
 #define CONFIG_HOSTNAMEkmcoge5un
 #define CONFIG_KM_DISABLE_PCIE
 #define CONFIG_KM_PIGGY4_88E6352
+
+/* KM_PORTL2 */
+#elif defined(CONFIG_KM_PORTL2)
+#define CONFIG_IDENT_STRING\nKeymile Port-L2
+#define CONFIG_HOSTNAMEportl2
+#define KM_IVM_BUS pca9544a:70:9 /* I2C2 (Mux-Port 1)*/
+#define CONFIG_KM_PIGGY4_88E6061
+
 #else
 #error (Board unsupported)
 #endif
diff --git a/include/configs/portl2.h b/include/configs/portl2.h
deleted file mode 100644
index e436cfe..000
--- a/include/configs/portl2.h
+++ /dev/null
@@ -1,85 +0,0 @@
-/*
- * (C) Copyright 2009
- * Marvell Semiconductor www.marvell.com
- * Prafulla Wadaskar prafu...@marvell.com
- *
- * (C) Copyright 2009
- * Stefan Roese, DENX Software Engineering, s...@denx.de.
- *
- * (C) Copyright 2010-2011
- * Holger Brunck, Keymile GmbH Hannover, holger.bru...@keymile.com.
- * Valentin Longchamp, Keymile AG Bern, valentin.longch...@keymile.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
- * MA 02110-1301 USA
- */
-
-/* for linking errors see
- * http://lists.denx.de/pipermail/u-boot/2009-July/057350.html */
-
-#ifndef _CONFIG_PORTL2_H
-#define _CONFIG_PORTL2_H
-
-/* include common defines/options for all arm based Keymile boards */
-#include km/km_arm.h
-
-/*
- * Version number information
- */
-#define CONFIG_IDENT_STRING\nKeymile Port-L2
-#define CONFIG_HOSTNAMEportl2
-#define CONFIG_PORTL2
-
-#define KM_IVM_BUS pca9544a:70:9 /* I2C2 (Mux-Port 1)*/
-/*
- * Note: This is only valid for HW  P1A if you got an outdated P1A
- *   use KM_ENV_BUS  pca9544a:70:a
- */
-#define 

[U-Boot] [PATCH v2 15/19] arm/km: convert mgcoge3un target to km_kirkwood

2012-03-26 Thread Valentin Longchamp
From: Holger Brunck holger.bru...@keymile.com

Use the generic header km_kirkwood.h and get rid of the
board specific header.

Signed-off-by: Holger Brunck holger.bru...@keymile.com
Signed-off-by: Valentin Longchamp valentin.longch...@keymile.com
cc: Gerlando Falauto gerlando.fala...@keymile.com
cc: Prafulla Wadaskar prafu...@marvell.com
---
 board/keymile/km_arm/km_arm.c |9 ++--
 boards.cfg|2 +-
 include/configs/km_kirkwood.h |   46 +
 include/configs/mgcoge3un.h   |   87 -
 4 files changed, 51 insertions(+), 93 deletions(-)
 delete mode 100644 include/configs/mgcoge3un.h

diff --git a/board/keymile/km_arm/km_arm.c b/board/keymile/km_arm/km_arm.c
index ff57e60..c948b13 100644
--- a/board/keymile/km_arm/km_arm.c
+++ b/board/keymile/km_arm/km_arm.c
@@ -114,7 +114,7 @@ u32 kwmpp_config[] = {
0
 };
 
-#if defined(CONFIG_MGCOGE3UN)
+#if defined(CONFIG_KM_MGCOGE3UN)
 /*
  * Wait for startup OK from mgcoge3ne
  */
@@ -134,8 +134,7 @@ int startup_allowed(void)
 }
 #endif
 
-#if (defined(CONFIG_MGCOGE3UN)|defined(CONFIG_PORTL2)| \
-   defined(CONFIG_KM_PIGGY4_88E6352))
+#if (defined(CONFIG_KM_PIGGY4_88E6061)|defined(CONFIG_KM_PIGGY4_88E6352))
 /*
  * All boards with PIGGY4 connected via a simple switch have ethernet always
  * present.
@@ -203,7 +202,7 @@ int misc_init_r(void)
printf(Overwriting MACH_TYPE with %d!!!\n, mach_type);
gd-bd-bi_arch_number = mach_type;
}
-#if defined(CONFIG_MGCOGE3UN)
+#if defined(CONFIG_KM_MGCOGE3UN)
char *wait_for_ne;
wait_for_ne = getenv(waitforne);
if (wait_for_ne != NULL) {
@@ -334,7 +333,7 @@ void dram_init_banksize(void)
}
 }
 
-#if (defined(CONFIG_MGCOGE3UN)|defined(CONFIG_PORTL2))
+#if (defined(CONFIG_KM_MGCOGE3UN)|defined(CONFIG_PORTL2))
 
 #definePHY_LED_SEL 0x18
 #define PHY_LED0_LINK  (0x5)
diff --git a/boards.cfg b/boards.cfg
index c62be4a..867ac1c 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -140,7 +140,7 @@ dns325   arm arm926ejs   -  
 d-link
 km_kirkwood  arm arm926ejs   km_arm  
keymilekirkwoodkm_kirkwood:KM_KIRKWOOD,KM_DISABLE_PCI
 km_kirkwood_pci  arm arm926ejs   km_arm  
keymilekirkwoodkm_kirkwood:KM_KIRKWOOD_PCI,KM_RECONFIG_XLX
 kmnusa   arm arm926ejs   km_arm  
keymilekirkwoodkm_kirkwood:KM_NUSA
-mgcoge3unarm arm926ejs   km_arm  
keymilekirkwood
+mgcoge3unarm arm926ejs   km_arm  
keymilekirkwoodkm_kirkwood:KM_MGCOGE3UN
 kmcoge5unarm arm926ejs   km_arm  
keymilekirkwoodkm_kirkwood:KMCOGE5UN
 portl2   arm arm926ejs   km_arm  
keymilekirkwood
 inetspace_v2 arm arm926ejs   netspace_v2 LaCie 
 kirkwood   lacie_kw:INETSPACE_V2
diff --git a/include/configs/km_kirkwood.h b/include/configs/km_kirkwood.h
index e6f0e36..d1f3351 100644
--- a/include/configs/km_kirkwood.h
+++ b/include/configs/km_kirkwood.h
@@ -58,6 +58,20 @@
 #define CONFIG_KM_FPGA_CONFIG
 #define CONFIG_KM_PIGGY4_88E6352
 
+/* KM_MGCOGE3UN */
+#elif defined(CONFIG_KM_MGCOGE3UN)
+#define CONFIG_IDENT_STRING\nKeymile COGE3UN
+#define CONFIG_HOSTNAMEmgcoge3un
+#define KM_IVM_BUS pca9547:70:9 /* I2C2 (Mux-Port 1)*/
+#undef CONFIG_SYS_KWD_CONFIG
+#define CONFIG_SYS_KWD_CONFIG \
+   $(SRCTREE)/$(CONFIG_BOARDDIR)/kwbimage-memphis.cfg
+#define CONFIG_KM_BOARD_EXTRA_ENV  waitforne=true\0
+#define CONFIG_PIGGY_MAC_ADRESS_OFFSET  3
+#define CONFIG_KM_DISABLE_PCIE
+#define CONFIG_KM_PIGGY4_88E6061
+
+/* KMCOGE5UN */
 #elif defined(CONFIG_KMCOGE5UN)
 #define CONFIG_IDENT_STRING\nKeymile COGE5UN
 #define KM_IVM_BUS pca9547:70:9  /* I2C2 (Mux-Port 1)*/
@@ -111,7 +125,39 @@
 
 #endif
 
+#ifdef CONFIG_KM_PIGGY4_88E6061
+/*
+ * Some keymile boards like mgcoge3un have their PIGGY4 connected via
+ * an Marvell 88E6061 simple switch.
+ * In this case we have to change the default settings for the
+ * ethernet phy connected to the kirkwood.
+ * In this case 100MB full duplex and autoneg off
+ */
+#define PORT_SERIAL_CONTROL_VALUE  ( \
+   MVGBE_FORCE_LINK_PASS   | \
+   MVGBE_DIS_AUTO_NEG_FOR_DUPLX| \
+   MVGBE_DIS_AUTO_NEG_FOR_FLOW_CTRL| \
+   MVGBE_ADV_NO_FLOW_CTRL  | \
+   MVGBE_FORCE_FC_MODE_NO_PAUSE_DIS_TX | \
+   MVGBE_FORCE_BP_MODE_NO_JAM  | \
+   (1  9) /* Reserved bit has to be 1 */ | \
+   MVGBE_DO_NOT_FORCE_LINK_FAIL| \
+   MVGBE_DIS_AUTO_NEG_SPEED_GMII   | \
+   

[U-Boot] [PATCH v2 10/19] arm/km: implement weak function board_spi_clam_bus/release

2012-03-26 Thread Valentin Longchamp
They are needed on all km_arm boards where we have the environement
variables in the NOR Flash. This is #ifdefed by
CONFIG_KM_ENV_IS_IN_SPI_NOR. First boards using this feature are
the upcoming boards kmcoge5un and kmnusa.

Signed-off-by: Valentin Longchamp valentin.longch...@keymile.com
Signed-off-by: Holger Brunck holger.bru...@keymile.com
cc: Gerlando Falauto gerlando.fala...@keymile.com
cc: Prafulla Wadaskar prafu...@marvell.com
---
 board/keymile/km_arm/km_arm.c |   11 +++
 1 files changed, 11 insertions(+), 0 deletions(-)

diff --git a/board/keymile/km_arm/km_arm.c b/board/keymile/km_arm/km_arm.c
index 2507734..dcecf83 100644
--- a/board/keymile/km_arm/km_arm.c
+++ b/board/keymile/km_arm/km_arm.c
@@ -33,6 +33,7 @@
 #include nand.h
 #include netdev.h
 #include miiphy.h
+#include spi.h
 #include asm/io.h
 #include asm/arch/cpu.h
 #include asm/arch/kirkwood.h
@@ -302,6 +303,16 @@ int km_hw_spi_bus_claim(int on)
return 0;
 }
 
+int board_spi_claim_bus(struct spi_slave *slave)
+{
+   return km_hw_spi_bus_claim(1);
+}
+
+void board_spi_release_bus(struct spi_slave *slave)
+{
+   km_hw_spi_bus_claim(0);
+}
+
 #if defined(CONFIG_CMD_SF)
 int do_spi_toggle(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 {
-- 
1.7.1

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[U-Boot] [PATCH v2 19/19] arm/km: cleanup km_kirkwood boards

2012-03-26 Thread Valentin Longchamp
From: Holger Brunck holger.bru...@keymile.com

Remove config options from boards.cfg and simply add one switch
per board and differ afterwards in km_kirkwood.h between the features.
More boards are upcoming and therefore it's easier to have this
at one place.

Signed-off-by: Holger Brunck holger.bru...@keymile.com
Signed-off-by: Valentin Longchamp valentin.longch...@keymile.com
cc: Gerlando Falauto gerlando.fala...@keymile.com
cc: Prafulla Wadaskar prafu...@marvell.com
---
 boards.cfg|4 ++--
 include/configs/km_kirkwood.h |7 ++-
 2 files changed, 8 insertions(+), 3 deletions(-)

diff --git a/boards.cfg b/boards.cfg
index 367647c..48dbf1c 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -137,8 +137,8 @@ hawkboard_uart   arm arm926ejs   
da8xxevmdavinci
 enbw_cmc arm arm926ejs   enbw_cmcenbw  
 davinci
 calimain arm arm926ejs   calimain
omicrondavinci
 dns325   arm arm926ejs   -   
d-link kirkwood
-km_kirkwood  arm arm926ejs   km_arm  
keymilekirkwoodkm_kirkwood:KM_KIRKWOOD,KM_DISABLE_PCI
-km_kirkwood_pci  arm arm926ejs   km_arm  
keymilekirkwoodkm_kirkwood:KM_KIRKWOOD_PCI,KM_FPGA_CONFIG
+km_kirkwood  arm arm926ejs   km_arm  
keymilekirkwoodkm_kirkwood:KM_KIRKWOOD
+km_kirkwood_pci  arm arm926ejs   km_arm  
keymilekirkwoodkm_kirkwood:KM_KIRKWOOD_PCI
 kmnusa   arm arm926ejs   km_arm  
keymilekirkwoodkm_kirkwood:KM_NUSA
 mgcoge3unarm arm926ejs   km_arm  
keymilekirkwoodkm_kirkwood:KM_MGCOGE3UN
 kmcoge5unarm arm926ejs   km_arm  
keymilekirkwoodkm_kirkwood:KMCOGE5UN
diff --git a/include/configs/km_kirkwood.h b/include/configs/km_kirkwood.h
index 7d38413..549122b 100644
--- a/include/configs/km_kirkwood.h
+++ b/include/configs/km_kirkwood.h
@@ -37,15 +37,20 @@
 #ifndef _CONFIG_KM_KIRKWOOD_H
 #define _CONFIG_KM_KIRKWOOD_H
 
+/* KM_KIRKWOOD */
 #if defined(CONFIG_KM_KIRKWOOD)
 #define CONFIG_IDENT_STRING\nKeymile Kirkwood
 #define CONFIG_HOSTNAMEkm_kirkwood
-#undef  CONFIG_KIRKWOOD_PCIE_INIT
+#define CONFIG_KM_DISABLE_PCIE
 #define KM_IVM_BUS pca9544a:70:9 /* I2C2 (Mux-Port 1)*/
+
+/* KM_KIRKWOOD_PCI */
 #elif defined(CONFIG_KM_KIRKWOOD_PCI)
 #define CONFIG_IDENT_STRING\nKeymile Kirkwood PCI
 #define CONFIG_HOSTNAMEkm_kirkwood_pci
 #define KM_IVM_BUS pca9544a:70:9 /* I2C2 (Mux-Port 1)*/
+#define CONFIG_KM_FPGA_CONFIG
+
 /* KM_NUSA */
 #elif defined(CONFIG_KM_NUSA)
 #define KM_IVM_BUS pca9547:70:9  /* I2C2 (Mux-Port 1)*/
-- 
1.7.1

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[U-Boot] [PATCH v2 17/19] arm/km: correct init of 88e6352 switch in the reset_phy function

2012-03-26 Thread Valentin Longchamp
This is achieved thanks to the support read/write regs for the external
88e6352 switch. The functions for this are added into an own file
managed_switch.c. This is compiled if the define CONFIG_KM_MANAGED_SW_ADDR
was set in the board setup. This define specifies the phy address.

Signed-off-by: Valentin Longchamp valentin.longch...@keymile.com
Signed-off-by: Holger Brunck holger.bru...@keymile.com
cc: Gerlando Falauto gerlando.fala...@keymile.com
cc: Prafulla Wadaskar prafu...@marvell.com
---
 board/keymile/common/common.h |6 +
 board/keymile/km_arm/Makefile |4 +
 board/keymile/km_arm/km_arm.c |   26 +-
 board/keymile/km_arm/managed_switch.c |  166 +
 include/configs/km_kirkwood.h |   13 +++
 5 files changed, 214 insertions(+), 1 deletions(-)
 create mode 100644 board/keymile/km_arm/managed_switch.c

diff --git a/board/keymile/common/common.h b/board/keymile/common/common.h
index 6c1f640..49225b8 100644
--- a/board/keymile/common/common.h
+++ b/board/keymile/common/common.h
@@ -125,6 +125,12 @@ struct bfticu_iomap {
 int ethernet_present(void);
 int ivm_read_eeprom(void);
 
+
+int ext_switch_reg_write(const char *devname, u8 phy_addr, u8 port,
+   u8 reg, u16 data);
+int ext_switch_reg_read(const char *devname, u8 phy_addr, u8 port,
+   u8 reg, u16 *data);
+
 int set_km_env(void);
 int fdt_set_node_and_value(void *blob,
char *nodename,
diff --git a/board/keymile/km_arm/Makefile b/board/keymile/km_arm/Makefile
index aa51255..06079e9 100644
--- a/board/keymile/km_arm/Makefile
+++ b/board/keymile/km_arm/Makefile
@@ -31,6 +31,10 @@ LIB  = $(obj)lib$(BOARD).o
 
 COBJS  := $(BOARD).o ../common/common.o ../common/ivm.o
 
+ifdef CONFIG_KM_MANAGED_SW_ADDR
+COBJS  += managed_switch.o
+endif
+
 SRCS   := $(SOBJS:.o=.S) $(COBJS:.o=.c)
 OBJS   := $(addprefix $(obj),$(COBJS))
 SOBJS  := $(addprefix $(obj),$(SOBJS))
diff --git a/board/keymile/km_arm/km_arm.c b/board/keymile/km_arm/km_arm.c
index 4b83439..f4be40f 100644
--- a/board/keymile/km_arm/km_arm.c
+++ b/board/keymile/km_arm/km_arm.c
@@ -9,6 +9,9 @@
  * (C) Copyright 2010
  * Heiko Schocher, DENX Software Engineering, h...@denx.de.
  *
+ * (C) Copyright 2011, 2012
+ * Valentin Lontgchamp, Keymile AG, valentin.longch...@keymile.com
+ *
  * See file CREDITS for list of people who contributed to this
  * project.
  *
@@ -36,6 +39,7 @@
 #include spi.h
 #include asm/io.h
 #include asm/arch/cpu.h
+#include asm/errno.h
 #include asm/arch/kirkwood.h
 #include asm/arch/mpp.h
 
@@ -367,7 +371,27 @@ void reset_phy(void)
/* reset the phy */
miiphy_reset(name, CONFIG_PHY_BASE_ADR);
 }
-#elif !defined(CONFIG_KM_PIGGY4_88E6352)
+#elif defined(CONFIG_KM_PIGGY4_88E6352)
+
+#if defined(CONFIG_KM_MANAGED_SW_ADDR)
+void reset_phy(void)
+{
+   char *name = egiga0;
+
+   if (miiphy_set_current_dev(name))
+   return;
+
+   /* enable autoneg on port 0 phy */
+   ext_switch_reg_write(name, CONFIG_KM_MANAGED_SW_ADDR, 0, 0, 0x3300);
+
+   /* egress broadcast franes on all macs, with forwarding */
+   ext_switch_reg_write(name, CONFIG_KM_MANAGED_SW_ADDR, 16, 4, 0x000f);
+   ext_switch_reg_write(name, CONFIG_KM_MANAGED_SW_ADDR, 20, 4, 0x000f);
+   ext_switch_reg_write(name, CONFIG_KM_MANAGED_SW_ADDR, 21, 4, 0x000f);
+}
+#endif
+
+#else
 /* Configure and enable MV88E1118 PHY on the piggy*/
 void reset_phy(void)
 {
diff --git a/board/keymile/km_arm/managed_switch.c 
b/board/keymile/km_arm/managed_switch.c
new file mode 100644
index 000..482c18d
--- /dev/null
+++ b/board/keymile/km_arm/managed_switch.c
@@ -0,0 +1,166 @@
+/*
+ * (C) Copyright 2012
+ * Valentin Lontgchamp, Keymile AG, valentin.longch...@keymile.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ */
+
+#include common.h
+#include miiphy.h
+#include asm/errno.h
+
+#define SMI_HDR((0x8 | 0x1)  12)
+#define SMI_BUSY_MASK  (0x8000)
+#define SMIRD_OP   (0x2  10)
+#define SMIWR_OP   (0x1  10)
+#define SMI_MASK   0x1f
+#define PORT_SHIFT 5
+
+#define COMMAND_REG0
+#define DATA_REG   1
+
+static int ext_switch_wait_rdy(const char *devname, u8 phy_addr)
+{
+   u16 

[U-Boot] [PATCH v2 14/19] arm/km: add kmcoge5un board support

2012-03-26 Thread Valentin Longchamp
From: Holger Brunck holger.bru...@keymile.com

For u-boot this board is similar to mgcoge3un. But some differences
are present. We have a different SDRAM on it and therefore a new
SDRAM config file. Additionaly this board has a direct MAC/MAC
connection from the kirkwood to a marvell simple switch without a
phy inbetween, this needs a new configuration for the mvgbe driver.

Signed-off-by: Holger Brunck holger.bru...@keymile.com
Signed-off-by: Valentin Longchamp valentin.longch...@keymile.com
cc: Gerlando Falauto gerlando.fala...@keymile.com
cc: Prafulla Wadaskar prafu...@marvell.com
---
 MAINTAINERS  |1 +
 board/keymile/km_arm/256M8-1.cfg |  292 ++
 boards.cfg   |1 +
 include/configs/km_kirkwood.h|   16 ++-
 4 files changed, 308 insertions(+), 2 deletions(-)
 create mode 100644 board/keymile/km_arm/256M8-1.cfg

diff --git a/MAINTAINERS b/MAINTAINERS
index ddf9613..78a2fe1 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -745,6 +745,7 @@ Valentin Longchamp valentin.longch...@keymile.com
km_kirkwood ARM926EJS (Kirkwood SoC)
kmnusa  ARM926EJS (Kirkwood SoC)
mgcoge3un   ARM926EJS (Kirkwood SoC)
+   kmcoge5un   ARM926EJS (Kirkwood SoC)
portl2  ARM926EJS (Kirkwood SoC)
 
 Nishanth Menon n...@ti.com
diff --git a/board/keymile/km_arm/256M8-1.cfg b/board/keymile/km_arm/256M8-1.cfg
new file mode 100644
index 000..0b19832
--- /dev/null
+++ b/board/keymile/km_arm/256M8-1.cfg
@@ -0,0 +1,292 @@
+#
+# (C) Copyright 2012
+# Stefan Bigler, Keymile AG, stefan.big...@keymile.com
+# Norbert Mayer, Keymile AG, norbert.ma...@keymile.com
+# Deepak Patel, XENTECH Limited, deepak.pa...@xentech.co.uk
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+# MA 02110-1301 USA
+#
+# Refer docs/README.kwimage for more details about how-to configure
+# and create kirkwood boot image
+#
+# This configuration applies to COGE5 design (ARM-part)
+# Two 8-Bit devices are connected on the 16-Bit bus on the same
+# chip-select. The supported devices are
+#   MT47H256M8EB-3IT:C
+#   MT47H256M8EB-25EIT:C
+
+# Boot Media configurations
+BOOT_FROM  spi # Boot from SPI flash
+
+DATA 0xFFD1 0x0111 # MPP Control 0 Register
+# bit 3-0:   2, MPPSel0  SPI_CSn  (1=NF_IO[2])
+# bit 7-4:   2, MPPSel1  SPI_MOSI (1=NF_IO[3])
+# bit 12-8:  2, MPPSel2  SPI_SCK  (1=NF_IO[4])
+# bit 15-12: 2, MPPSel3  SPI_MISO (1=NF_IO[5])
+# bit 19-16: 1, MPPSel4  NF_IO[6]
+# bit 23-20: 1, MPPSel5  NF_IO[7]
+# bit 27-24: 1, MPPSel6  SYSRST_O
+# bit 31-28: 0, MPPSel7  GPO[7]
+
+DATA 0xFFD10004 0x03303300 # MPP Control 1 Register
+# bit 3-0:   0, MPPSel8 GPIO[8] CPU_SDA bitbanged
+# bit 7-4:   0, MPPSel9  GPIO[9] CPU_SCL bitbanged
+# bit 12-8:  3, MPPSel10 UA0_TXD
+# bit 15-12: 3, MPPSel11 UA0_RXD
+# bit 19-16: 0, MPPSel12 not connected
+# bit 23-20: 3, MPPSel13 GPIO[14]
+# bit 27-24: 3, MPPSel14 GPIO[15]
+# bit 31-28: 0, MPPSel15 GPIO[16] BOOT_FL_SEL (SPI-MUX Signal)
+
+DATA 0xFFD10008 0x1100 # MPP Control 2 Register
+# bit 3-0:   0, MPPSel16 GPIO[16]
+# bit 7-4:   0, MPPSel17 not connected
+# bit 11-8:  1, MPPSel18 NF_IO[0]
+# bit 15-12: 1, MPPSel19 NF_IO[1]
+# bit 19-16: 0, MPPSel20 GPIO[20]
+# bit 23-20: 0, MPPSel21 GPIO[21]
+# bit 27-24: 0, MPPSel22 GPIO[22]
+# bit 31-28: 0, MPPSel23 GPIO[23]
+
+# MPP Control 3-6 Register untouched (MPP24-49)
+
+DATA 0xFFD100E0 0x1B1B1B1B # IO Configuration 0 Register
+# bit 2-0:   3, Reserved
+# bit 5-3:   3, Reserved
+# bit 6: 0, Reserved
+# bit 7: 0, RGMII-pads voltage = 3.3V
+# bit 10-8:  3, Reserved
+# bit 13-11: 3, Reserved
+# bit 14:0, Reserved
+# bit 15:0, MPP RGMII-pads voltage = 3.3V
+# bit 31-16  0x1B1B, Reserved
+
+DATA 0xFFD20134 0x # L2 RAM Timing 0 Register
+# bit 0-1:   2, Tag RAM RTC RAM0
+# bit 3-2:   1, Tag RAM WTC RAM0
+# bit 7-4:   6, Reserved
+# bit 9-8:   2, Valid RAM RTC RAM
+# bit 11-10: 1, Valid RAM WTC RAM
+# bit 13-12: 2, Dirty RAM RTC RAM
+# bit 15-14: 1, Dirty RAM WTC RAM
+# bit 17-16: 2, Data RAM RTC RAM0
+# bit 19-18: 1, Data RAM WTC RAM0
+# bit 21-20: 2, Data RAM RTC RAM1
+# bit 23-22: 1, Data RAM WTC RAM1
+# bit 25-24: 2, Data RAM RTC RAM2
+# bit 27-26: 1, Data RAM WTC RAM2

[U-Boot] [PATCH v2 08/19] arm/km: enable mii cmd

2012-03-26 Thread Valentin Longchamp
This is useful to debug the switch initialization

Signed-off-by: Valentin Longchamp valentin.longch...@keymile.com
Signed-off-by: Holger Brunck holger.bru...@keymile.com
cc: Gerlando Falauto gerlando.fala...@keymile.com
cc: Prafulla Wadaskar prafu...@marvell.com
---
 include/configs/km/km_arm.h |1 +
 1 files changed, 1 insertions(+), 0 deletions(-)

diff --git a/include/configs/km/km_arm.h b/include/configs/km/km_arm.h
index 7ef..36eb765 100644
--- a/include/configs/km/km_arm.h
+++ b/include/configs/km/km_arm.h
@@ -159,6 +159,7 @@
  */
 #define CONFIG_NETCONSOLE  /* include NetConsole support   */
 #define CONFIG_MII /* expose smi ove miiphy interface */
+#define CONFIG_CMD_MII /* to debug mdio phy config */
 #define CONFIG_MVGBE   /* Enable Marvell Gbe Controller Driver */
 #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN/* detect link using phy */
 #define CONFIG_MVGBE_PORTS {1, 0}  /* enable port 0 only */
-- 
1.7.1

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[U-Boot] [PATCH v2 12/19] km/arm: remove spi toggle command

2012-03-26 Thread Valentin Longchamp
From: Holger Brunck holger.bru...@keymile.com

Now we toggle between SPI and NAND flash automatically if
we claim the SPI bus. So we can get rid of this command.

Signed-off-by: Holger Brunck holger.bru...@keymile.com
Signed-off-by: Valentin Longchamp valentin.longch...@keymile.com
cc: Gerlando Falauto gerlando.fala...@keymile.com
cc: Prafulla Wadaskar prafu...@marvell.com
---
 board/keymile/km_arm/km_arm.c |   26 --
 include/configs/km/km_arm.h   |5 ++---
 2 files changed, 2 insertions(+), 29 deletions(-)

diff --git a/board/keymile/km_arm/km_arm.c b/board/keymile/km_arm/km_arm.c
index dcecf83..10c9a5f 100644
--- a/board/keymile/km_arm/km_arm.c
+++ b/board/keymile/km_arm/km_arm.c
@@ -313,32 +313,6 @@ void board_spi_release_bus(struct spi_slave *slave)
km_hw_spi_bus_claim(0);
 }
 
-#if defined(CONFIG_CMD_SF)
-int do_spi_toggle(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
-{
-   if (argc  2)
-   return cmd_usage(cmdtp);
-
-   if ((strcmp(argv[1], off) == 0)) {
-   printf(SPI FLASH disabled, NAND enabled\n);
-   km_hw_spi_bus_claim(0);
-   } else if ((strcmp(argv[1], on) == 0)) {
-   printf(SPI FLASH enabled, NAND disabled\n);
-   km_hw_spi_bus_claim(1);
-   } else {
-   return cmd_usage(cmdtp);
-   }
-
-   return 0;
-}
-
-U_BOOT_CMD(
-   spitoggle,  2,  0,  do_spi_toggle,
-   En-/disable SPI FLASH access,
-   on|off - Enable (on) or disable (off) SPI FLASH access\n
-   );
-#endif
-
 int dram_init(void)
 {
/* dram_init must store complete ramsize in gd-ram_size */
diff --git a/include/configs/km/km_arm.h b/include/configs/km/km_arm.h
index e2e8793..edb8f4e 100644
--- a/include/configs/km/km_arm.h
+++ b/include/configs/km/km_arm.h
@@ -237,9 +237,8 @@ int get_scl(void);
 
 #defineCONFIG_KM_UPDATE_UBOOT  
\
update=   \
-   spi on;sf probe 0;sf erase 0 5;   \
-   sf write ${load_addr_r} 0 ${filesize};\
-   spi off\0
+   sf probe 0;sf erase 0 5;  \
+   sf write ${load_addr_r} 0 ${filesize};\0
 
 /*
  * Default environment variables
-- 
1.7.1

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[U-Boot] [PATCH v2 18/19] arm/km: enable BOCO2 FPGA download support

2012-03-26 Thread Valentin Longchamp
This adds a first support of the FPGA download for a PCIe FPGA based
on the BOCO2 CPLD.

This takes place in 3 steps, all done accessing the SPICTRL reg of the
BOCO2:
1) start the FPGA config with an access to the FPGA_PROG bit
2) later in the boot sequence, wait for the FPGA_DONE bit to toggle to 1
   for the end of the FPGA configuration (with a timeout)
3) reset the FPGA
4) finally remove the access to its config EEPROM from the FPGA so that
   the CPU can update the FPGA configuration when the kernel is running

The boards with a PCIe FPGA but without BOCO2 still are supported.

The config option name is CONFIG_KM_FPGA_CONFIG

Signed-off-by: Valentin Longchamp valentin.longch...@keymile.com
Signed-off-by: Holger Brunck holger.bru...@keymile.com
cc: Gerlando Falauto gerlando.fala...@keymile.com
cc: Prafulla Wadaskar prafu...@marvell.com
---
 board/keymile/common/common.h  |6 +
 board/keymile/km_arm/Makefile  |4 +
 board/keymile/km_arm/fpga_config.c |  212 
 board/keymile/km_arm/km_arm.c  |   21 +++-
 boards.cfg |2 +-
 include/configs/km/km_arm.h|3 +
 include/configs/km_kirkwood.h  |8 +-
 7 files changed, 246 insertions(+), 10 deletions(-)
 create mode 100644 board/keymile/km_arm/fpga_config.c

diff --git a/board/keymile/common/common.h b/board/keymile/common/common.h
index 49225b8..c58e565 100644
--- a/board/keymile/common/common.h
+++ b/board/keymile/common/common.h
@@ -131,6 +131,12 @@ int ext_switch_reg_write(const char *devname, u8 phy_addr, 
u8 port,
 int ext_switch_reg_read(const char *devname, u8 phy_addr, u8 port,
u8 reg, u16 *data);
 
+
+int trigger_fpga_config(void);
+int wait_for_fpga_config(void);
+int fpga_reset(void);
+int toggle_eeprom_spi_bus(void);
+
 int set_km_env(void);
 int fdt_set_node_and_value(void *blob,
char *nodename,
diff --git a/board/keymile/km_arm/Makefile b/board/keymile/km_arm/Makefile
index 06079e9..bd824e2 100644
--- a/board/keymile/km_arm/Makefile
+++ b/board/keymile/km_arm/Makefile
@@ -31,6 +31,10 @@ LIB  = $(obj)lib$(BOARD).o
 
 COBJS  := $(BOARD).o ../common/common.o ../common/ivm.o
 
+ifdef CONFIG_KM_FPGA_CONFIG
+COBJS  += fpga_config.o
+endif
+
 ifdef CONFIG_KM_MANAGED_SW_ADDR
 COBJS  += managed_switch.o
 endif
diff --git a/board/keymile/km_arm/fpga_config.c 
b/board/keymile/km_arm/fpga_config.c
new file mode 100644
index 000..4356b9a
--- /dev/null
+++ b/board/keymile/km_arm/fpga_config.c
@@ -0,0 +1,212 @@
+/*
+ * (C) Copyright 2012
+ * Valentin Lontgchamp, Keymile AG, valentin.longch...@keymile.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ */
+
+#include common.h
+#include i2c.h
+#include asm/errno.h
+
+/* GPIO Pin from kirkwood connected to PROGRAM_B pin of the xilinx FPGA */
+#define KM_XLX_PROGRAM_B_PIN39
+
+#define BOCO_ADDR  0x10
+
+#define ID_REG 0x00
+#define BOCO2_ID   0x5b
+
+static int check_boco2(void)
+{
+   int ret;
+   u8 id;
+
+   ret = i2c_read(BOCO_ADDR, ID_REG, 1, id, 1);
+   if (ret) {
+   printf(%s: error reading the BOCO id !!\n, __func__);
+   return ret;
+   }
+
+   return (id == BOCO2_ID);
+}
+
+static int boco_clear_bits(u8 reg, u8 flags)
+{
+   int ret;
+   u8 regval;
+
+   /* give access to the EEPROM from FPGA */
+   ret = i2c_read(BOCO_ADDR, reg, 1, regval, 1);
+   if (ret) {
+   printf(%s: error reading the BOCO @%#x !!\n,
+   __func__, reg);
+   return ret;
+   }
+   regval = ~flags;
+   ret = i2c_write(BOCO_ADDR, reg, 1, regval, 1);
+   if (ret) {
+   printf(%s: error writing the BOCO @%#x !!\n,
+   __func__, reg);
+   return ret;
+   }
+
+   return 0;
+}
+
+static int boco_set_bits(u8 reg, u8 flags)
+{
+   int ret;
+   u8 regval;
+
+   /* give access to the EEPROM from FPGA */
+   ret = i2c_read(BOCO_ADDR, reg, 1, regval, 1);
+   if (ret) {
+   printf(%s: error reading the BOCO @%#x !!\n,
+   __func__, reg);
+   return ret;
+   }
+   regval |= flags;
+

[U-Boot] [PATCH v2 00/19] updates for keymile arm boards

2012-03-26 Thread Valentin Longchamp
This patch series updates keymile boards with Kirkwood CPU and adds
two new boards. This new boards are kmnusa and kmcoge5un. Also the
existing boards with own config files were migrated to the common
header km_kirkwood.h. Some small adaption in generic kirkwood code
was needed due to two new features on the new board. First one is
that the u-boot environment is in the SPI NOR flash and the second one
is the direct MAC/MAC connection from the mvgbe interface to an
simple switch.

Changes for v2:
- removed the two patches spi/kirkwood: add weak functions
board_spi_bus_claim/release and mvgbe: remove warning for
unused methods from the series as they are were independent from
it. The series is however dependent of these two patches.

Holger Brunck (13):
  arm/km: add board type to boards.cfg
  arm/km: add piggy mac adress offset for mgcoge3un
  arm/km: rename CONFIG option CONFIG_KM_DEF_ENV_UPDATE
  arm/km: use ARRAY_SIZE macro
  arm/km: fix wrong comment in SDRAM config for mgcoge3un
  arm/km: change maintainer for mgcoge3un
  arm/km: remove CONFIG_RESET_PHY_R
  km/arm: remove spi toggle command
  arm/km: add kmnusa board support
  arm/km: add kmcoge5un board support
  arm/km: convert mgcoge3un target to km_kirkwood
  arm/km: remove portl2.h and use km_kirkwood instead
  arm/km: cleanup km_kirkwood boards

Valentin Longchamp (6):
  arm/km: enable mii cmd
  arm/km: use correct kw_gpio function for NAND/SPI switching
  arm/km: implement weak function board_spi_clam_bus/release
  arm/kirkwood: protect the ENV_SPI #defines
  arm/km: correct init of 88e6352 switch in the reset_phy function
  arm/km: enable BOCO2 FPGA download support

 MAINTAINERS |4 +-
 arch/arm/include/asm/arch-kirkwood/config.h |   12 +-
 board/keymile/common/common.h   |   12 +
 board/keymile/km_arm/128M16-1.cfg   |  290 ++
 board/keymile/km_arm/256M8-1.cfg|  292 +++
 board/keymile/km_arm/Makefile   |8 +
 board/keymile/km_arm/fpga_config.c  |  212 +++
 board/keymile/km_arm/km_arm.c   |  119 +++-
 board/keymile/km_arm/kwbimage-memphis.cfg   |2 +-
 board/keymile/km_arm/managed_switch.c   |  166 +++
 boards.cfg  |   10 +-
 include/configs/km/km_arm.h |   60 --
 include/configs/km_kirkwood.h   |  157 +--
 include/configs/mgcoge3un.h |   86 
 include/configs/portl2.h|   85 
 15 files changed, 1256 insertions(+), 259 deletions(-)
 create mode 100644 board/keymile/km_arm/128M16-1.cfg
 create mode 100644 board/keymile/km_arm/256M8-1.cfg
 create mode 100644 board/keymile/km_arm/fpga_config.c
 create mode 100644 board/keymile/km_arm/managed_switch.c
 delete mode 100644 include/configs/mgcoge3un.h
 delete mode 100644 include/configs/portl2.h

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[U-Boot] [PATCH v2 09/19] arm/km: use correct kw_gpio function for NAND/SPI switching

2012-03-26 Thread Valentin Longchamp
This used to be done with registers direct access, which is not clear
and optimal.

Signed-off-by: Valentin Longchamp valentin.longch...@keymile.com
Signed-off-by: Holger Brunck holger.bru...@keymile.com
cc: Gerlando Falauto gerlando.fala...@keymile.com
cc: Prafulla Wadaskar prafu...@marvell.com
---
 board/keymile/km_arm/km_arm.c |   55 +
 include/configs/km/km_arm.h   |2 +-
 2 files changed, 29 insertions(+), 28 deletions(-)

diff --git a/board/keymile/km_arm/km_arm.c b/board/keymile/km_arm/km_arm.c
index c6c9a71..2507734 100644
--- a/board/keymile/km_arm/km_arm.c
+++ b/board/keymile/km_arm/km_arm.c
@@ -242,20 +242,15 @@ int misc_init_r(void)
 
 int board_early_init_f(void)
 {
-   u32 tmp;
-
kirkwood_mpp_conf(kwmpp_config);
 
/*
-* The FLASH_GPIO_PIN switches between using a
+* The KM_FLASH_GPIO_PIN switches between using a
 * NAND or a SPI FLASH. Set this pin on start
 * to NAND mode.
 */
-   tmp = readl(KW_GPIO0_BASE);
-   writel(tmp | FLASH_GPIO_PIN , KW_GPIO0_BASE);
-   tmp = readl(KW_GPIO0_BASE + 4);
-   writel(tmp  (~FLASH_GPIO_PIN) , KW_GPIO0_BASE + 4);
-
+   kw_gpio_set_valid(KM_FLASH_GPIO_PIN, 1);
+   kw_gpio_direction_output(KM_FLASH_GPIO_PIN, 1);
 #if defined(CONFIG_SOFT_I2C)
/* init the GPIO for I2C Bitbang driver */
kw_gpio_set_valid(KM_KIRKWOOD_SDA_PIN, 1);
@@ -284,35 +279,41 @@ int board_init(void)
return 0;
 }
 
+int km_hw_spi_bus_claim(int on)
+{
+   int gpio_value = !on;
+
+   if (on) {
+   kwmpp_config[0] = MPP0_SPI_SCn;
+   kwmpp_config[1] = MPP1_SPI_MOSI;
+   kwmpp_config[2] = MPP2_SPI_SCK;
+   kwmpp_config[3] = MPP3_SPI_MISO;
+   } else {
+   kwmpp_config[0] = MPP0_NF_IO2;
+   kwmpp_config[1] = MPP1_NF_IO3;
+   kwmpp_config[2] = MPP2_NF_IO4;
+   kwmpp_config[3] = MPP3_NF_IO5;
+   }
+
+   /* Multi-Purpose Pins Functionality configuration */
+   kirkwood_mpp_conf(kwmpp_config);
+   kw_gpio_set_value(KM_FLASH_GPIO_PIN, gpio_value);
+
+   return 0;
+}
+
 #if defined(CONFIG_CMD_SF)
 int do_spi_toggle(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 {
-   u32 tmp;
if (argc  2)
return cmd_usage(cmdtp);
 
if ((strcmp(argv[1], off) == 0)) {
printf(SPI FLASH disabled, NAND enabled\n);
-   /* Multi-Purpose Pins Functionality configuration */
-   kwmpp_config[0] = MPP0_NF_IO2;
-   kwmpp_config[1] = MPP1_NF_IO3;
-   kwmpp_config[2] = MPP2_NF_IO4;
-   kwmpp_config[3] = MPP3_NF_IO5;
-
-   kirkwood_mpp_conf(kwmpp_config);
-   tmp = readl(KW_GPIO0_BASE);
-   writel(tmp | FLASH_GPIO_PIN , KW_GPIO0_BASE);
+   km_hw_spi_bus_claim(0);
} else if ((strcmp(argv[1], on) == 0)) {
printf(SPI FLASH enabled, NAND disabled\n);
-   /* Multi-Purpose Pins Functionality configuration */
-   kwmpp_config[0] = MPP0_SPI_SCn;
-   kwmpp_config[1] = MPP1_SPI_MOSI;
-   kwmpp_config[2] = MPP2_SPI_SCK;
-   kwmpp_config[3] = MPP3_SPI_MISO;
-
-   kirkwood_mpp_conf(kwmpp_config);
-   tmp = readl(KW_GPIO0_BASE);
-   writel(tmp  (~FLASH_GPIO_PIN) , KW_GPIO0_BASE);
+   km_hw_spi_bus_claim(1);
} else {
return cmd_usage(cmdtp);
}
diff --git a/include/configs/km/km_arm.h b/include/configs/km/km_arm.h
index 36eb765..e2e8793 100644
--- a/include/configs/km/km_arm.h
+++ b/include/configs/km/km_arm.h
@@ -227,7 +227,7 @@ int get_scl(void);
 #define CONFIG_SPI_FLASH
 #define CONFIG_SPI_FLASH_STMICRO
 
-#define FLASH_GPIO_PIN 0x0001
+#define KM_FLASH_GPIO_PIN  16
 
 #define MTDIDS_DEFAULT nand0=orion_nand
 /* test-only: partitioning needs some tuning, this is just for tests */
-- 
1.7.1

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[U-Boot] [PATCH v2 05/19] arm/km: fix wrong comment in SDRAM config for mgcoge3un

2012-03-26 Thread Valentin Longchamp
From: Holger Brunck holger.bru...@keymile.com

Signed-off-by: Holger Brunck holger.bru...@keymile.com
Signed-off-by: Valentin Longchamp valentin.longch...@keymile.com
cc: Gerlando Falauto gerlando.fala...@keymile.com
cc: Prafulla Wadaskar prafu...@marvell.com
---
 board/keymile/km_arm/kwbimage-memphis.cfg |2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/board/keymile/km_arm/kwbimage-memphis.cfg 
b/board/keymile/km_arm/kwbimage-memphis.cfg
index 2faaf2b..6df2ad7 100644
--- a/board/keymile/km_arm/kwbimage-memphis.cfg
+++ b/board/keymile/km_arm/kwbimage-memphis.cfg
@@ -149,7 +149,7 @@ DATA 0xFFD01424 0xF17F  #  DDR Controller Control High
 DATA 0xFFD01428 0x00084520 # DDR2 SDRAM Timing Low
 # bit3-0  : , required
 # bit7-4  : 0010, M_ODT assertion 2 cycles after read
-# bit11-8 : 1001, M_ODT de-assertion 5 cycles after read
+# bit11-8 : 0101, M_ODT de-assertion 5 cycles after read
 # bit15-12: 0100, internal ODT assertion 4 cycles after read
 # bit19-16: 1000, internal ODT de-assertion 8 cycles after read
 # bit31-20: 0   , required
-- 
1.7.1

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[U-Boot] [PATCH v2 04/19] arm/km: use ARRAY_SIZE macro

2012-03-26 Thread Valentin Longchamp
From: Holger Brunck holger.bru...@keymile.com

Signed-off-by: Holger Brunck holger.bru...@keymile.com
Signed-off-by: Valentin Longchamp valentin.longch...@keymile.com
cc: Gerlando Falauto gerlando.fala...@keymile.com
cc: Prafulla Wadaskar prafu...@marvell.com
---
 board/keymile/km_arm/km_arm.c |2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/board/keymile/km_arm/km_arm.c b/board/keymile/km_arm/km_arm.c
index 9e9940c..c6c9a71 100644
--- a/board/keymile/km_arm/km_arm.c
+++ b/board/keymile/km_arm/km_arm.c
@@ -410,7 +410,7 @@ const ulong patterns[]  = { 0x,
0xFF00FF00,
0x0F0F0F0F,
0xF0F0F0F0};
-const ulong NBR_OF_PATTERNS = sizeof(patterns)/sizeof(*patterns);
+const ulong NBR_OF_PATTERNS = ARRAY_SIZE(patterns);
 const ulong OFFS_PATTERN= 3;
 const ulong REPEAT_PATTERN  = 1000;
 
-- 
1.7.1

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Re: [U-Boot] [PATCH 08/25] SPEAr: Add configuration options for spear3xx and spear6xx boards

2012-03-26 Thread Stefan Roese
Hi Amit,

On Monday 26 March 2012 14:10:04 Amit Virdi wrote:
  +++ b/board/spear/spear300/config.mk
  @@ -25,15 +25,4 @@
  
CONFIG_SYS_TEXT_BASE = 0x0070
  
  -ALL-y += $(obj)u-boot.img
  -
  -# Environment variables in NAND
  -ifeq ($(ENV),NAND)
  -PLATFORM_RELFLAGS += -DCONFIG_ENV_IS_IN_NAND
  -else
  -PLATFORM_RELFLAGS += -DCONFIG_ENV_IS_IN_FLASH
  -endif
  -
  -ifeq ($(CONSOLE),USB)
  -PLATFORM_RELFLAGS += -DCONFIG_SPEAR_USBTTY
  -endif
  +ALL += $(obj)u-boot.img
  
  Can't you just remove this config.mk file completely?
  CONFIG_SYS_TEXT_BASE can be moved to the config header instead. What
  else is this file needed for?
 
 Could you please explain which config header you are referring to here?
 Do you mean include/configs/spear. ?

Yes.

 For SPEAr310 and SPEAr320, config.mk is needed to make image (by
 specifying FLASH=PNOR during compile time) that can access CFI compliant
 PNOR flash.

In the example above (spear300), only CONFIG_SYS_TEXT_BASE is left in 
config.mk. This can be moved to the config header (include/configs/spear-xxx-
h).

You should be able to move the other remaining options (PNOR...) to 
boards.cfg. Or is this not possible?

Thanks,
Stefan
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Re: [U-Boot] [PATCH] mmc: fsl_esdhc: Add workaround for auto-clock gate errata ENGcm03648

2012-03-26 Thread Dirk Behme

On 15.03.2012 10:56, Stefano Babic wrote:

On 08/03/2012 13:36, Dirk Behme wrote:

This patch imports three patches from the Freescale U-Boot with the following
commit messages:

ENGR00156405 ESDHC: Add workaround for auto-clock gate errata ENGcm03648
http://git.freescale.com/git/cgit.cgi/imx/uboot-imx.git/commit/drivers/mmc/imx_esdhc.c?h=imx_v2009.08_12.01.01id=e436525a70fe47623d346bc7d9f08f12ff8ad787
The errata, not applicable to USDHC, causes ESDHC to shut off clock to the card
when auto-clock gating is enabled for commands with busy signalling and no data
phase. The card might require the clock to exit the busy state, so the 
workaround
is to disable the auto-clock gate bits in SYSCTL register for such commands. The
workaround also entails polling on DAT0 bit in the PRSSTAT register to learn 
when
busy state is complete. Auto-clock gating is re-enabled at the end of busy 
state.

ENGR00156670-1 ESDHC/USDHC: Remove delay before each cmd and some bug fixes
http://git.freescale.com/git/cgit.cgi/imx/uboot-imx.git/commit/drivers/mmc/imx_esdhc.c?h=imx_v2009.08_12.01.01id=a77c6fec8596891be96b2cdbc742c9824844b92a
Removed delay of 10 ms before each command. There should not be a need to have 
this
delay after the ENGR00156405 patch that polls until card is not busy anymore 
before
proceeding to next cmd.

ENGR00161852: remove u-boot build warnings for mx6q
http://git.freescale.com/git/cgit.cgi/imx/uboot-imx.git/commit/drivers/mmc/imx_esdhc.c?h=imx_v2009.08_12.01.01id=97efee177f82b082db9d2019ed641c5b99b3f54b
Remove u-boot build warnings for mx6q.

SYSCTL_RSTA was defined twice. Remove one definition.

Signed-off-by: Dirk Behme dirk.be...@de.bosch.com
CC: Andy Fleming aflem...@freescale.com
CC: Fabio Estevam fabio.este...@freescale.com
---
 drivers/mmc/fsl_esdhc.c |   61 --


This is not a blocking point for me, but is it maybe better to split
this into three patches as it was originally ? All together makes your
patch not so easy to read.



 include/fsl_esdhc.h |4 ++-
 2 files changed, 56 insertions(+), 9 deletions(-)

diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
index 30db030..694d6fd 100644
--- a/drivers/mmc/fsl_esdhc.c
+++ b/drivers/mmc/fsl_esdhc.c
@@ -259,6 +259,7 @@ esdhc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct 
mmc_data *data)
 {
uintxfertyp;
uintirqstat;
+   uintsysctl_restore = 0;
struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc-priv;
volatile struct fsl_esdhc *regs = (struct fsl_esdhc *)cfg-esdhc_base;
 
@@ -279,13 +280,6 @@ esdhc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)

while (esdhc_read32(regs-prsstat)  PRSSTAT_DLA)
;
 
-	/* Wait at least 8 SD clock cycles before the next command */

-   /*
-* Note: This is way more than 8 cycles, but 1ms seems to
-* resolve timing issues with some cards
-*/
-   udelay(1000);
-


You drop a delay - is it ok for PowerPC, too ? Maybe some PowerPC guys
can answer to this.


There seems to be no comment from the PowerPC guys regarding this, yet. 
For safety, I'll drop this udelay() removal in a v2 of this patch, then.



/* Set up for a data transfer if we have one */
if (data) {
int err;
@@ -298,6 +292,14 @@ esdhc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, 
struct mmc_data *data)
/* Figure out the transfer arguments */
xfertyp = esdhc_xfertyp(cmd, data);
 
+	/* ESDHC errata ENGcm03648: Turn off auto-clock gate for commands

+* with busy signaling and no data
+*/


Wrong multiline comment


+   if (!data  (cmd-resp_type  MMC_RSP_BUSY)) {
+   sysctl_restore = esdhc_read32(regs-sysctl);
+   esdhc_write32(regs-sysctl, sysctl_restore | 0xF);
+   }
+


I see two issue. There is not a SDCLKEN bit in the PowerPC ESDHC, as far
as I can see (for example, in MPC8536). Should we not use the HOSTVER
register to handle these cases ?

The comment says you are disabling auto-clock. However, in the register
you are enabling all clocks (PEREN / SDCLKEN /..). Can you explain
better the reason ? Do you want really disabling clocks ?


Thanks for letting me look more closely on this. The 4 bits which are 
touched with 0xF above seem to be marked as Not implemented in the 
i.MX6 spec. Testing the patch without any touching of sysctl still 
works. I.e. I will remove the sysctl handling from the v2, too.


Many thanks and best regards

Dirk

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Re: [U-Boot] BIOS EMULATOR driver

2012-03-26 Thread Wolfgang Denk
Dear Marek Vasut,

In message 201203261243.19732.ma...@denx.de you wrote:
 
   I pretty sure because I try compile it without this driver and
   everything seems to be ok.
  
  In the given configurations, the BIOS code only gets built when you
  the ATI Radeon support is enabled, in which case it is needed.
  
  If you don't enable either, then it's fine as well - but then the BIOS
  code does not get built anyway.
 
 But we probably want this driver to work, so ...

I'm not sure what your comment means.

If you want to use this driver, then enable it in the configuration;
this will mean the BIOS emulator also gets built and linked, and it
will be needed to initialize the card's BIOS.

Everything is fine.  No problems anywhere.


What exactly was your concern?

Best regards,

Wolfgang Denk

-- 
DENX Software Engineering GmbH, MD: Wolfgang Denk  Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
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very funny - Did you ever try buying them without money? - Ogden Nash
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Re: [U-Boot] [PATCH V4 1/2] ext4fs ls load support

2012-03-26 Thread Rob Herring
On 03/26/2012 02:24 AM, UMA SHANKAR wrote:
 Dear Rob Herring, Thanks for evaluating and testing our code. 
 Currently, Our ext4 implementation is capable of listing and reading
 (ls and load) ext2 partitions as well. But, we wanted the ext4 code
 to be separate from ext2 implementation.

Why?

 Your comment: --- Using ext2 commands on an ext4 partition will hang
 now.
 
 ext2load command will only read ext2 partitions, and will definitely
 not work on ext4 (even without our implementation).

I'm not saying it should work, but it shouldn't hang. IIRC without your
patch, it would return with an error. So you have changed something in
the core ext2 code that makes it hang. But it's not something I think
you need to worry about as the ext4 version of code should just replace
the ext2 version and the issue will go away.

Rob

   So, I propose, we can let both these implementations be there in
 uboot under different CONFIG Options (as is the case currently).   
 Thanks  Regards, Uma Shankar
 
 --- Original Message --- Sender : Rob
 Herringrobherri...@gmail.com Date : Mar 22, 2012 21:19 (GMT+05:30) 
 Title : Re: [U-Boot] [PATCH V4 1/2] ext4fs ls load support
 
 On 01/09/2012 11:54 AM, uma.shan...@samsung.com wrote:
 From: uma.shankar
 
 Signed-off-by: Uma Shankar Signed-off-by: Manjunatha C Achar 
 Signed-off-by: Iqbal Shareef Signed-off-by: Hakgoo Lee --- Changes
 for v3: - Copyright has been updated in respective files - ext4fs
 has been made independant of ext2fs.c - Fixed API namespace -
 Removed endianness conversion API, used uboot defined API for the
 same - Fixed coding style issues - Moved README.ext4 file into doc
 folder
 
 Changes for v2: - Code cleanup, changed comment style - camel case
 removed, resolved code alignment issues - memory allocation logic
 changed, removed busybox logic - Modified ext4 load to remove grub
 dependency (GPLv3) - Introduced new Config for ext4 write
 
 Changes for v1: - Removed checkpatch warnings and errors - Moved
 common API's of ext2 and ext4 to one generic header file
 
 Makefile  |2 +- common/Makefile   |1 + 
 common/cmd_ext4.c |  266 +++
 
 I don't think we need yet another version of filesystem commands
 that just duplicates the same code.
 
 I tested this patch and can read ext2 partitions with the
 ext4ls/load commands. Using ext2 commands on an ext4 partition will
 hang now. You should merge your ext4 command changes into the
 existing ext2 commands so that commands work on either ext2/3 or ext4
 partitions.
 
 Really, I would like to see all the block based device and file
 commands collapsed down into just fsls and fsload commands and then
 detect (or specify if necessary) the fs type. But that's a bigger
 problem.
 
 Rob
 
 fs/Makefile   |1 + fs/ext2/dev.c |1 + 
 fs/ext2/ext2fs.c  |  181 ++- fs/ext4/Makefile  |
 51 +++ fs/ext4/dev.c |  145  fs/ext4/ext4_common.c
 |  875 + 
 fs/ext4/ext4_common.h |   63  fs/ext4/ext4fs.c  |  228
 + include/ext4fs.h  |  132  
 include/ext_common.h  |  188 +++ 13 files changed, 1977
 insertions(+), 157 deletions(-) create mode 100644
 common/cmd_ext4.c create mode 100644 fs/ext4/Makefile create mode
 100644 fs/ext4/dev.c create mode 100644 fs/ext4/ext4_common.c 
 create mode 100644 fs/ext4/ext4_common.h create mode 100644
 fs/ext4/ext4fs.c create mode 100644 include/ext4fs.h create mode
 100644 include/ext_common.h
 
 diff --git a/Makefile b/Makefile index 7e9491d..e77f6be 100644 ---
 a/Makefile +++ b/Makefile @@ -235,7 +235,7 @@ LIBS += dts/libdts.o 
 endif LIBS += arch/$(ARCH)/lib/lib$(ARCH).o LIBS +=
 fs/cramfs/libcramfs.o fs/fat/libfat.o fs/fdos/libfdos.o
 fs/jffs2/libjffs2.o \ - fs/reiserfs/libreiserfs.o
 fs/ext2/libext2fs.o fs/yaffs2/libyaffs2.o \ +
 fs/reiserfs/libreiserfs.o fs/ext2/libext2fs.o fs/ext4/libext4fs.o
 fs/yaffs2/libyaffs2.o \ fs/ubifs/libubifs.o LIBS += net/libnet.o 
 LIBS += disk/libdisk.o diff --git a/common/Makefile
 b/common/Makefile index 2d9ae8c..f5243f6 100644 ---
 a/common/Makefile +++ b/common/Makefile @@ -86,6 +86,7 @@
 COBJS-$(CONFIG_ENV_IS_IN_EEPROM) += cmd_eeprom.o 
 COBJS-$(CONFIG_CMD_EEPROM) += cmd_eeprom.o COBJS-$(CONFIG_CMD_ELF)
 += cmd_elf.o COBJS-$(CONFIG_SYS_HUSH_PARSER) += cmd_exit.o 
 +COBJS-$(CONFIG_CMD_EXT4) += cmd_ext4.o COBJS-$(CONFIG_CMD_EXT2) +=
 cmd_ext2.o COBJS-$(CONFIG_CMD_FAT) += cmd_fat.o 
 COBJS-$(CONFIG_CMD_FDC)$(CONFIG_CMD_FDOS) += cmd_fdc.o diff --git
 a/common/cmd_ext4.c b/common/cmd_ext4.c new file mode 100644 index
 000..2c53d2c --- /dev/null +++ b/common/cmd_ext4.c @@ -0,0
 +1,266 @@ +/* + * (C) Copyright 2011 - 2012 Samsung Electronics + *
 EXT4 filesystem implementation in Uboot by + * Uma Shankar + *
 Manjunatha C Achar + * + * Ext4fs support + * made from existing
 cmd_ext2.c file of Uboot + * + * (C) Copyright 2004 + * esd gmbh +
 * Reinhard Arlt + * + * made from 

[U-Boot] [PATCH v2] mmc: fsl_esdhc: Poll until card is not busy anymore

2012-03-26 Thread Dirk Behme
This patch imports parts of two patches from the Freescale U-Boot with the 
following
commit messages:

ENGR00156405 ESDHC: Add workaround for auto-clock gate errata ENGcm03648
http://git.freescale.com/git/cgit.cgi/imx/uboot-imx.git/commit/drivers/mmc/imx_esdhc.c?h=imx_v2009.08_12.01.01id=e436525a70fe47623d346bc7d9f08f12ff8ad787
The errata, not applicable to USDHC, causes ESDHC to shut off clock to the card
when auto-clock gating is enabled for commands with busy signalling and no data
phase. The card might require the clock to exit the busy state, so the 
workaround
is to disable the auto-clock gate bits in SYSCTL register for such commands. The
workaround also entails polling on DAT0 bit in the PRSSTAT register to learn 
when
busy state is complete. Auto-clock gating is re-enabled at the end of busy 
state.

ENGR00156670-1 ESDHC/USDHC: Remove delay before each cmd and some bug fixes
http://git.freescale.com/git/cgit.cgi/imx/uboot-imx.git/commit/drivers/mmc/imx_esdhc.c?h=imx_v2009.08_12.01.01id=a77c6fec8596891be96b2cdbc742c9824844b92a
Removed delay of 10 ms before each command. There should not be a need to have 
this
delay after the ENGR00156405 patch that polls until card is not busy anymore 
before
proceeding to next cmd.

This patch imports the polling part of both patches. The auto-clock gating code
don't apply for i.MX6 as implemented in these two patches. 

SYSCTL_RSTA was defined twice. Remove one definition.

Signed-off-by: Dirk Behme dirk.be...@de.bosch.com
CC: Andy Fleming aflem...@freescale.com
CC: Fabio Estevam fabio.este...@freescale.com
CC: Stefano Babic sba...@denx.de
---
Changes in v2:

* Drop the removal of the udelay(). It's not sure if the PowerPC would be
  ok with this removal.
* Drop touching the sysctl register. Reviewing the iMX6 spec shows that this
  was an NOP.

 drivers/mmc/fsl_esdhc.c |   39 ++-
 include/fsl_esdhc.h |4 +++-
 2 files changed, 41 insertions(+), 2 deletions(-)

Index: freescale-u-boot-imx.git/drivers/mmc/fsl_esdhc.c
===
--- freescale-u-boot-imx.git.orig/drivers/mmc/fsl_esdhc.c
+++ freescale-u-boot-imx.git/drivers/mmc/fsl_esdhc.c
@@ -307,19 +307,56 @@ esdhc_send_cmd(struct mmc *mmc, struct m
 #else
esdhc_write32(regs-xfertyp, xfertyp);
 #endif
+
+   /* Mask all irqs */
+   esdhc_write32(regs-irqsigen, 0);
+
/* Wait for the command to complete */
-   while (!(esdhc_read32(regs-irqstat)  IRQSTAT_CC))
+   while (!(esdhc_read32(regs-irqstat)  (IRQSTAT_CC | IRQSTAT_CTOE)))
;
 
irqstat = esdhc_read32(regs-irqstat);
esdhc_write32(regs-irqstat, irqstat);
 
+   /* Reset CMD and DATA portions on error */
+   if (irqstat  (CMD_ERR | IRQSTAT_CTOE)) {
+   esdhc_write32(regs-sysctl, esdhc_read32(regs-sysctl) |
+ SYSCTL_RSTC);
+   while (esdhc_read32(regs-sysctl)  SYSCTL_RSTC)
+   ;
+
+   if (data) {
+   esdhc_write32(regs-sysctl,
+ esdhc_read32(regs-sysctl) |
+ SYSCTL_RSTD);
+   while ((esdhc_read32(regs-sysctl)  SYSCTL_RSTD))
+   ;
+   }
+   }
+
if (irqstat  CMD_ERR)
return COMM_ERR;
 
if (irqstat  IRQSTAT_CTOE)
return TIMEOUT;
 
+   /* Workaround for ESDHC errata ENGcm03648 */
+   if (!data  (cmd-resp_type  MMC_RSP_BUSY)) {
+   int timeout = 2500;
+
+   /* Poll on DATA0 line for cmd with busy signal for 250 ms */
+   while (timeout  0  !(esdhc_read32(regs-prsstat) 
+   PRSSTAT_DAT0)) {
+   udelay(100);
+   timeout--;
+   }
+
+   if (timeout = 0) {
+   printf(Timeout waiting for DAT0 to go high!\n);
+   return TIMEOUT;
+   }
+   }
+
/* Copy the response to the response buffer */
if (cmd-resp_type  MMC_RSP_136) {
u32 cmdrsp3, cmdrsp2, cmdrsp1, cmdrsp0;
Index: freescale-u-boot-imx.git/include/fsl_esdhc.h
===
--- freescale-u-boot-imx.git.orig/include/fsl_esdhc.h
+++ freescale-u-boot-imx.git/include/fsl_esdhc.h
@@ -34,12 +34,13 @@
 #define SYSCTL_INITA   0x0800
 #define SYSCTL_TIMEOUT_MASK0x000f
 #define SYSCTL_CLOCK_MASK  0xfff0
-#define SYSCTL_RSTA0x0100
 #define SYSCTL_CKEN0x0008
 #define SYSCTL_PEREN   0x0004
 #define SYSCTL_HCKEN   0x0002
 #define SYSCTL_IPGEN   0x0001
 #define SYSCTL_RSTA0x0100
+#define SYSCTL_RSTC0x0200
+#define SYSCTL_RSTD0x0400
 
 #define IRQSTAT  

Re: [U-Boot] [PATCH 03/25] SPEAr: Place ethaddr write and read within CONFIG_CMD_NET

2012-03-26 Thread Wolfgang Denk
Dear Amit Virdi,

In message 4f7051af.9080...@st.com you wrote:
 
 Generally MAC addresses are stored in EEPROMs due to two reasons:
 1. Special set of command sequences are required to erase data from an 
 EEPROM
 2. EEPROMs are cheaper

Hm... With U-Boot, an EEPROM is just an additional wart, which costs
_extra_ money.

Best regards,

Wolfgang Denk

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No, I wouldn't say so; it is not that well organised...
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Re: [U-Boot] [PATCH] ARM: Exynos4: ADC: Universal_C210: Enable LDO4 power line for ADC measurement

2012-03-26 Thread Lukasz Majewski
Hi Minkyu,

 This patch enables LDO4 power line for preparing proper voltages to be
 measured by ADC converter.
 This measurement is used for determination of target board HW
 revision.
 
 Test HW:
 Universal_C210 (Exynos4210) rev. 0.0
 
 Signed-off-by: Lukasz Majewski l.majew...@samsung.com
 Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
 Cc: Minkyu Kang mk7.k...@samsung.com
 ---

Any opinion/comment about this patch?

-- 
Best regards,

Lukasz Majewski

Samsung Poland RD Center
Platform Group
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Re: [U-Boot] [PATCH] mmc:fix: Set mmc width according to MMC host capabilities

2012-03-26 Thread Lukasz Majewski
Hi Andy,

 This patch sets the MMC width according to the MMC host capabilities.
 It turned out, that there are some targets (e.g. GONI), which are able
 to read data from SPI only at 4 bit mode.
 This patch restricts the width number according to the MMC host.
 
 Signed-off-by: Lukasz Majewski l.majew...@samsung.com
 Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
 Cc: Andy Fleming aflem...@gmail.com
 ---
  drivers/mmc/mmc.c |4 +++-
  include/mmc.h |3 +++
  2 files changed, 6 insertions(+), 1 deletions(-)
 
 diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
 index 49c3349..51c0106 100644
 --- a/drivers/mmc/mmc.c
 +++ b/drivers/mmc/mmc.c
 @@ -1103,7 +1103,9 @@ int mmc_startup(struct mmc *mmc)
   else
   mmc_set_clock(mmc, 2500);
   } else {
 - for (width = EXT_CSD_BUS_WIDTH_8; width = 0;
 width--) {
 + width = ((mmc-host_caps  MMC_MODE_MASK_WIDTH_BITS)
 
 +  MMC_MODE_WIDTH_BITS_SHIFT);
 + for (; width = 0; width--) {
   /* Set the card to use 4 bit*/
   err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
   EXT_CSD_BUS_WIDTH, width);
 diff --git a/include/mmc.h b/include/mmc.h
 index 30c2375..ff2f28e 100644
 --- a/include/mmc.h
 +++ b/include/mmc.h
 @@ -47,6 +47,9 @@
  #define MMC_MODE_SPI 0x400
  #define MMC_MODE_HC  0x800
  
 +#define MMC_MODE_MASK_WIDTH_BITS (MMC_MODE_4BIT | MMC_MODE_8BIT)
 +#define MMC_MODE_WIDTH_BITS_SHIFT 8
 +
  #define SD_DATA_4BIT 0x0004
  
  #define IS_SD(x) (x-version  SD_VERSION_SD)

Do you have any opinions/comments about this patch?
It has already spent some time on the mainling list and nobody
complaint :-)

-- 
Best regards,

Lukasz Majewski

Samsung Poland RD Center
Platform Group
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Re: [U-Boot] [PATCH v5] kirkwood: add NAS62x0 board support

2012-03-26 Thread Jason Cooper
On Sun, Mar 25, 2012 at 09:31:43PM +0200, Luka Perkov wrote:
 Add support for new boards RaidSonic ICY BOX NAS6210 and NAS6220.
 
 Only difference between boards is number of SATA ports.
 
 More information about the boards can be found here:
 
 http://www.raidsonic.de/en/products/nas-systems.php?we_objectID=7036
 http://www.raidsonic.de/en/products/nas-systems.php?we_objectID=7515

Luka,

Sorry I didn't see this before now.  You may want to have a look at the
patch series going into v3.4 here [1].  Basically, All of mine and
Andrew Lunn's.

If you base your kernel patches off of this, CC: me and I'll pull them
in.

...
 diff --git a/include/configs/ib62x0.h b/include/configs/ib62x0.h
 new file mode 100644
 index 000..2dc698e
 --- /dev/null
 +++ b/include/configs/ib62x0.h
 @@ -0,0 +1,172 @@
 +/*
 + * Copyright (C) 2011-2012
 + * Gerald Kerma drea...@doukki.net
 + * Luka Perkov ub...@lukaperkov.net
 + *
 + * See file CREDITS for list of people who contributed to this
 + * project.
 + *
 + * This program is free software; you can redistribute it and/or
 + * modify it under the terms of the GNU General Public License as
 + * published by the Free Software Foundation; either version 2 of
 + * the License, or (at your option) any later version.
 + *
 + * This program is distributed in the hope that it will be useful,
 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
 + * GNU General Public License for more details.
 + *
 + * You should have received a copy of the GNU General Public License
 + * along with this program. If not, see http://www.gnu.org/licenses/.
 + */
 +
 +#ifndef _CONFIG_IB62x0_H
 +#define _CONFIG_IB62x0_H
 +
 +/*
 + * Version number information
 + */
 +#if defined(CONFIG_BOARD_IS_IB_NAS6210)
 +# define CONFIG_IDENT_STRING  RaidSonic ICY BOX IB-NAS6210
 +#elif defined(CONFIG_BOARD_IS_IB_NAS6220)
 +# define CONFIG_IDENT_STRING  RaidSonic ICY BOX IB-NAS6220
 +#else
 +# error Unknown RaidSonic ICY BOX board specified
 +#endif
 +
 +/*
 + * High level configuration options
 + */
 +#define CONFIG_FEROCEON_88FR131  /* CPU Core subversion */
 +#define CONFIG_KIRKWOOD  /* SOC Family Name */
 +#define CONFIG_KW88F6281 /* SOC Name */
 +#define CONFIG_SKIP_LOWLEVEL_INIT/* disable board lowlevel_init */
 +
 +/*
 + * Machine type
 + */
 +#define CONFIG_MACH_TYPE MACH_TYPE_NAS6210


#define CONFIG_OF_LIBFDT

If you add this here, the mach-type won't be needed once you add a
devicetree file to Linux.  It shouldn't be too hard to follow what we
have going on for dreamplug and Buffalo DNS-xxx (patches are still wip
for Buffalo stuff).

hth,

Jason.

[1] git://git.infradead.org/users/jcooper/linux-kirkwood.git 
kirkwood_dt_for_3.4_v3
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Re: [U-Boot] BIOS EMULATOR driver

2012-03-26 Thread Marek Vasut
Dear Wolfgang Denk,

 Dear Marek Vasut,
 
 In message 201203261243.19732.ma...@denx.de you wrote:
I pretty sure because I try compile it without this driver and
everything seems to be ok.
   
   In the given configurations, the BIOS code only gets built when you
   the ATI Radeon support is enabled, in which case it is needed.
   
   If you don't enable either, then it's fine as well - but then the BIOS
   code does not get built anyway.
  
  But we probably want this driver to work, so ...
 
 I'm not sure what your comment means.
 
 If you want to use this driver, then enable it in the configuration;
 this will mean the BIOS emulator also gets built and linked, and it
 will be needed to initialize the card's BIOS.
 
 Everything is fine.  No problems anywhere.

Right. My concern was about:

I pretty sure because I try compile it without this driver and everything 
seems 
to be ok.

So that means the board work without this bios emulator driver if the radeon 
driver is disabled? But we want to use the radeon driver, so we need the bios 
emulator stuff.

I think the discussion quite drifted away from the original question, which was 
if the dead code in bios emulator stuff can be simply removed? ... and if it 
really is dead code.

 
 
 What exactly was your concern?
 
 Best regards,
 
 Wolfgang Denk

Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH 2/2] i.MX6: mx6q_sabrelite: add SATA bindings

2012-03-26 Thread Eric Nelson

On 03/26/2012 01:35 AM, Stefano Babic wrote:

On 26/03/2012 01:00, Eric Nelson wrote:

V2 has been stripped of the board-independent changes and
uses clrsetbits_le32() instead of twiddling bits by hand.

Signed-off-by: Eric Nelsoneric.nel...@boundarydevices.com
---


Hi Eric,


  board/freescale/mx6qsabrelite/mx6qsabrelite.c |   32 +
  include/configs/mx6qsabrelite.h   |   13 ++
  2 files changed, 45 insertions(+), 0 deletions(-)

diff --git a/board/freescale/mx6qsabrelite/mx6qsabrelite.c 
b/board/freescale/mx6qsabrelite/mx6qsabrelite.c
index 1d09a72..afb1245 100644
--- a/board/freescale/mx6qsabrelite/mx6qsabrelite.c
+++ b/board/freescale/mx6qsabrelite/mx6qsabrelite.c
@@ -25,6 +25,8 @@
  #includeasm/arch/imx-regs.h
  #includeasm/arch/mx6x_pins.h
  #includeasm/arch/iomux-v3.h
+#includeasm/arch/ccm_regs.h
+#includeasm/arch/clock.h
  #includeasm/errno.h
  #includeasm/gpio.h
  #includemmc.h
@@ -267,6 +269,32 @@ int board_eth_init(bd_t *bis)
return 0;
  }

+#ifdef CONFIG_CMD_SATA
+
+int setup_sata(void)
+{
+   int rval = enable_sata_clock();


What about to return at this point if there is an error ?



I'm not sure I understand. Do you mean re-structure the code with
two returns like this?

diff --git a/board/freescale/mx6qsabrelite/mx6qsabrelite.c 
b/board/freescale/mx6qsabrelite/mx6qsabrelite.c

index afb1245..0d625af 100644
--- a/board/freescale/mx6qsabrelite/mx6qsabrelite.c
+++ b/board/freescale/mx6qsabrelite/mx6qsabrelite.c
@@ -273,23 +273,23 @@ int board_eth_init(bd_t *bis)

 int setup_sata(void)
 {
+   struct iomuxc_base_regs *const iomuxc_regs
+   = (struct iomuxc_base_regs *) IOMUXC_BASE_ADDR;
int rval = enable_sata_clock();
-   if (rval == 0) {
-   struct iomuxc_base_regs *const iomuxc_regs
-   = (struct iomuxc_base_regs *) IOMUXC_BASE_ADDR;
-   clrsetbits_le32(iomuxc_regs-gpr[13],
-   IOMUXC_GPR13_SATA_MASK,
-   IOMUXC_GPR13_SATA_PHY_8_RXEQ_3P0DB
-   |IOMUXC_GPR13_SATA_PHY_7_SATA2M
-   |IOMUXC_GPR13_SATA_SPEED_3G
-   |(3IOMUXC_GPR13_SATA_PHY_6_SHIFT)
-   |IOMUXC_GPR13_SATA_SATA_PHY_5_SS_DISABLED
-   |IOMUXC_GPR13_SATA_SATA_PHY_4_ATTEN_9_16
-   |IOMUXC_GPR13_SATA_PHY_3_TXBOOST_0P00_DB
-   |IOMUXC_GPR13_SATA_PHY_2_TX_1P104V
-   |IOMUXC_GPR13_SATA_PHY_1_SLOW);
-   rval = 0;
-   }
+   if (rval)
+   return rval ;
+
+   clrsetbits_le32(iomuxc_regs-gpr[13],
+   IOMUXC_GPR13_SATA_MASK,
+   IOMUXC_GPR13_SATA_PHY_8_RXEQ_3P0DB
+   |IOMUXC_GPR13_SATA_PHY_7_SATA2M
+   |IOMUXC_GPR13_SATA_SPEED_3G
+   |(3IOMUXC_GPR13_SATA_PHY_6_SHIFT)
+   |IOMUXC_GPR13_SATA_SATA_PHY_5_SS_DISABLED
+   |IOMUXC_GPR13_SATA_SATA_PHY_4_ATTEN_9_16
+   |IOMUXC_GPR13_SATA_PHY_3_TXBOOST_0P00_DB
+   |IOMUXC_GPR13_SATA_PHY_2_TX_1P104V
+   |IOMUXC_GPR13_SATA_PHY_1_SLOW);

return rval;
 }

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Re: [U-Boot] [PATCH 2/2] i.MX6: mx6q_sabrelite: add SATA bindings

2012-03-26 Thread Stefano Babic
On 26/03/2012 15:35, Eric Nelson wrote:
 On 03/26/2012 01:35 AM, Stefano Babic wrote:
 On 26/03/2012 01:00, Eric Nelson wrote:
 V2 has been stripped of the board-independent changes and
 uses clrsetbits_le32() instead of twiddling bits by hand.

 Signed-off-by: Eric Nelsoneric.nel...@boundarydevices.com
 ---

 Hi Eric,

   board/freescale/mx6qsabrelite/mx6qsabrelite.c |   32
 +
   include/configs/mx6qsabrelite.h   |   13 ++
   2 files changed, 45 insertions(+), 0 deletions(-)

 diff --git a/board/freescale/mx6qsabrelite/mx6qsabrelite.c
 b/board/freescale/mx6qsabrelite/mx6qsabrelite.c
 index 1d09a72..afb1245 100644
 --- a/board/freescale/mx6qsabrelite/mx6qsabrelite.c
 +++ b/board/freescale/mx6qsabrelite/mx6qsabrelite.c
 @@ -25,6 +25,8 @@
   #includeasm/arch/imx-regs.h
   #includeasm/arch/mx6x_pins.h
   #includeasm/arch/iomux-v3.h
 +#includeasm/arch/ccm_regs.h
 +#includeasm/arch/clock.h
   #includeasm/errno.h
   #includeasm/gpio.h
   #includemmc.h
 @@ -267,6 +269,32 @@ int board_eth_init(bd_t *bis)
   return 0;
   }

 +#ifdef CONFIG_CMD_SATA
 +
 +int setup_sata(void)
 +{
 +int rval = enable_sata_clock();

 What about to return at this point if there is an error ?

 
 I'm not sure I understand. Do you mean re-structure the code with
 two returns like this?


No, much easier - I find the code is easy to understand if it looks like
if the function returns immediately in case of error.

if (do_something())
return ERROR;

 code when no error happens

Your  enable_sata_clock() return only -1 in case of error. You could
easy write:

if (enable_sata_clock())
return -1 (or better a value in errno.h)
struct iomuxc_base_regs *const iomuxc_regs
   = (struct iomuxc_base_regs *) IOMUXC_BASE_ADDR;
clrsetbits_le32(iomuxc_regs-gpr[13],
   IOMUXC_GPR13_SATA_MASK,
   IOMUXC_GPR13_SATA_PHY_8_RXEQ_3P0DB
   |IOMUXC_GPR13_SATA_PHY_7_SATA2M
   |IOMUXC_GPR13_SATA_SPEED_3G
   |(3IOMUXC_GPR13_SATA_PHY_6_SHIFT)
   |IOMUXC_GPR13_SATA_SATA_PHY_5_SS_DISABLED
   |IOMUXC_GPR13_SATA_SATA_PHY_4_ATTEN_9_16
   |IOMUXC_GPR13_SATA_PHY_3_TXBOOST_0P00_DB
   |IOMUXC_GPR13_SATA_PHY_2_TX_1P104V
   |IOMUXC_GPR13_SATA_PHY_1_SLOW);

return 0;   


Best regards,
Stefano Babic

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Re: [U-Boot] BIOS EMULATOR driver

2012-03-26 Thread Viktor Křivák
Dear Marek and Wolfgang,

2012/3/26 Wolfgang Denk w...@denx.de:
 Dear Marek Vasut,

 In message 201203261243.19732.ma...@denx.de you wrote:

   I pretty sure because I try compile it without this driver and
   everything seems to be ok.
 
  In the given configurations, the BIOS code only gets built when you
  the ATI Radeon support is enabled, in which case it is needed.
 
  If you don't enable either, then it's fine as well - but then the BIOS
  code does not get built anyway.

 But we probably want this driver to work, so ...

 I'm not sure what your comment means.

 If you want to use this driver, then enable it in the configuration;
 this will mean the BIOS emulator also gets built and linked, and it
 will be needed to initialize the card's BIOS.

 Everything is fine.  No problems anywhere.


 What exactly was your concern?


I think here may be a little misunderstanding. I don't want to remove
whole driver. I only want to remove support of bios emulator form that
2 board because I think they don't use it. I try compile it without
this driver and everything seems to be ok.

Best regards,

Viktor Krivak
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Re: [U-Boot] BIOS EMULATOR driver

2012-03-26 Thread Anatolij Gustschin
Hi Viktor,

On Mon, 26 Mar 2012 15:47:57 +0200
Viktor Křivák viktor.kri...@gmail.com wrote:
...
  What exactly was your concern?
 
 
 I think here may be a little misunderstanding. I don't want to remove
 whole driver. I only want to remove support of bios emulator form that
 2 board because I think they don't use it. I try compile it without
 this driver and everything seems to be ok.

BIOS emulator support is conditionally enabled on these boards,
currently in mainline U-Boot it is deactivated as default. But at least
on sequoia I used to activate it from time to time to test changes
which may affect ATI video support. So please don't remove this
optional BIOS emulator support. If you do not need it, just do not
enable it in your board config file.

Thanks,
Anatolij
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[U-Boot] [PATCH] powerpc/85xx: Add USB device-tree fixup for various platforms

2012-03-26 Thread Ramneek Mehresh
Add USB device-tree fixup for following platforms:
MPC8536DS, P1022DS, P1023RDS, P2020COME, P2020DS, P2041RDB, P3060QDS

Signed-off-by: Ramneek Mehresh ramneek.mehr...@freescale.com
---
 board/freescale/mpc8536ds/mpc8536ds.c |7 ++-
 board/freescale/p1022ds/p1022ds.c |6 +-
 board/freescale/p1023rds/p1023rds.c   |6 +-
 board/freescale/p2020come/p2020come.c |6 +-
 board/freescale/p2020ds/p2020ds.c |6 +-
 board/freescale/p2041rdb/p2041rdb.c   |6 +-
 board/freescale/p3060qds/p3060qds.c   |6 +-
 include/configs/MPC8536DS.h   |5 -
 include/configs/P1022DS.h |5 -
 include/configs/P1023RDS.h|5 -
 include/configs/P2020COME.h   |6 --
 include/configs/P2020DS.h |5 -
 include/configs/P2041RDB.h|8 +++-
 include/configs/corenet_ds.h  |8 ++--
 14 files changed, 69 insertions(+), 16 deletions(-)

diff --git a/board/freescale/mpc8536ds/mpc8536ds.c 
b/board/freescale/mpc8536ds/mpc8536ds.c
index c9f85c8..fb20192 100644
--- a/board/freescale/mpc8536ds/mpc8536ds.c
+++ b/board/freescale/mpc8536ds/mpc8536ds.c
@@ -1,5 +1,5 @@
 /*
- * Copyright 2008-2010, 2011 Freescale Semiconductor, Inc.
+ * Copyright 2008-2012 Freescale Semiconductor, Inc.
  *
  * See file CREDITS for list of people who contributed to this
  * project.
@@ -295,5 +295,10 @@ void ft_board_setup(void *blob, bd_t *bd)
 #ifdef CONFIG_FSL_SGMII_RISER
fsl_sgmii_riser_fdt_fixup(blob);
 #endif
+
+#ifdef CONFIG_HAS_FSL_MPH_USB
+   fdt_fixup_dr_usb(blob, bd);
+#endif
+
 }
 #endif
diff --git a/board/freescale/p1022ds/p1022ds.c 
b/board/freescale/p1022ds/p1022ds.c
index 456d9b0..f9ba1f8 100644
--- a/board/freescale/p1022ds/p1022ds.c
+++ b/board/freescale/p1022ds/p1022ds.c
@@ -1,5 +1,5 @@
 /*
- * Copyright 2010-2011 Freescale Semiconductor, Inc.
+ * Copyright 2010-2012 Freescale Semiconductor, Inc.
  * Authors: Srikanth Srinivasan srikanth.sriniva...@freescale.com
  *  Timur Tabi ti...@freescale.com
  *
@@ -341,6 +341,10 @@ void ft_board_setup(void *blob, bd_t *bd)
 
fdt_fixup_memory(blob, (u64)base, (u64)size);
 
+#ifdef CONFIG_HAS_FSL_DR_USB
+   fdt_fixup_dr_usb(blob, bd);
+#endif
+
FT_FSL_PCI_SETUP;
 
 #ifdef CONFIG_FSL_SGMII_RISER
diff --git a/board/freescale/p1023rds/p1023rds.c 
b/board/freescale/p1023rds/p1023rds.c
index 546819c..2f87583 100644
--- a/board/freescale/p1023rds/p1023rds.c
+++ b/board/freescale/p1023rds/p1023rds.c
@@ -1,5 +1,5 @@
 /*
- * Copyright 2010-2011 Freescale Semiconductor, Inc.
+ * Copyright 2010-2012 Freescale Semiconductor, Inc.
  *
  * Authors:  Roy Zang tie-fei.z...@freescale.com
  *   Chunhe Lan b25...@freescale.com
@@ -197,6 +197,10 @@ void ft_board_setup(void *blob, bd_t *bd)
 
fdt_fixup_memory(blob, (u64)base, (u64)size);
 
+#ifdef CONFIG_HAS_FSL_DR_USB
+   fdt_fixup_dr_usb(blob, bd);
+#endif
+
fdt_fixup_fman_ethernet(blob);
 }
 #endif
diff --git a/board/freescale/p2020come/p2020come.c 
b/board/freescale/p2020come/p2020come.c
index 8cf7bee..ce78016 100644
--- a/board/freescale/p2020come/p2020come.c
+++ b/board/freescale/p2020come/p2020come.c
@@ -1,5 +1,5 @@
 /*
- * Copyright 2009 Freescale Semiconductor, Inc.
+ * Copyright 2009,2012 Freescale Semiconductor, Inc.
  *
  * See file CREDITS for list of people who contributed to this
  * project.
@@ -282,6 +282,10 @@ void ft_board_setup(void *blob, bd_t *bd)
 
fdt_fixup_memory(blob, (u64)base, (u64)size);
 
+#ifdef CONFIG_HAS_FSL_DR_USB
+   fdt_fixup_dr_usb(blob, bd);
+#endif
+
fdt_fixup_dr_usb(blob, bd);
 }
 #endif
diff --git a/board/freescale/p2020ds/p2020ds.c 
b/board/freescale/p2020ds/p2020ds.c
index d3af6cf..d9465f9 100644
--- a/board/freescale/p2020ds/p2020ds.c
+++ b/board/freescale/p2020ds/p2020ds.c
@@ -1,5 +1,5 @@
 /*
- * Copyright 2007-2011 Freescale Semiconductor, Inc.
+ * Copyright 2007-2012 Freescale Semiconductor, Inc.
  *
  * See file CREDITS for list of people who contributed to this
  * project.
@@ -261,6 +261,10 @@ void ft_board_setup(void *blob, bd_t *bd)
 
fdt_fixup_memory(blob, (u64)base, (u64)size);
 
+#ifdef CONFIG_HAS_FSL_DR_USB
+   fdt_fixup_dr_usb(blob, bd);
+#endif
+
FT_FSL_PCI_SETUP;
 
 #ifdef CONFIG_FSL_SGMII_RISER
diff --git a/board/freescale/p2041rdb/p2041rdb.c 
b/board/freescale/p2041rdb/p2041rdb.c
index 1f6a34b..51c4310 100644
--- a/board/freescale/p2041rdb/p2041rdb.c
+++ b/board/freescale/p2041rdb/p2041rdb.c
@@ -1,5 +1,5 @@
 /*
- * Copyright 2011 Freescale Semiconductor, Inc.
+ * Copyright 2011,2012 Freescale Semiconductor, Inc.
  *
  * See file CREDITS for list of people who contributed to this
  * project.
@@ -215,6 +215,10 @@ void ft_board_setup(void *blob, bd_t *bd)
 
fdt_fixup_memory(blob, (u64)base, (u64)size);
 
+#if defined(CONFIG_HAS_FSL_DR_USB) || defined(CONFIG_HAS_FSL_MPH_USB)
+   fdt_fixup_dr_usb(blob, bd);
+#endif
+
 #ifdef CONFIG_PCI

Re: [U-Boot] BIOS EMULATOR driver

2012-03-26 Thread Timur Tabi
Viktor Křivák wrote:
 I think here may be a little misunderstanding. I don't want to remove
 whole driver. I only want to remove support of bios emulator form that
 2 board because I think they don't use it. I try compile it without
 this driver and everything seems to be ok.

I think it's okay to remove it from the P1022DS board.  I think the only
reason it is enabled because of some misunderstanding of the BSP
requirement, and no one ever noticed.

-- 
Timur Tabi
Linux kernel developer at Freescale

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Re: [U-Boot] [PATCH] cmd_nand: Fix possible uninited max_size variable

2012-03-26 Thread Scott Wood
On 03/23/2012 06:27 PM, Marek Vasut wrote:
 GCC 4.7 error:
 cmd_nand.c: In function ‘arg_off_size’:
 cmd_nand.c:216:5: warning: ‘maxsize’ may be used uninitialized in this 
 function [-Wmaybe-uninitialized]

Yay, with a new compiler comes a new batch of false positives. :-P

I'm surprised it complained at line 216 but not line 208.

 Signed-off-by: Marek Vasut ma...@denx.de
 Cc: Scott Wood scottw...@freescale.com
 ---
  common/cmd_nand.c |2 +-
  1 files changed, 1 insertions(+), 1 deletions(-)
 
 diff --git a/common/cmd_nand.c b/common/cmd_nand.c
 index 035a6f6..b015d11 100644
 --- a/common/cmd_nand.c
 +++ b/common/cmd_nand.c
 @@ -191,7 +191,7 @@ static int arg_off_size(int argc, char *const argv[], int 
 *idx,
   loff_t *off, loff_t *size)
  {
   int ret;
 - loff_t maxsize;
 + loff_t maxsize = 0;
  
   if (argc == 0) {
   *off = 0;

I'll apply for next merge window.

-Scott

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Re: [U-Boot] [PATCH 2/2] i.MX6: mx6q_sabrelite: add SATA bindings

2012-03-26 Thread Eric Nelson

On 03/26/2012 06:42 AM, Stefano Babic wrote:

On 26/03/2012 15:35, Eric Nelson wrote:

On 03/26/2012 01:35 AM, Stefano Babic wrote:

On 26/03/2012 01:00, Eric Nelson wrote:

V2 has been stripped of the board-independent changes and


 snip


+#ifdef CONFIG_CMD_SATA
+
+int setup_sata(void)
+{
+int rval = enable_sata_clock();


What about to return at this point if there is an error ?


I'm not sure I understand. Do you mean re-structure the code with
two returns like this?


No, much easier - I find the code is easy to understand if it looks like
if the function returns immediately in case of error.

if (do_something())
return ERROR;

  code when no error happens

Your  enable_sata_clock() return only -1 in case of error. You could
easy write:

if (enable_sata_clock())
return -1 (or better a value in errno.h)


The choice of error code is better made inside enable_sata_clock(),
although I'm not really sure what error code to choose.

The error occurs if the PLL fails to lock and would indicate that
something's horribly wrong.

I'm guessing -EIO is probably the right choice.

If you agree, I'll send V2 of i.MX6: add enable_sata_clock() and
V3 of i.MX6: mx6q_sabrelite: add SATA bindings.

Please advise,


Eric
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Re: [U-Boot] Please pull u-boot-ti/master

2012-03-26 Thread Tom Rini
On Mon, Mar 19, 2012 at 11:29:06AM -0700, Tom Rini wrote:
 Hello,
 
 The following changes since commit 32ec258f829808dd7cf74fd83ba999fdaaeab715:
   Marek Vasut (1):
 IXP: Fix GPIO_INT_ACT_LOW_SET()
[snip]

This pull request is now updated as such:

The following changes since commit 32ec258f829808dd7cf74fd83ba999fdaaeab715:
  Marek Vasut (1):
IXP: Fix GPIO_INT_ACT_LOW_SET()

are available in the git repository at:

  git://git.denx.de/u-boot-ti master

Christian Riesch (1):
  calimain, enbw_cmc: Fix typo in comments

Grazvydas Ignotas (1):
  twl4030: fix potential power supply handling issues

Simon Schwarz (8):
  Add cmd_spl command
  devkit8000: add config for spl command
  omap-common: Add NAND SPL linux booting
  devkit8000/spl: init GPMC for dm9000 in SPL
  omap-common/spl: Add linux boot to SPL
  omap/spl: change output of spl_parse_image_header
  devkit8000: Implement and activate direct OS boot
  arm: Add Prep subcommand support to bootm

Stefano Babic (8):
  Add cache functions to SPL for armv7
  OMAP3: SPL: do not call I2C init if no I2C is set.
  SPL: call cleanup_before_linux() before booting Linux
  OMAP3: twister: add support to boot Linux from SPL
  NAND: TI: fix warnings in omap_gpmc.c
  OMAP3: mt_ventoux: updated timing for FPGA
  OMAP3: mt_ventoux: sets its own mtdparts
  Davinci: ea20: use gpio framework to access gpios

Tom Rini (1):
  cam_enc_4xx: Rename 'images' to 'imgs'

jacopo mondi (1):
  omap3_spi: receive transmit mode

 arch/arm/cpu/armv7/Makefile   |2 -
 arch/arm/cpu/armv7/cpu.c  |2 +
 arch/arm/cpu/armv7/omap-common/spl.c  |   46 -
 arch/arm/cpu/armv7/omap-common/spl_nand.c |   47 -
 arch/arm/cpu/armv7/omap3/board.c  |2 +
 arch/arm/include/asm/bootm.h  |   26 +++
 arch/arm/include/asm/omap_common.h|2 +
 arch/arm/lib/Makefile |5 +-
 arch/arm/lib/bootm.c  |  341 +++--
 board/ait/cam_enc_4xx/cam_enc_4xx.c   |   48 ++--
 board/davinci/ea20/ea20.c |   38 +---
 board/enbw/enbw_cmc/enbw_cmc.c|2 +-
 board/omicron/calimain/calimain.c |2 +-
 board/technexion/twister/twister.c|   23 ++
 board/teejet/mt_ventoux/mt_ventoux.h  |   11 +-
 board/timll/devkit8000/devkit8000.c   |   37 +++
 common/Makefile   |1 +
 common/cmd_spl.c  |  188 
 doc/README.commands.spl   |   31 +++
 drivers/mtd/nand/omap_gpmc.c  |   14 +-
 drivers/power/twl4030.c   |   18 ++-
 drivers/spi/omap3_spi.c   |   66 ++-
 drivers/spi/omap3_spi.h   |2 +
 include/cmd_spl.h |   31 +++
 include/configs/devkit8000.h  |   15 +-
 include/configs/ea20.h|2 +
 include/configs/mt_ventoux.h  |   10 +
 include/configs/twister.h |   12 +
 include/image.h   |2 +
 29 files changed, 777 insertions(+), 249 deletions(-)
 create mode 100644 arch/arm/include/asm/bootm.h
 create mode 100644 common/cmd_spl.c
 create mode 100644 doc/README.commands.spl
 create mode 100644 include/cmd_spl.h

-- 
Tom


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Re: [U-Boot] [PATCH 3/4][v2] powerpc/85xx:Make debug exception vector accessible

2012-03-26 Thread Scott Wood
On 03/23/2012 09:24 PM, Prabhakar Kushwaha wrote:
 On Friday 23 March 2012 11:44 PM, Scott Wood wrote:
 On 03/23/2012 06:44 AM, Prabhakar Kushwaha wrote:
 After internal discussion we can have following settings
 for non-RAMBOOT(NOR boot) ==  I + G
 for RAMBOOT ==  I, cache inhibited is required as L1 cache is used as
 stack.
 Why does using L1 for a stack mean that the mapping must be cache
 inhibited?  Why do we even need to use L1 for a stack with ramboot?
 
 it is done at label _start_cont. L1 is set for Stack address as
 switch_as label.
 am i wrong??

I don't doubt that we do use the L1 for stack unconditionally -- just
that in the ramboot case we could probably get away without it if it
were a problem.  I don't think it's a problem, though, because it
doesn't conflict with creating cacheable mappings.

 Generally any debugger use some initial configuration file. Only problem
 occurs
 when  application modifies those configuration.
 Then why do we need to set MSR[DE] on entry, if the debugger can take
 care of it?
 Yes. You are right. It is required only for SD/SPI boot not for
 NAND_SPL/NOR boot.
 But to make MSR[DE] bit set general way (out of #define) throughout
 u-boot code. I did.

I'm not saying it should be conditional -- just trying to understand
when it's needed at all, and what we can expect the debugger to have
already done.

 So, I will use as
 #ifdef CONFIG_ENABLE_36BIT_PHYS
  lis r10,0x
 #endif
 for 36 bit physical address,
 address should be 0x0_1107_f000 or 0x0__fffc for destination
 
  mas7 should be programmed. To make sure mas7 is 0.  I am setting it.
 if not required i can remove.

CONFIG_ENABLE_36BIT_PHYS should be protecting the MAS7 mtspr, not the lis.

-Scott

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[U-Boot] T4 U-boot: ctrl_regs.c: wr used uninitialized

2012-03-26 Thread Scott Wood
I get this in the T4 branch of U-Boot:

 Configuring for T4240QDS_EMU - Board: T4240QDS, Options: EMU
 ctrl_regs.c: In function 'compute_fsl_memctl_config_regs':
 ctrl_regs.c:852:15: warning: 'wr' may be used uninitialized in this function

It does not appear to be a false positive (though it is an error path),
and in any case such warnings should be squashed so that real warnings
stick out.

It was introduced by this patch:

 commit 18496c6d6cf46177e7faeb364cfe5baddb8cf71e
 Author: York Sun york...@freescale.com
 Date:   Tue Dec 13 14:16:55 2011 -0800
 
 powerpc/mpc8xxx: Add support for cas latency 12 and above
 
 Required by JEDEC 79-3E for high speed DDR3.
 Also change CSn disabled message to debug.
 
 Signed-off-by: York Sun york...@freescale.com

I also don't see the T4 patches being posted to the mailing list -- why?

And why is there any notion of a 32-bit physical address map for T4, and
a README that suggests the 32-bit address map is used?

-Scott

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Re: [U-Boot] Please pull u-boot-ti/next

2012-03-26 Thread Tom Rini
On Fri, Mar 16, 2012 at 10:15:28AM -0700, Tom Rini wrote:

 Hello,
 
 The following changes since commit 5c91ee919c359e89fcb3230722253dbb9b4f7e32:
   Ian Campbell (1):
 ARM: dreamplug: Enable FDT support

This has been updated as follows:

The following changes since commit 5c91ee919c359e89fcb3230722253dbb9b4f7e32:
  Ian Campbell (1):
ARM: dreamplug: Enable FDT support

are available in the git repository at:

  git://git.denx.de/u-boot-ti next

Aneesh V (6):
  arm: adapt asm/linkage.h from Linux
  armv7: add appropriate headers for assembly functions
  ARM: enable Thumb build
  armv7: Use -march=armv7-a and thereby enable Thumb-2
  omap4+: Avoid using __attribute__ ((__packed__))
  OMAP4: enable Thumb build

Balaji T K (3):
  arm: omap5: correct boot device mode7 for eMMC
  omap5: pbias ldo9 turn on
  mmc: omap5evm: Add eMMC saveenv support

Enric Balletb?? i Serra (1):
  OMAP3: igep00x0: Reduce lines of code for IGEP-based boards.

Grazvydas Ignotas (3):
  OMAP3: pandora: pin mux updates for DM3730 board variant
  OMAP3: pandora: revise GPIO configuration
  OMAP3: pandora: drop console kernel argument

Heiko Schocher (1):
  ARM: davinci: fixes for cam_enc_4xx board

Jonathan Solnit (1):
  ARM:OMAP+:MMC: Add parameters to MMC init

Nishanth Menon (3):
  OMAP3+: Introduce generic logic for OMAP voltage controller
  OMAP4460: TPS Ensure SET1 is selected after voltage configuration
  OMAP4: scale voltage of core before MPU scales

SRICHARAN R (16):
  OMAP5: clocks: Change clock settings as required for ES1.0 silicon.
  OMAP5: board: Add pinmux data for omap5_evm board.
  OMAP5: io: Configure the io settings for omap5430 sevm board.
  OMAP5: emif/ddr: Change emif settings as required for ES1.0 silicon.
  OMAP5: palmas: Configure nominal opp vdd values
  OMAP5: hwinit: Add the missing break statement
  OMAP4/5: Make the silicon revision variable common.
  OMAP5: SRAM: Change the SRAM base address.
  OMAP4/5: Make the sysctrl structure common
  OMAP4/5: device: Add support to get the device type.
  OMAP5: defconfig: Align the defconfig for 5430 ES1.0
  OMAP5: ddr: Change the ddr device name.
  OMAP4/5: emif: Correct the emif power mgt shadow register bit fields.
  power: twl6035: add palmas PMIC support
  OMAP3+: reset: Create a common reset layer.
  OMAP5: reset: Use cold reset in case of 5430ES1.0

Tom Rini (2):
  tools, config.mk: Add gcc-version.sh, cc-version test from Linux
  Makefile: Add a 'checkthumb' rule

 Makefile   |7 +
 README |8 +
 arch/arm/config.mk |   27 +-
 arch/arm/cpu/armv7/am33xx/board.c  |2 +-
 arch/arm/cpu/armv7/config.mk   |7 +-
 arch/arm/cpu/armv7/mx5/lowlevel_init.S |5 +-
 arch/arm/cpu/armv7/mx6/lowlevel_init.S |5 +-
 arch/arm/cpu/armv7/omap-common/Makefile|1 +
 arch/arm/cpu/armv7/omap-common/clocks-common.c |   99 ++---
 arch/arm/cpu/armv7/omap-common/emif-common.c   |   41 ++-
 arch/arm/cpu/armv7/omap-common/hwinit-common.c |6 +-
 arch/arm/cpu/armv7/omap-common/lowlevel_init.S |   14 +-
 .../arm/cpu/armv7/omap-common/{reset.S = reset.c} |   30 +-
 arch/arm/cpu/armv7/omap-common/spl.c   |1 +
 arch/arm/cpu/armv7/omap-common/spl_mmc.c   |5 +-
 arch/arm/cpu/armv7/omap-common/vc.c|  138 ++
 arch/arm/cpu/armv7/omap3/lowlevel_init.S   |   41 +-
 arch/arm/cpu/armv7/omap4/clocks.c  |   77 ++-
 arch/arm/cpu/armv7/omap4/hwinit.c  |   24 +-
 arch/arm/cpu/armv7/omap4/sdram_elpida.c|4 +
 arch/arm/cpu/armv7/omap5/Makefile  |2 +-
 arch/arm/cpu/armv7/omap5/clocks.c  |  143 --
 arch/arm/cpu/armv7/omap5/hwinit.c  |  104 -
 .../cpu/armv7/omap5/{sdram_elpida.c = sdram.c}|  101 +++--
 arch/arm/cpu/armv7/s5pc1xx/cache.S |   10 +-
 arch/arm/cpu/armv7/s5pc1xx/reset.S |5 +-
 arch/arm/cpu/armv7/start.S |   13 +-
 arch/arm/cpu/armv7/tegra2/lowlevel_init.S  |5 +-
 arch/arm/cpu/armv7/u8500/lowlevel.S|9 +-
 arch/arm/include/asm/arch-am33xx/mmc_host_def.h|2 +-
 arch/arm/include/asm/arch-omap3/cpu.h  |5 +-
 arch/arm/include/asm/arch-omap3/mmc_host_def.h |8 +-
 arch/arm/include/asm/arch-omap3/mux.h  |6 +
 arch/arm/include/asm/arch-omap4/clocks.h   |   18 +-
 arch/arm/include/asm/arch-omap4/cpu.h  |   11 +
 arch/arm/include/asm/arch-omap4/mmc_host_def.h |2 +-
 arch/arm/include/asm/arch-omap4/mux_omap4.h|2 +-
 arch/arm/include/asm/arch-omap4/omap.h |   25 +-
 

Re: [U-Boot] T4 U-boot: ctrl_regs.c: wr used uninitialized

2012-03-26 Thread Scott Wood
On 03/26/2012 02:04 PM, Scott Wood wrote:
 I get this in the T4 branch of U-Boot:
 
 Configuring for T4240QDS_EMU - Board: T4240QDS, Options: EMU
 ctrl_regs.c: In function 'compute_fsl_memctl_config_regs':
 ctrl_regs.c:852:15: warning: 'wr' may be used uninitialized in this function
 
 It does not appear to be a false positive (though it is an error path),
 and in any case such warnings should be squashed so that real warnings
 stick out.
 
 It was introduced by this patch:
 
 commit 18496c6d6cf46177e7faeb364cfe5baddb8cf71e
 Author: York Sun york...@freescale.com
 Date:   Tue Dec 13 14:16:55 2011 -0800

 powerpc/mpc8xxx: Add support for cas latency 12 and above
 
 Required by JEDEC 79-3E for high speed DDR3.
 Also change CSn disabled message to debug.
 
 Signed-off-by: York Sun york...@freescale.com
 
 I also don't see the T4 patches being posted to the mailing list -- why?
 
 And why is there any notion of a 32-bit physical address map for T4, and
 a README that suggests the 32-bit address map is used?

Please ignore this, I sent it to the wrong mailing list by mistake.

-Scott

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Re: [U-Boot] [PATCH v5] kirkwood: add NAS62x0 board support

2012-03-26 Thread Luka Perkov
Hi Prafulla,

On Mon, Mar 26, 2012 at 01:03:49AM -0700, Prafulla Wadaskar wrote:
 This patch looks okay to me.

Great! Who is in charge of commiting this? You?

 Just one concern, how you are taking care of machine-id?

In file include/configs/ib62x0.h this line takes care of that:

#define CONFIG_MACH_TYPEMACH_TYPE_NAS6210

It was one of your comments for v4.

 Just curious to know:
 Have you already registered for machine-ID for this board?

MACH_TYPE_NAS6210 is already inside kernel but the board is not added
yet.

 Is Linux kernel support for this board is done, is it being mainlined?

Not yet. This is next on my TODO. Here is a patch I submitted to
OpenWrt:

https://lists.openwrt.org/pipermail/openwrt-devel/2012-March/01.html

Simon is the author of the kernel mach file.

Regarding u-boot I have other things on my TODO list, one of them is to
clean up other kirkwood targets. I'll fix stuff that were pointed for
this board. But first I would like this to be commited.

Thank you for the review.

Regards,
Luka
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Re: [U-Boot] Patchwork housekeeping

2012-03-26 Thread Andy Fleming

On Mar 26, 2012, at 12:30 PM, Vladimir Zapolskiy wrote:

 Hi Graeme,
 
 On 22.03.2012 04:58, Graeme Russ wrote:
 Hello Custodians and Mailing List Aficionados,
 
 I don't know if anyone has noticed, but patchwork is starting to collect
 a rather large amount of cruft.
 
 I occasionally jump onto patchwork and do a little housekeeping by marking
 updated patches as 'Superceeded' and anything applied by Wolfgang as
 'Accepted' (There may be a few patches that have been applied to custodian
 tress that I marked as 'Accepted' when really they should have been marked
 as 'Awaiting Upstream')
 
 I really don't mind doing this housekeeping, but I would like to make a
 few suggestions that will make the work a little easier:
 
  - If you are a custodian:
 o When you apply a patch to your repo, can you please assign it to
   yourself in patchwork and set it to 'Awaiting Upstream'
 o Reply to the ML with 'Applied torepo/branch'
 o When you send a pull request, create a bundle with all the patches
   that are to be pulled (you can create the bundle early and add
   patches as you apply them)
 o When Wolfgang pulls your repo, go to the bundle and mark all the
   patches 'Accepted'
 
  - If you are a patch submitter:
 o Visit http://patchwork.ozlabs.org/project/uboot/list/
 o Search for your patches by following the 'Filters'link and entering
   your name
 o Send and email (with 'patchwork' somewhere in the subject) to the ML
   with a list of patches that you submitted say more than one month
 http://patchwork.ozlabs.org/patch/135526/
 http://patchwork.ozlabs.org/patch/135699/
 http://patchwork.ozlabs.org/patch/135697/
 http://patchwork.ozlabs.org/patch/135698/
 
 That's the list of patches sent in January, still no progress.
 
   ago. For each patch, please indicate if the patch is:
 * Superseded - By another patch (either by you or someone else)
 * Not Applicable - The patch can be ignored (was an RFC, was due
   to a misunderstanding, another patch did the same thing, etc)
 * Applied - Has been applied (state the repo and branch)
 * Rejected - Patch has been officially rejected
 * Waiting - You believe the patch is still valid but has not been
   applied (send a ping as a reply to the patch on the mailing list
   as well
 I marked the patches as `awaiting upstream'.


Awaiting upstream means that the patches have been applied already, and are 
waiting for Wolfgang's pull. I suspect this is not the case for your patches. 
If it is the case, then there's probably no need to mention it, as Wolfgang 
will eventually pull that tree.

Andy
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Re: [U-Boot] Patchwork housekeeping

2012-03-26 Thread Vladimir Zapolskiy

Hi Graeme,

On 22.03.2012 04:58, Graeme Russ wrote:

Hello Custodians and Mailing List Aficionados,

I don't know if anyone has noticed, but patchwork is starting to collect
a rather large amount of cruft.

I occasionally jump onto patchwork and do a little housekeeping by marking
updated patches as 'Superceeded' and anything applied by Wolfgang as
'Accepted' (There may be a few patches that have been applied to custodian
tress that I marked as 'Accepted' when really they should have been marked
as 'Awaiting Upstream')

I really don't mind doing this housekeeping, but I would like to make a
few suggestions that will make the work a little easier:

  - If you are a custodian:
 o When you apply a patch to your repo, can you please assign it to
   yourself in patchwork and set it to 'Awaiting Upstream'
 o Reply to the ML with 'Applied torepo/branch'
 o When you send a pull request, create a bundle with all the patches
   that are to be pulled (you can create the bundle early and add
   patches as you apply them)
 o When Wolfgang pulls your repo, go to the bundle and mark all the
   patches 'Accepted'

  - If you are a patch submitter:
 o Visit http://patchwork.ozlabs.org/project/uboot/list/
 o Search for your patches by following the 'Filters'link and entering
   your name
 o Send and email (with 'patchwork' somewhere in the subject) to the ML
   with a list of patches that you submitted say more than one month

http://patchwork.ozlabs.org/patch/135526/
http://patchwork.ozlabs.org/patch/135699/
http://patchwork.ozlabs.org/patch/135697/
http://patchwork.ozlabs.org/patch/135698/

That's the list of patches sent in January, still no progress.


   ago. For each patch, please indicate if the patch is:
 * Superseded - By another patch (either by you or someone else)
 * Not Applicable - The patch can be ignored (was an RFC, was due
   to a misunderstanding, another patch did the same thing, etc)
 * Applied - Has been applied (state the repo and branch)
 * Rejected - Patch has been officially rejected
 * Waiting - You believe the patch is still valid but has not been
   applied (send a ping as a reply to the patch on the mailing list
   as well

I marked the patches as `awaiting upstream'.


 * Other - Please describe what state you feel the patch is in

Once I get the raw list down to a manageable level, I'll start to look at
the leftovers...



--
With best wishes,
Vladimir
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Re: [U-Boot] Patchwork housekeeping

2012-03-26 Thread Vladimir Zapolskiy

On 26.03.2012 20:36, Andy Fleming wrote:


On Mar 26, 2012, at 12:30 PM, Vladimir Zapolskiy wrote:


Hi Graeme,

On 22.03.2012 04:58, Graeme Russ wrote:

Hello Custodians and Mailing List Aficionados,

I don't know if anyone has noticed, but patchwork is starting to collect
a rather large amount of cruft.

I occasionally jump onto patchwork and do a little housekeeping by marking
updated patches as 'Superceeded' and anything applied by Wolfgang as
'Accepted' (There may be a few patches that have been applied to custodian
tress that I marked as 'Accepted' when really they should have been marked
as 'Awaiting Upstream')

I really don't mind doing this housekeeping, but I would like to make a
few suggestions that will make the work a little easier:

  - If you are a custodian:
 o When you apply a patch to your repo, can you please assign it to
   yourself in patchwork and set it to 'Awaiting Upstream'
 o Reply to the ML with 'Applied torepo/branch'
 o When you send a pull request, create a bundle with all the patches
   that are to be pulled (you can create the bundle early and add
   patches as you apply them)
 o When Wolfgang pulls your repo, go to the bundle and mark all the
   patches 'Accepted'

  - If you are a patch submitter:
 o Visit http://patchwork.ozlabs.org/project/uboot/list/
 o Search for your patches by following the 'Filters'link and entering
   your name
 o Send and email (with 'patchwork' somewhere in the subject) to the ML
   with a list of patches that you submitted say more than one month

http://patchwork.ozlabs.org/patch/135526/
http://patchwork.ozlabs.org/patch/135699/
http://patchwork.ozlabs.org/patch/135697/
http://patchwork.ozlabs.org/patch/135698/

That's the list of patches sent in January, still no progress.


   ago. For each patch, please indicate if the patch is:
 * Superseded - By another patch (either by you or someone else)
 * Not Applicable - The patch can be ignored (was an RFC, was due
   to a misunderstanding, another patch did the same thing, etc)
 * Applied - Has been applied (state the repo and branch)
 * Rejected - Patch has been officially rejected
 * Waiting - You believe the patch is still valid but has not been
   applied (send a ping as a reply to the patch on the mailing list
   as well

I marked the patches as `awaiting upstream'.



Awaiting upstream means that the patches have been applied already, and are 
waiting for Wolfgang's pull. I suspect this is not the case for your patches. 
If it is the case, then there's probably no need to mention it, as Wolfgang 
will eventually pull that tree.

Thanks for correction, I haven't found literally a state `Waiting' among options 
as it was recommended by Graeme, however I have to change it certainly.


Should it be `Under Review' or which state, if a patch is valid, but hasn't been 
applied yet?


--
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Re: [U-Boot] [PATCH v5] kirkwood: add NAS62x0 board support

2012-03-26 Thread Luka Perkov
Hi Jason,

please keep me in CC because I'm not subscribed to the list... Thanks!

 Sorry I didn't see this before now. You may want to have a look at the
 patch series going into v3.4 here [1]. Basically, All of mine and
 Andrew Lunn's.

Cool! Thanks for pointing this out.

I have looked at this:

http://git.infradead.org/users/jcooper/linux-kirkwood.git/blob/refs/heads/kirkwood_dt_for_3.4_v3:/arch/arm/mach-kirkwood/board-dreamplug.c
 
40 struct mtd_partition dreamplug_partitions[] = {
41 {
42 .name   = u-boot,
43 .size   = SZ_512K,
44 .offset = 0,
45 },
46 {
47 .name   = u-boot env,
48 .size   = SZ_64K,
49 .offset = SZ_512K + SZ_512K,
50 },
51 {
52 .name   = dtb,
53 .size   = SZ_64K,
54 .offset = SZ_512K + SZ_512K + SZ_512K,
55 },
56 };

Can you explain why line 49 is not:

.offset = MTDPART_OFS_NXTBLK, or .offset = SZ_512K

and line 54:

.offset = MTDPART_OFS_NXTBLK, or .offset = SZ_512K + SZ_64K

Am I missing something here?

 If you base your kernel patches off of this, CC: me and I'll pull them
 in.

Is there a list where we can talk about this? I dont think we should use
u-boot list for this...

 ...
  +#define CONFIG_MACH_TYPE   MACH_TYPE_NAS6210
 
 #define CONFIG_OF_LIBFDT
 
 If you add this here, the mach-type won't be needed once you add a
 devicetree file to Linux.

I do not want to add this now because I did not test that. And there is
no support for this in kernel yet. When we have this we can post a patch
to u-boot list to fix this. I think that is the best way.

 It shouldn't be too hard to follow what we have going on for dreamplug
 and Buffalo DNS-xxx (patches are still wip for Buffalo stuff).

I will test this patch with your kernel branch:

https://lists.openwrt.org/pipermail/openwrt-devel/2012-March/01.html

I'll let you know how it went and bug you if I have problems...

 [1] git://git.infradead.org/users/jcooper/linux-kirkwood.git 
 kirkwood_dt_for_3.4_v3

Thanks again for this.

Regards,
Luka
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Re: [U-Boot] [PATCH v5] kirkwood: add NAS62x0 board support

2012-03-26 Thread Jason Cooper
On Mon, Mar 26, 2012 at 07:57:38PM +0200, Luka Perkov wrote:
 Hi Jason,
 
 please keep me in CC because I'm not subscribed to the list... Thanks!
 
  Sorry I didn't see this before now. You may want to have a look at the
  patch series going into v3.4 here [1]. Basically, All of mine and
  Andrew Lunn's.
 
 Cool! Thanks for pointing this out.
 
 I have looked at this:
 
 http://git.infradead.org/users/jcooper/linux-kirkwood.git/blob/refs/heads/kirkwood_dt_for_3.4_v3:/arch/arm/mach-kirkwood/board-dreamplug.c
  
 40 struct mtd_partition dreamplug_partitions[] = {
 41 {
 42 .name   = u-boot,
 43 .size   = SZ_512K,
 44 .offset = 0,
 45 },
 46 {
 47 .name   = u-boot env,
 48 .size   = SZ_64K,
 49 .offset = SZ_512K + SZ_512K,
 50 },
 51 {
 52 .name   = dtb,
 53 .size   = SZ_64K,
 54 .offset = SZ_512K + SZ_512K + SZ_512K,
 55 },
 56 };
 
 Can you explain why line 49 is not:
 
 .offset = MTDPART_OFS_NXTBLK, or .offset = SZ_512K
 
 and line 54:
 
 .offset = MTDPART_OFS_NXTBLK, or .offset = SZ_512K + SZ_64K
 
 Am I missing something here?

Nope, I copied the style from arch/arm/mach-kirkwood/t5325-setup.c:37.
Thankfully, that will be going away once spi/flash is converted to
devicetree.  If your board uses nand, you can look at Jamie Lentin's
patch series for the Buffalo DNS-32x boards.  He's converted orion_nand
to devicetree.  Hopefully, I'll be able to pull those soon.

  If you base your kernel patches off of this, CC: me and I'll pull them
  in.
 
 Is there a list where we can talk about this? I dont think we should use
 u-boot list for this...

linux-arm-ker...@vger.kernel.org, CC'd.

  ...
   +#define CONFIG_MACH_TYPE MACH_TYPE_NAS6210
  
  #define CONFIG_OF_LIBFDT
  
  If you add this here, the mach-type won't be needed once you add a
  devicetree file to Linux.
 
 I do not want to add this now because I did not test that. And there is
 no support for this in kernel yet. When we have this we can post a patch
 to u-boot list to fix this. I think that is the best way.

I use this with dreamplug currently.  It boots non-fdt and fdt kernels
without problem.  It basically has bootm command read an extra argument
(address of dt blob), if provided.  So, args would be:

bootm kernel addr [initrd addr] [dtb addr]

If you're not comfortable with it, that's fine.  I just remember having
to go back and add it and then wait another release cycle to see it in
mainline.  I wish I had it in there the first time around.

  It shouldn't be too hard to follow what we have going on for dreamplug
  and Buffalo DNS-xxx (patches are still wip for Buffalo stuff).
 
 I will test this patch with your kernel branch:
 
 https://lists.openwrt.org/pipermail/openwrt-devel/2012-March/01.html
 
 I'll let you know how it went and bug you if I have problems...
 
  [1] git://git.infradead.org/users/jcooper/linux-kirkwood.git 
  kirkwood_dt_for_3.4_v3
 
 Thanks again for this.
 

No problem.

thx,

Jason.
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[U-Boot] [PATCH] powerpc/85xx: don't touch MAS7 on e500v1 when relocating CCSR

2012-03-26 Thread Timur Tabi
The CCSR relocation code in start.S writes to MAS7 on all e500 parts, but
that register does not exist on e500v1.

Signed-off-by: Timur Tabi ti...@freescale.com
---
 arch/powerpc/cpu/mpc85xx/start.S |8 ++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/arch/powerpc/cpu/mpc85xx/start.S b/arch/powerpc/cpu/mpc85xx/start.S
index 4d37d6e..d0872cf 100644
--- a/arch/powerpc/cpu/mpc85xx/start.S
+++ b/arch/powerpc/cpu/mpc85xx/start.S
@@ -434,13 +434,15 @@ create_ccsr_new_tlb:
ori r2, r2, FSL_BOOKE_MAS2(CONFIG_SYS_CCSRBAR, (MAS2_I|MAS2_G))@l
lis r3, FSL_BOOKE_MAS3(CONFIG_SYS_CCSRBAR_PHYS_LOW, 0, 
(MAS3_SW|MAS3_SR))@h
ori r3, r3, FSL_BOOKE_MAS3(CONFIG_SYS_CCSRBAR_PHYS_LOW, 0, 
(MAS3_SW|MAS3_SR))@l
+#ifdef CONFIG_ENABLE_36BIT_PHYS
lis r7, CONFIG_SYS_CCSRBAR_PHYS_HIGH@h
ori r7, r7, CONFIG_SYS_CCSRBAR_PHYS_HIGH@l
+   mtspr   MAS7, r7
+#endif
mtspr   MAS0, r0
mtspr   MAS1, r1
mtspr   MAS2, r2
mtspr   MAS3, r3
-   mtspr   MAS7, r7
isync
msync
tlbwe
@@ -456,12 +458,14 @@ create_ccsr_old_tlb:
ori r2, r2, FSL_BOOKE_MAS2(CONFIG_SYS_CCSRBAR + 0x1000, 
(MAS2_I|MAS2_G))@l
lis r3, FSL_BOOKE_MAS3(CONFIG_SYS_CCSRBAR_DEFAULT, 0, 
(MAS3_SW|MAS3_SR))@h
ori r3, r3, FSL_BOOKE_MAS3(CONFIG_SYS_CCSRBAR_DEFAULT, 0, 
(MAS3_SW|MAS3_SR))@l
+#ifdef CONFIG_ENABLE_36BIT_PHYS
li  r7, 0   /* The default CCSR address is always a 32-bit number */
+   mtspr   MAS7, r7
+#endif
mtspr   MAS0, r0
/* MAS1 is the same as above */
mtspr   MAS2, r2
mtspr   MAS3, r3
-   mtspr   MAS7, r7
isync
msync
tlbwe
-- 
1.7.10.rc1.8.ga99c5.dirty


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Re: [U-Boot] BIOS EMULATOR driver

2012-03-26 Thread Wolfgang Denk
Dear Marek Vasut,

In message 201203261531.18334.ma...@denx.de you wrote:
 
 So that means the board work without this bios emulator driver if the radeon 
 driver is disabled? But we want to use the radeon driver, so we need the bios 
 emulator stuff.

Right.  If you don't need feature X and do not configure it, then you
don't need the driver that implements feature X, and building without
this driver works.  If you need feature X, then you must include it,
and it is usually no dead code then.

And even if it was, the combination of -ffunction-sections /
-fdata-sections with --gc-sections should prevent any damages.

 I think the discussion quite drifted away from the original question, which 
 was 
 if the dead code in bios emulator stuff can be simply removed? ... and if it 
 really is dead code.

If you need the BIOS emulator to initialize the BIOS of a graphics
card it it probably not exactly dead code.

Best regards,

Wolfgang Denk

-- 
DENX Software Engineering GmbH, MD: Wolfgang Denk  Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
Every time history repeats itself the price goes up.
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Re: [U-Boot] BIOS EMULATOR driver

2012-03-26 Thread Wolfgang Denk
Dear Timur Tabi,

In message 4f70804a.5030...@freescale.com you wrote:

  I think here may be a little misunderstanding. I don't want to remove
  whole driver. I only want to remove support of bios emulator form that
  2 board because I think they don't use it. I try compile it without
  this driver and everything seems to be ok.
 
 I think it's okay to remove it from the P1022DS board.  I think the only
 reason it is enabled because of some misunderstanding of the BSP
 requirement, and no one ever noticed.

Please look at the code before posting.

The #define CONFIG_BIOSEMU is in a block #ifdef CONFIG_ATI, and
when you enable support for an ATI card you most probably want to
enable BIOS emu support as well.

Everything is perfectly fine hre, nothing should be changed.

Best regards,

Wolfgang Denk

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Re: [U-Boot] [GIT PULL] Pull request: u-boot-imx

2012-03-26 Thread Albert ARIBAUD

Hi Stefano,

Le 08/03/2012 08:52, Stefano Babic a écrit :

Hi Albert,

please pull from u-boot-imx, thanks.

The following changes since commit 32ec258f829808dd7cf74fd83ba999fdaaeab715:

   IXP: Fix GPIO_INT_ACT_LOW_SET() (2012-03-08 08:11:45 +0100)

are available in the git repository at:
   git://www.denx.de/git/u-boot-imx.git master

Dirk Behme (1):
   imximage: Remove overwriting of flash_offset

Eric Nelson (2):
   i.MX6: mx6qsabrelite: add ext2 support
   mx6q: mx6qsabrelite: setup_spi() should be called in board_init to
allow use for environment

Fabio Estevam (5):
   mx51evk: Fix CONFIG_SYS_MEMTEST_END
   mx53evk: Fix CONFIG_SYS_MEMTEST_END
   mx53smd: Fix CONFIG_SYS_MEMTEST_END
   efikamx: Fix CONFIG_SYS_MEMTEST_END
   mx31pdk: Fix CONFIG_SYS_MEMTEST_END

Helmut Raiger (1):
   mx31: add ARM11P power gating to get_reset_cause

  arch/arm/cpu/arm1136/mx31/generic.c   |2 ++
  board/freescale/mx6qsabrelite/mx6qsabrelite.c |8 
  include/configs/efikamx.h |2 +-
  include/configs/mx31pdk.h |2 +-
  include/configs/mx51evk.h |2 +-
  include/configs/mx53evk.h |2 +-
  include/configs/mx53smd.h |2 +-
  include/configs/mx6qsabrelite.h   |1 +
  tools/imximage.c  |   18 ++
  tools/imximage.h  |1 +
  10 files changed, 27 insertions(+), 13 deletions(-)


Applied to u-boot-arm/master, thanks.

Amicalement,
--
Albert.
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Re: [U-Boot] Please pull u-boot-ti/master

2012-03-26 Thread Albert ARIBAUD

Hi Tom,

Le 26/03/2012 19:36, Tom Rini a écrit :

On Mon, Mar 19, 2012 at 11:29:06AM -0700, Tom Rini wrote:

Hello,

The following changes since commit 32ec258f829808dd7cf74fd83ba999fdaaeab715:
   Marek Vasut (1):
 IXP: Fix GPIO_INT_ACT_LOW_SET()

[snip]

This pull request is now updated as such:

The following changes since commit 32ec258f829808dd7cf74fd83ba999fdaaeab715:
   Marek Vasut (1):
 IXP: Fix GPIO_INT_ACT_LOW_SET()

are available in the git repository at:

   git://git.denx.de/u-boot-ti master

Christian Riesch (1):
   calimain, enbw_cmc: Fix typo in comments

Grazvydas Ignotas (1):
   twl4030: fix potential power supply handling issues

Simon Schwarz (8):
   Add cmd_spl command
   devkit8000: add config for spl command
   omap-common: Add NAND SPL linux booting
   devkit8000/spl: init GPMC for dm9000 in SPL
   omap-common/spl: Add linux boot to SPL
   omap/spl: change output of spl_parse_image_header
   devkit8000: Implement and activate direct OS boot
   arm: Add Prep subcommand support to bootm

Stefano Babic (8):
   Add cache functions to SPL for armv7
   OMAP3: SPL: do not call I2C init if no I2C is set.
   SPL: call cleanup_before_linux() before booting Linux
   OMAP3: twister: add support to boot Linux from SPL
   NAND: TI: fix warnings in omap_gpmc.c
   OMAP3: mt_ventoux: updated timing for FPGA
   OMAP3: mt_ventoux: sets its own mtdparts
   Davinci: ea20: use gpio framework to access gpios

Tom Rini (1):
   cam_enc_4xx: Rename 'images' to 'imgs'

jacopo mondi (1):
   omap3_spi: receive transmit mode

  arch/arm/cpu/armv7/Makefile   |2 -
  arch/arm/cpu/armv7/cpu.c  |2 +
  arch/arm/cpu/armv7/omap-common/spl.c  |   46 -
  arch/arm/cpu/armv7/omap-common/spl_nand.c |   47 -
  arch/arm/cpu/armv7/omap3/board.c  |2 +
  arch/arm/include/asm/bootm.h  |   26 +++
  arch/arm/include/asm/omap_common.h|2 +
  arch/arm/lib/Makefile |5 +-
  arch/arm/lib/bootm.c  |  341 +++--
  board/ait/cam_enc_4xx/cam_enc_4xx.c   |   48 ++--
  board/davinci/ea20/ea20.c |   38 +---
  board/enbw/enbw_cmc/enbw_cmc.c|2 +-
  board/omicron/calimain/calimain.c |2 +-
  board/technexion/twister/twister.c|   23 ++
  board/teejet/mt_ventoux/mt_ventoux.h  |   11 +-
  board/timll/devkit8000/devkit8000.c   |   37 +++
  common/Makefile   |1 +
  common/cmd_spl.c  |  188 
  doc/README.commands.spl   |   31 +++
  drivers/mtd/nand/omap_gpmc.c  |   14 +-
  drivers/power/twl4030.c   |   18 ++-
  drivers/spi/omap3_spi.c   |   66 ++-
  drivers/spi/omap3_spi.h   |2 +
  include/cmd_spl.h |   31 +++
  include/configs/devkit8000.h  |   15 +-
  include/configs/ea20.h|2 +
  include/configs/mt_ventoux.h  |   10 +
  include/configs/twister.h |   12 +
  include/image.h   |2 +
  29 files changed, 777 insertions(+), 249 deletions(-)
  create mode 100644 arch/arm/include/asm/bootm.h
  create mode 100644 common/cmd_spl.c
  create mode 100644 doc/README.commands.spl
  create mode 100644 include/cmd_spl.h


Applied to u-boot-arm/master, thanks.

Amicalement,
--
Albert.
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Re: [U-Boot] Please pull u-boot-ti/next

2012-03-26 Thread Tom Rini
On Mon, Mar 26, 2012 at 12:06:47PM -0700, Tom Rini wrote:
 On Fri, Mar 16, 2012 at 10:15:28AM -0700, Tom Rini wrote:
 
  Hello,
  
  The following changes since commit 5c91ee919c359e89fcb3230722253dbb9b4f7e32:
Ian Campbell (1):
  ARM: dreamplug: Enable FDT support
 
 This has been updated as follows:
 
 The following changes since commit 5c91ee919c359e89fcb3230722253dbb9b4f7e32:
   Ian Campbell (1):
 ARM: dreamplug: Enable FDT support
 
 are available in the git repository at:
 
   git://git.denx.de/u-boot-ti next
[snip]

With the updates to u-boot-arm/next, this needs a little manual merging
on the cam_enc_4xx changes.  I've done this locally and can push if you
like.

-- 
Tom


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Re: [U-Boot] [PATCH v5] kirkwood: add NAS62x0 board support

2012-03-26 Thread Jason
On Mon, Mar 26, 2012 at 03:34:37PM -0400, Jason Cooper wrote:
 On Mon, Mar 26, 2012 at 07:57:38PM +0200, Luka Perkov wrote:
...
  Is there a list where we can talk about this? I dont think we should use
  u-boot list for this...
 
 linux-arm-ker...@vger.kernel.org, CC'd.

oops, that's the old address, current is
linux-arm-ker...@lists.infradead.org

thx,

Jason.
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Re: [U-Boot] [GIT PULL] Pull request: u-boot-imx

2012-03-26 Thread Albert ARIBAUD

Le 26/03/2012 22:45, Albert ARIBAUD a écrit :

Hi Stefano,

Le 08/03/2012 08:52, Stefano Babic a écrit :

Hi Albert,

please pull from u-boot-imx, thanks.

The following changes since commit
32ec258f829808dd7cf74fd83ba999fdaaeab715:

IXP: Fix GPIO_INT_ACT_LOW_SET() (2012-03-08 08:11:45 +0100)

are available in the git repository at:
git://www.denx.de/git/u-boot-imx.git master

Dirk Behme (1):
imximage: Remove overwriting of flash_offset

Eric Nelson (2):
i.MX6: mx6qsabrelite: add ext2 support
mx6q: mx6qsabrelite: setup_spi() should be called in board_init to
allow use for environment

Fabio Estevam (5):
mx51evk: Fix CONFIG_SYS_MEMTEST_END
mx53evk: Fix CONFIG_SYS_MEMTEST_END
mx53smd: Fix CONFIG_SYS_MEMTEST_END
efikamx: Fix CONFIG_SYS_MEMTEST_END
mx31pdk: Fix CONFIG_SYS_MEMTEST_END

Helmut Raiger (1):
mx31: add ARM11P power gating to get_reset_cause

arch/arm/cpu/arm1136/mx31/generic.c | 2 ++
board/freescale/mx6qsabrelite/mx6qsabrelite.c | 8 
include/configs/efikamx.h | 2 +-
include/configs/mx31pdk.h | 2 +-
include/configs/mx51evk.h | 2 +-
include/configs/mx53evk.h | 2 +-
include/configs/mx53smd.h | 2 +-
include/configs/mx6qsabrelite.h | 1 +
tools/imximage.c | 18 ++
tools/imximage.h | 1 +
10 files changed, 27 insertions(+), 13 deletions(-)


Applied to u-boot-arm/master, thanks.

Amicalement,


Correction: I seem to have misapplied this and the TI tree, so I rolled 
back my changes...


The imx master branch has moved and no longer starts with the commits 
above from the base above. Stefano, can you rebase on u-boot-arm and 
re-issue an up-to-date request?


Amicalement,
--
Albert.
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Re: [U-Boot] Please pull u-boot-ti/master

2012-03-26 Thread Albert ARIBAUD

Le 26/03/2012 22:45, Albert ARIBAUD a écrit :

Hi Tom,

Le 26/03/2012 19:36, Tom Rini a écrit :

On Mon, Mar 19, 2012 at 11:29:06AM -0700, Tom Rini wrote:

Hello,

The following changes since commit
32ec258f829808dd7cf74fd83ba999fdaaeab715:
Marek Vasut (1):
IXP: Fix GPIO_INT_ACT_LOW_SET()

[snip]

This pull request is now updated as such:

The following changes since commit
32ec258f829808dd7cf74fd83ba999fdaaeab715:
Marek Vasut (1):
IXP: Fix GPIO_INT_ACT_LOW_SET()

are available in the git repository at:

git://git.denx.de/u-boot-ti master

Christian Riesch (1):
calimain, enbw_cmc: Fix typo in comments

Grazvydas Ignotas (1):
twl4030: fix potential power supply handling issues

Simon Schwarz (8):
Add cmd_spl command
devkit8000: add config for spl command
omap-common: Add NAND SPL linux booting
devkit8000/spl: init GPMC for dm9000 in SPL
omap-common/spl: Add linux boot to SPL
omap/spl: change output of spl_parse_image_header
devkit8000: Implement and activate direct OS boot
arm: Add Prep subcommand support to bootm

Stefano Babic (8):
Add cache functions to SPL for armv7
OMAP3: SPL: do not call I2C init if no I2C is set.
SPL: call cleanup_before_linux() before booting Linux
OMAP3: twister: add support to boot Linux from SPL
NAND: TI: fix warnings in omap_gpmc.c
OMAP3: mt_ventoux: updated timing for FPGA
OMAP3: mt_ventoux: sets its own mtdparts
Davinci: ea20: use gpio framework to access gpios

Tom Rini (1):
cam_enc_4xx: Rename 'images' to 'imgs'

jacopo mondi (1):
omap3_spi: receive transmit mode

arch/arm/cpu/armv7/Makefile | 2 -
arch/arm/cpu/armv7/cpu.c | 2 +
arch/arm/cpu/armv7/omap-common/spl.c | 46 -
arch/arm/cpu/armv7/omap-common/spl_nand.c | 47 -
arch/arm/cpu/armv7/omap3/board.c | 2 +
arch/arm/include/asm/bootm.h | 26 +++
arch/arm/include/asm/omap_common.h | 2 +
arch/arm/lib/Makefile | 5 +-
arch/arm/lib/bootm.c | 341 +++--
board/ait/cam_enc_4xx/cam_enc_4xx.c | 48 ++--
board/davinci/ea20/ea20.c | 38 +---
board/enbw/enbw_cmc/enbw_cmc.c | 2 +-
board/omicron/calimain/calimain.c | 2 +-
board/technexion/twister/twister.c | 23 ++
board/teejet/mt_ventoux/mt_ventoux.h | 11 +-
board/timll/devkit8000/devkit8000.c | 37 +++
common/Makefile | 1 +
common/cmd_spl.c | 188 
doc/README.commands.spl | 31 +++
drivers/mtd/nand/omap_gpmc.c | 14 +-
drivers/power/twl4030.c | 18 ++-
drivers/spi/omap3_spi.c | 66 ++-
drivers/spi/omap3_spi.h | 2 +
include/cmd_spl.h | 31 +++
include/configs/devkit8000.h | 15 +-
include/configs/ea20.h | 2 +
include/configs/mt_ventoux.h | 10 +
include/configs/twister.h | 12 +
include/image.h | 2 +
29 files changed, 777 insertions(+), 249 deletions(-)
create mode 100644 arch/arm/include/asm/bootm.h
create mode 100644 common/cmd_spl.c
create mode 100644 doc/README.commands.spl
create mode 100644 include/cmd_spl.h


Applied to u-boot-arm/master, thanks.

Amicalement,


Correction: the arm: Add Prep subcommand support to bootm commit does 
not apply cleanly to the u-boot tree. I am rolling by my tree. Please 
rebase on it and re-request a pull.


Amicalement,
--
Albert.
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