[PATCH] D135938: [X86] Add AVX-VNNI-INT8 instructions.

2022-10-14 Thread Simon Pilgrim via Phabricator via cfe-commits 
RKSimon added inline comments.



Comment at: clang/test/CodeGen/avxvnniint8-builtins.c:1
+// RUN: %clang_cc1 -flax-vector-conversions=none -ffreestanding %s 
-triple=x86_64-unknown-unknown -target-feature +avxvnniint8 -emit-llvm -o - 
-Wall -Werror | FileCheck %s
+

32-bit test coverage?


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[PATCH] D135938: [X86] Add AVX-VNNI-INT8 instructions.

2022-10-14 Thread Freddy, Ye via Phabricator via cfe-commits 
FreddyYe added a comment.

I'm out of machines next two days. Sorry for late address in advance... I'll 
update next Monday. Thanks for review!


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[PATCH] D135938: [X86] Add AVX-VNNI-INT8 instructions.

2022-10-17 Thread Freddy, Ye via Phabricator via cfe-commits 
FreddyYe marked 4 inline comments as done.
FreddyYe added a comment.

THX for review!


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[PATCH] D135938: [X86] Add AVX-VNNI-INT8 instructions.

2022-10-17 Thread Simon Pilgrim via Phabricator via cfe-commits 
RKSimon added inline comments.



Comment at: clang/docs/ReleaseNotes.rst:553
 - Fix 32-bit ``__fastcall`` and ``__vectorcall`` ABI mismatch with MSVC.
+- Support ISA of ``AVX-VNNI-INT8``.
 

Please add a bullet list of the added intrinsics



Comment at: clang/lib/Headers/avxvnniint8intrin.h:32
+
+static __inline__ __m256i __DEFAULT_FN_ATTRS256
+_mm256_dpbssd_epi32(__m256i __W, __m256i __A, __m256i __B) {

Please add doxygen descriptions for each intrinsic



Comment at: llvm/test/MC/Disassembler/X86/avx-vnni_int8-att.txt:1
+# RUN: llvm-mc --disassemble %s -triple=i686 | FileCheck %s
+

I think we'd be better off merging the att/intel test files and using 
--check-prefix 


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[PATCH] D135938: [X86] Add AVX-VNNI-INT8 instructions.

2022-10-17 Thread Freddy, Ye via Phabricator via cfe-commits 
FreddyYe marked 2 inline comments as done.
FreddyYe added inline comments.



Comment at: llvm/test/MC/Disassembler/X86/avx-vnni_int8-att.txt:1
+# RUN: llvm-mc --disassemble %s -triple=i686 | FileCheck %s
+

RKSimon wrote:
> I think we'd be better off merging the att/intel test files and using 
> --check-prefix 
I see many old tests split them into two files. What about remove 32bit att 
test and 64 bit intel test, it can also help reduce code base?


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[PATCH] D135938: [X86] Add AVX-VNNI-INT8 instructions.

2022-10-17 Thread Freddy, Ye via Phabricator via cfe-commits 
FreddyYe updated this revision to Diff 468398.
FreddyYe added a comment.

Address comments.


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Files:
  clang/docs/ReleaseNotes.rst
  clang/include/clang/Basic/BuiltinsX86.def
  clang/include/clang/Driver/Options.td
  clang/lib/Basic/Targets/X86.cpp
  clang/lib/Basic/Targets/X86.h
  clang/lib/Headers/CMakeLists.txt
  clang/lib/Headers/avxvnniint8intrin.h
  clang/lib/Headers/cpuid.h
  clang/lib/Headers/immintrin.h
  clang/test/CodeGen/attr-target-x86.c
  clang/test/CodeGen/avxvnniint8-builtins.c
  clang/test/Driver/x86-target-features.c
  clang/test/Preprocessor/x86_target_features.c
  llvm/docs/ReleaseNotes.rst
  llvm/include/llvm/IR/IntrinsicsX86.td
  llvm/include/llvm/Support/X86TargetParser.def
  llvm/lib/Support/Host.cpp
  llvm/lib/Support/X86TargetParser.cpp
  llvm/lib/Target/X86/X86.td
  llvm/lib/Target/X86/X86ISelLowering.cpp
  llvm/lib/Target/X86/X86ISelLowering.h
  llvm/lib/Target/X86/X86InstrFoldTables.cpp
  llvm/lib/Target/X86/X86InstrFragmentsSIMD.td
  llvm/lib/Target/X86/X86InstrInfo.cpp
  llvm/lib/Target/X86/X86InstrInfo.td
  llvm/lib/Target/X86/X86InstrSSE.td
  llvm/lib/Target/X86/X86IntrinsicsInfo.h
  llvm/test/CodeGen/X86/avxvnniint8-intrinsics.ll
  llvm/test/MC/Disassembler/X86/avx-vnni_int8-intel.txt
  llvm/test/MC/Disassembler/X86/x86-64-avx-vnni_int8-att.txt
  llvm/test/MC/X86/avx-vnni-int8-intel.s
  llvm/test/MC/X86/x86-64-avx-vnni-int8-att.s

Index: llvm/test/MC/X86/x86-64-avx-vnni-int8-att.s
===
--- /dev/null
+++ llvm/test/MC/X86/x86-64-avx-vnni-int8-att.s
@@ -0,0 +1,242 @@
+// RUN: llvm-mc -triple=x86_64-unknown-unknown -mattr=+avxvnniint8 --show-encoding < %s  | FileCheck %s
+
+// CHECK: vpdpbssd %ymm14, %ymm13, %ymm12
+// CHECK: encoding: [0xc4,0x42,0x17,0x50,0xe6]
+ vpdpbssd %ymm14, %ymm13, %ymm12
+
+// CHECK: vpdpbssd %xmm14, %xmm13, %xmm12
+// CHECK: encoding: [0xc4,0x42,0x13,0x50,0xe6]
+ vpdpbssd %xmm14, %xmm13, %xmm12
+
+// CHECK: vpdpbssd  268435456(%rbp,%r14,8), %ymm13, %ymm12
+// CHECK: encoding: [0xc4,0x22,0x17,0x50,0xa4,0xf5,0x00,0x00,0x00,0x10]
+ vpdpbssd  268435456(%rbp,%r14,8), %ymm13, %ymm12
+
+// CHECK: vpdpbssd  291(%r8,%rax,4), %ymm13, %ymm12
+// CHECK: encoding: [0xc4,0x42,0x17,0x50,0xa4,0x80,0x23,0x01,0x00,0x00]
+ vpdpbssd  291(%r8,%rax,4), %ymm13, %ymm12
+
+// CHECK: vpdpbssd  (%rip), %ymm13, %ymm12
+// CHECK: encoding: [0xc4,0x62,0x17,0x50,0x25,0x00,0x00,0x00,0x00]
+ vpdpbssd  (%rip), %ymm13, %ymm12
+
+// CHECK: vpdpbssd  -1024(,%rbp,2), %ymm13, %ymm12
+// CHECK: encoding: [0xc4,0x62,0x17,0x50,0x24,0x6d,0x00,0xfc,0xff,0xff]
+ vpdpbssd  -1024(,%rbp,2), %ymm13, %ymm12
+
+// CHECK: vpdpbssd  268435456(%rbp,%r14,8), %xmm13, %xmm12
+// CHECK: encoding: [0xc4,0x22,0x13,0x50,0xa4,0xf5,0x00,0x00,0x00,0x10]
+ vpdpbssd  268435456(%rbp,%r14,8), %xmm13, %xmm12
+
+// CHECK: vpdpbssd  291(%r8,%rax,4), %xmm13, %xmm12
+// CHECK: encoding: [0xc4,0x42,0x13,0x50,0xa4,0x80,0x23,0x01,0x00,0x00]
+ vpdpbssd  291(%r8,%rax,4), %xmm13, %xmm12
+
+// CHECK: vpdpbssd  (%rip), %xmm13, %xmm12
+// CHECK: encoding: [0xc4,0x62,0x13,0x50,0x25,0x00,0x00,0x00,0x00]
+ vpdpbssd  (%rip), %xmm13, %xmm12
+
+// CHECK: vpdpbssd  -512(,%rbp,2), %xmm13, %xmm12
+// CHECK: encoding: [0xc4,0x62,0x13,0x50,0x24,0x6d,0x00,0xfe,0xff,0xff]
+ vpdpbssd  -512(,%rbp,2), %xmm13, %xmm12
+
+// CHECK: vpdpbssds %ymm14, %ymm13, %ymm12
+// CHECK: encoding: [0xc4,0x42,0x17,0x51,0xe6]
+ vpdpbssds %ymm14, %ymm13, %ymm12
+
+// CHECK: vpdpbssds %xmm14, %xmm13, %xmm12
+// CHECK: encoding: [0xc4,0x42,0x13,0x51,0xe6]
+ vpdpbssds %xmm14, %xmm13, %xmm12
+
+// CHECK: vpdpbssds  268435456(%rbp,%r14,8), %ymm13, %ymm12
+// CHECK: encoding: [0xc4,0x22,0x17,0x51,0xa4,0xf5,0x00,0x00,0x00,0x10]
+ vpdpbssds  268435456(%rbp,%r14,8), %ymm13, %ymm12
+
+// CHECK: vpdpbssds  291(%r8,%rax,4), %ymm13, %ymm12
+// CHECK: encoding: [0xc4,0x42,0x17,0x51,0xa4,0x80,0x23,0x01,0x00,0x00]
+ vpdpbssds  291(%r8,%rax,4), %ymm13, %ymm12
+
+// CHECK: vpdpbssds  (%rip), %ymm13, %ymm12
+// CHECK: encoding: [0xc4,0x62,0x17,0x51,0x25,0x00,0x00,0x00,0x00]
+ vpdpbssds  (%rip), %ymm13, %ymm12
+
+// CHECK: vpdpbssds  -1024(,%rbp,2), %ymm13, %ymm12
+// CHECK: encoding: [0xc4,0x62,0x17,0x51,0x24,0x6d,0x00,0xfc,0xff,0xff]
+ vpdpbssds  -1024(,%rbp,2), %ymm13, %ymm12
+
+// CHECK: vpdpbssds  268435456(%rbp,%r14,8), %xmm13, %xmm12
+// CHECK: encoding: [0xc4,0x22,0x13,0x51,0xa4,0xf5,0x00,0x00,0x00,0x10]
+ vpdpbssds  268435456(%rbp,%r14,8), %xmm13, %xmm12
+
+// CHECK: vpdpbssds  291(%r8,%rax,4), %xmm13, %xmm12
+// CHECK: encoding: [0xc4,0x42,0x13,0x51,0xa4,0x80,0x23,0x01,0x00,0x00]
+ vpdpbssds  291(%r8,%rax,4), %xmm13, %xmm12
+
+// CHECK: vpdpbssds  (%rip), %xmm13, %xmm12
+// CHECK: encoding: [0xc4,0x62,0x13,0x51,0x25,0x00,0x00,0x00,0x00]
+ vpdpbssds  (%rip), %xmm13, %xmm12
+
+// CHECK: vpdpbssds  -512(,

[PATCH] D135938: [X86] Add AVX-VNNI-INT8 instructions.

2022-10-17 Thread Craig Topper via Phabricator via cfe-commits 
craig.topper added inline comments.



Comment at: llvm/lib/Target/X86/X86InstrSSE.td:8141
+   i128mem, X86vpdpbssd, SchedWriteVecIMul.XMM,
+   1>,  T8XD;
+  defm VPDPBSSDY  : avx_dotprod_rm<0x50,"vpdpbssd",  v8i32, VR256, loadv8i32,

There are two spaces before T8XD. Same the next few instructions



Comment at: llvm/test/CodeGen/X86/avxvnniint8-intrinsics.ll:1
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avxvnniint8  
--show-mc-encoding | FileCheck %s --check-prefixes=X86

This is only testing half the intrinsics. I think you test the non-S for 128 
and the S for 256.



Comment at: llvm/test/CodeGen/X86/avxvnniint8-intrinsics.ll:6
+
+declare <4 x i32> @llvm.x86.avx2.vpdpbssd.128(<4 x i32>, <4 x i32>, <4 x i32>)
+

Are there tests for commuting?


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[PATCH] D135938: [X86] Add AVX-VNNI-INT8 instructions.

2022-10-18 Thread Simon Pilgrim via Phabricator via cfe-commits 
RKSimon added a comment.

Can you fix the MC + disasm test file names - drop att/intel and ensure you 
test both syntaxes for 32 and 64 bits.

Ideally the 32/64 bit names should be close to each other in a file list (e.g. 
avx-vnni-int8-32.s + avx-vnni-int8-64.s ?)


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[PATCH] D135938: [X86] Add AVX-VNNI-INT8 instructions.

2022-10-18 Thread Freddy, Ye via Phabricator via cfe-commits 
FreddyYe marked 2 inline comments as done.
FreddyYe added a comment.

In D135938#3864521 , @RKSimon wrote:

> Can you fix the MC + disasm test file names - drop att/intel and ensure you 
> test both syntaxes for 32 and 64 bits.
>
> Ideally the 32/64 bit names should be close to each other in a file list 
> (e.g. avx-vnni-int8-32.s + avx-vnni-int8-64.s ?)

I get your point of "close to each other" and updated. And I merged the Disasm 
tests, while I didn't merge the MC tests because it is not so convenient to do. 
See latest updated.

Do we need to rename old tests to follow this rule? Old tests: 
https://github.com/llvm/llvm-project/tree/main/llvm/test/MC/X86 and 
https://github.com/llvm/llvm-project/tree/main/llvm/test/MC/Disassembler/X86


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[PATCH] D135938: [X86] Add AVX-VNNI-INT8 instructions.

2022-10-18 Thread Freddy, Ye via Phabricator via cfe-commits 
FreddyYe added inline comments.



Comment at: llvm/test/CodeGen/X86/avxvnniint8-intrinsics.ll:6
+
+declare <4 x i32> @llvm.x86.avx2.vpdpbssd.128(<4 x i32>, <4 x i32>, <4 x i32>)
+

craig.topper wrote:
> Are there tests for commuting?
Hi Craig,
Can you show an example of commutable for source operands but none of then are 
destination? I cannot figure out a good way to add such test.


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[PATCH] D135938: [X86] Add AVX-VNNI-INT8 instructions.

2022-10-18 Thread Craig Topper via Phabricator via cfe-commits 
craig.topper added inline comments.



Comment at: llvm/test/CodeGen/X86/avxvnniint8-intrinsics.ll:6
+
+declare <4 x i32> @llvm.x86.avx2.vpdpbssd.128(<4 x i32>, <4 x i32>, <4 x i32>)
+

FreddyYe wrote:
> craig.topper wrote:
> > Are there tests for commuting?
> Hi Craig,
> Can you show an example of commutable for source operands but none of then 
> are destination? I cannot figure out a good way to add such test.
See stack_fold_vpdpwssd_commuted in stack-folding-int-avxvnni.ll


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[PATCH] D135938: [X86] Add AVX-VNNI-INT8 instructions.

2022-10-18 Thread Freddy, Ye via Phabricator via cfe-commits 
FreddyYe added inline comments.



Comment at: llvm/test/CodeGen/X86/avxvnniint8-intrinsics.ll:6
+
+declare <4 x i32> @llvm.x86.avx2.vpdpbssd.128(<4 x i32>, <4 x i32>, <4 x i32>)
+

craig.topper wrote:
> FreddyYe wrote:
> > craig.topper wrote:
> > > Are there tests for commuting?
> > Hi Craig,
> > Can you show an example of commutable for source operands but none of then 
> > are destination? I cannot figure out a good way to add such test.
> See stack_fold_vpdpwssd_commuted in stack-folding-int-avxvnni.ll
Got it. Thanks!


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[PATCH] D135938: [X86] Add AVX-VNNI-INT8 instructions.

2022-10-19 Thread Phoebe Wang via Phabricator via cfe-commits 
pengfei added inline comments.



Comment at: clang/lib/Headers/CMakeLists.txt:146
   avxvnniintrin.h
+  avxvnniint8intrin.h
   bmi2intrin.h

Move it before `avxvnniintrin.h` for the order?



Comment at: llvm/lib/Support/X86TargetParser.cpp:584
 
+static constexpr FeatureBitset ImpliedFeaturesAVXVNNIINT8 = FeatureAVX2;
 static constexpr FeatureBitset ImpliedFeaturesAVX512FP16 =

This is redundant, I have fixed `ImpliedFeaturesAVX512FP16` in trunk code.


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[PATCH] D135938: [X86] Add AVX-VNNI-INT8 instructions.

2022-10-20 Thread Simon Pilgrim via Phabricator via cfe-commits 
RKSimon added a comment.

In D135938#3867170 , @FreddyYe wrote:

> I get your point of "close to each other" and updated. And I merged the 
> Disasm tests, while I didn't merge the MC tests because it is not so 
> convenient to do. See latest updated.
>
> Do we need to rename old tests to follow this rule? Old tests: 
> https://github.com/llvm/llvm-project/tree/main/llvm/test/MC/X86 and 
> https://github.com/llvm/llvm-project/tree/main/llvm/test/MC/Disassembler/X86

Its not a priority, but if you are ever bored and want to do some cleaning then 
it help!


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[PATCH] D135938: [X86] Add AVX-VNNI-INT8 instructions.

2022-10-20 Thread Freddy, Ye via Phabricator via cfe-commits 
FreddyYe marked 2 inline comments as done.
FreddyYe added a comment.

> Its not a priority, but if you are ever bored and want to do some cleaning 
> then it help!

I see. Then we are on the same side. I'll clean if I had time after landing 
these patches.


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[PATCH] D135938: [X86] Add AVX-VNNI-INT8 instructions.

2022-10-23 Thread Kan Shengchen via Phabricator via cfe-commits 
skan added inline comments.



Comment at: llvm/include/llvm/Support/X86TargetParser.def:205
 X86_FEATURE   (AVX512FP16,  "avx512fp16")
+X86_FEATURE   (AVXVNNIINT8, "avxvnniint8")
 X86_FEATURE   (AVXVNNI, "avxvnni")

Move it after AVXVNNI to keep the dictionary order?



Comment at: llvm/lib/Target/X86/X86InstrSSE.td:8127-8131
+multiclass avx_dotprod_rm opc, string OpcodeStr, ValueType OpVT,
+  RegisterClass RC, PatFrag MemOpFrag,
+  X86MemOperand x86memop, SDNode OpNode,
+  X86FoldableSchedWrite sched,
+  bit IsCommutable> {

Could you unify the name converntion? e.g Captialize the first character for 
all parameters for this multiclass.



Comment at: llvm/test/CodeGen/X86/stack-folding-int-avxvnniint8.ll:4-5
+
+target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
+target triple = "x86_64-unknown-unknown"
+

Could we remove these two lines?


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[PATCH] D135938: [X86] Add AVX-VNNI-INT8 instructions.

2022-10-26 Thread Simon Pilgrim via Phabricator via cfe-commits 
RKSimon added inline comments.



Comment at: clang/include/clang/Basic/BuiltinsX86.def:2098
 
+TARGET_BUILTIN(__builtin_ia32_vpdpbssd128, "V4iV4iV4iV4i", "ncV:128:", 
"avxvnniint8")
+TARGET_BUILTIN(__builtin_ia32_vpdpbssd256, "V8iV8iV8iV8i", "ncV:256:", 
"avxvnniint8")

Add ' AVX-VNNI-INT8' title comment like we have for other intrinsic sets



Comment at: clang/include/clang/Basic/BuiltinsX86.def:2111
+TARGET_BUILTIN(__builtin_ia32_vpdpbuuds128, "V4iV4iV4iV4i", "ncV:128:", 
"avxvnniint8")
+TARGET_BUILTIN(__builtin_ia32_vpdpbuuds256, "V8iV8iV8iV8i", "ncV:256:", 
"avxvnniint8")
 TARGET_HEADER_BUILTIN(_InterlockedAnd64, "WiWiD*Wi", "nh", "intrin.h", 
ALL_MS_LANGUAGES, "")

Move these earlier with the other vnni builtins



Comment at: llvm/lib/Target/X86/X86ISelLowering.h:592
+VPDPBSSD,
+VPDPBSSDS,
+

Do we actually need these? Are you intending to add DAG combines for these?


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[PATCH] D135938: [X86] Add AVX-VNNI-INT8 instructions.

2022-10-26 Thread Freddy, Ye via Phabricator via cfe-commits 
FreddyYe added inline comments.



Comment at: llvm/include/llvm/Support/X86TargetParser.def:205
 X86_FEATURE   (AVX512FP16,  "avx512fp16")
+X86_FEATURE   (AVXVNNIINT8, "avxvnniint8")
 X86_FEATURE   (AVXVNNI, "avxvnni")

skan wrote:
> Move it after AVXVNNI to keep the dictionary order?
Better refine at another patch since it's not ordered already



Comment at: llvm/lib/Target/X86/X86ISelLowering.h:592
+VPDPBSSD,
+VPDPBSSDS,
+

RKSimon wrote:
> Do we actually need these? Are you intending to add DAG combines for these?
Yes. A continued patch will support DAG combine like old VNNI instructions. 
https://reviews.llvm.org/D116039


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[PATCH] D135938: [X86] Add AVX-VNNI-INT8 instructions.

2022-10-27 Thread Phoebe Wang via Phabricator via cfe-commits 
pengfei accepted this revision.
pengfei added a comment.
This revision is now accepted and ready to land.

LGTM.


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[PATCH] D135938: [X86] Add AVX-VNNI-INT8 instructions.

2022-10-27 Thread Kan Shengchen via Phabricator via cfe-commits 
skan accepted this revision.
skan added a comment.

LGTM


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[PATCH] D135938: [X86] Add AVX-VNNI-INT8 instructions.

2022-10-13 Thread Craig Topper via Phabricator via cfe-commits 
craig.topper added inline comments.



Comment at: clang/lib/Basic/Targets/X86.cpp:781
+Builder.defineMacro("__AVXVNNIINT8__");
+  Builder.defineMacro("__AVXVNNIINT8_SUPPORTED__");
   if (HasAVXVNNI)

Why is this define needed?



Comment at: clang/lib/Basic/Targets/X86.cpp:971
   .Case("xsaveopt", true)
+  .Case("avxvnniint8", true)
   .Default(false);

This appears to have been in alpabetical order before.



Comment at: clang/lib/Headers/immintrin.h:257
 
+#if defined(__AVXVNNIINT8_SUPPORTED__)
+#if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) ||  
\

Why is this define needed?


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