Re: [edk2-devel] [RFC PATCH 00/17] Refactor and add RISC-V support in edk2 repo

2022-09-06 Thread Gerd Hoffmann
  Hi,

> RISC-V virt needs following packages from ARM. Need feedback whether they can
> be moved to a common location. Current RISC-V virt model DSC file include them
> directly. 
>   - ArmVirtPkg/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf
>   - ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.inf
>   - ArmVirtPkg/PlatformHasAcpiDtDxe/PlatformHasAcpiDtDxe.inf
>   - ArmVirtPkg/Library/NorFlashQemuLib/NorFlashQemuLib.inf

OvmfPkg is the place for both the x64 code and code shared by virt
platforms (like virtio drivers).  So the ArmVirtPkg code should move to
OvmfPkg (and I think some modules have already been moved over from
armvirt because riscv needs them too).

Not sure about ArmPlatformPkg

take care,
  Gerd



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Re: [edk2-devel] [PATCH v3 0/3] Ovmf: Allow IPv4 and IPv6 to be disabled at runtime

2022-09-06 Thread Gerd Hoffmann
On Tue, Sep 06, 2022 at 01:59:23PM +0200, Ard Biesheuvel wrote:
> Add some generic plumbing and wire it up for the QEMU based Ovmf
> platform so that IPv4 and/or IPv6 networking can be turned off from the
> QEMU command line.
> 
> This is a follow-up to Yuan's patch '[PATCH v1 0/2] Add support to
> disable VirtIo net at runtime' which only targeted the virtio network
> driver specifically.i
> 
> Changes since v2:
> - implement Gerd's suggestion to use a DSC include file for network
>   component overrides
> - add Laszlo's ack to patch #1
> 
> Changes since v1:
> - instead of a NULL class library that calls the Exit() boot service
>   from its constructor, use a replacement for the UefiDriverEntryPoint
>   library
> 
> Cc: Yuan Yu 
> Cc: Laszlo Ersek 
> Cc: Gerd Hoffmann 
> Cc: Pawel Polawski 
> Cc: Oliver Steffen 
> Cc: Jiewen Yao 
> Cc: Brian J. Johnson 

Acked-by: Gerd Hoffmann 

take care,
  Gerd



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Re: [edk2-devel] [PATCH V3 09/12] OvmfPkg: Update ConstructFwHobList for lazy accept

2022-09-06 Thread Gerd Hoffmann
  Hi,

> +  //
> +  // This memory region is split into 2 parts. The left part is 
> accepted.
> +  //
> +  PhysicalEnd= MaxAcceptedMemoryAddress;
> +  ResourceLength = PhysicalEnd - PhysicalStart;

Same comment here.  Can't happen when all memory below 4G is accepted,
and I think MaxAcceptedMemoryAddress is not needed either.

take care,
  Gerd



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Re: [edk2-devel] [PATCH V3 08/12] OvmfPkg: Introduce lazy accept in PlatformInitLib and PlatformPei

2022-09-06 Thread Gerd Hoffmann
On Mon, Sep 05, 2022 at 04:35:02PM +0800, Min Xu wrote:
> From: Min M Xu 
> 
> RFC: https://bugzilla.tianocore.org/show_bug.cgi?id=3937
> 
> There are below major changes in PlatformInitLib/PlatformPei
> 1. ProcessHobList
>   The unaccepted memory is accepted if it is under 4G address.

Good.

>   If an EFI_RESOURCE_MEMORY_UNACCEPTED memory region is cross the 4G
>   address, it will be split into 2 parts and only the left one (<4G)
>   is accepted.

Looks pointless to me.  I doubt this will ever happen given the address
space just below 4G is populated with firmware rom/flash, lapic, ioapic
and other devices.

take care,
  Gerd



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Re: [edk2-devel] [PATCH V3 05/12] MdeModulePkg: Update Dxe to handle unaccepted memory type

2022-09-06 Thread Gerd Hoffmann
On Mon, Sep 05, 2022 at 04:34:59PM +0800, Min Xu wrote:
> From: Min M Xu 
> 
> RFC: https://bugzilla.tianocore.org/show_bug.cgi?id=3937
> 
> Unaccepted memory is a kind of new memory type,
> CoreInitializeGcdServices() and CoreGetMemoryMap() are updated to handle
> the unaccepted memory type.
> 
> Ref: microsoft/mu_basecore@97e9c31
> 
> Cc: Jian J Wang 
> Cc: Liming Gao 
> Cc: Ray Ni 
> Cc: Erdem Aktas 
> Cc: Gerd Hoffmann 
> Cc: James Bottomley 
> Cc: Jiewen Yao 
> Cc: Tom Lendacky 
> Signed-off-by: Min Xu 

Acked-by: Gerd Hoffmann 



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Re: [edk2-devel] [PATCH V3 04/12] MdePkg: Add UEFI Unaccepted memory definition

2022-09-06 Thread Gerd Hoffmann
On Mon, Sep 05, 2022 at 04:34:58PM +0800, Min Xu wrote:
> From: Min M Xu 
> 
> RFC: https://bugzilla.tianocore.org/show_bug.cgi?id=3937
> 
> Plase refer to:
>   UEFI Spec v2.9 Table 7-5 Memory Type Usage before ExitBootServices()
> 
> Cc: Michael D Kinney 
> Cc: Liming Gao 
> Cc: Zhiguang Liu 
> Cc: Erdem Aktas 
> Cc: Gerd Hoffmann 
> Cc: James Bottomley 
> Cc: Jiewen Yao 
> Cc: Tom Lendacky 
> Reviewed-by: Jiewen Yao 
> Signed-off-by: Min Xu 

Acked-by: Gerd Hoffmann 



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Re: [edk2-devel] [PATCH V3 03/12] OvmfPkg: Use EFI_RESOURCE_MEMORY_UNACCEPTED which defined in MdeModulePkg

2022-09-06 Thread Gerd Hoffmann
On Mon, Sep 05, 2022 at 04:34:57PM +0800, Min Xu wrote:
> From: Min M Xu 
> 
> RFC: https://bugzilla.tianocore.org/show_bug.cgi?id=3937
> 
> EFI_RESOURCE_MEMORY_UNACCEPTED is defined in MdeModulePkg. The files
> which use the definition are updated as well.

Acked-by: Gerd Hoffmann 



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Re: [edk2-devel] [PATCH] UsbNetworkPkg: add USB network devices support

2022-09-06 Thread RichardHo [何明忠] via groups . io
Hi Rebecca,

We didn't check it in QEMU.
Is QEMU report standard USB RNDIS protocol?

We only test it in physical device. Below is device lists.

USB RNDIS:
AST2500: BMC report the RNDIS device

USB NCM:
DisplayLink HIS USB3.0 Portable Dock(DisplayLink (UK) Ltd.)
Vendor ID: 0x17E9
Product ID: 0x4301

USB ECM:
DM9621(Davicom Semiconductor, Inc.)
Vendor ID: 0x0A46
Product ID: 0x1269

Thanks,
Richard

-Original Message-
From: Rebecca Cran 
Sent: 2022年9月6日 11:05 PM
To: devel@edk2.groups.io; RichardHo [何明忠] 
Cc: Andrew Fish ; Leif Lindholm ; 
Michael D Kinney ; Michael Kubacki 
; Zhiguang Liu ; Liming 
Gao ; TonyLo [羅金松] 
Subject: [EXTERNAL] Re: [edk2-devel] [PATCH] UsbNetworkPkg: add USB network 
devices support


**CAUTION: The e-mail below is from an external source. Please exercise caution 
before opening attachments, clicking links, or following guidance.**

Is it expected that this will work with QEMU (with the usb-net fixes from 
https://nam12.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgithub.com%2Fmcb30%2Fqemu%2Ftree%2Fusbnet3data=05%7C01%7Crichardho%40ami.com%7C1dd20e124cd64659b4e908da90193dd3%7C27e97857e15f486cb58e86c2b3040f93%7C1%7C0%7C637980735342252066%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000%7C%7C%7Csdata=xHRQc%2Fnv7fPk%2BPEVavIlfFpaXj6Gq8NiHUsRdd5HD%2Fc%3Dreserved=0),
for example using the SBSA-REF machine for Arm or OVMF for X64?

I'm adding the following parameters to QEMU:

-netdev user,id=net0,net=192.168.10.0/24,dhcpstart=192.168.10.1 -device 
usb-net,netdev=net0


On OVMF I get the following crash when loading UsbRndis.efi after 
NetworkCommon.efi:

Support(): UNDI3.1 found on handle 6550D18
Support(): supported on 6550D18
Start(): UNDI3.1 found
 X64 Exception Type - 06(#UD - Invalid Opcode)  CPU Apic ID -  
RIP  - 000B0001, CS  - 0038, RFLAGS - 0283 RAX  
- 0653AF80, RCX - 065DC382, RDX - 5441 RBX  - 
065D8000, RSP - 07E8EA48, RBP - 065DB001 RSI  - 
0048, RDI - 06CE82C0
R8   - 07E8EA60, R9  - 07E8EAD0, R10 - 07E8E804
R11  - , R12 - 8003, R13 - 0001
R14  - 06CEE640, R15 - 0006
DS   - 0030, ES  - 0030, FS  - 0030
GS   - 0030, SS  - 0030
CR0  - 80010033, CR2 - , CR3 - 07C01000
CR4  - 0668, CR8 - 
DR0  - , DR1 - , DR2 - 
DR3  - , DR6 - 0FF0, DR7 - 0400 GDTR - 
079DE000 0047, LDTR - 
IDTR - 0753C018 0FFF,   TR - 
FXSAVE_STATE - 07E8E6A0
 Can't find image information. 


On Arm, I don't get a crash but no network interface gets created.
I've checked the QEMU RNDIS interface is working: if I boot to Linux I can get 
an IP address and communicate with the outside world.

--
Rebecca Cran


On 9/1/22 23:24, RichardHo [何明忠] via groups.io wrote:
> UsbNetworkPkg provides network functions for USB ACM, USB NCM, and USB
> RNDIS network device.
>
> Signed-off-by: Richard Ho 
> Cc: Andrew Fish 
> Cc: Leif Lindholm 
> Cc: Michael D Kinney 
> Cc: Michael Kubacki 
> Cc: Zhiguang Liu 
> Cc: Liming Gao 
> Reviewed-by: Tony Lo 
> ---
>   UsbNetworkPkg/Config/UsbNetworkPkg.inc.dsc|9 +
>   .../Config/UsbNetworkPkgComponentsDxe.inc.dsc |   20 +
>   .../Config/UsbNetworkPkgComponentsDxe.inc.fdf |   20 +
>   .../Config/UsbNetworkPkgDefines.inc.dsc   |   23 +
>   .../Include/Protocol/UsbEthernetProtocol.h|  872 +
>   UsbNetworkPkg/NetworkCommon/ComponentName.c   |  264 +++
>   UsbNetworkPkg/NetworkCommon/DriverBinding.c   |  583 ++
>   UsbNetworkPkg/NetworkCommon/DriverBinding.h   |  263 +++
>   UsbNetworkPkg/NetworkCommon/NetworkCommon.inf |   43 +
>   UsbNetworkPkg/NetworkCommon/PxeFunction.c | 1734 +
>   UsbNetworkPkg/ReadMe.md   |   65 +
>   UsbNetworkPkg/ReleaseNotes.md |   11 +
>   UsbNetworkPkg/UsbCdcEcm/ComponentName.c   |  170 ++
>   UsbNetworkPkg/UsbCdcEcm/UsbCdcEcm.c   |  504 +
>   UsbNetworkPkg/UsbCdcEcm/UsbCdcEcm.h   |  211 ++
>   UsbNetworkPkg/UsbCdcEcm/UsbCdcEcm.inf |   41 +
>   UsbNetworkPkg/UsbCdcEcm/UsbEcmFunction.c  |  861 
>   UsbNetworkPkg/UsbCdcNcm/ComponentName.c   |  170 ++
>   UsbNetworkPkg/UsbCdcNcm/UsbCdcNcm.c   |  508 +
>   UsbNetworkPkg/UsbCdcNcm/UsbCdcNcm.h   |  245 +++
>   UsbNetworkPkg/UsbCdcNcm/UsbCdcNcm.inf |   41 +
>   UsbNetworkPkg/UsbCdcNcm/UsbNcmFunction.c  |  946 +
>   UsbNetworkPkg/UsbNetworkPkg.dec   |   32 +
>   UsbNetworkPkg/UsbRndis/ComponentName.c|  172 ++
>   UsbNetworkPkg/UsbRndis/UsbRndis.c |  848 

Re: [edk2-devel] [PATCH V3 01/12] MdeModulePkg: Add PrePiHob.h

2022-09-06 Thread Gerd Hoffmann
On Mon, Sep 05, 2022 at 04:34:55PM +0800, Min Xu wrote:
> From: Min M Xu 
> 
> RFC: https://bugzilla.tianocore.org/show_bug.cgi?id=3937
> 
> EFI_RESOURCE_MEMORY_UNACCEPTED is defined for unaccepted memory.
> But this defitinion has not been officially in the PI spec. Base
> on the code-first we define EFI_RESOURCE_MEMORY_UNACCEPTED at
> MdeModulePkg/Include/Pi/PrePiHob.h.
> 
> Cc: Jian J Wang 
> Cc: Liming Gao 
> Cc: Ray Ni 
> Cc: Erdem Aktas 
> Cc: Gerd Hoffmann 
> Cc: James Bottomley 
> Cc: Jiewen Yao 
> Cc: Tom Lendacky 
> Signed-off-by: Min Xu 

Acked-by: Gerd Hoffmann 



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Re: [edk2-devel] [PATCH V2 01/14] MdeModulePkg: Add PrePiHob.h

2022-09-06 Thread Gerd Hoffmann
On Sun, Sep 04, 2022 at 11:34:14AM +, Xu, Min M wrote:
> On September 1, 2022 11:48 PM, Gerd Hoffmann wrote:
> >   Hi,
> > 
> > > EFI_RESOURCE_MEMORY_UNACCEPTED is defined for unaccepted memory.
> > > But this defitinion has not been officially in the PI spec.
> > 
> > I think this has just changed with uefi spec 2.10 released in August.
> > 
> I carefully checked the UEFI spec 2.10 but didn't find the unaccepted related 
> changes in version 2.10. The latest one is in version 2.9. " 2134 Introduce 
> unaccepted memory type "

Hmm, seems PI spec has its own memory types instead if just using the
UEFI spec ones so unaccepted memory being in UEFI doesn't help here as
long as we don't have a new PI spec yet.  Is there any ETA for the next
PI spec update?

take care,
  Gerd



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[edk2-devel] [PATCH v2 1/1] OvmfPkg/QemuVideoDxe: fix bochs mode init

2022-09-06 Thread Gerd Hoffmann
Add VgaInb() helper function to read vga registers.  With that in place
fix the unblanking.  We need to put the ATT_ADDRESS_REGISTER flip flop
into a known state, which is done by reading the
INPUT_STATUS_1_REGISTER.  Reading the INPUT_STATUS_1_REGISTER only works
when the device is in color mode, so make sure that bit (0x01) is set in
MISC_OUTPUT_REGISTER.

Currently the mode setting works more by luck because
ATT_ADDRESS_REGISTER flip flip happens to be in the state we need.

Signed-off-by: Gerd Hoffmann 
---
 OvmfPkg/QemuVideoDxe/Driver.c | 31 ++-
 1 file changed, 30 insertions(+), 1 deletion(-)

diff --git a/OvmfPkg/QemuVideoDxe/Driver.c b/OvmfPkg/QemuVideoDxe/Driver.c
index b91909a14e59..a15e54d38fd2 100644
--- a/OvmfPkg/QemuVideoDxe/Driver.c
+++ b/OvmfPkg/QemuVideoDxe/Driver.c
@@ -984,6 +984,31 @@ VgaOutb (
   }
 }
 
+UINT8
+VgaInb (
+  QEMU_VIDEO_PRIVATE_DATA  *Private,
+  UINTNReg
+  )
+{
+  EFI_STATUS  Status;
+  UINT8 Data = 0;
+
+  if (Private->Variant == QEMU_VIDEO_BOCHS_MMIO) {
+Status = Private->PciIo->Mem.Read (
+   Private->PciIo,
+   EfiPciIoWidthUint8,
+   PCI_BAR_IDX2,
+   0x400 - 0x3c0 + Reg,
+   1,
+   
+   );
+ASSERT_EFI_ERROR (Status);
+  } else {
+Data = inb (Private, Reg);
+  }
+  return Data;
+}
+
 VOID
 InitializeBochsGraphicsMode (
   QEMU_VIDEO_PRIVATE_DATA  *Private,
@@ -998,7 +1023,11 @@ InitializeBochsGraphicsMode (
 ModeData->ColorDepth
 ));
 
-  /* unblank */
+  /* set color mode */
+  VgaOutb (Private, MISC_OUTPUT_REGISTER, 0x01);
+
+  /* reset flip flop + unblank */
+  VgaInb (Private, INPUT_STATUS_1_REGISTER);
   VgaOutb (Private, ATT_ADDRESS_REGISTER, 0x20);
 
   BochsWrite (Private, VBE_DISPI_INDEX_ENABLE, 0);
-- 
2.37.3



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[edk2-devel] [PATCH v1 2/2] .azurepipelines: Add SignedCapsulePkg to CI

2022-09-06 Thread Michael Kubacki
From: Michael Kubacki 

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4050

Adds SignedCapsulePkg to the "OTHER" CI matrix job so it is built
in edk2 CI.

Cc: Sean Brogan 
Cc: Bret Barkelew 
Cc: Michael D Kinney 
Cc: Liming Gao 
Cc: Jian J Wang 
Signed-off-by: Michael Kubacki 
---
 .azurepipelines/templates/pr-gate-build-job.yml | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/.azurepipelines/templates/pr-gate-build-job.yml 
b/.azurepipelines/templates/pr-gate-build-job.yml
index 0e4ad019bf03..f37cc826b51e 100644
--- a/.azurepipelines/templates/pr-gate-build-job.yml
+++ b/.azurepipelines/templates/pr-gate-build-job.yml
@@ -37,7 +37,7 @@ jobs:
 Build.Pkgs: 'NetworkPkg,RedfishPkg'
 Build.Targets: 'DEBUG,RELEASE,NO-TARGET,NOOPT'
   TARGET_OTHER:
-Build.Pkgs: 'PcAtChipsetPkg,PrmPkg,ShellPkg,StandaloneMmPkg'
+Build.Pkgs: 
'PcAtChipsetPkg,PrmPkg,ShellPkg,StandaloneMmPkg,SignedCapsulePkg'
 Build.Targets: 'DEBUG,RELEASE,NO-TARGET,NOOPT'
   TARGET_FMP_FAT_TEST:
 Build.Pkgs: 'FmpDevicePkg,FatPkg,UnitTestFrameworkPkg,DynamicTablesPkg'
-- 
2.28.0.windows.1



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[edk2-devel] [PATCH v1 1/2] SignedCapsulePkg: Add package CI YAML file

2022-09-06 Thread Michael Kubacki
From: Michael Kubacki 

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4050

Adds the package as a supported package to .pytool/CISettings.py
and adds a CI YAML for the package so it can be run in CI.

Cc: Jian J Wang 
Signed-off-by: Michael Kubacki 
---
 .pytool/CISettings.py |  1 +
 SignedCapsulePkg/SignedCapsulePkg.ci.yaml | 90 
 2 files changed, 91 insertions(+)

diff --git a/.pytool/CISettings.py b/.pytool/CISettings.py
index cf9e0d77b19b..306e27893e58 100644
--- a/.pytool/CISettings.py
+++ b/.pytool/CISettings.py
@@ -62,6 +62,7 @@ class Settings(CiBuildSettingsManager, UpdateSettingsManager, 
SetupSettingsManag
 "UefiCpuPkg",
 "FmpDevicePkg",
 "ShellPkg",
+"SignedCapsulePkg",
 "StandaloneMmPkg",
 "FatPkg",
 "CryptoPkg",
diff --git a/SignedCapsulePkg/SignedCapsulePkg.ci.yaml 
b/SignedCapsulePkg/SignedCapsulePkg.ci.yaml
new file mode 100644
index ..5f48613bd79f
--- /dev/null
+++ b/SignedCapsulePkg/SignedCapsulePkg.ci.yaml
@@ -0,0 +1,90 @@
+## @file
+# Core CI configuration for SignedCapsulePkg
+#
+# Copyright (c) Microsoft Corporation
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+##
+{
+## options defined .pytool/Plugin/LicenseCheck
+"LicenseCheck": {
+"IgnoreFiles": []
+},
+
+"EccCheck": {
+## Exception sample looks like below:
+## "ExceptionList": [
+## "", ""
+## ]
+"ExceptionList": [
+],
+## Both file path and directory path are accepted.
+"IgnoreFiles": []
+},
+
+## options defined .pytool/Plugin/CompilerPlugin
+"CompilerPlugin": {
+"DscPath": "SignedCapsulePkg.dsc"
+},
+
+## options defined .pytool/Plugin/HostUnitTestCompilerPlugin
+"HostUnitTestCompilerPlugin": {
+"DscPath": "" # Don't support this test
+},
+
+## options defined .pytool/Plugin/CharEncodingCheck
+"CharEncodingCheck": {
+"IgnoreFiles": []
+},
+
+## options defined .pytool/Plugin/DependencyCheck
+"DependencyCheck": {
+"AcceptableDependencies": [
+  "MdeModulePkg/MdeModulePkg.dec",
+  "MdePkg/MdePkg.dec",
+  "SecurityPkg/SecurityPkg.dec",
+  "SignedCapsulePkg/SignedCapsulePkg.dec"
+],
+# For host based unit tests
+"AcceptableDependencies-HOST_APPLICATION":[
+  "UnitTestFrameworkPkg/UnitTestFrameworkPkg.dec"
+],
+# For UEFI shell based apps
+"AcceptableDependencies-UEFI_APPLICATION":[],
+"IgnoreInf": []
+},
+
+## options defined .pytool/Plugin/DscCompleteCheck
+"DscCompleteCheck": {
+"IgnoreInf": [""],
+"DscPath": "SignedCapsulePkg.dsc"
+},
+
+## options defined .pytool/Plugin/HostUnitTestDscCompleteCheck
+"HostUnitTestDscCompleteCheck": {
+"IgnoreInf": [""],
+"DscPath": "" # Don't support this test
+},
+
+## options defined .pytool/Plugin/GuidCheck
+"GuidCheck": {
+"IgnoreGuidName": [],
+"IgnoreGuidValue": [],
+"IgnoreFoldersAndFiles": [],
+"IgnoreDuplicates": [],
+},
+
+## options defined .pytool/Plugin/LibraryClassCheck
+"LibraryClassCheck": {
+"IgnoreHeaderFile": []
+},
+
+## options defined .pytool/Plugin/SpellCheck
+"SpellCheck": {
+"AuditOnly": True,   # Failures need to be reviewed and 
resolved in the future
+"IgnoreFiles": [],   # use gitignore syntax to ignore errors 
in matching files
+"ExtendWords": [],   # words to extend to the dictionary for 
this package
+"IgnoreStandardPaths": [],   # Standard Plugin defined paths that 
should be ignore
+"AdditionalIncludePaths": [] # Additional paths to spell check 
(wildcards supported)
+}
+}
-- 
2.28.0.windows.1



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[edk2-devel] [PATCH v1 0/2] SignedCapsulePkg: Enable CI

2022-09-06 Thread Michael Kubacki
From: Michael Kubacki 

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4050

Adds SignedCapsulePkg to edk2 CI.

In the edk2 PR for this change, you can see that the package only
runs on GCC and CI passes with this configuration.

https://github.com/tianocore/edk2/pull/3304

Cc: Sean Brogan 
Cc: Bret Barkelew 
Cc: Michael D Kinney 
Cc: Liming Gao 
Cc: Jian J Wang 
Signed-off-by: Michael Kubacki 

Michael Kubacki (2):
  SignedCapsulePkg: Add package CI YAML file
  .azurepipelines: Add SignedCapsulePkg to CI

 .azurepipelines/templates/pr-gate-build-job.yml |  2 +-
 .pytool/CISettings.py   |  1 +
 SignedCapsulePkg/SignedCapsulePkg.ci.yaml   | 90 
 3 files changed, 92 insertions(+), 1 deletion(-)
 create mode 100644 SignedCapsulePkg/SignedCapsulePkg.ci.yaml

-- 
2.28.0.windows.1



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Re: [edk2-devel] [PATCH v1 5/7] IntelFsp2WrapperPkg.dec: Remove duplicate LibraryClasses entry

2022-09-06 Thread Chiu, Chasel

Looks good to me! Thanks Michael!


> -Original Message-
> From: Michael Kubacki 
> Sent: Tuesday, September 6, 2022 9:35 PM
> To: Chiu, Chasel ; devel@edk2.groups.io
> Cc: Desimone, Nathaniel L ; Zeng, Star
> 
> Subject: Re: [edk2-devel] [PATCH v1 5/7] IntelFsp2WrapperPkg.dec: Remove
> duplicate LibraryClasses entry
> 
> If that's your intention, yes the CI can allow that. I've pushed a v2 
> candidate
> branch of this series here with your review tags provided so far.
> 
> https://github.com/makubacki/edk2/tree/add_missing_ci_yaml_intel_fsp_pkgs_
> v2
> 
> This patch (v1 5/7) is removed from that branch and the change to explicitly
> allow this is in the following commit on that branch:
> 
> https://github.com/makubacki/edk2/commit/b11dd1a4f59a62b90ed401b6b7ca
> d889dd1e013f#diff-
> ba7b110a0ec2f7f8fabc973b327ddb98a7d65b6a00b544a609a56593e6b87be3R8
> 0-R86
> 
> If that looks good, let me know and I can send the v2 series on the list after
> leaving v1 open for a bit longer to collect other feedback and reviews.
> 
> Thanks,
> Michael
> 
> On 9/6/2022 11:49 PM, Chiu, Chasel wrote:
> >
> > Hi Michael,
> >
> > In this case we intended to provide a single-small function in separate 
> > library
> for platform customization so platforms do not have to override the whole main
> library instance, and I think it is not valuable to create another H file to 
> hold this
> single small library function. Is it possible to support such scenario in CI?
> >
> > Thanks,
> > Chasel
> >
> >
> >> -Original Message-
> >> From: devel@edk2.groups.io  On Behalf Of
> >> Michael Kubacki
> >> Sent: Tuesday, September 6, 2022 8:19 PM
> >> To: devel@edk2.groups.io
> >> Cc: Chiu, Chasel ; Desimone, Nathaniel L
> >> ; Zeng, Star 
> >> Subject: [edk2-devel] [PATCH v1 5/7] IntelFsp2WrapperPkg.dec: Remove
> >> duplicate LibraryClasses entry
> >>
> >> From: Michael Kubacki 
> >>
> >> REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4048
> >>
> >> The last [LibraryClasses] entry for FspWrapperPlatformMultiPhaseLib
> >> points to the same entry as FspWrapperMultiPhaseProcessLib.
> >>
> >> FspWrapperPlatformMultiPhaseHandler() is the only function
> >> implemented in FspWrapperPlatformMultiPhaseLibNull.c and it is only
> >> called (not implemented) in PeiFspWrapperMultiPhaseProcessLib.c,
> >> so I'd assume:
> >>
> >> - Producing library: FspWrapperPlatformMultiPhaseLib
> >> - Consuming library: FspWrapperMultiPhaseProcessLib
> >>
> >> But, the API descriptions do not provide any descriptive information:
> >>
> >> FspWrapperPlatformMultiPhaseHandler():
> >>
> >> ```
> >> /**
> >>FSP Wrapper Platform MultiPhase Handler
> >>
> >>@param[in] FspHobListPtr- Pointer to FSP HobList (valid
> >>  after FSP-M completed)
> >>@param[in] ComponentIndex   - FSP Component which executing
> >>  MultiPhase initialization.
> >>@param[in] PhaseIndex   - Indicates current execution phase
> >>  of FSP MultiPhase initialization.
> >>
> >>@retval EFI_STATUSAlways return EFI_SUCCESS
> >>
> >> **/
> >> ```
> >>
> >> In any case, this removes the redundant header file entry so the
> >> Library Class Check CI test can pass on the package.
> >>
> >> Cc: Chasel Chiu 
> >> Cc: Nate DeSimone 
> >> Cc: Star Zeng 
> >> Signed-off-by: Michael Kubacki 
> >> ---
> >>   IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec | 4 
> >>   1 file changed, 4 deletions(-)
> >>
> >> diff --git a/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec
> >> b/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec
> >> index 95ada0f7a151..c3bbc5c45517 100644
> >> --- a/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec
> >> +++ b/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec
> >> @@ -32,10 +32,6 @@ [LibraryClasses]
> >> ##  @libraryclass  Provide MultiPhase handling related functions.
> >>
> >> FspWrapperMultiPhaseProcessLib|Include/Library/FspWrapperMultiPhasePr
> >> FspWrapperMultiPhaseProcessLib|oce
> >> ssLib.h
> >>
> >> -  ##  @libraryclass  Provide MultiPhase platform actions related 
> >> functions.
> >> -
> >> FspWrapperPlatformMultiPhaseLib|Include/Library/FspWrapperMultiPhaseP
> >> FspWrapperPlatformMultiPhaseLib|roc
> >> essLib.h
> >> -
> >> -
> >>   [Guids]
> >> #
> >> # GUID defined in package
> >> --
> >> 2.28.0.windows.1
> >>
> >>
> >>
> >> -=-=-=-=-=-=
> >> Groups.io Links: You receive all messages sent to this group.
> >> View/Reply Online (#93319):
> >> https://edk2.groups.io/g/devel/message/93319
> >> Mute This Topic: https://groups.io/mt/93518040/1777047
> >> Group Owner: devel+ow...@edk2.groups.io
> >> Unsubscribe: https://edk2.groups.io/g/devel/unsub
> >> [chasel.c...@intel.com] -=-=-=-=-=-=
> >>


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Re: [edk2-devel] [PATCH v2 1/2] ArmPkg: implement EFI_MP_SERVICES_PROTOCOL based on PSCI calls

2022-09-06 Thread Michael Kubacki

I think that's reasonable.

On 9/7/2022 12:35 AM, Rebecca Cran wrote:
Also, CI is failing in the SpellCheck test because of the 
"-mstrict-align" in

ArmPsciMpServicesDxe.inf.

/home/vsts/work/1/s/ArmPkg/Drivers/ArmPsciMpServicesDxe/ArmPsciMpServicesDxe.inf:55:25 
- Unknown word (mstrict)


Should I add "mstrict" to pytool/Plugin/SpellCheck/cspell.base.yaml ?




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Re: [edk2-devel] [PATCH v2 1/2] ArmPkg: implement EFI_MP_SERVICES_PROTOCOL based on PSCI calls

2022-09-06 Thread Rebecca Cran
Also, CI is failing in the SpellCheck test because of the 
"-mstrict-align" in

ArmPsciMpServicesDxe.inf.

/home/vsts/work/1/s/ArmPkg/Drivers/ArmPsciMpServicesDxe/ArmPsciMpServicesDxe.inf:55:25 
- Unknown word (mstrict)


Should I add "mstrict" to pytool/Plugin/SpellCheck/cspell.base.yaml ?

--
Rebecca Cran

On 9/6/22 22:25, Rebecca Cran wrote:

On 9/6/22 22:03, Rebecca Cran wrote:

diff --git a/ArmPkg/ArmPkg.dsc b/ArmPkg/ArmPkg.dsc
index 59fd8f295d4f..4716789402fc 100644
--- a/ArmPkg/ArmPkg.dsc
+++ b/ArmPkg/ArmPkg.dsc
@@ -125,6 +125,7 @@ [Components.common]
    ArmPkg/Drivers/CpuPei/CpuPei.inf
    ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
    ArmPkg/Drivers/ArmGic/ArmGicLib.inf
+  ArmPkg/Drivers/ArmPsciMpServicesDxe/ArmPsciMpServicesDxe.inf
    ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.inf
    ArmPkg/Drivers/TimerDxe/TimerDxe.inf

This won't work, since there's no support for 32-bit ARM code.
I'll move it into the AARCH64 section.





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Re: [edk2-devel] [PATCH v1 5/7] IntelFsp2WrapperPkg.dec: Remove duplicate LibraryClasses entry

2022-09-06 Thread Michael Kubacki
If that's your intention, yes the CI can allow that. I've pushed a v2 
candidate branch of this series here with your review tags provided so far.


https://github.com/makubacki/edk2/tree/add_missing_ci_yaml_intel_fsp_pkgs_v2

This patch (v1 5/7) is removed from that branch and the change to 
explicitly allow this is in the following commit on that branch:


https://github.com/makubacki/edk2/commit/b11dd1a4f59a62b90ed401b6b7cad889dd1e013f#diff-ba7b110a0ec2f7f8fabc973b327ddb98a7d65b6a00b544a609a56593e6b87be3R80-R86

If that looks good, let me know and I can send the v2 series on the list 
after leaving v1 open for a bit longer to collect other feedback and 
reviews.


Thanks,
Michael

On 9/6/2022 11:49 PM, Chiu, Chasel wrote:


Hi Michael,

In this case we intended to provide a single-small function in separate library 
for platform customization so platforms do not have to override the whole main 
library instance, and I think it is not valuable to create another H file to 
hold this single small library function. Is it possible to support such 
scenario in CI?

Thanks,
Chasel



-Original Message-
From: devel@edk2.groups.io  On Behalf Of Michael
Kubacki
Sent: Tuesday, September 6, 2022 8:19 PM
To: devel@edk2.groups.io
Cc: Chiu, Chasel ; Desimone, Nathaniel L
; Zeng, Star 
Subject: [edk2-devel] [PATCH v1 5/7] IntelFsp2WrapperPkg.dec: Remove
duplicate LibraryClasses entry

From: Michael Kubacki 

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4048

The last [LibraryClasses] entry for FspWrapperPlatformMultiPhaseLib points to
the same entry as FspWrapperMultiPhaseProcessLib.

FspWrapperPlatformMultiPhaseHandler() is the only function implemented in
FspWrapperPlatformMultiPhaseLibNull.c and it is only called (not implemented)
in PeiFspWrapperMultiPhaseProcessLib.c,
so I'd assume:

- Producing library: FspWrapperPlatformMultiPhaseLib
- Consuming library: FspWrapperMultiPhaseProcessLib

But, the API descriptions do not provide any descriptive information:

FspWrapperPlatformMultiPhaseHandler():

```
/**
   FSP Wrapper Platform MultiPhase Handler

   @param[in] FspHobListPtr- Pointer to FSP HobList (valid
 after FSP-M completed)
   @param[in] ComponentIndex   - FSP Component which executing
 MultiPhase initialization.
   @param[in] PhaseIndex   - Indicates current execution phase
 of FSP MultiPhase initialization.

   @retval EFI_STATUSAlways return EFI_SUCCESS

**/
```

In any case, this removes the redundant header file entry so the Library Class
Check CI test can pass on the package.

Cc: Chasel Chiu 
Cc: Nate DeSimone 
Cc: Star Zeng 
Signed-off-by: Michael Kubacki 
---
  IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec | 4 
  1 file changed, 4 deletions(-)

diff --git a/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec
b/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec
index 95ada0f7a151..c3bbc5c45517 100644
--- a/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec
+++ b/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec
@@ -32,10 +32,6 @@ [LibraryClasses]
##  @libraryclass  Provide MultiPhase handling related functions.

FspWrapperMultiPhaseProcessLib|Include/Library/FspWrapperMultiPhaseProce
ssLib.h

-  ##  @libraryclass  Provide MultiPhase platform actions related functions.
-
FspWrapperPlatformMultiPhaseLib|Include/Library/FspWrapperMultiPhaseProc
essLib.h
-
-
  [Guids]
#
# GUID defined in package
--
2.28.0.windows.1



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Re: [edk2-devel] [PATCH v2 0/4] IntelFsp2(Wrapper)Pkg: Support FSP 2.4 MultiPhase.

2022-09-06 Thread Chiu, Chasel


patch3 Fsp24SecCore modules have been merged:
https://github.com/tianocore/edk2/commit/df25a5457f04ec465dce97428cfee96f462676e7

Thanks,
Chasel


> -Original Message-
> From: devel@edk2.groups.io  On Behalf Of Chiu, Chasel
> Sent: Wednesday, August 31, 2022 11:13 AM
> To: devel@edk2.groups.io
> Cc: Desimone, Nathaniel L ; Zeng, Star
> 
> Subject: Re: [edk2-devel] [PATCH v2 0/4] IntelFsp2(Wrapper)Pkg: Support FSP
> 2.4 MultiPhase.
> 
> 
> Patch1 and patch2 have been merged:
> https://github.com/tianocore/edk2/commit/df25a5457f04ec465dce97428cfee9
> 6f462676e7
> https://github.com/tianocore/edk2/commit/31a94f7fba2a2c1244fc35b6f631e2
> 35e267715b
> 
> Rest of the patches will be merged later.
> 
> Thanks,
> Chasel
> 
> 
> > -Original Message-
> > From: Chiu, Chasel 
> > Sent: Tuesday, August 9, 2022 5:48 PM
> > To: devel@edk2.groups.io
> > Cc: Chiu, Chasel ; Desimone, Nathaniel L
> > ; Zeng, Star 
> > Subject: [PATCH v2 0/4] IntelFsp2(Wrapper)Pkg: Support FSP 2.4 MultiPhase.
> >
> > REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3916
> >
> > Add FSP 2.4 MultiPhase interfaces and implementation.
> >
> > Cc: Nate DeSimone 
> > Cc: Star Zeng 
> > Signed-off-by: Chasel Chiu 
> >
> > V2:
> > . Add FspMultiPhasePlatformGetNumberOfPhases() and
> > FspWrapperPlatformMultiPhaseHandler() to support platform porting.
> >
> > . Add FSP reset support in FspWrapperVariableRequestHandler()
> >
> > . Fix bug that wrong parameter given when calling
> > FspWrapperVariableRequestHandler()
> >
> > . Corrected code comments.
> >
> > Chasel Chiu (4):
> >   IntelFsp2Pkg: Add FSP 2.4 MultiPhase interface.
> >   IntelFsp2WrapperPkg: Add FSP 2.4 MultiPhase interface.
> >   IntelFsp2Pkg: Adopt FSP 2.4 MultiPhase functions.
> >   IntelFsp2WrapperPkg: Implement FSP 2.4 MultiPhase wrapper handlers.
> >
> >  IntelFsp2Pkg/FspSecCore/SecFsp.c
> > |   4 
> >  IntelFsp2Pkg/FspSecCore/SecFspApiChk.c
> > |   9 +
> >  IntelFsp2Pkg/Library/BaseFspMultiPhaseLib/FspMultiPhaseLib.c
> > | 184
> >
> +
> >
> +
> > ++
> >  IntelFsp2Pkg/Library/SecFspSecPlatformLibNull/PlatformSecLibNull.c
> > |  30 ++
> >  IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c
> > |  33 +
> >  IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.c
> > |  27 +--
> >
> >
> IntelFsp2WrapperPkg/Library/BaseFspWrapperPlatformMultiPhaseLibSample/Fs
> > pWrapperPlatformMultiPhaseLibSample.c   |  49
> > +
> >
> >
> IntelFsp2WrapperPkg/Library/FspWrapperMultiPhaseProcessLib/PeiFspWrapper
> > MultiPhaseProcessLib.c  | 355
> >
> +
> >
> +
> >
> +
> >
> +
> >
> +
> > ++
> >  IntelFsp2Pkg/FspSecCore/Fsp24SecCoreM.inf
> > |  75
> >
> +
> > ++
> >  IntelFsp2Pkg/FspSecCore/Fsp24SecCoreS.inf
> > |  59 +++
> >  IntelFsp2Pkg/FspSecCore/Ia32/Fsp24ApiEntryM.nasm
> > | 304
> >
> +
> >
> +
> >
> +
> >
> +
> > 
> >  IntelFsp2Pkg/FspSecCore/Ia32/Fsp24ApiEntryS.nasm
> > | 101
> >
> +
> > 
> >  IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryCommon.nasm
> > |   3 +++
> >  IntelFsp2Pkg/FspSecCore/X64/Fsp24ApiEntryM.nasm
> > | 303
> >
> +
> >
> +
> >
> +
> >
> +
> > +++
> >  IntelFsp2Pkg/FspSecCore/X64/Fsp24ApiEntryS.nasm
> > | 108
> >
> +
> > +++
> >  IntelFsp2Pkg/FspSecCore/X64/FspApiEntryCommon.nasm
> > |   3 +++
> >  IntelFsp2Pkg/Include/FspEas/FspApi.h
> > |  62
> -
> > -
> >  IntelFsp2Pkg/Include/FspGlobalData.h
> > |   5 -

Re: [edk2-devel] [PATCH v2 1/2] ArmPkg: implement EFI_MP_SERVICES_PROTOCOL based on PSCI calls

2022-09-06 Thread Rebecca Cran

On 9/6/22 22:03, Rebecca Cran wrote:

diff --git a/ArmPkg/ArmPkg.dsc b/ArmPkg/ArmPkg.dsc
index 59fd8f295d4f..4716789402fc 100644
--- a/ArmPkg/ArmPkg.dsc
+++ b/ArmPkg/ArmPkg.dsc
@@ -125,6 +125,7 @@ [Components.common]
ArmPkg/Drivers/CpuPei/CpuPei.inf
ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
ArmPkg/Drivers/ArmGic/ArmGicLib.inf
+  ArmPkg/Drivers/ArmPsciMpServicesDxe/ArmPsciMpServicesDxe.inf
ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.inf
ArmPkg/Drivers/TimerDxe/TimerDxe.inf

This won't work, since there's no support for 32-bit ARM code.
I'll move it into the AARCH64 section.

--
Rebecca Cran


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[edk2-devel] [PATCH v2 1/2] ArmPkg: implement EFI_MP_SERVICES_PROTOCOL based on PSCI calls

2022-09-06 Thread Rebecca Cran
Add support for EFI_MP_SERVICES_PROTOCOL during the DXE phase under
AArch64.

PSCI_CPU_ON is called to power on the core, the supplied procedure is
executed and PSCI_CPU_OFF is called to power off the core.

Fixes contributed by Ard Biesheuvel.

Signed-off-by: Rebecca Cran 
Reviewed-by: Ard Biesheuvel 
---
 ArmPkg/ArmPkg.dsc|1 +
 ArmPkg/Drivers/ArmPsciMpServicesDxe/ArmPsciMpServicesDxe.inf |   55 +
 ArmPkg/Drivers/ArmPsciMpServicesDxe/MpServicesInternal.h |  351 
 ArmPkg/Drivers/ArmPsciMpServicesDxe/ArmPsciMpServicesDxe.c   | 1774 

 ArmPkg/Drivers/ArmPsciMpServicesDxe/MpFuncs.S|   57 +
 5 files changed, 2238 insertions(+)

diff --git a/ArmPkg/ArmPkg.dsc b/ArmPkg/ArmPkg.dsc
index 59fd8f295d4f..4716789402fc 100644
--- a/ArmPkg/ArmPkg.dsc
+++ b/ArmPkg/ArmPkg.dsc
@@ -125,6 +125,7 @@ [Components.common]
   ArmPkg/Drivers/CpuPei/CpuPei.inf
   ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
   ArmPkg/Drivers/ArmGic/ArmGicLib.inf
+  ArmPkg/Drivers/ArmPsciMpServicesDxe/ArmPsciMpServicesDxe.inf
   ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.inf
   ArmPkg/Drivers/TimerDxe/TimerDxe.inf
 
diff --git a/ArmPkg/Drivers/ArmPsciMpServicesDxe/ArmPsciMpServicesDxe.inf 
b/ArmPkg/Drivers/ArmPsciMpServicesDxe/ArmPsciMpServicesDxe.inf
new file mode 100644
index ..2b109c72e0a0
--- /dev/null
+++ b/ArmPkg/Drivers/ArmPsciMpServicesDxe/ArmPsciMpServicesDxe.inf
@@ -0,0 +1,55 @@
+## @file
+#  ARM MP services protocol driver
+#
+#  Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights 
reserved.
+#
+#  SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+  INF_VERSION= 1.27
+  BASE_NAME  = ArmPsciMpServicesDxe
+  FILE_GUID  = 007ab472-dc4a-4df8-a5c2-abb4a327278c
+  MODULE_TYPE= DXE_DRIVER
+  VERSION_STRING = 1.0
+
+  ENTRY_POINT= ArmPsciMpServicesDxeInitialize
+
+[Sources.Common]
+  ArmPsciMpServicesDxe.c
+  MpFuncs.S
+  MpServicesInternal.h
+
+[Packages]
+  ArmPkg/ArmPkg.dec
+  ArmPlatformPkg/ArmPlatformPkg.dec
+  EmbeddedPkg/EmbeddedPkg.dec
+  MdePkg/MdePkg.dec
+  MdeModulePkg/MdeModulePkg.dec
+
+[LibraryClasses]
+  ArmLib
+  ArmMmuLib
+  ArmSmcLib
+  BaseMemoryLib
+  CacheMaintenanceLib
+  DebugLib
+  HobLib
+  MemoryAllocationLib
+  UefiBootServicesTableLib
+  UefiDriverEntryPoint
+  UefiLib
+
+[Protocols]
+  gEfiMpServiceProtocolGuid## PRODUCES
+  gEfiLoadedImageProtocolGuid  ## CONSUMES
+
+[Guids]
+  gArmMpCoreInfoGuid
+
+[Depex]
+  TRUE
+
+[BuildOptions]
+  GCC:*_*_*_CC_FLAGS = -mstrict-align
diff --git a/ArmPkg/Drivers/ArmPsciMpServicesDxe/MpServicesInternal.h 
b/ArmPkg/Drivers/ArmPsciMpServicesDxe/MpServicesInternal.h
new file mode 100644
index ..ee13816ef64c
--- /dev/null
+++ b/ArmPkg/Drivers/ArmPsciMpServicesDxe/MpServicesInternal.h
@@ -0,0 +1,351 @@
+/** @file
+
+Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved.
+Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.
+Portions copyright (c) 2011, Apple Inc. All rights reserved.
+
+SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef MP_SERVICES_INTERNAL_H_
+#define MP_SERVICES_INTERNAL_H_
+
+#include 
+#include 
+
+#include 
+#include 
+
+#define AP_STACK_SIZE  0x1000
+
+//
+// Internal Data Structures
+//
+
+//
+// AP state
+//
+// The state transitions for an AP when it process a procedure are:
+//  Idle > Ready > Busy > Idle
+//   [BSP]   [AP]   [AP]
+//
+typedef enum {
+  CpuStateIdle,
+  CpuStateReady,
+  CpuStateBlocked,
+  CpuStateBusy,
+  CpuStateFinished,
+  CpuStateDisabled
+} CPU_STATE;
+
+//
+// Define Individual Processor Data block.
+//
+typedef struct {
+  EFI_PROCESSOR_INFORMATIONInfo;
+  EFI_AP_PROCEDURE Procedure;
+  VOID *Parameter;
+  CPU_STATEState;
+  EFI_EVENTCheckThisAPEvent;
+  UINTNTimeout;
+  UINTNTimeTaken;
+  VOID *Ttbr0;
+  UINTNTcr;
+  UINTNMair;
+} CPU_AP_DATA;
+
+//
+// Define MP data block which consumes individual processor block.
+//
+typedef struct {
+  UINTN   NumberOfProcessors;
+  UINTN   NumberOfEnabledProcessors;
+  EFI_EVENT   CheckAllAPsEvent;
+  EFI_EVENT   WaitEvent;
+  UINTN   FinishCount;
+  UINTN   StartCount;
+  EFI_AP_PROCEDUREProcedure;
+  VOID*ProcedureArgument;
+  BOOLEAN SingleThread;
+  UINTN   StartedNumber;
+  CPU_AP_DATA *CpuData;
+  UINTN   Timeout;
+  UINTN   *FailedList;
+  UINTN   FailedListIndex;
+  BOOLEAN TimeoutActive;
+} CPU_MP_DATA;
+
+/** Secondary core entry point.
+
+**/
+VOID
+ApEntryPoint (
+  VOID
+  );
+

[edk2-devel] [PATCH v2 0/2] Add support EFI_MP_SERVICES_PROTOCOL on AARCH64

2022-09-06 Thread Rebecca Cran
Changes in v2:

MpServicesTest:
- Removed unnecessary call to WriteBackDataCacheRange and
  the now-unused CacheMaintenanceLib.
- Fixed -U usage text.
- Fixed bug in Print statements when printing timeout messages.

Rebecca Cran (2):
  ArmPkg: implement EFI_MP_SERVICES_PROTOCOL based on PSCI calls
  MdeModulePkg: Add new Application/MpServicesTest application

 ArmPkg/ArmPkg.dsc|1 +
 MdeModulePkg/MdeModulePkg.dsc|2 +
 ArmPkg/Drivers/ArmPsciMpServicesDxe/ArmPsciMpServicesDxe.inf |   55 +
 MdeModulePkg/Application/MpServicesTest/MpServicesTest.inf   |   40 +
 ArmPkg/Drivers/ArmPsciMpServicesDxe/MpServicesInternal.h |  351 
 MdeModulePkg/Application/MpServicesTest/Options.h|   39 +
 ArmPkg/Drivers/ArmPsciMpServicesDxe/ArmPsciMpServicesDxe.c   | 1774 

 MdeModulePkg/Application/MpServicesTest/MpServicesTest.c |  555 ++
 MdeModulePkg/Application/MpServicesTest/Options.c|  215 +++
 ArmPkg/Drivers/ArmPsciMpServicesDxe/MpFuncs.S|   57 +
 10 files changed, 3089 insertions(+)
 create mode 100644 ArmPkg/Drivers/ArmPsciMpServicesDxe/ArmPsciMpServicesDxe.inf
 create mode 100644 MdeModulePkg/Application/MpServicesTest/MpServicesTest.inf
 create mode 100644 ArmPkg/Drivers/ArmPsciMpServicesDxe/MpServicesInternal.h
 create mode 100644 MdeModulePkg/Application/MpServicesTest/Options.h
 create mode 100644 ArmPkg/Drivers/ArmPsciMpServicesDxe/ArmPsciMpServicesDxe.c
 create mode 100644 MdeModulePkg/Application/MpServicesTest/MpServicesTest.c
 create mode 100644 MdeModulePkg/Application/MpServicesTest/Options.c
 create mode 100644 ArmPkg/Drivers/ArmPsciMpServicesDxe/MpFuncs.S

-- 
2.30.2



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[edk2-devel] [PATCH v2 2/2] MdeModulePkg: Add new Application/MpServicesTest application

2022-09-06 Thread Rebecca Cran
The MpServicesTest application exercises the EFI_MP_SERVICES_PROTOCOL.

usage:
  MpServicesTest -A [-O]
  MpServicesTest -T 
  MpServicesTest -S 
  MpServicesTest -P
  MpServicesTest -U 
  MpServicesTest -W
  MpServicesTest -E 
  MpServicesTest -D 
  MpServicesTest -h

Parameter:
  -A:  Run all APs.
  -O:  Run APs sequentially (use with -A).
  -T:  Specify timeout in milliseconds. Default is to wait forever.
  -S:  Specify the single AP to run.
  -P:  Print processor information.
  -U:  Set the specified AP to the Unhealthy status (use with -E/-D).
  -W:  Run WhoAmI and print index of BSP.
  -E:  Enable the specified AP.
  -D:  Disable the specified AP.
  -h:  Print this help page.

Signed-off-by: Rebecca Cran 
Reviewed-by: Ard Biesheuvel 
---
 MdeModulePkg/MdeModulePkg.dsc  |   2 +
 MdeModulePkg/Application/MpServicesTest/MpServicesTest.inf |  40 ++
 MdeModulePkg/Application/MpServicesTest/Options.h  |  39 ++
 MdeModulePkg/Application/MpServicesTest/MpServicesTest.c   | 555 

 MdeModulePkg/Application/MpServicesTest/Options.c  | 215 
 5 files changed, 851 insertions(+)

diff --git a/MdeModulePkg/MdeModulePkg.dsc b/MdeModulePkg/MdeModulePkg.dsc
index 45a8ec84ad69..295ff4ddfcd8 100644
--- a/MdeModulePkg/MdeModulePkg.dsc
+++ b/MdeModulePkg/MdeModulePkg.dsc
@@ -166,6 +166,7 @@ [LibraryClasses.common.UEFI_APPLICATION]
   
MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf
   DebugLib|MdePkg/Library/UefiDebugLibStdErr/UefiDebugLibStdErr.inf
   FileHandleLib|MdePkg/Library/UefiFileHandleLib/UefiFileHandleLib.inf
+  ShellLib|ShellPkg/Library/UefiShellLib/UefiShellLib.inf
 
 [LibraryClasses.common.MM_STANDALONE]
   HobLib|MdeModulePkg/Library/BaseHobLibNull/BaseHobLibNull.inf
@@ -445,6 +446,7 @@ [Components]
   MdeModulePkg/Library/BaseVariableFlashInfoLib/BaseVariableFlashInfoLib.inf
 
 [Components.IA32, Components.X64, Components.AARCH64]
+  MdeModulePkg/Application/MpServicesTest/MpServicesTest.inf
   MdeModulePkg/Universal/EbcDxe/EbcDxe.inf
   MdeModulePkg/Universal/EbcDxe/EbcDebugger.inf
   MdeModulePkg/Universal/EbcDxe/EbcDebuggerConfig.inf
diff --git a/MdeModulePkg/Application/MpServicesTest/MpServicesTest.inf 
b/MdeModulePkg/Application/MpServicesTest/MpServicesTest.inf
new file mode 100644
index ..07ee4afec845
--- /dev/null
+++ b/MdeModulePkg/Application/MpServicesTest/MpServicesTest.inf
@@ -0,0 +1,40 @@
+## @file
+#  UEFI Application to exercise EFI_MP_SERVICES_PROTOCOL.
+#
+#  Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights 
reserved.
+#
+#  SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+  INF_VERSION= 1.29
+  BASE_NAME  = MpServicesTest
+  FILE_GUID  = 43e9defa-7209-4b0d-b136-cc4ca02cb469
+  MODULE_TYPE= UEFI_APPLICATION
+  VERSION_STRING = 0.1
+  ENTRY_POINT= UefiMain
+
+#
+# The following information is for reference only and not required by the 
build tools.
+#
+#  VALID_ARCHITECTURES   = IA32 X64 AARCH64
+#
+
+[Sources]
+  MpServicesTest.c
+  Options.c
+  Options.h
+
+[Packages]
+  MdePkg/MdePkg.dec
+
+[LibraryClasses]
+  BaseLib
+  ShellLib
+  UefiApplicationEntryPoint
+  UefiLib
+
+[Protocols]
+  gEfiMpServiceProtocolGuid## CONSUMES
+
diff --git a/MdeModulePkg/Application/MpServicesTest/Options.h 
b/MdeModulePkg/Application/MpServicesTest/Options.h
new file mode 100644
index ..cb28230ab095
--- /dev/null
+++ b/MdeModulePkg/Application/MpServicesTest/Options.h
@@ -0,0 +1,39 @@
+/** @file
+  Options handling code.
+
+  Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved.
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#ifndef MPSERVICESTEST_OPTIONS_H_
+#define MPSERVICESTEST_OPTIONS_H_
+
+#define INFINITE_TIMEOUT  0
+
+typedef struct {
+  UINTN  Timeout;
+  UINTN  ProcessorIndex;
+  BOOLEANRunAllAPs;
+  BOOLEANRunSingleAP;
+  BOOLEANDisableProcessor;
+  BOOLEANEnableProcessor;
+  BOOLEANSetProcessorHealthy;
+  BOOLEANSetProcessorUnhealthy;
+  BOOLEANPrintProcessorInformation;
+  BOOLEANPrintBspProcessorIndex;
+  BOOLEANRunAPsSequentially;
+} MP_SERVICES_TEST_OPTIONS;
+
+/**
+  Parses any arguments provided on the command line.
+
+  @param Options  The arguments structure.
+
+  @return EFI_SUCCESS on success, or an error code.
+**/
+EFI_STATUS
+ParseArguments (
+  MP_SERVICES_TEST_OPTIONS  *Options
+  );
+
+#endif /* MPSERVICESTEST_OPTIONS_H_ */
diff --git a/MdeModulePkg/Application/MpServicesTest/MpServicesTest.c 
b/MdeModulePkg/Application/MpServicesTest/MpServicesTest.c
new file mode 100644
index ..1cea8f52f25d
--- /dev/null
+++ b/MdeModulePkg/Application/MpServicesTest/MpServicesTest.c
@@ -0,0 +1,555 @@
+/** @file
+  UEFI Application to exercise EFI_MP_SERVICES_PROTOCOL.
+
+  Copyright (c) 2022, Qualcomm Innovation Center, 

Re: [edk2-devel] [PATCH v1 5/7] IntelFsp2WrapperPkg.dec: Remove duplicate LibraryClasses entry

2022-09-06 Thread Chiu, Chasel


Hi Michael,

In this case we intended to provide a single-small function in separate library 
for platform customization so platforms do not have to override the whole main 
library instance, and I think it is not valuable to create another H file to 
hold this single small library function. Is it possible to support such 
scenario in CI?

Thanks,
Chasel


> -Original Message-
> From: devel@edk2.groups.io  On Behalf Of Michael
> Kubacki
> Sent: Tuesday, September 6, 2022 8:19 PM
> To: devel@edk2.groups.io
> Cc: Chiu, Chasel ; Desimone, Nathaniel L
> ; Zeng, Star 
> Subject: [edk2-devel] [PATCH v1 5/7] IntelFsp2WrapperPkg.dec: Remove
> duplicate LibraryClasses entry
> 
> From: Michael Kubacki 
> 
> REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4048
> 
> The last [LibraryClasses] entry for FspWrapperPlatformMultiPhaseLib points to
> the same entry as FspWrapperMultiPhaseProcessLib.
> 
> FspWrapperPlatformMultiPhaseHandler() is the only function implemented in
> FspWrapperPlatformMultiPhaseLibNull.c and it is only called (not implemented)
> in PeiFspWrapperMultiPhaseProcessLib.c,
> so I'd assume:
> 
> - Producing library: FspWrapperPlatformMultiPhaseLib
> - Consuming library: FspWrapperMultiPhaseProcessLib
> 
> But, the API descriptions do not provide any descriptive information:
> 
> FspWrapperPlatformMultiPhaseHandler():
> 
> ```
> /**
>   FSP Wrapper Platform MultiPhase Handler
> 
>   @param[in] FspHobListPtr- Pointer to FSP HobList (valid
> after FSP-M completed)
>   @param[in] ComponentIndex   - FSP Component which executing
> MultiPhase initialization.
>   @param[in] PhaseIndex   - Indicates current execution phase
> of FSP MultiPhase initialization.
> 
>   @retval EFI_STATUSAlways return EFI_SUCCESS
> 
> **/
> ```
> 
> In any case, this removes the redundant header file entry so the Library Class
> Check CI test can pass on the package.
> 
> Cc: Chasel Chiu 
> Cc: Nate DeSimone 
> Cc: Star Zeng 
> Signed-off-by: Michael Kubacki 
> ---
>  IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec | 4 
>  1 file changed, 4 deletions(-)
> 
> diff --git a/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec
> b/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec
> index 95ada0f7a151..c3bbc5c45517 100644
> --- a/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec
> +++ b/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec
> @@ -32,10 +32,6 @@ [LibraryClasses]
>##  @libraryclass  Provide MultiPhase handling related functions.
> 
> FspWrapperMultiPhaseProcessLib|Include/Library/FspWrapperMultiPhaseProce
> ssLib.h
> 
> -  ##  @libraryclass  Provide MultiPhase platform actions related functions.
> -
> FspWrapperPlatformMultiPhaseLib|Include/Library/FspWrapperMultiPhaseProc
> essLib.h
> -
> -
>  [Guids]
>#
># GUID defined in package
> --
> 2.28.0.windows.1
> 
> 
> 
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Re: [edk2-devel] [PATCH v1 1/7] IntelFsp2Pkg: Fix code formatting errors

2022-09-06 Thread Chiu, Chasel


Reviewed-by: Chasel Chiu 

Thanks,
Chasel

> -Original Message-
> From: devel@edk2.groups.io  On Behalf Of Michael
> Kubacki
> Sent: Tuesday, September 6, 2022 8:19 PM
> To: devel@edk2.groups.io
> Cc: Chiu, Chasel ; Desimone, Nathaniel L
> ; Zeng, Star 
> Subject: [edk2-devel] [PATCH v1 1/7] IntelFsp2Pkg: Fix code formatting errors
> 
> From: Michael Kubacki 
> 
> REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4048
> 
> This package did not have CI enabled so code changes were merged that fail
> uncrustify formatting. This change updates those files to include uncustify
> formatting.
> 
> Cc: Chasel Chiu 
> Cc: Nate DeSimone 
> Cc: Star Zeng 
> Signed-off-by: Michael Kubacki 
> ---
>  IntelFsp2Pkg/Library/BaseFspDebugLibSerialPort/DebugLib.c  | 9 +
>  IntelFsp2Pkg/Library/BaseFspSwitchStackLib/FspSwitchStackLib.c | 2 +-
>  IntelFsp2Pkg/Include/Ppi/Variable.h| 8 
>  3 files changed, 10 insertions(+), 9 deletions(-)
> 
> diff --git a/IntelFsp2Pkg/Library/BaseFspDebugLibSerialPort/DebugLib.c
> b/IntelFsp2Pkg/Library/BaseFspDebugLibSerialPort/DebugLib.c
> index cb2317bfb240..8e24b946cd88 100644
> --- a/IntelFsp2Pkg/Library/BaseFspDebugLibSerialPort/DebugLib.c
> +++ b/IntelFsp2Pkg/Library/BaseFspDebugLibSerialPort/DebugLib.c
> @@ -193,8 +193,8 @@ DebugBPrint (
>  **/
>  VOID
>  FillHex (
> -  UINTN   Value,
> -  CHAR8   *Buffer
> +  UINTN  Value,
> +  CHAR8  *Buffer
>)
>  {
>INTN  Idx;
> @@ -227,8 +227,8 @@ DebugAssertInternal (
>VOID
>)
>  {
> -  CHAR8   Buffer[MAX_DEBUG_MESSAGE_LENGTH];
> -  UINTN   *Frame;
> +  CHAR8  Buffer[MAX_DEBUG_MESSAGE_LENGTH];  UINTN  *Frame;
> 
>Frame = (UINTN *)GetStackFramePointer ();
> 
> @@ -250,6 +250,7 @@ DebugAssertInternal (
>sizeof (Buffer) / sizeof (CHAR8) - 1
>);
>}
> +
>SerialPortWrite ((UINT8 *)"ASSERT DUMP:\n", 13);
>while (Frame != NULL) {
>  FillHex ((UINTN)Frame, Buffer + 9); diff --git
> a/IntelFsp2Pkg/Library/BaseFspSwitchStackLib/FspSwitchStackLib.c
> b/IntelFsp2Pkg/Library/BaseFspSwitchStackLib/FspSwitchStackLib.c
> index 69a021f42b39..a0b2193bdeab 100644
> --- a/IntelFsp2Pkg/Library/BaseFspSwitchStackLib/FspSwitchStackLib.c
> +++ b/IntelFsp2Pkg/Library/BaseFspSwitchStackLib/FspSwitchStackLib.c
> @@ -31,6 +31,6 @@ SwapStack (
> 
>FspData= GetFspGlobalDataPointer ();
>OldStack   = FspData->CoreStack;
> -  FspData->CoreStack = (UINTN) NewStack;
> +  FspData->CoreStack = (UINTN)NewStack;
>return OldStack;
>  }
> diff --git a/IntelFsp2Pkg/Include/Ppi/Variable.h
> b/IntelFsp2Pkg/Include/Ppi/Variable.h
> index 3e1f4b98a999..581f14880813 100644
> --- a/IntelFsp2Pkg/Include/Ppi/Variable.h
> +++ b/IntelFsp2Pkg/Include/Ppi/Variable.h
> @@ -184,10 +184,10 @@ EFI_STATUS
>  /// to store data in the PEI environment.
>  ///
>  struct _EDKII_PEI_VARIABLE_PPI {
> -  EDKII_PEI_GET_VARIABLEGetVariable;
> -  EDKII_PEI_GET_NEXT_VARIABLE_NAME  GetNextVariableName;
> -  EDKII_PEI_SET_VARIABLESetVariable;
> -  EDKII_PEI_QUERY_VARIABLE_INFO QueryVariableInfo;
> +  EDKII_PEI_GET_VARIABLE  GetVariable;
> +  EDKII_PEI_GET_NEXT_VARIABLE_NAMEGetNextVariableName;
> +  EDKII_PEI_SET_VARIABLE  SetVariable;
> +  EDKII_PEI_QUERY_VARIABLE_INFO   QueryVariableInfo;
>  };
> 
>  extern EFI_GUID  gEdkiiPeiVariablePpiGuid;
> --
> 2.28.0.windows.1
> 
> 
> 
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Re: [edk2-devel] [PATCH v1 4/7] IntelFsp2WrapperPkg: Fix code formatting errors

2022-09-06 Thread Chiu, Chasel


Reviewed-by: Chasel Chiu 

Thanks,
Chasel

> -Original Message-
> From: mikub...@linux.microsoft.com 
> Sent: Tuesday, September 6, 2022 8:19 PM
> To: devel@edk2.groups.io
> Cc: Chiu, Chasel ; Desimone, Nathaniel L
> ; Zeng, Star 
> Subject: [PATCH v1 4/7] IntelFsp2WrapperPkg: Fix code formatting errors
> 
> From: Michael Kubacki 
> 
> REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4048
> 
> This package did not have CI enabled so code changes were merged that fail
> uncrustify formatting. This change updates those files to include uncustify
> formatting.
> 
> Cc: Chasel Chiu 
> Cc: Nate DeSimone 
> Cc: Star Zeng 
> Signed-off-by: Michael Kubacki 
> ---
>  IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/FspWrapperApiLib.c
> | 4 
>  IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/IA32/DispatchExecute.c
> | 1 -
> 
> IntelFsp2WrapperPkg/Library/SecFspWrapperPlatformSecLibSample/SecRamInit
> Data.c | 8 
>  3 files changed, 8 insertions(+), 5 deletions(-)
> 
> diff --git
> a/IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/FspWrapperApiLib.c
> b/IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/FspWrapperApiLib.c
> index 5b5beb5c6557..2e82a0c1b59a 100644
> --- a/IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/FspWrapperApiLib.c
> +++ b/IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/FspWrapperApiLib.
> +++ c
> @@ -115,6 +115,7 @@ CallFspNotifyPhase (
>} else {
>  Status = Execute64BitCode ((UINTN)NotifyPhaseApi,
> (UINTN)NotifyPhaseParams, (UINTN)NULL);
>}
> +
>SetInterruptState (InterruptState);
> 
>return Status;
> @@ -152,6 +153,7 @@ CallFspMemoryInit (
>} else {
>  Status = Execute64BitCode ((UINTN)FspMemoryInitApi,
> (UINTN)FspmUpdDataPtr, (UINTN)HobListPtr);
>}
> +
>SetInterruptState (InterruptState);
> 
>return Status;
> @@ -187,6 +189,7 @@ CallTempRamExit (
>} else {
>  Status = Execute64BitCode ((UINTN)TempRamExitApi,
> (UINTN)TempRamExitParam, (UINTN)NULL);
>}
> +
>SetInterruptState (InterruptState);
> 
>return Status;
> @@ -222,6 +225,7 @@ CallFspSiliconInit (
>} else {
>  Status = Execute64BitCode ((UINTN)FspSiliconInitApi,
> (UINTN)FspsUpdDataPtr, (UINTN)NULL);
>}
> +
>SetInterruptState (InterruptState);
> 
>return Status;
> diff --git
> a/IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/IA32/DispatchExecute.c
> b/IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/IA32/DispatchExecute.c
> index a17ca7dcabe8..c8248eb88851 100644
> ---
> a/IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/IA32/DispatchExecute.c
> +++ b/IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/IA32/DispatchExec
> +++ ute.c
> @@ -69,4 +69,3 @@ Execute64BitCode (
>  {
>return EFI_UNSUPPORTED;
>  }
> -
> diff --git
> a/IntelFsp2WrapperPkg/Library/SecFspWrapperPlatformSecLibSample/SecRamI
> nitData.c
> b/IntelFsp2WrapperPkg/Library/SecFspWrapperPlatformSecLibSample/SecRamI
> nitData.c
> index d2acb2fd46cd..fb0d9a8683a9 100644
> ---
> a/IntelFsp2WrapperPkg/Library/SecFspWrapperPlatformSecLibSample/SecRamI
> nitData.c
> +++ b/IntelFsp2WrapperPkg/Library/SecFspWrapperPlatformSecLibSample/SecR
> +++ amInitData.c
> @@ -10,10 +10,10 @@
>  #include 
> 
>  typedef struct {
> -  EFI_PHYSICAL_ADDRESS  MicrocodeRegionBase;
> -  UINT64MicrocodeRegionSize;
> -  EFI_PHYSICAL_ADDRESS  CodeRegionBase;
> -  UINT64CodeRegionSize;
> +  EFI_PHYSICAL_ADDRESSMicrocodeRegionBase;
> +  UINT64  MicrocodeRegionSize;
> +  EFI_PHYSICAL_ADDRESSCodeRegionBase;
> +  UINT64  CodeRegionSize;
>  } FSPT_CORE_UPD;
> 
>  typedef struct {
> --
> 2.28.0.windows.1



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Re: [edk2-devel] [PATCH v1 2/7] IntelFsp2Pkg/BaseFspMultiPhaseLib: Replace duplicate GUID

2022-09-06 Thread Chiu, Chasel


Thanks for fixing this bug.
Reviewed-by: Chasel Chiu 


> -Original Message-
> From: mikub...@linux.microsoft.com 
> Sent: Tuesday, September 6, 2022 8:19 PM
> To: devel@edk2.groups.io
> Cc: Chiu, Chasel ; Desimone, Nathaniel L
> ; Zeng, Star 
> Subject: [PATCH v1 2/7] IntelFsp2Pkg/BaseFspMultiPhaseLib: Replace duplicate
> GUID
> 
> From: Michael Kubacki 
> 
> REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4048
> 
> The FILE_GUID for this library instance file is a duplicate of
> Library/SecFspSecPlatformLibNull/SecFspSecPlatformLibNull.inf.
> 
> This change replaces the duplicated GUID value with a unique GUID.
> 
> Cc: Chasel Chiu 
> Cc: Nate DeSimone 
> Cc: Star Zeng 
> Signed-off-by: Michael Kubacki 
> ---
>  IntelFsp2Pkg/Library/BaseFspMultiPhaseLib/BaseFspMultiPhaseLib.inf | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git
> a/IntelFsp2Pkg/Library/BaseFspMultiPhaseLib/BaseFspMultiPhaseLib.inf
> b/IntelFsp2Pkg/Library/BaseFspMultiPhaseLib/BaseFspMultiPhaseLib.inf
> index a79f6aecda6d..b9dd132ea863 100644
> --- a/IntelFsp2Pkg/Library/BaseFspMultiPhaseLib/BaseFspMultiPhaseLib.inf
> +++ b/IntelFsp2Pkg/Library/BaseFspMultiPhaseLib/BaseFspMultiPhaseLib.inf
> @@ -15,7 +15,7 @@
>  [Defines]
>INF_VERSION= 0x00010005
>BASE_NAME  = BaseFspMultiPhaseLib
> -  FILE_GUID  = C128CADC-623E-4E41-97CB-A7138E627460
> +  FILE_GUID  = 74C14477-E742-4A0A-9787-27B1CF34F698
>MODULE_TYPE= SEC
>VERSION_STRING = 1.0
>LIBRARY_CLASS  = FspMultiPhaseLib
> --
> 2.28.0.windows.1



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Re: [edk2-devel] [PATCH v1 3/3] EmbeddedPkg: Only run in CI for GCC5

2022-09-06 Thread Michael Kubacki
I forgot to add .azurepipelines maintainers to this patch. To avoid 
resending the whole series to the list +Cc here and v2 will include the 
maintainers directly on this patch.


Thanks,
Michael

On 9/6/2022 10:36 PM, Michael Kubacki wrote:

From: Michael Kubacki 

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4046

This package currently does not build on non-GCC toolchains.

This change adds the package to edk2 CI so it can benefit from
ongoing CI and only tests the package against GCC.

Cc: Leif Lindholm 
Cc: Ard Biesheuvel 
Cc: Abner Chang 
Cc: Daniel Schaefer 
Signed-off-by: Michael Kubacki 
---
  .azurepipelines/templates/pr-gate-build-job.yml | 4 
  1 file changed, 4 insertions(+)

diff --git a/.azurepipelines/templates/pr-gate-build-job.yml 
b/.azurepipelines/templates/pr-gate-build-job.yml
index 0e4ad019bf03..54a74a1a9873 100644
--- a/.azurepipelines/templates/pr-gate-build-job.yml
+++ b/.azurepipelines/templates/pr-gate-build-job.yml
@@ -21,6 +21,10 @@ jobs:
#Use matrix to speed up the build process
strategy:
  matrix:
+  ${{ if eq(parameters.tool_chain_tag, 'GCC5') }}:
+TARGET_GCC_ONLY:
+  Build.Pkgs: 'EmbeddedPkg'
+  Build.Targets: 'DEBUG,RELEASE,NO-TARGET,NOOPT'
TARGET_ARM_ARMPLATFORM:
  Build.Pkgs: 'ArmPkg,ArmPlatformPkg'
  Build.Targets: 'DEBUG,RELEASE,NO-TARGET,NOOPT'



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[edk2-devel] [PATCH v1 7/7] .azurepipelines: Add IntelFsp2Pkg and IntelFsp2WrapperPkg to CI

2022-09-06 Thread Michael Kubacki
From: Michael Kubacki 

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4048

Adds these packages to a new edk2 matrix job so they can be validated
in edk2 CI.

Cc: Bret Barkelew 
Cc: Chasel Chiu 
Cc: Liming Gao 
Cc: Michael D Kinney 
Cc: Nate DeSimone 
Cc: Sean Brogan 
Cc: Star Zeng 
Signed-off-by: Michael Kubacki 
---
 .azurepipelines/templates/pr-gate-build-job.yml | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/.azurepipelines/templates/pr-gate-build-job.yml 
b/.azurepipelines/templates/pr-gate-build-job.yml
index 0e4ad019bf03..759d7e9b4005 100644
--- a/.azurepipelines/templates/pr-gate-build-job.yml
+++ b/.azurepipelines/templates/pr-gate-build-job.yml
@@ -45,6 +45,9 @@ jobs:
   TARGET_CRYPTO:
 Build.Pkgs: 'CryptoPkg'
 Build.Targets: 'DEBUG,RELEASE,NO-TARGET,NOOPT'
+  TARGET_FSP:
+Build.Pkgs: 'IntelFsp2Pkg,IntelFsp2WrapperPkg'
+Build.Targets: 'DEBUG,RELEASE,NO-TARGET,NOOPT'
   TARGET_SECURITY:
 Build.Pkgs: 'SecurityPkg'
 Build.Targets: 'DEBUG,RELEASE,NO-TARGET,NOOPT'
-- 
2.28.0.windows.1



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[edk2-devel] [PATCH v1 6/7] IntelFsp2WrapperPkg: Add CI YAML file

2022-09-06 Thread Michael Kubacki
From: Michael Kubacki 

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4048

Adds IntelFsp2WrapperPkg to the list of supported build packages
for edk2 CI and defines an initial set of CI configuration options.

Cc: Chasel Chiu 
Cc: Nate DeSimone 
Cc: Star Zeng 
Signed-off-by: Michael Kubacki 
---
 .pytool/CISettings.py   |  1 +
 IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.ci.yaml | 92 
 2 files changed, 93 insertions(+)

diff --git a/.pytool/CISettings.py b/.pytool/CISettings.py
index 0205c26a58f8..d9a260784e59 100644
--- a/.pytool/CISettings.py
+++ b/.pytool/CISettings.py
@@ -55,6 +55,7 @@ class Settings(CiBuildSettingsManager, UpdateSettingsManager, 
SetupSettingsManag
 "DynamicTablesPkg",
 "EmulatorPkg",
 "IntelFsp2Pkg",
+"IntelFsp2WrapperPkg",
 "MdePkg",
 "MdeModulePkg",
 "NetworkPkg",
diff --git a/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.ci.yaml 
b/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.ci.yaml
new file mode 100644
index ..2ffd9e8e9fcb
--- /dev/null
+++ b/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.ci.yaml
@@ -0,0 +1,92 @@
+## @file
+# Core CI configuration for IntelFsp2WrapperPkg
+#
+# Copyright (c) Microsoft Corporation
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+##
+{
+## options defined .pytool/Plugin/LicenseCheck
+"LicenseCheck": {
+"IgnoreFiles": []
+},
+
+"EccCheck": {
+## Exception sample looks like below:
+## "ExceptionList": [
+## "", ""
+## ]
+"ExceptionList": [
+],
+## Both file path and directory path are accepted.
+"IgnoreFiles": []
+},
+
+## options defined .pytool/Plugin/CompilerPlugin
+"CompilerPlugin": {
+"DscPath": "IntelFsp2WrapperPkg.dsc"
+},
+
+## options defined .pytool/Plugin/HostUnitTestCompilerPlugin
+"HostUnitTestCompilerPlugin": {
+"DscPath": "" # Don't support this test
+},
+
+## options defined .pytool/Plugin/CharEncodingCheck
+"CharEncodingCheck": {
+"IgnoreFiles": []
+},
+
+## options defined .pytool/Plugin/DependencyCheck
+"DependencyCheck": {
+"AcceptableDependencies": [
+  "IntelFsp2Pkg/IntelFsp2Pkg.dec",
+  "IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec",
+  "MdeModulePkg/MdeModulePkg.dec",
+  "MdePkg/MdePkg.dec",
+  "SecurityPkg/SecurityPkg.dec",
+  "UefiCpuPkg/UefiCpuPkg.dec"
+],
+# For host based unit tests
+"AcceptableDependencies-HOST_APPLICATION":[
+  "UnitTestFrameworkPkg/UnitTestFrameworkPkg.dec"
+],
+# For UEFI shell based apps
+"AcceptableDependencies-UEFI_APPLICATION":[],
+"IgnoreInf": []
+},
+
+## options defined .pytool/Plugin/DscCompleteCheck
+"DscCompleteCheck": {
+"IgnoreInf": [""],
+"DscPath": "IntelFsp2WrapperPkg.dsc"
+},
+
+## options defined .pytool/Plugin/HostUnitTestDscCompleteCheck
+"HostUnitTestDscCompleteCheck": {
+"IgnoreInf": [""],
+"DscPath": "" # Don't support this test
+},
+
+## options defined .pytool/Plugin/GuidCheck
+"GuidCheck": {
+"IgnoreGuidName": [],
+"IgnoreGuidValue": [],
+"IgnoreFoldersAndFiles": [],
+"IgnoreDuplicates": [],
+},
+
+## options defined .pytool/Plugin/LibraryClassCheck
+"LibraryClassCheck": {
+"IgnoreHeaderFile": []
+},
+
+## options defined .pytool/Plugin/SpellCheck
+"SpellCheck": {
+"AuditOnly": True,   # Fails right now with over 270 errors
+"IgnoreFiles": [],   # use gitignore syntax to ignore errors 
in matching files
+"ExtendWords": [],   # words to extend to the dictionary for 
this package
+"IgnoreStandardPaths": [],   # Standard Plugin defined paths that 
should be ignore
+"AdditionalIncludePaths": [] # Additional paths to spell check 
(wildcards supported)
+}
+}
-- 
2.28.0.windows.1



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[edk2-devel] [PATCH v1 5/7] IntelFsp2WrapperPkg.dec: Remove duplicate LibraryClasses entry

2022-09-06 Thread Michael Kubacki
From: Michael Kubacki 

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4048

The last [LibraryClasses] entry for FspWrapperPlatformMultiPhaseLib
points to the same entry as FspWrapperMultiPhaseProcessLib.

FspWrapperPlatformMultiPhaseHandler() is the only function
implemented in FspWrapperPlatformMultiPhaseLibNull.c and it is only
called (not implemented) in PeiFspWrapperMultiPhaseProcessLib.c,
so I'd assume:

- Producing library: FspWrapperPlatformMultiPhaseLib
- Consuming library: FspWrapperMultiPhaseProcessLib

But, the API descriptions do not provide any descriptive information:

FspWrapperPlatformMultiPhaseHandler():

```
/**
  FSP Wrapper Platform MultiPhase Handler

  @param[in] FspHobListPtr- Pointer to FSP HobList (valid
after FSP-M completed)
  @param[in] ComponentIndex   - FSP Component which executing
MultiPhase initialization.
  @param[in] PhaseIndex   - Indicates current execution phase
of FSP MultiPhase initialization.

  @retval EFI_STATUSAlways return EFI_SUCCESS

**/
```

In any case, this removes the redundant header file entry so the
Library Class Check CI test can pass on the package.

Cc: Chasel Chiu 
Cc: Nate DeSimone 
Cc: Star Zeng 
Signed-off-by: Michael Kubacki 
---
 IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec | 4 
 1 file changed, 4 deletions(-)

diff --git a/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec 
b/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec
index 95ada0f7a151..c3bbc5c45517 100644
--- a/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec
+++ b/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec
@@ -32,10 +32,6 @@ [LibraryClasses]
   ##  @libraryclass  Provide MultiPhase handling related functions.
   
FspWrapperMultiPhaseProcessLib|Include/Library/FspWrapperMultiPhaseProcessLib.h
 
-  ##  @libraryclass  Provide MultiPhase platform actions related functions.
-  
FspWrapperPlatformMultiPhaseLib|Include/Library/FspWrapperMultiPhaseProcessLib.h
-
-
 [Guids]
   #
   # GUID defined in package
-- 
2.28.0.windows.1



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[edk2-devel] [PATCH v1 4/7] IntelFsp2WrapperPkg: Fix code formatting errors

2022-09-06 Thread Michael Kubacki
From: Michael Kubacki 

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4048

This package did not have CI enabled so code changes were merged
that fail uncrustify formatting. This change updates those files
to include uncustify formatting.

Cc: Chasel Chiu 
Cc: Nate DeSimone 
Cc: Star Zeng 
Signed-off-by: Michael Kubacki 
---
 IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/FspWrapperApiLib.c
| 4 
 IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/IA32/DispatchExecute.c
| 1 -
 IntelFsp2WrapperPkg/Library/SecFspWrapperPlatformSecLibSample/SecRamInitData.c 
| 8 
 3 files changed, 8 insertions(+), 5 deletions(-)

diff --git 
a/IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/FspWrapperApiLib.c 
b/IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/FspWrapperApiLib.c
index 5b5beb5c6557..2e82a0c1b59a 100644
--- a/IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/FspWrapperApiLib.c
+++ b/IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/FspWrapperApiLib.c
@@ -115,6 +115,7 @@ CallFspNotifyPhase (
   } else {
 Status = Execute64BitCode ((UINTN)NotifyPhaseApi, 
(UINTN)NotifyPhaseParams, (UINTN)NULL);
   }
+
   SetInterruptState (InterruptState);
 
   return Status;
@@ -152,6 +153,7 @@ CallFspMemoryInit (
   } else {
 Status = Execute64BitCode ((UINTN)FspMemoryInitApi, (UINTN)FspmUpdDataPtr, 
(UINTN)HobListPtr);
   }
+
   SetInterruptState (InterruptState);
 
   return Status;
@@ -187,6 +189,7 @@ CallTempRamExit (
   } else {
 Status = Execute64BitCode ((UINTN)TempRamExitApi, (UINTN)TempRamExitParam, 
(UINTN)NULL);
   }
+
   SetInterruptState (InterruptState);
 
   return Status;
@@ -222,6 +225,7 @@ CallFspSiliconInit (
   } else {
 Status = Execute64BitCode ((UINTN)FspSiliconInitApi, 
(UINTN)FspsUpdDataPtr, (UINTN)NULL);
   }
+
   SetInterruptState (InterruptState);
 
   return Status;
diff --git 
a/IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/IA32/DispatchExecute.c 
b/IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/IA32/DispatchExecute.c
index a17ca7dcabe8..c8248eb88851 100644
--- a/IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/IA32/DispatchExecute.c
+++ b/IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/IA32/DispatchExecute.c
@@ -69,4 +69,3 @@ Execute64BitCode (
 {
   return EFI_UNSUPPORTED;
 }
-
diff --git 
a/IntelFsp2WrapperPkg/Library/SecFspWrapperPlatformSecLibSample/SecRamInitData.c
 
b/IntelFsp2WrapperPkg/Library/SecFspWrapperPlatformSecLibSample/SecRamInitData.c
index d2acb2fd46cd..fb0d9a8683a9 100644
--- 
a/IntelFsp2WrapperPkg/Library/SecFspWrapperPlatformSecLibSample/SecRamInitData.c
+++ 
b/IntelFsp2WrapperPkg/Library/SecFspWrapperPlatformSecLibSample/SecRamInitData.c
@@ -10,10 +10,10 @@
 #include 
 
 typedef struct {
-  EFI_PHYSICAL_ADDRESS  MicrocodeRegionBase;
-  UINT64MicrocodeRegionSize;
-  EFI_PHYSICAL_ADDRESS  CodeRegionBase;
-  UINT64CodeRegionSize;
+  EFI_PHYSICAL_ADDRESSMicrocodeRegionBase;
+  UINT64  MicrocodeRegionSize;
+  EFI_PHYSICAL_ADDRESSCodeRegionBase;
+  UINT64  CodeRegionSize;
 } FSPT_CORE_UPD;
 
 typedef struct {
-- 
2.28.0.windows.1



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[edk2-devel] [PATCH v1 3/7] IntelFsp2Pkg: Add CI YAML file

2022-09-06 Thread Michael Kubacki
From: Michael Kubacki 

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4048

Adds IntelFsp2Pkg to the list of supported build packages for edk2
CI and defines an initial set of CI configuration options.

The compiler plugin is disabled as the package currently does not
build due to some changes in the FSP 2.4 interface addition.

Specifically, in commit df25a54 "Fsp24SecCore.inf" files were
added to IntelFspPkg.dsc but the actual files were not added.

Simply removing these files from the DSC exposes a linker failure.

Recommendation:

1. Enable package CI (accept this change)
2. Add IntelFsp2Pkg.dsc to the "CompilerPlugin" "DscPath" in
   IntelFsp2Pkg/IntelFsp2Pkg.ci.yaml to enable compilation
3. Verify compilation and all currently enabled package CI checks
   pass
4. Check-in fixes in (3) with change in (2)

Cc: Chasel Chiu 
Cc: Nate DeSimone 
Cc: Star Zeng 
Signed-off-by: Michael Kubacki 
---
 .pytool/CISettings.py |  1 +
 IntelFsp2Pkg/IntelFsp2Pkg.ci.yaml | 90 
 2 files changed, 91 insertions(+)

diff --git a/.pytool/CISettings.py b/.pytool/CISettings.py
index cf9e0d77b19b..0205c26a58f8 100644
--- a/.pytool/CISettings.py
+++ b/.pytool/CISettings.py
@@ -54,6 +54,7 @@ class Settings(CiBuildSettingsManager, UpdateSettingsManager, 
SetupSettingsManag
 "ArmVirtPkg",
 "DynamicTablesPkg",
 "EmulatorPkg",
+"IntelFsp2Pkg",
 "MdePkg",
 "MdeModulePkg",
 "NetworkPkg",
diff --git a/IntelFsp2Pkg/IntelFsp2Pkg.ci.yaml 
b/IntelFsp2Pkg/IntelFsp2Pkg.ci.yaml
new file mode 100644
index ..fedc40bc985c
--- /dev/null
+++ b/IntelFsp2Pkg/IntelFsp2Pkg.ci.yaml
@@ -0,0 +1,90 @@
+## @file
+# Core CI configuration for IntelFsp2Pkg
+#
+# Copyright (c) Microsoft Corporation
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+##
+{
+## options defined .pytool/Plugin/LicenseCheck
+"LicenseCheck": {
+"IgnoreFiles": []
+},
+
+"EccCheck": {
+## Exception sample looks like below:
+## "ExceptionList": [
+## "", ""
+## ]
+"ExceptionList": [
+],
+## Both file path and directory path are accepted.
+"IgnoreFiles": []
+},
+
+## options defined .pytool/Plugin/CompilerPlugin
+"CompilerPlugin": {
+"DscPath": "" # Test is currently disabled due to build error
+},
+
+## options defined .pytool/Plugin/HostUnitTestCompilerPlugin
+"HostUnitTestCompilerPlugin": {
+"DscPath": "" # Don't support this test
+},
+
+## options defined .pytool/Plugin/CharEncodingCheck
+"CharEncodingCheck": {
+"IgnoreFiles": []
+},
+
+## options defined .pytool/Plugin/DependencyCheck
+"DependencyCheck": {
+"AcceptableDependencies": [
+  "IntelFsp2Pkg/IntelFsp2Pkg.dec",
+  "MdeModulePkg/MdeModulePkg.dec",
+  "MdePkg/MdePkg.dec",
+  "UefiCpuPkg/UefiCpuPkg.dec"
+],
+# For host based unit tests
+"AcceptableDependencies-HOST_APPLICATION":[
+  "UnitTestFrameworkPkg/UnitTestFrameworkPkg.dec"
+],
+# For UEFI shell based apps
+"AcceptableDependencies-UEFI_APPLICATION":[],
+"IgnoreInf": []
+},
+
+## options defined .pytool/Plugin/DscCompleteCheck
+"DscCompleteCheck": {
+"IgnoreInf": [""],
+"DscPath": "IntelFsp2Pkg.dsc"
+},
+
+## options defined .pytool/Plugin/HostUnitTestDscCompleteCheck
+"HostUnitTestDscCompleteCheck": {
+"IgnoreInf": [""],
+"DscPath": "" # Don't support this test
+},
+
+## options defined .pytool/Plugin/GuidCheck
+"GuidCheck": {
+"IgnoreGuidName": [],
+"IgnoreGuidValue": [],
+"IgnoreFoldersAndFiles": [],
+"IgnoreDuplicates": [],
+},
+
+## options defined .pytool/Plugin/LibraryClassCheck
+"LibraryClassCheck": {
+"IgnoreHeaderFile": []
+},
+
+## options defined .pytool/Plugin/SpellCheck
+"SpellCheck": {
+"AuditOnly": True,   # Fails right now with over 270 errors
+"IgnoreFiles": [],   # use gitignore syntax to ignore errors 
in matching files
+"ExtendWords": [],   # words to extend to the dictionary for 
this package
+"IgnoreStandardPaths": [],   # Standard Plugin defined paths that 
should be ignore
+"AdditionalIncludePaths": [] # Additional paths to spell check 
(wildcards supported)
+}
+}
-- 
2.28.0.windows.1



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[edk2-devel] [PATCH v1 2/7] IntelFsp2Pkg/BaseFspMultiPhaseLib: Replace duplicate GUID

2022-09-06 Thread Michael Kubacki
From: Michael Kubacki 

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4048

The FILE_GUID for this library instance file is a duplicate of
Library/SecFspSecPlatformLibNull/SecFspSecPlatformLibNull.inf.

This change replaces the duplicated GUID value with a unique GUID.

Cc: Chasel Chiu 
Cc: Nate DeSimone 
Cc: Star Zeng 
Signed-off-by: Michael Kubacki 
---
 IntelFsp2Pkg/Library/BaseFspMultiPhaseLib/BaseFspMultiPhaseLib.inf | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/IntelFsp2Pkg/Library/BaseFspMultiPhaseLib/BaseFspMultiPhaseLib.inf 
b/IntelFsp2Pkg/Library/BaseFspMultiPhaseLib/BaseFspMultiPhaseLib.inf
index a79f6aecda6d..b9dd132ea863 100644
--- a/IntelFsp2Pkg/Library/BaseFspMultiPhaseLib/BaseFspMultiPhaseLib.inf
+++ b/IntelFsp2Pkg/Library/BaseFspMultiPhaseLib/BaseFspMultiPhaseLib.inf
@@ -15,7 +15,7 @@
 [Defines]
   INF_VERSION= 0x00010005
   BASE_NAME  = BaseFspMultiPhaseLib
-  FILE_GUID  = C128CADC-623E-4E41-97CB-A7138E627460
+  FILE_GUID  = 74C14477-E742-4A0A-9787-27B1CF34F698
   MODULE_TYPE= SEC
   VERSION_STRING = 1.0
   LIBRARY_CLASS  = FspMultiPhaseLib
-- 
2.28.0.windows.1



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[edk2-devel] [PATCH v1 1/7] IntelFsp2Pkg: Fix code formatting errors

2022-09-06 Thread Michael Kubacki
From: Michael Kubacki 

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4048

This package did not have CI enabled so code changes were merged
that fail uncrustify formatting. This change updates those files
to include uncustify formatting.

Cc: Chasel Chiu 
Cc: Nate DeSimone 
Cc: Star Zeng 
Signed-off-by: Michael Kubacki 
---
 IntelFsp2Pkg/Library/BaseFspDebugLibSerialPort/DebugLib.c  | 9 +
 IntelFsp2Pkg/Library/BaseFspSwitchStackLib/FspSwitchStackLib.c | 2 +-
 IntelFsp2Pkg/Include/Ppi/Variable.h| 8 
 3 files changed, 10 insertions(+), 9 deletions(-)

diff --git a/IntelFsp2Pkg/Library/BaseFspDebugLibSerialPort/DebugLib.c 
b/IntelFsp2Pkg/Library/BaseFspDebugLibSerialPort/DebugLib.c
index cb2317bfb240..8e24b946cd88 100644
--- a/IntelFsp2Pkg/Library/BaseFspDebugLibSerialPort/DebugLib.c
+++ b/IntelFsp2Pkg/Library/BaseFspDebugLibSerialPort/DebugLib.c
@@ -193,8 +193,8 @@ DebugBPrint (
 **/
 VOID
 FillHex (
-  UINTN   Value,
-  CHAR8   *Buffer
+  UINTN  Value,
+  CHAR8  *Buffer
   )
 {
   INTN  Idx;
@@ -227,8 +227,8 @@ DebugAssertInternal (
   VOID
   )
 {
-  CHAR8   Buffer[MAX_DEBUG_MESSAGE_LENGTH];
-  UINTN   *Frame;
+  CHAR8  Buffer[MAX_DEBUG_MESSAGE_LENGTH];
+  UINTN  *Frame;
 
   Frame = (UINTN *)GetStackFramePointer ();
 
@@ -250,6 +250,7 @@ DebugAssertInternal (
   sizeof (Buffer) / sizeof (CHAR8) - 1
   );
   }
+
   SerialPortWrite ((UINT8 *)"ASSERT DUMP:\n", 13);
   while (Frame != NULL) {
 FillHex ((UINTN)Frame, Buffer + 9);
diff --git a/IntelFsp2Pkg/Library/BaseFspSwitchStackLib/FspSwitchStackLib.c 
b/IntelFsp2Pkg/Library/BaseFspSwitchStackLib/FspSwitchStackLib.c
index 69a021f42b39..a0b2193bdeab 100644
--- a/IntelFsp2Pkg/Library/BaseFspSwitchStackLib/FspSwitchStackLib.c
+++ b/IntelFsp2Pkg/Library/BaseFspSwitchStackLib/FspSwitchStackLib.c
@@ -31,6 +31,6 @@ SwapStack (
 
   FspData= GetFspGlobalDataPointer ();
   OldStack   = FspData->CoreStack;
-  FspData->CoreStack = (UINTN) NewStack;
+  FspData->CoreStack = (UINTN)NewStack;
   return OldStack;
 }
diff --git a/IntelFsp2Pkg/Include/Ppi/Variable.h 
b/IntelFsp2Pkg/Include/Ppi/Variable.h
index 3e1f4b98a999..581f14880813 100644
--- a/IntelFsp2Pkg/Include/Ppi/Variable.h
+++ b/IntelFsp2Pkg/Include/Ppi/Variable.h
@@ -184,10 +184,10 @@ EFI_STATUS
 /// to store data in the PEI environment.
 ///
 struct _EDKII_PEI_VARIABLE_PPI {
-  EDKII_PEI_GET_VARIABLEGetVariable;
-  EDKII_PEI_GET_NEXT_VARIABLE_NAME  GetNextVariableName;
-  EDKII_PEI_SET_VARIABLESetVariable;
-  EDKII_PEI_QUERY_VARIABLE_INFO QueryVariableInfo;
+  EDKII_PEI_GET_VARIABLE  GetVariable;
+  EDKII_PEI_GET_NEXT_VARIABLE_NAMEGetNextVariableName;
+  EDKII_PEI_SET_VARIABLE  SetVariable;
+  EDKII_PEI_QUERY_VARIABLE_INFO   QueryVariableInfo;
 };
 
 extern EFI_GUID  gEdkiiPeiVariablePpiGuid;
-- 
2.28.0.windows.1



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[edk2-devel] [PATCH v1 0/7] Enable CI in Intel FSP Packages

2022-09-06 Thread Michael Kubacki
From: Michael Kubacki 

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4048

Enables CI in IntelFsp2Pkg and IntelFsp2WrapperPkg.

Fixes several pre-existing issues that impact common CI checks.

Note that compilation is disabled in this change due to a build
issue in IntelFsp2Pkg. See v1 patch 3/7 and the following BZ
for more details and recommended next steps.

https://bugzilla.tianocore.org/show_bug.cgi?id=4049

You can find the CI results for the packages with this change
in the following edk2 PR;
https://github.com/tianocore/edk2/pull/3303

Cc: Bret Barkelew 
Cc: Chasel Chiu 
Cc: Liming Gao 
Cc: Michael D Kinney 
Cc: Nate DeSimone 
Cc: Sean Brogan 
Cc: Star Zeng 
Signed-off-by: Michael Kubacki 

Michael Kubacki (7):
  IntelFsp2Pkg: Fix code formatting errors
  IntelFsp2Pkg/BaseFspMultiPhaseLib: Replace duplicate GUID
  IntelFsp2Pkg: Add CI YAML file
  IntelFsp2WrapperPkg: Fix code formatting errors
  IntelFsp2WrapperPkg.dec: Remove duplicate LibraryClasses entry
  IntelFsp2WrapperPkg: Add CI YAML file
  .azurepipelines: Add IntelFsp2Pkg and IntelFsp2WrapperPkg to CI

 IntelFsp2Pkg/Library/BaseFspDebugLibSerialPort/DebugLib.c  
|  9 +-
 IntelFsp2Pkg/Library/BaseFspSwitchStackLib/FspSwitchStackLib.c 
|  2 +-
 IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/FspWrapperApiLib.c
|  4 +
 IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/IA32/DispatchExecute.c
|  1 -
 IntelFsp2WrapperPkg/Library/SecFspWrapperPlatformSecLibSample/SecRamInitData.c 
|  8 +-
 .azurepipelines/templates/pr-gate-build-job.yml
|  3 +
 .pytool/CISettings.py  
|  2 +
 IntelFsp2Pkg/Include/Ppi/Variable.h
|  8 +-
 IntelFsp2Pkg/IntelFsp2Pkg.ci.yaml  
| 90 +++
 IntelFsp2Pkg/Library/BaseFspMultiPhaseLib/BaseFspMultiPhaseLib.inf 
|  2 +-
 IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.ci.yaml
| 92 
 IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec
|  4 -
 12 files changed, 206 insertions(+), 19 deletions(-)
 create mode 100644 IntelFsp2Pkg/IntelFsp2Pkg.ci.yaml
 create mode 100644 IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.ci.yaml

-- 
2.28.0.windows.1



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Re: [edk2-devel] [PATCH v3 2/8] FatPkg/FatPei: Remove extraneous debug message argument

2022-09-06 Thread Michael Kubacki

Hello Ray,

Can you please review this patch?

FatPkg is the only package missing a review on the series.

Thanks,
Michael

On 9/2/2022 6:22 PM, Michael Kubacki wrote:

From: Michael Kubacki 

This debug macro should take one argument based on the number of
print specifiers defined. However, two arguments are given.

It looks like the code may have been refactored such that the
second argument was moved to a new print and this argument was
not removed. In any case, it should not be there now.

Cc: Ray Ni 
Signed-off-by: Michael Kubacki 
---
  FatPkg/FatPei/Gpt.c | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/FatPkg/FatPei/Gpt.c b/FatPkg/FatPei/Gpt.c
index 0a1a25ceeff1..9e17ce88086f 100644
--- a/FatPkg/FatPei/Gpt.c
+++ b/FatPkg/FatPei/Gpt.c
@@ -361,7 +361,7 @@ PartitionCheckGptEntryArray (
  
  PrivateData->BlockDeviceCount++;
  
-DEBUG ((DEBUG_INFO, "Find GPT Partition [0x%lx", PartitionEntryBuffer[Index].StartingLBA, BlockDevPtr->LastBlock));

+DEBUG ((DEBUG_INFO, "Find GPT Partition [0x%lx", 
PartitionEntryBuffer[Index].StartingLBA));
  DEBUG ((DEBUG_INFO, ", 0x%lx]\n", BlockDevPtr->LastBlock));
  DEBUG ((DEBUG_INFO, " BlockSize %x\n", BlockDevPtr->BlockSize));
}



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Re: [edk2-devel] Error building MdeModulePkg.dsc with CLANG38 (clang 11.0.1)

2022-09-06 Thread Andrew Fish via groups.io
That is a missing EFIAPI.
> On Sep 6, 2022, at 4:46 PM, Rebecca Cran  wrote:
> 
> I noticed that MdeModulePkg/MdeModulePkg.dsc doesn't build with clang 11: I 
> get an error in CapsuleApp:
> 
> 
> build -p MdeModulePkg/MdeModulePkg.dsc -a X64 -t CLANG38 -b DEBUG
> 
> ...
> 
> MdeModulePkg/Application/CapsuleApp/CapsuleDump.c:797:5: error: cast between 
> incompatible calling conventions 'cdecl' and 'ms_abi'; calls through this 
> pointer may abort at runtime [-Werror,-Wcast-calling-convention]
> 
> (SORT_COMPARE)CompareFileNameInAlphabet
> 
> ^~~
> 
> MdeModulePkg/Application/CapsuleApp/CapsuleDump.c:635:1: note: consider 
> defining 'CompareFileNameInAlphabet' with the 'ms_abi' calling convention
> 
> CompareFileNameInAlphabet (
> 
> ^
> 
> EFIAPI
> 
> 1 error generated.
> 
> make: *** [GNUmakefile:361: 
> Build/MdeModule/DEBUG_CLANG38/X64/MdeModulePkg/Application/CapsuleApp/CapsuleApp/OUTPUT/CapsuleDump.obj]
>  Error 1
> 
> -- 
> 
> Rebecca Cran
> 
> 
> 
> 
> 
> 


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[edk2-devel] [PATCH v1 3/3] EmbeddedPkg: Only run in CI for GCC5

2022-09-06 Thread Michael Kubacki
From: Michael Kubacki 

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4046

This package currently does not build on non-GCC toolchains.

This change adds the package to edk2 CI so it can benefit from
ongoing CI and only tests the package against GCC.

Cc: Leif Lindholm 
Cc: Ard Biesheuvel 
Cc: Abner Chang 
Cc: Daniel Schaefer 
Signed-off-by: Michael Kubacki 
---
 .azurepipelines/templates/pr-gate-build-job.yml | 4 
 1 file changed, 4 insertions(+)

diff --git a/.azurepipelines/templates/pr-gate-build-job.yml 
b/.azurepipelines/templates/pr-gate-build-job.yml
index 0e4ad019bf03..54a74a1a9873 100644
--- a/.azurepipelines/templates/pr-gate-build-job.yml
+++ b/.azurepipelines/templates/pr-gate-build-job.yml
@@ -21,6 +21,10 @@ jobs:
   #Use matrix to speed up the build process
   strategy:
 matrix:
+  ${{ if eq(parameters.tool_chain_tag, 'GCC5') }}:
+TARGET_GCC_ONLY:
+  Build.Pkgs: 'EmbeddedPkg'
+  Build.Targets: 'DEBUG,RELEASE,NO-TARGET,NOOPT'
   TARGET_ARM_ARMPLATFORM:
 Build.Pkgs: 'ArmPkg,ArmPlatformPkg'
 Build.Targets: 'DEBUG,RELEASE,NO-TARGET,NOOPT'
-- 
2.28.0.windows.1



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[edk2-devel] [PATCH v1 2/3] EmbeddedPkg: Add CI YAML file

2022-09-06 Thread Michael Kubacki
From: Michael Kubacki 

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4046

Adds EmbeddedPkg to the list of supported build packages for edk2
CI and fixes Library Class Check errors reported.

These changes allow EmbeddedPkg to pass NO-TARGET CI testing.

Cc: Leif Lindholm 
Cc: Ard Biesheuvel 
Cc: Abner Chang 
Cc: Daniel Schaefer 
Signed-off-by: Michael Kubacki 
---
 .pytool/CISettings.py   |  1 +
 EmbeddedPkg/EmbeddedPkg.ci.yaml | 89 
 EmbeddedPkg/EmbeddedPkg.dec |  8 ++
 3 files changed, 98 insertions(+)

diff --git a/.pytool/CISettings.py b/.pytool/CISettings.py
index cf9e0d77b19b..aef850a54549 100644
--- a/.pytool/CISettings.py
+++ b/.pytool/CISettings.py
@@ -53,6 +53,7 @@ class Settings(CiBuildSettingsManager, UpdateSettingsManager, 
SetupSettingsManag
 "ArmPlatformPkg",
 "ArmVirtPkg",
 "DynamicTablesPkg",
+"EmbeddedPkg",
 "EmulatorPkg",
 "MdePkg",
 "MdeModulePkg",
diff --git a/EmbeddedPkg/EmbeddedPkg.ci.yaml b/EmbeddedPkg/EmbeddedPkg.ci.yaml
new file mode 100644
index ..21f30108a29f
--- /dev/null
+++ b/EmbeddedPkg/EmbeddedPkg.ci.yaml
@@ -0,0 +1,89 @@
+## @file
+# Core CI configuration for EmbeddedPkg
+#
+# Copyright (c) Microsoft Corporation
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+##
+{
+## options defined .pytool/Plugin/LicenseCheck
+"LicenseCheck": {
+"IgnoreFiles": []
+},
+
+"EccCheck": {
+## Exception sample looks like below:
+## "ExceptionList": [
+## "", ""
+## ]
+"ExceptionList": [
+],
+## Both file path and directory path are accepted.
+"IgnoreFiles": []
+},
+
+## options defined .pytool/Plugin/CompilerPlugin
+"CompilerPlugin": {
+"DscPath": "EmbeddedPkg.dsc"
+},
+
+## options defined .pytool/Plugin/HostUnitTestCompilerPlugin
+"HostUnitTestCompilerPlugin": {
+"DscPath": "" # Don't support this test
+},
+
+## options defined .pytool/Plugin/CharEncodingCheck
+"CharEncodingCheck": {
+"IgnoreFiles": []
+},
+
+## options defined .pytool/Plugin/DependencyCheck
+"DependencyCheck": {
+"AcceptableDependencies": [
+"ArmPkg/ArmPkg.dec",
+"ArmPlatformPkg/ArmPlatformPkg.dec",
+"EmbeddedPkg/EmbeddedPkg.dec",
+"MdeModulePkg/MdeModulePkg.dec",
+"MdePkg/MdePkg.dec"
+],
+# For host based unit tests
+"AcceptableDependencies-HOST_APPLICATION":[],
+# For UEFI shell based apps
+"AcceptableDependencies-UEFI_APPLICATION":[],
+"IgnoreInf": []
+},
+
+## options defined .pytool/Plugin/DscCompleteCheck
+"DscCompleteCheck": {
+"IgnoreInf": [""],
+"DscPath": ""  # Don't support this test
+},
+
+## options defined .pytool/Plugin/HostUnitTestDscCompleteCheck
+"HostUnitTestDscCompleteCheck": {
+"IgnoreInf": [""],
+"DscPath": "" # Don't support this test
+},
+
+## options defined .pytool/Plugin/GuidCheck
+"GuidCheck": {
+"IgnoreGuidName": [],
+"IgnoreGuidValue": [],
+"IgnoreFoldersAndFiles": [],
+"IgnoreDuplicates": [],
+},
+
+## options defined .pytool/Plugin/LibraryClassCheck
+"LibraryClassCheck": {
+"IgnoreHeaderFile": []
+},
+
+## options defined .pytool/Plugin/SpellCheck
+"SpellCheck": {
+"AuditOnly": True,   # Fails right now with over 270 errors
+"IgnoreFiles": [],   # use gitignore syntax to ignore errors 
in matching files
+"ExtendWords": [],   # words to extend to the dictionary for 
this package
+"IgnoreStandardPaths": [],   # Standard Plugin defined paths that 
should be ignore
+"AdditionalIncludePaths": [] # Additional paths to spell check 
(wildcards supported)
+}
+}
diff --git a/EmbeddedPkg/EmbeddedPkg.dec b/EmbeddedPkg/EmbeddedPkg.dec
index 637888e0fd4f..341ef5e6a679 100644
--- a/EmbeddedPkg/EmbeddedPkg.dec
+++ b/EmbeddedPkg/EmbeddedPkg.dec
@@ -36,6 +36,14 @@ [LibraryClasses.common]
   GdbSerialLib|Include/Library/GdbSerialLib.h
   DebugAgentTimerLib|Include/Library/DebugAgentTimerLib.h
   NorFlashInfoLib|Include/Library/NorFlashInfoLib.h
+  HalRuntimeServicesLib|Include/Library/HalRuntimeServicesLib.h
+  PrePiHobListPointerLib|Include/Library/PrePiHobListPointerLib.h
+  TimeBaseLib|Include/Library/TimeBaseLib.h
+  AcpiLib|Include/Library/AcpiLib.h
+  AndroidBootImgLib|Include/Library/AndroidBootImgLib.h
+  DmaLib|Include/Library/DmaLib.h
+  EfiFileLib|Include/Library/EfiFileLib.h
+  FdtLoadLib|Include/Library/FdtLoadLib.h
 
   DtPlatformDtbLoaderLib|Include/Library/DtPlatformDtbLoaderLib.h
 
-- 
2.28.0.windows.1



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[edk2-devel] [PATCH v1 1/3] EmbeddedPkg/AcpiLib: Fix code formatting errors

2022-09-06 Thread Michael Kubacki
From: Michael Kubacki 

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4046

This package did not have CI enabled so code changes were merged
that fail uncrustify formatting. This change updates those files
to include uncustify formatting.

Cc: Leif Lindholm 
Cc: Ard Biesheuvel 
Cc: Abner Chang 
Cc: Daniel Schaefer 
Signed-off-by: Michael Kubacki 
---
 EmbeddedPkg/Library/AcpiLib/AcpiLib.c | 88 ++--
 EmbeddedPkg/Include/Library/AcpiLib.h | 22 ++---
 2 files changed, 56 insertions(+), 54 deletions(-)

diff --git a/EmbeddedPkg/Library/AcpiLib/AcpiLib.c 
b/EmbeddedPkg/Library/AcpiLib/AcpiLib.c
index ea2ad63b2039..cb593a7b2a3a 100644
--- a/EmbeddedPkg/Library/AcpiLib/AcpiLib.c
+++ b/EmbeddedPkg/Library/AcpiLib/AcpiLib.c
@@ -192,13 +192,13 @@ LocateAndInstallAcpiFromFv (
 EFI_STATUS
 EFIAPI
 AcpiUpdateChecksum (
-  IN OUT  UINT8  *Buffer,
-  IN  UINTN  Size
+  IN OUT  UINT8  *Buffer,
+  IN  UINTN  Size
   )
 {
-  UINTN ChecksumOffset;
+  UINTN  ChecksumOffset;
 
-  if (Buffer == NULL || Size == 0) {
+  if ((Buffer == NULL) || (Size == 0)) {
 return EFI_INVALID_PARAMETER;
   }
 
@@ -237,11 +237,11 @@ AcpiUpdateChecksum (
 EFI_STATUS
 EFIAPI
 AcpiLocateTableBySignature (
-  IN  EFI_ACPI_SDT_PROTOCOL   *AcpiSdtProtocol,
-  IN  UINT32  TableSignature,
-  IN OUT  UINTN   *Index,
-  OUT EFI_ACPI_DESCRIPTION_HEADER **Table,
-  OUT UINTN   *TableKey
+  IN  EFI_ACPI_SDT_PROTOCOL*AcpiSdtProtocol,
+  IN  UINT32   TableSignature,
+  IN OUT  UINTN*Index,
+  OUT EFI_ACPI_DESCRIPTION_HEADER  **Table,
+  OUT UINTN*TableKey
   )
 {
   EFI_STATUS  Status;
@@ -249,9 +249,10 @@ AcpiLocateTableBySignature (
   EFI_ACPI_TABLE_VERSION  TableVersion;
   UINTN   TableIndex;
 
-  if (AcpiSdtProtocol == NULL
-  || Table == NULL
-  || TableKey == NULL) {
+  if (  (AcpiSdtProtocol == NULL)
+ || (Table == NULL)
+ || (TableKey == NULL))
+  {
 return EFI_INVALID_PARAMETER;
   }
 
@@ -261,7 +262,7 @@ AcpiLocateTableBySignature (
   // Search for ACPI Table with matching signature
   //
   TableVersion = 0;
-  TableIndex = *Index;
+  TableIndex   = *Index;
   while (!EFI_ERROR (Status)) {
 Status = AcpiSdtProtocol->GetAcpiTable (
 TableIndex,
@@ -301,26 +302,26 @@ AcpiLocateTableBySignature (
 EFI_STATUS
 EFIAPI
 AcpiAmlObjectUpdateInteger (
-  IN  EFI_ACPI_SDT_PROTOCOL   *AcpiSdtProtocol,
-  IN  EFI_ACPI_HANDLE TableHandle,
-  IN  CHAR8   *AsciiObjectPath,
-  IN  UINTN   Value
+  IN  EFI_ACPI_SDT_PROTOCOL  *AcpiSdtProtocol,
+  IN  EFI_ACPI_HANDLETableHandle,
+  IN  CHAR8  *AsciiObjectPath,
+  IN  UINTN  Value
   )
 {
-  EFI_STATUSStatus;
-  EFI_ACPI_HANDLE   ObjectHandle;
-  EFI_ACPI_HANDLE   DataHandle;
-  EFI_ACPI_DATA_TYPEDataType;
-  UINT8 *Buffer;
-  UINTN BufferSize;
-  UINTN DataSize;
+  EFI_STATUS  Status;
+  EFI_ACPI_HANDLE ObjectHandle;
+  EFI_ACPI_HANDLE DataHandle;
+  EFI_ACPI_DATA_TYPE  DataType;
+  UINT8   *Buffer;
+  UINTN   BufferSize;
+  UINTN   DataSize;
 
-  if (AcpiSdtProtocol == NULL || AsciiObjectPath == NULL) {
+  if ((AcpiSdtProtocol == NULL) || (AsciiObjectPath == NULL)) {
 return EFI_INVALID_PARAMETER;
   }
 
   ObjectHandle = NULL;
-  DataHandle = NULL;
+  DataHandle   = NULL;
 
   Status = AcpiSdtProtocol->FindPath (TableHandle, AsciiObjectPath, 
);
   if (EFI_ERROR (Status)) {
@@ -332,6 +333,7 @@ AcpiAmlObjectUpdateInteger (
 Status = EFI_NOT_FOUND;
 goto Exit;
   }
+
   ASSERT (DataType == EFI_ACPI_DATA_TYPE_OPCODE);
   ASSERT (Buffer != NULL);
 
@@ -350,7 +352,7 @@ AcpiAmlObjectUpdateInteger (
   ASSERT (DataType == EFI_ACPI_DATA_TYPE_OPCODE);
   ASSERT (Buffer != NULL);
 
-  if (Buffer[0] == AML_ZERO_OP || Buffer[0] == AML_ONE_OP) {
+  if ((Buffer[0] == AML_ZERO_OP) || (Buffer[0] == AML_ONE_OP)) {
 Status = AcpiSdtProtocol->SetOption (DataHandle, 0, (VOID *), sizeof 
(UINT8));
 ASSERT_EFI_ERROR (Status);
   } else {
@@ -358,26 +360,26 @@ AcpiAmlObjectUpdateInteger (
 // Check the size of data object
 //
 switch (Buffer[0]) {
-case AML_BYTE_PREFIX:
-  DataSize = sizeof (UINT8);
-  break;
+  case AML_BYTE_PREFIX:
+DataSize = sizeof (UINT8);
+break;
 
-case AML_WORD_PREFIX:
-  DataSize = sizeof (UINT16);
-  break;
+  case AML_WORD_PREFIX:
+DataSize = sizeof (UINT16);
+break;
 
-case AML_DWORD_PREFIX:
-  DataSize = sizeof (UINT32);
-  break;
+  case AML_DWORD_PREFIX:
+DataSize = sizeof (UINT32);
+break;
 
-case AML_QWORD_PREFIX:
-  DataSize 

[edk2-devel] [PATCH v1 0/3] EmbeddedPkg: Enable CI

2022-09-06 Thread Michael Kubacki
From: Michael Kubacki 

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4046

Adds EmbeddedPkg to edk2 CI.

Due to a number of build errors (some intentional) such as
'BUILD_EPOCH' only being defined for GCC in
VirtualRealTimeClockLib.inf, the package is only run on GCC
build agents.

This still allows build to be verified and non-build CI checks
to be performed.

In the edk2 PR for this change, you can see that the package only
runs on GCC and CI passes with this configuration.

https://github.com/tianocore/edk2/pull/3299

Cc: Leif Lindholm 
Cc: Ard Biesheuvel 
Cc: Abner Chang 
Cc: Daniel Schaefer 
Signed-off-by: Michael Kubacki 

Michael Kubacki (3):
  EmbeddedPkg/AcpiLib: Fix code formatting errors
  EmbeddedPkg: Add CI YAML file
  EmbeddedPkg: Only run in CI for GCC5

 EmbeddedPkg/Library/AcpiLib/AcpiLib.c   | 88 +--
 .azurepipelines/templates/pr-gate-build-job.yml |  4 +
 .pytool/CISettings.py   |  1 +
 EmbeddedPkg/EmbeddedPkg.ci.yaml | 89 
 EmbeddedPkg/EmbeddedPkg.dec |  8 ++
 EmbeddedPkg/Include/Library/AcpiLib.h   | 22 ++---
 6 files changed, 158 insertions(+), 54 deletions(-)
 create mode 100644 EmbeddedPkg/EmbeddedPkg.ci.yaml

-- 
2.28.0.windows.1



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[edk2-devel] [PATCH 1/1] OvmfPkg: Store PageTablePool in TdxWorkArea

2022-09-06 Thread Min Xu
From: Min M Xu 

PeilessStartupLib is running in SEC phase. In that phase global variable
is not allowed. So the mPageTablePool cannot be used. In stead the
PageTablePool is stored in TdxWorkArea.

Cc: Erdem Aktas 
Cc: Gerd Hoffmann 
Cc: James Bottomley 
Cc: Jiewen Yao 
Cc: Tom Lendacky 
Signed-off-by: Min M Xu 
---
 OvmfPkg/Include/WorkArea.h|  1 +
 .../PeilessStartupLib/PeilessStartupLib.inf   |  1 +
 .../PeilessStartupLib/X64/VirtualMemory.c | 82 +--
 3 files changed, 60 insertions(+), 24 deletions(-)

diff --git a/OvmfPkg/Include/WorkArea.h b/OvmfPkg/Include/WorkArea.h
index bf56fc4a6f65..0b2fb2f8c573 100644
--- a/OvmfPkg/Include/WorkArea.h
+++ b/OvmfPkg/Include/WorkArea.h
@@ -71,6 +71,7 @@ typedef struct _SEC_TDX_WORK_AREA {
   UINT32PageTableReady;
   UINT32Gpaw;
   UINT64HobList;
+  UINT64PageTablePool;
 } SEC_TDX_WORK_AREA;
 
 typedef struct _TDX_WORK_AREA {
diff --git a/OvmfPkg/Library/PeilessStartupLib/PeilessStartupLib.inf 
b/OvmfPkg/Library/PeilessStartupLib/PeilessStartupLib.inf
index def50b4b019e..eed9f27d3d01 100644
--- a/OvmfPkg/Library/PeilessStartupLib/PeilessStartupLib.inf
+++ b/OvmfPkg/Library/PeilessStartupLib/PeilessStartupLib.inf
@@ -88,3 +88,4 @@
   gEfiMdeModulePkgTokenSpaceGuid.PcdNullPointerDetectionPropertyMask## 
CONSUMES
   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDxeMemFvBase
   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDxeMemFvSize
+  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfWorkAreaBase
diff --git a/OvmfPkg/Library/PeilessStartupLib/X64/VirtualMemory.c 
b/OvmfPkg/Library/PeilessStartupLib/X64/VirtualMemory.c
index 6877e521e485..7e33f044993a 100644
--- a/OvmfPkg/Library/PeilessStartupLib/X64/VirtualMemory.c
+++ b/OvmfPkg/Library/PeilessStartupLib/X64/VirtualMemory.c
@@ -19,13 +19,9 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
 #include 
 #include 
 #include 
+#include 
 #include "PageTables.h"
 
-//
-// Global variable to keep track current available memory used as page table.
-//
-PAGE_TABLE_POOL  *mPageTablePool = NULL;
-
 UINTN  mLevelShift[5] = {
   0,
   PAGING_L1_ADDRESS_SHIFT,
@@ -50,6 +46,32 @@ UINT64  mLevelSize[5] = {
   SIZE_512GB
 };
 
+PAGE_TABLE_POOL *
+GetPageTablePool (
+  VOID
+  )
+{
+  TDX_WORK_AREA  *TdxWorkArea;
+
+  TdxWorkArea = (TDX_WORK_AREA *)(UINTN)FixedPcdGet32 (PcdOvmfWorkAreaBase);
+  ASSERT (TdxWorkArea != NULL);
+
+  return (PAGE_TABLE_POOL *)TdxWorkArea->SecTdxWorkArea.PageTablePool;
+}
+
+VOID
+SetPageTablePool (
+  VOID  *PageTablePool
+  )
+{
+  TDX_WORK_AREA  *TdxWorkArea;
+
+  TdxWorkArea = (TDX_WORK_AREA *)(UINTN)FixedPcdGet32 (PcdOvmfWorkAreaBase);
+  ASSERT (TdxWorkArea != NULL);
+
+  TdxWorkArea->SecTdxWorkArea.PageTablePool = (UINT64)(UINTN)PageTablePool;
+}
+
 BOOLEAN
 IsSetNxForStack (
   VOID
@@ -283,7 +305,10 @@ InitializePageTablePool (
   IN UINTN  PoolPages
   )
 {
-  VOID  *Buffer;
+  VOID *Buffer;
+  PAGE_TABLE_POOL  *PageTablePool;
+
+  PageTablePool = GetPageTablePool ();
 
   DEBUG ((DEBUG_INFO, "InitializePageTablePool PoolPages=%d\n", PoolPages));
 
@@ -303,20 +328,21 @@ InitializePageTablePool (
   //
   // Link all pools into a list for easier track later.
   //
-  if (mPageTablePool == NULL) {
-mPageTablePool   = Buffer;
-mPageTablePool->NextPool = mPageTablePool;
+  if (PageTablePool == NULL) {
+PageTablePool   = Buffer;
+PageTablePool->NextPool = PageTablePool;
+SetPageTablePool (PageTablePool);
   } else {
-((PAGE_TABLE_POOL *)Buffer)->NextPool = mPageTablePool->NextPool;
-mPageTablePool->NextPool  = Buffer;
-mPageTablePool= Buffer;
+((PAGE_TABLE_POOL *)Buffer)->NextPool = PageTablePool->NextPool;
+PageTablePool->NextPool   = Buffer;
+PageTablePool = Buffer;
   }
 
   //
   // Reserve one page for pool header.
   //
-  mPageTablePool->FreePages = PoolPages - 1;
-  mPageTablePool->Offset= EFI_PAGES_TO_SIZE (1);
+  PageTablePool->FreePages = PoolPages - 1;
+  PageTablePool->Offset= EFI_PAGES_TO_SIZE (1);
 
   return TRUE;
 }
@@ -343,28 +369,33 @@ AllocatePageTableMemory (
   IN UINTN  Pages
   )
 {
-  VOID  *Buffer;
+  VOID *Buffer;
+  PAGE_TABLE_POOL  *PageTablePool;
 
   if (Pages == 0) {
 return NULL;
   }
 
-  DEBUG ((DEBUG_INFO, "AllocatePageTableMemory. mPageTablePool=%p, 
Pages=%d\n", mPageTablePool, Pages));
+  PageTablePool = GetPageTablePool ();
+
+  DEBUG ((DEBUG_INFO, "AllocatePageTableMemory. PageTablePool=%p, Pages=%d\n", 
PageTablePool, Pages));
   //
   // Renew the pool if necessary.
   //
-  if ((mPageTablePool == NULL) ||
-  (Pages > mPageTablePool->FreePages))
+  if ((PageTablePool == NULL) ||
+  (Pages > PageTablePool->FreePages))
   {
 if (!InitializePageTablePool (Pages)) {
   return NULL;
+} else {
+  PageTablePool = GetPageTablePool ();
 }
   }
 
-  Buffer = (UINT8 *)mPageTablePool + mPageTablePool->Offset;
+  Buffer = (UINT8 *)PageTablePool + 

[edk2-devel] Event: TianoCore Bug Triage - APAC / NAMO - 09/06/2022 #cal-reminder

2022-09-06 Thread Group Notification
*Reminder: TianoCore Bug Triage - APAC / NAMO*

*When:*
09/06/2022
6:30pm to 7:30pm
(UTC-07:00) America/Los Angeles

*Where:*
https://teams.microsoft.com/l/meetup-join/19%3ameeting_OTk1YzJhN2UtOGQwNi00NjY4LWEwMTktY2JiODRlYTY1NmY0%40thread.v2/0?context=%7b%22Tid%22%3a%2246c98d88-e344-4ed4-8496-4ed7712e255d%22%2c%22Oid%22%3a%226e4ce4c4-1242-431b-9a51-92cd01a5df3c%22%7d

*Organizer:* Liming Gao gaolim...@byosoft.com.cn ( 
gaolim...@byosoft.com.cn?subject=Re:%20Event:%20TianoCore%20Bug%20Triage%20-%20APAC%20%2F%20NAMO
 )

View Event ( https://edk2.groups.io/g/devel/viewevent?eventid=1268266 )

*Description:*

TianoCore Bug Triage - APAC / NAMO

Hosted by Liming Gao



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Re: [edk2-devel] [PATCH V3 02/12] MdePkg: Increase EFI_RESOURCE_MAX_MEMORY_TYPE

2022-09-06 Thread Min Xu
On September 7, 2022 2:45 AM, Kinney, Michael D wrote:
> 
> Hi,
> 
> If this is related to code first, are these patches for an edk2-staging 
> branch.  If
> so, that should be part of email subject.
Yes, it is in edk2-staging TDVF branch. 
https://github.com/tianocore/edk2-staging/tree/TDVF
> 
> Also, the naming convention for the new values do not follow code first with
> the BZ in new names.
> 
> https://github.com/tianocore/tianocore.github.io/wiki/EDK-II-Code-First-
> Process#source-code
Thanks for reminder. The name will be updated based on the above wik.

Thanks
Min


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[edk2-devel] Error building MdeModulePkg.dsc with CLANG38 (clang 11.0.1)

2022-09-06 Thread Rebecca Cran

I noticed that MdeModulePkg/MdeModulePkg.dsc doesn't build with clang 11: I get 
an error in CapsuleApp:


build -p MdeModulePkg/MdeModulePkg.dsc -a X64 -t CLANG38 -b DEBUG

...

MdeModulePkg/Application/CapsuleApp/CapsuleDump.c:797:5: error: cast 
between incompatible calling conventions 'cdecl' and 'ms_abi'; calls 
through this pointer may abort at runtime 
[-Werror,-Wcast-calling-convention]


    (SORT_COMPARE)CompareFileNameInAlphabet

    ^~~

MdeModulePkg/Application/CapsuleApp/CapsuleDump.c:635:1: note: consider 
defining 'CompareFileNameInAlphabet' with the 'ms_abi' calling convention


CompareFileNameInAlphabet (

^

EFIAPI

1 error generated.

make: *** [GNUmakefile:361: 
Build/MdeModule/DEBUG_CLANG38/X64/MdeModulePkg/Application/CapsuleApp/CapsuleApp/OUTPUT/CapsuleDump.obj] 
Error 1


--

Rebecca Cran



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Re: [edk2-devel] [PATCH v3 1/1] MdePkg: Use ANSI colors to indicate debug message severity

2022-09-06 Thread Rebecca Cran

On 9/6/22 12:40, Kinney, Michael D wrote:

Rebecca,

BasePrintLib is used for much more than just DEBUG() macros.  This features 
should
not modify the behavior of BasePrintLib.

For example, a single module that links to BasePrintLib can use those services
for non DebugLib services with no expectation that ANSI sequences are added
and that same module can link against DebugLib for DEBUG() macro support that
expects ANSI sequences to be added.  This is a conflict.

The scope of this change should be only the DebugLib instance.


The reason I put the functions in BasePrintLib is because I couldn't see 
any other common location to put them.


But since one deals with Unicode and the other ASCII, I think defining 
them in their respective libraries might be fine, since we won't end up 
duplicating code.




  [PcdsFeatureFlag]
gEfiMdePkgTokenSpaceGuid.PcdUgaConsumeSupport|TRUE
+  gEfiMdePkgTokenSpaceGuid.PcdDebugAnsiSeqSupport|FALSE

The DEC default value is FALSE, so this line is not required.


Thanks, I'll fix it in the next patch version.

--
Rebecca Cran


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[edk2-devel] [PATCH] DynamicTablesPkg: AcpiSsdtPcieLibArm: Allow use of segment number as UID

2022-09-06 Thread Jeff Brasen via groups.io
Add support for selecting to use index or segment number as UID and name.

This allows the path of the nodes to be well known.

For example, if the PCIe node needs to be notified from by an interrupt

for a Generic Event Device



Signed-off-by: Jeff Brasen 

---

 DynamicTablesPkg/DynamicTablesPkg.dec |  3 +++

 .../AcpiSsdtPcieLibArm/SsdtPcieGenerator.c| 19 ++-

 .../Arm/AcpiSsdtPcieLibArm/SsdtPcieLibArm.inf |  3 +++

 3 files changed, 24 insertions(+), 1 deletion(-)



diff --git a/DynamicTablesPkg/DynamicTablesPkg.dec 
b/DynamicTablesPkg/DynamicTablesPkg.dec

index cc34c2bdd6..adc2e67cbf 100644

--- a/DynamicTablesPkg/DynamicTablesPkg.dec

+++ b/DynamicTablesPkg/DynamicTablesPkg.dec

@@ -60,5 +60,8 @@

   # Non BSA Compliant 16550 Serial HID

   
gEdkiiDynamicTablesPkgTokenSpaceGuid.PcdNonBsaCompliant16550SerialHid|""|VOID*|0x4008

 

+  # Use PCI segment numbers as UID

+  
gEdkiiDynamicTablesPkgTokenSpaceGuid.PcdPciUseSegmentAsUid|FALSE|BOOLEAN|0x4009

+

 [Guids]

   gEdkiiDynamicTablesPkgTokenSpaceGuid = { 0xab226e66, 0x31d8, 0x4613, { 0x87, 
0x9d, 0xd2, 0xfa, 0xb6, 0x10, 0x26, 0x3c } }

diff --git 
a/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtPcieLibArm/SsdtPcieGenerator.c 
b/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtPcieLibArm/SsdtPcieGenerator.c

index d82f071e85..85098752c6 100644

--- a/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtPcieLibArm/SsdtPcieGenerator.c

+++ b/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtPcieLibArm/SsdtPcieGenerator.c

@@ -981,6 +981,7 @@ BuildSsdtPciTableEx (

   UINTN Index;

   EFI_ACPI_DESCRIPTION_HEADER   **TableList;

   ACPI_PCI_GENERATOR*Generator;

+  UINT32Uid;

 

   ASSERT (This != NULL);

   ASSERT (AcpiTableInfo != NULL);

@@ -1036,13 +1037,29 @@ BuildSsdtPciTableEx (

   *Table = TableList;

 

   for (Index = 0; Index < PciCount; Index++) {

+if (PcdGetBool (PcdPciUseSegmentAsUid)) {

+  Uid = PciInfo[Index].PciSegmentGroupNumber;

+  if (Uid > MAX_PCI_ROOT_COMPLEXES_SUPPORTED) {

+DEBUG ((

+  DEBUG_ERROR,

+  "ERROR: SSDT-PCI: Pci root complexes segment number: %d."

+  " Greater than maximum number of Pci root complexes supported = 
%d.\n",

+  Uid,

+  MAX_PCI_ROOT_COMPLEXES_SUPPORTED

+  ));

+return EFI_INVALID_PARAMETER;

+  }

+} else {

+  Uid = Index;

+}

+

 // Build a SSDT table describing the Pci devices.

 Status = BuildSsdtPciTable (

Generator,

CfgMgrProtocol,

AcpiTableInfo,

[Index],

-   Index,

+   Uid,

[Index]

);

 if (EFI_ERROR (Status)) {

diff --git 
a/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtPcieLibArm/SsdtPcieLibArm.inf 
b/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtPcieLibArm/SsdtPcieLibArm.inf

index b38a4e9d34..c2a1acb570 100644

--- a/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtPcieLibArm/SsdtPcieLibArm.inf

+++ b/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtPcieLibArm/SsdtPcieLibArm.inf

@@ -30,3 +30,6 @@

   AmlLib

   BaseLib

   SsdtPcieSupportLib

+

+[Pcd]

+  gEdkiiDynamicTablesPkgTokenSpaceGuid.PcdPciUseSegmentAsUid

-- 

2.25.1





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Re: [edk2-devel] [PATCH v1 1/1] Maintainers.txt: Update maintainers/reviewers for CI and Test

2022-09-06 Thread Michael D Kinney
Reviewed-by: Michael D Kinney 

> -Original Message-
> From: devel@edk2.groups.io  On Behalf Of Michael Kubacki
> Sent: Friday, September 2, 2022 5:24 PM
> To: devel@edk2.groups.io
> Cc: Sean Brogan ; Kinney, Michael D 
> ; Gao, Liming
> ; Michael Kubacki 
> Subject: [edk2-devel] [PATCH v1 1/1] Maintainers.txt: Update 
> maintainers/reviewers for CI and Test
> 
> From: "brbar...@microsoft.com" 
> 
> Remove Bret Barkelew from:
> - .azurepipelines
> - .mergify
> - .pytool
> - UnitTestFrameworkPkg
> 
> Add Michael Kubacki to:
> - .azurepipelines
> - .pytool
> 
> Signed-off-by: Bret Barkelew 
> Cc: Sean Brogan 
> Cc: Michael D Kinney 
> Cc: Liming Gao 
> Cc: Michael Kubacki 
> ---
>  Maintainers.txt | 6 ++
>  1 file changed, 2 insertions(+), 4 deletions(-)
> 
> diff --git a/Maintainers.txt b/Maintainers.txt
> index 73ce13126b37..d869dc46f0ef 100644
> --- a/Maintainers.txt
> +++ b/Maintainers.txt
> @@ -107,7 +107,7 @@ EDK II Continuous Integration:
>  .azurepipelines/
>  F: .azurepipelines/
>  M: Sean Brogan  [spbrogan]
> -M: Bret Barkelew  [corthon]
> +M: Michael Kubacki  [makubacki]
>  R: Michael D Kinney  [mdkinney]
>  R: Liming Gao  [lgao4]
> 
> @@ -116,12 +116,11 @@ F: .mergify/
>  M: Michael D Kinney  [mdkinney]
>  M: Liming Gao  [lgao4]
>  R: Sean Brogan  [spbrogan]
> -R: Bret Barkelew  [corthon]
> 
>  .pytool/
>  F: .pytool/
>  M: Sean Brogan  [spbrogan]
> -M: Bret Barkelew  [corthon]
> +M: Michael Kubacki  [makubacki]
>  R: Michael D Kinney  [mdkinney]
>  R: Liming Gao  [lgao4]
> 
> @@ -614,5 +613,4 @@ F: UnitTestFrameworkPkg/
>  M: Michael D Kinney  [mdkinney]
>  M: Michael Kubacki  [makubacki]
>  R: Sean Brogan  [spbrogan]
> -R: Bret Barkelew  [corthon]
>  S: Maintained
> --
> 2.35.1.vfs.0.0
> 
> 
> 
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Re: [edk2-devel] [PATCH v2 08/17] MdePkg: Remove duplicated words

2022-09-06 Thread Michael D Kinney
Reviewed-by: Michael D Kinney 

> -Original Message-
> From: pierre.gond...@arm.com 
> Sent: Tuesday, September 6, 2022 1:29 AM
> To: devel@edk2.groups.io
> Cc: Pierre Gondois ; Kinney, Michael D 
> ; Gao, Liming
> 
> Subject: [PATCH v2 08/17] MdePkg: Remove duplicated words
> 
> From: Pierre Gondois 
> 
> In an effort to clean the documentation of the above
> package, remove duplicated words.
> 
> Cc: Michael D Kinney 
> Cc: Liming Gao 
> Signed-off-by: Pierre Gondois 
> ---
>  MdePkg/Include/Guid/GraphicsInfoHob.h   | 2 +-
>  MdePkg/Include/Library/DevicePathLib.h  | 2 +-
>  MdePkg/Include/Library/DxeServicesLib.h | 6 +++---
>  MdePkg/Include/Library/ExtractGuidedSectionLib.h| 6 +++---
>  MdePkg/Include/Library/FileHandleLib.h  | 4 ++--
>  MdePkg/Include/Library/PeCoffLib.h  | 2 +-
>  MdePkg/Include/Library/UefiLib.h| 2 +-
>  MdePkg/Include/Library/UnitTestLib.h| 2 +-
>  MdePkg/Include/Pi/PiMmCis.h | 2 +-
>  MdePkg/Include/Pi/PiSmmCis.h| 2 +-
>  MdePkg/Include/Protocol/ComponentName.h | 2 +-
>  MdePkg/Include/Protocol/Smbios.h| 2 +-
>  MdePkg/Include/Uefi/UefiMultiPhase.h| 2 +-
>  MdePkg/Include/Uefi/UefiSpec.h  | 2 +-
>  MdePkg/Library/BaseDebugLibSerialPort/DebugLib.c| 2 +-
>  .../BaseExtractGuidedSectionLib.c   | 6 +++---
>  MdePkg/Library/BaseS3StallLib/S3StallLib.c  | 2 +-
>  MdePkg/Library/DxeRuntimeDebugLibSerialPort/DebugLib.c  | 2 +-
>  MdePkg/Library/DxeServicesLib/DxeServicesLib.c  | 6 +++---
>  .../PeiExtractGuidedSectionLib/PeiExtractGuidedSectionLib.c | 6 +++---
>  MdePkg/Library/SmmIoLib/SmmIoLib.c  | 2 +-
>  MdePkg/Library/SmmIoLib/SmmIoLib.inf| 2 +-
>  MdePkg/Library/SmmIoLib/SmmIoLib.uni| 4 ++--
>  MdePkg/Library/SmmMemLib/SmmMemLib.c| 2 +-
>  MdePkg/Library/SmmMemLib/SmmMemLib.inf  | 2 +-
>  MdePkg/Library/SmmMemLib/SmmMemLib.uni  | 4 ++--
>  MdePkg/Library/SmmPeriodicSmiLib/SmmPeriodicSmiLib.c| 4 ++--
>  .../StandaloneMmDriverEntryPoint.c  | 4 ++--
>  MdePkg/Library/UefiDebugLibConOut/DebugLib.c| 2 +-
>  MdePkg/Library/UefiDebugLibDebugPortProtocol/DebugLib.c | 2 +-
>  MdePkg/Library/UefiDebugLibStdErr/DebugLib.c| 2 +-
>  MdePkg/Library/UefiDebugLibStdErr/UefiDebugLibStdErr.inf| 2 +-
>  MdePkg/Library/UefiDebugLibStdErr/UefiDebugLibStdErr.uni| 2 +-
>  MdePkg/Library/UefiDevicePathLib/DevicePathUtilities.c  | 2 +-
>  .../UefiDevicePathLibDevicePathProtocol/UefiDevicePathLib.c | 2 +-
>  MdePkg/Library/UefiFileHandleLib/UefiFileHandleLib.c| 4 ++--
>  MdePkg/Library/UefiLib/Console.c| 2 +-
>  MdePkg/Library/UefiLib/UefiLib.c| 2 +-
>  MdePkg/Test/UnitTest/Library/BaseLib/Base64UnitTest.c   | 4 ++--
>  39 files changed, 56 insertions(+), 56 deletions(-)
> 
> diff --git a/MdePkg/Include/Guid/GraphicsInfoHob.h 
> b/MdePkg/Include/Guid/GraphicsInfoHob.h
> index 237911e63aa0..ecfa283f924e 100644
> --- a/MdePkg/Include/Guid/GraphicsInfoHob.h
> +++ b/MdePkg/Include/Guid/GraphicsInfoHob.h
> @@ -5,7 +5,7 @@
>SPDX-License-Identifier: BSD-2-Clause-Patent
> 
>@par Revision Reference:
> -  This HOB is introduced in in PI Version 1.4.
> +  This HOB is introduced in PI Version 1.4.
> 
>  **/
> 
> diff --git a/MdePkg/Include/Library/DevicePathLib.h 
> b/MdePkg/Include/Library/DevicePathLib.h
> index 7a077e4217d2..039427d5b648 100644
> --- a/MdePkg/Include/Library/DevicePathLib.h
> +++ b/MdePkg/Include/Library/DevicePathLib.h
> @@ -23,7 +23,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
>@retval TRUEDevicePath is valid.
>@retval FALSE   DevicePath is NULL.
>@retval FALSE   Maxsize is less than sizeof(EFI_DEVICE_PATH_PROTOCOL).
> -  @retval FALSE   The length of any node node in the DevicePath is less
> +  @retval FALSE   The length of any node in the DevicePath is less
>than sizeof (EFI_DEVICE_PATH_PROTOCOL).
>@retval FALSE   If MaxSize is not zero, the size of the DevicePath
>exceeds MaxSize.
> diff --git a/MdePkg/Include/Library/DxeServicesLib.h 
> b/MdePkg/Include/Library/DxeServicesLib.h
> index b5c5c4dbdf27..d3304f65a5fd 100644
> --- a/MdePkg/Include/Library/DxeServicesLib.h
> +++ b/MdePkg/Include/Library/DxeServicesLib.h
> @@ -82,7 +82,7 @@ GetSectionFromAnyFvByFileType  (
>If Size is NULL, then ASSERT().
> 
> 
> -  @param  NameGuid A pointer to to the FFS filename GUID to 
> search for
> +  @param  

Re: [edk2-devel] [PATCH v2 17/17] UnitTestFrameworkPkg: Remove duplicated words

2022-09-06 Thread Michael D Kinney
Reviewed-by: Michael D Kinney 

> -Original Message-
> From: pierre.gond...@arm.com 
> Sent: Tuesday, September 6, 2022 1:29 AM
> To: devel@edk2.groups.io
> Cc: Pierre Gondois ; Kinney, Michael D 
> ; Michael Kubacki
> ; Kubacki, Michael 
> 
> Subject: [PATCH v2 17/17] UnitTestFrameworkPkg: Remove duplicated words
> 
> From: Pierre Gondois 
> 
> In an effort to clean the documentation of the above
> package, remove duplicated words.
> 
> Also change in/out tag to pass the EccCheck.
> 
> Cc: Michael D Kinney 
> Cc: Michael Kubacki 
> Signed-off-by: Pierre Gondois 
> Reviewed-by: Michael Kubacki 
> ---
> 
> Notes:
> v2:
> - Correctly align comments. [Michael Kubacki]
> 
>  .../Library/Posix/DebugLibPosix/DebugLibPosix.c | 2 +-
>  UnitTestFrameworkPkg/Library/UnitTestLib/Assert.c   | 2 +-
>  UnitTestFrameworkPkg/Library/UnitTestLib/AssertCmocka.c | 2 +-
>  .../UnitTestPersistenceLibNull/UnitTestPersistenceLibNull.c | 2 +-
>  .../UnitTestPersistenceLibSimpleFileSystem.c| 2 +-
>  .../PrivateInclude/Library/UnitTestPersistenceLib.h | 2 +-
>  UnitTestFrameworkPkg/ReadMe.md  | 6 +++---
>  7 files changed, 9 insertions(+), 9 deletions(-)
> 
> diff --git a/UnitTestFrameworkPkg/Library/Posix/DebugLibPosix/DebugLibPosix.c
> b/UnitTestFrameworkPkg/Library/Posix/DebugLibPosix/DebugLibPosix.c
> index 694f4beb8bf5..cfee36d2ac7f 100644
> --- a/UnitTestFrameworkPkg/Library/Posix/DebugLibPosix/DebugLibPosix.c
> +++ b/UnitTestFrameworkPkg/Library/Posix/DebugLibPosix/DebugLibPosix.c
> @@ -179,7 +179,7 @@ DebugClearMemory (
>ASSERT (Buffer != NULL);
> 
>//
> -  // SetMem() checks for the the ASSERT() condition on Length and returns 
> Buffer
> +  // SetMem() checks for the ASSERT() condition on Length and returns Buffer
>//
>return SetMem (Buffer, Length, PcdGet8 (PcdDebugClearMemoryValue));
>  }
> diff --git a/UnitTestFrameworkPkg/Library/UnitTestLib/Assert.c 
> b/UnitTestFrameworkPkg/Library/UnitTestLib/Assert.c
> index 35636565b783..9bb0798dd801 100644
> --- a/UnitTestFrameworkPkg/Library/UnitTestLib/Assert.c
> +++ b/UnitTestFrameworkPkg/Library/UnitTestLib/Assert.c
> @@ -516,7 +516,7 @@ UnitTestAssertNotNull (
>is either pass, skipped, or failed.
>@param[in]  FunctionNameNull-terminated ASCII string of the function
>executing the UT_EXPECT_ASSERT_FAILURE() macro.
> -  @param[in]  LineNumber  The source file line number of the the function
> +  @param[in]  LineNumber  The source file line number of the function
>executing the UT_EXPECT_ASSERT_FAILURE() macro.
>@param[in]  FileNameNull-terminated ASCII string of the filename
>executing the UT_EXPECT_ASSERT_FAILURE() macro.
> diff --git a/UnitTestFrameworkPkg/Library/UnitTestLib/AssertCmocka.c 
> b/UnitTestFrameworkPkg/Library/UnitTestLib/AssertCmocka.c
> index dc05bbd4384c..0b1f6b197a35 100644
> --- a/UnitTestFrameworkPkg/Library/UnitTestLib/AssertCmocka.c
> +++ b/UnitTestFrameworkPkg/Library/UnitTestLib/AssertCmocka.c
> @@ -349,7 +349,7 @@ UnitTestAssertNotNull (
>is either pass, skipped, or failed.
>@param[in]  FunctionNameNull-terminated ASCII string of the function
>executing the UT_EXPECT_ASSERT_FAILURE() macro.
> -  @param[in]  LineNumber  The source file line number of the the function
> +  @param[in]  LineNumber  The source file line number of the function
>executing the UT_EXPECT_ASSERT_FAILURE() macro.
>@param[in]  FileNameNull-terminated ASCII string of the filename
>executing the UT_EXPECT_ASSERT_FAILURE() macro.
> diff --git 
> a/UnitTestFrameworkPkg/Library/UnitTestPersistenceLibNull/UnitTestPersistenceLibNull.c
> b/UnitTestFrameworkPkg/Library/UnitTestPersistenceLibNull/UnitTestPersistenceLibNull.c
> index e28327652eaf..064b967b13b3 100644
> --- 
> a/UnitTestFrameworkPkg/Library/UnitTestPersistenceLibNull/UnitTestPersistenceLibNull.c
> +++ 
> b/UnitTestFrameworkPkg/Library/UnitTestPersistenceLibNull/UnitTestPersistenceLibNull.c
> @@ -55,7 +55,7 @@ SaveUnitTestCache (
>Will allocate a buffer to hold the loaded data.
> 
>@param[in]  FrameworkHandle  A pointer to the framework that is being 
> persisted.
> -  @param[in]  SaveData A pointer pointer that will be updated with 
> the address
> +  @param[out] SaveData A pointer that will be updated with the 
> address
> of the loaded data buffer.
> 
>@retval  EFI_SUCCESS  Data has been loaded successfully and SaveData is 
> updated
> diff --git 
> a/UnitTestFrameworkPkg/Library/UnitTestPersistenceLibSimpleFileSystem/UnitTestPersistenceLibSimpleFileSystem.c
> 

Re: [edk2-devel] [PATCH V3 02/12] MdePkg: Increase EFI_RESOURCE_MAX_MEMORY_TYPE

2022-09-06 Thread Michael D Kinney
Hi,

If this is related to code first, are these patches for an edk2-staging branch. 
 If so, that should be part of email subject.

Also, the naming convention for the new values do not follow code first with 
the BZ in new names.

https://github.com/tianocore/tianocore.github.io/wiki/EDK-II-Code-First-Process#source-code

Mike


> -Original Message-
> From: Xu, Min M 
> Sent: Monday, September 5, 2022 1:35 AM
> To: devel@edk2.groups.io
> Cc: Xu, Min M ; Kinney, Michael D 
> ; Gao, Liming ;
> Liu, Zhiguang ; Aktas, Erdem ; 
> Gerd Hoffmann ; James
> Bottomley ; Yao, Jiewen ; Tom 
> Lendacky 
> Subject: [PATCH V3 02/12] MdePkg: Increase EFI_RESOURCE_MAX_MEMORY_TYPE
> 
> From: Min M Xu 
> 
> RFC: https://bugzilla.tianocore.org/show_bug.cgi?id=3937
> 
> EFI_RESOURCE_MEMORY_UNACCEPTED is defined for unaccepted memory.
> But this defitinion has not been officially in the PI spec. Base
> on the code-first we define EFI_RESOURCE_MEMORY_UNACCEPTED at
> MdeModulePkg/Include/Pi/PrePiHob.h and update EFI_RESOURCE_MAX_MEMORY_TYPE
> to 8. After EFI_RESOURCE_MEMORY_UNACCEPTED is officially published
> in PI spec, we will re-visit here.
> 
> Cc: Michael D Kinney 
> Cc: Liming Gao 
> Cc: Zhiguang Liu 
> Cc: Erdem Aktas 
> Cc: Gerd Hoffmann 
> Cc: James Bottomley 
> Cc: Jiewen Yao 
> Cc: Tom Lendacky 
> Reviewed-by: Jiewen Yao 
> Signed-off-by: Min Xu 
> ---
>  MdePkg/Include/Pi/PiHob.h | 11 ++-
>  1 file changed, 10 insertions(+), 1 deletion(-)
> 
> diff --git a/MdePkg/Include/Pi/PiHob.h b/MdePkg/Include/Pi/PiHob.h
> index e9f0ab4309d1..9af2e957fee5 100644
> --- a/MdePkg/Include/Pi/PiHob.h
> +++ b/MdePkg/Include/Pi/PiHob.h
> @@ -232,7 +232,16 @@ typedef UINT32 EFI_RESOURCE_TYPE;
>  #define EFI_RESOURCE_MEMORY_MAPPED_IO_PORT  0x0004
>  #define EFI_RESOURCE_MEMORY_RESERVED0x0005
>  #define EFI_RESOURCE_IO_RESERVED0x0006
> -#define EFI_RESOURCE_MAX_MEMORY_TYPE0x0007
> +//
> +// EFI_RESOURCE_MEMORY_UNACCEPTED is defined for unaccepted memory.
> +// But this defitinion has not been officially in the PI spec. Base
> +// on the code-first we define EFI_RESOURCE_MEMORY_UNACCEPTED at
> +// MdeModulePkg/Include/Pi/PrePiHob.h and update EFI_RESOURCE_MAX_MEMORY_TYPE
> +// to 8. After EFI_RESOURCE_MEMORY_UNACCEPTED is officially published
> +// in PI spec, we will re-visit here.
> +//
> +// #define EFI_RESOURCE_MEMORY_UNACCEPTED  0x0007
> +#define EFI_RESOURCE_MAX_MEMORY_TYPE  0x0008
> 
>  ///
>  /// A type of recount attribute type.
> --
> 2.29.2.windows.2



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Re: [edk2-devel] [PATCH v3 1/1] MdePkg: Use ANSI colors to indicate debug message severity

2022-09-06 Thread Michael D Kinney
Rebecca,

BasePrintLib is used for much more than just DEBUG() macros.  This features 
should
not modify the behavior of BasePrintLib.

For example, a single module that links to BasePrintLib can use those services
for non DebugLib services with no expectation that ANSI sequences are added
and that same module can link against DebugLib for DEBUG() macro support that
expects ANSI sequences to be added.  This is a conflict.

The scope of this change should be only the DebugLib instance.

Mike

> -Original Message-
> From: Rebecca Cran 
> Sent: Friday, September 2, 2022 4:23 AM
> To: devel@edk2.groups.io; Kinney, Michael D ; 
> Gao, Liming ; Liu,
> Zhiguang ; Andrew Fish 
> Cc: Rebecca Cran 
> Subject: [PATCH v3 1/1] MdePkg: Use ANSI colors to indicate debug message 
> severity
> 
> There currently isn't a way to differentiate the different
> levels of DEBUG output: DEBUG_ERROR, DEBUG_WARN, DEBUG_INFO
> etc.
> 
> To improve this, wrap DEBUG_ERROR and DEBUG_WARN level
> messages in ANSI color code escape sequences. DEBUG_ERROR
> messages will be displayed in red text, and DEBUG_WARN
> in yellow.
> 
> Only enable this new functionality if the FeatureFlag
> gEfiMdePkgTokenSpaceGuid.PcdDebugAnsiSeqSupport
> is set to TRUE. By default it's FALSE.
> 
> Signed-off-by: Rebecca Cran 
> ---
>  MdePkg/MdePkg.dec|   6 +
>  MdePkg/MdePkg.dsc|   2 +
>  MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf |   2 +-
>  MdePkg/Library/UefiDebugLibConOut/UefiDebugLibConOut.inf |   2 +-
>  MdePkg/Include/Library/PrintLib.h|  39 ++
>  MdePkg/Library/BaseDebugLibSerialPort/DebugLib.c |   4 +
>  MdePkg/Library/BasePrintLib/PrintLib.c   | 128 
> 
>  MdePkg/Library/UefiDebugLibConOut/DebugLib.c |   4 +
>  8 files changed, 185 insertions(+), 2 deletions(-)
> 
> diff --git a/MdePkg/MdePkg.dec b/MdePkg/MdePkg.dec
> index f1ebf9e251c1..00b50cedd510 100644
> --- a/MdePkg/MdePkg.dec
> +++ b/MdePkg/MdePkg.dec
> @@ -4,6 +4,7 @@
>  # It also provides the definitions(including PPIs/PROTOCOLs/GUIDs) of
>  # EFI1.10/UEFI2.7/PI1.7 and some Industry Standards.
>  #
> +# Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights 
> reserved.
>  # Copyright (c) 2007 - 2022, Intel Corporation. All rights reserved.
>  # Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
>  # (C) Copyright 2016 - 2021 Hewlett Packard Enterprise Development LP
> @@ -1973,6 +1974,11 @@ [PcdsFeatureFlag]
># @Prompt Validate ORDERED_COLLECTION structure
>
> gEfiMdePkgTokenSpaceGuid.PcdValidateOrderedCollection|FALSE|BOOLEAN|0x002a
> 
> +  ## Indicates if DEBUG output should use ANSI sequences.
> +  #   TRUE  - Will use ANSI sequences in DEBUG output.
> +  #   FALSE - Will not use ANSI sequences in DEBUG output.
> +  gEfiMdePkgTokenSpaceGuid.PcdDebugAnsiSeqSupport|FALSE|BOOLEAN|0x002f
> +
>  [PcdsFixedAtBuild]
>## Status code value for indicating a watchdog timer has expired.
># EFI_COMPUTING_UNIT_HOST_PROCESSOR | EFI_CU_HP_EC_TIMER_EXPIRED
> diff --git a/MdePkg/MdePkg.dsc b/MdePkg/MdePkg.dsc
> index cc1ac196a931..1ecbe6526ac9 100644
> --- a/MdePkg/MdePkg.dsc
> +++ b/MdePkg/MdePkg.dsc
> @@ -1,6 +1,7 @@
>  ## @file
>  # EFI/PI MdePkg Package
>  #
> +# Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights 
> reserved.
>  # Copyright (c) 2007 - 2022, Intel Corporation. All rights reserved.
>  # Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
>  # (C) Copyright 2020 Hewlett Packard Enterprise Development LP
> @@ -25,6 +26,7 @@ [Defines]
> 
>  [PcdsFeatureFlag]
>gEfiMdePkgTokenSpaceGuid.PcdUgaConsumeSupport|TRUE
> +  gEfiMdePkgTokenSpaceGuid.PcdDebugAnsiSeqSupport|FALSE

The DEC default value is FALSE, so this line is not required.

> 
>  [PcdsFixedAtBuild]
>gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x0f
> diff --git a/MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf
> b/MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf
> index 7504faee67f0..8d6ed759e974 100644
> --- a/MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf
> +++ b/MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf
> @@ -41,4 +41,4 @@ [Pcd]
>gEfiMdePkgTokenSpaceGuid.PcdDebugClearMemoryValue  ## SOMETIMES_CONSUMES
>gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask  ## CONSUMES
>gEfiMdePkgTokenSpaceGuid.PcdFixedDebugPrintErrorLevel ## CONSUMES
> -
> +  gEfiMdePkgTokenSpaceGuid.PcdDebugAnsiSeqSupport   ## CONSUMES
> diff --git a/MdePkg/Library/UefiDebugLibConOut/UefiDebugLibConOut.inf
> b/MdePkg/Library/UefiDebugLibConOut/UefiDebugLibConOut.inf
> index 53bbc8ce3f65..694494ffc7a3 100644
> --- a/MdePkg/Library/UefiDebugLibConOut/UefiDebugLibConOut.inf
> +++ b/MdePkg/Library/UefiDebugLibConOut/UefiDebugLibConOut.inf
> @@ -50,4 

Re: 回复:Re: [edk2-devel] Some questions about Azure CI

2022-09-06 Thread Michael D Kinney
Hi Chao,

You can update the package YAML file to declare ECC exceptions.  Here is an 
example of an existing exception that is similar to your use case.

https://github.com/tianocore/edk2/blob/f0f3f5aae7c4d346ea5e24970936d80dc5b60657/MdeModulePkg/MdeModulePkg.ci.yaml#L14

Mike


From: devel@edk2.groups.io  On Behalf Of Chao Li
Sent: Tuesday, September 6, 2022 7:14 AM
To: Michael Kubacki ; devel 
; Zhang, Shenglei ; Feng, Bob C 

Cc: Kinney, Michael D ; quic_rcran 
; spbrogan ; Gao, Liming 

Subject: 回复:Re: [edk2-devel] Some questions about Azure CI


Hi All,

The UEFI Spec V2.10 was published at the end of Aug, LoongArch is already 
supported by UEFI Spec V2.10, so I think it's time to enable LoongArch port in 
EDKII. As an old issues, I was create CI test on Azure and it still gives me 
the ECC error which is the same as pointed out in the previous email,  the 
detail error refer to: 
https://dev.azure.com/kilaterlee/LoongArch_edk2/_build/results?buildId=50=logs=9701361e-2546-5093-77e5-58c75d95b7ce=27131ef8-75e1-57c3-3236-d806181f2f1f.



All of the errors come from the registers defined of the new Arch , while 
others Arch do not give this error. I think this bug is an obstacle to enabling 
LoongArch in EDKII, so please help me again.



Thanks,

Chao

--


原始邮件

发件人: mikubackmailto:mikub...@linux.microsoft.com>>

收件人: 
develmailto:devel@edk2.groups.io>>,lichaomailto:lic...@loongson.cn>>,Shenglei
 Zhangmailto:shenglei.zh...@intel.com>>,Bob 
Fengmailto:bob.c.f...@intel.com>>

抄送: 
michael.d.kinneymailto:michael.d.kin...@intel.com>>,quic_rcranmailto:quic_rc...@quicinc.com>>,spbroganmailto:spbro...@outlook.com>>,gaolimingmailto:gaolim...@byosoft.com.cn>>

主题: Re: [edk2-devel] Some questions about Azure CI



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Re: [edk2-devel] [PATCH 0/2] Add support EFI_MP_SERVICES_PROTOCOL on AARCH64

2022-09-06 Thread Rebecca Cran

On 9/6/22 11:53, Ard Biesheuvel wrote:

On Tue, 6 Sept 2022 at 19:01, Rebecca Cran  wrote:

My only concern is about the call in MpServicesTest:

WriteBackDataCacheRange ((VOID *), 32);

Obviously the '32' is a magic number and should be something based on the size 
of ApFunction.
But I don't think there's a portable way to calculate what that value should be.


Why exactly do we need that call?

I understand that some of the code needs to be clean to the PoC (on
ARM) so that the AP can fetch instructions with the MMU and caches
disabled. But the actual routine passed into the API is called with
the MMU and caches on, right?


It's a leftover from the work you did on the code, before I changed it to have 
the MMU and caches enabled on the APs.
I'll go through and remove it and any others for the v2 patch which I'll send 
out later today (which will also fix the Usage text for MpServicesTest).

--
Rebecca Cran



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[edk2-devel][edk2-platforms][PATCH v1] EarlySpiFlashRescueFeaturePkg: Initial commit of new feature

2022-09-06 Thread Benjamin Doron
Implement a new debug feature to assist in recovering the SPI flash from
broken firmware. This feature is intended to be used with the userspace
tool presently in my repo here:
https://github.com/benjamindoron/early_flash_rescue.

After my planned second project for GSoC 2022 finished early, I chose to
implement this feature too with the remaining time.

The UEFI shell app implemented for testing and located in that repo
works quite well, though quite slow due to the serial port layer. The
PEIM seems to be quite broken at present. CPU throws undefined opcode
exception for a PciLibRead8() in the PchAcpiBaseSet()... constructor?
Specifically, EIP points at `test ebx, 0xff00`. Note that this means
that re-entry actually succeeds. Maybe.

Cc: Sai Chaganty 
Cc: Isaac Oram 
Cc: Nate DeSimone 
Cc: Ankit Sinha 
Cc: Liming Gao 
Cc: Eric Dong 
Signed-off-by: Benjamin Doron 
---
 .../AdvancedFeaturePkg/AdvancedFeaturePkg.dsc |   1 +
 .../Include/AdvancedFeatures.dsc  |   4 +
 .../Include/AdvancedFeaturesPcd.dsc   |   2 +
 .../AdvancedFeaturePkg/Include/PostMemory.fdf |   4 +
 .../AdvancedFeaturePkg/Include/PreMemory.fdf  |   4 +
 .../EarlySpiFlashRescueFeaturePkg.dec |  44 
 .../EarlySpiFlashRescueFeaturePkg.dsc |  47 
 .../FlashRescueBoardPei/FlashRescueBoard.h|  85 +++
 .../FlashRescueBoardCommon.c  | 236 ++
 .../FlashRescueBoardPei/FlashRescueBoardPei.c | 211 
 .../FlashRescueBoardPei.inf   |  53 
 .../Include/EarlySpiFlashRescueFeature.dsc|  34 +++
 .../Include/PostMemory.fdf|   8 +
 .../Include/Ppi/FeatureInMemory.h |  23 ++
 .../Include/PreMemory.fdf |   8 +
 .../EarlySpiFlashRescueFeaturePkg/Readme.md   | 119 +
 16 files changed, 883 insertions(+)
 create mode 100644 
Features/Intel/Debugging/EarlySpiFlashRescueFeaturePkg/EarlySpiFlashRescueFeaturePkg.dec
 create mode 100644 
Features/Intel/Debugging/EarlySpiFlashRescueFeaturePkg/EarlySpiFlashRescueFeaturePkg.dsc
 create mode 100644 
Features/Intel/Debugging/EarlySpiFlashRescueFeaturePkg/FlashRescueBoardPei/FlashRescueBoard.h
 create mode 100644 
Features/Intel/Debugging/EarlySpiFlashRescueFeaturePkg/FlashRescueBoardPei/FlashRescueBoardCommon.c
 create mode 100644 
Features/Intel/Debugging/EarlySpiFlashRescueFeaturePkg/FlashRescueBoardPei/FlashRescueBoardPei.c
 create mode 100644 
Features/Intel/Debugging/EarlySpiFlashRescueFeaturePkg/FlashRescueBoardPei/FlashRescueBoardPei.inf
 create mode 100644 
Features/Intel/Debugging/EarlySpiFlashRescueFeaturePkg/Include/EarlySpiFlashRescueFeature.dsc
 create mode 100644 
Features/Intel/Debugging/EarlySpiFlashRescueFeaturePkg/Include/PostMemory.fdf
 create mode 100644 
Features/Intel/Debugging/EarlySpiFlashRescueFeaturePkg/Include/Ppi/FeatureInMemory.h
 create mode 100644 
Features/Intel/Debugging/EarlySpiFlashRescueFeaturePkg/Include/PreMemory.fdf
 create mode 100644 
Features/Intel/Debugging/EarlySpiFlashRescueFeaturePkg/Readme.md

diff --git a/Features/Intel/AdvancedFeaturePkg/AdvancedFeaturePkg.dsc 
b/Features/Intel/AdvancedFeaturePkg/AdvancedFeaturePkg.dsc
index 63b36f4c0f7d..3847c39b68ed 100644
--- a/Features/Intel/AdvancedFeaturePkg/AdvancedFeaturePkg.dsc
+++ b/Features/Intel/AdvancedFeaturePkg/AdvancedFeaturePkg.dsc
@@ -50,6 +50,7 @@
   gAcpiDebugFeaturePkgTokenSpaceGuid.PcdAcpiDebugFeatureEnable  
|TRUE
   gAcpiDebugFeaturePkgTokenSpaceGuid.PcdUseSmmVersion   
|FALSE
   gBeepDebugFeaturePkgTokenSpaceGuid.PcdBeepDebugFeatureEnable  
|TRUE
+  gEarlySpiFlashRescueFeaturePkgTokenSpaceGuid.PcdFlashRescueFeatureEnable  
|TRUE
   gPostCodeDebugFeaturePkgTokenSpaceGuid.PcdPostCodeDebugFeatureEnable  
|TRUE
   gUsb3DebugFeaturePkgTokenSpaceGuid.PcdUsb3DebugFeatureEnable  
|TRUE
 
diff --git a/Features/Intel/AdvancedFeaturePkg/Include/AdvancedFeatures.dsc 
b/Features/Intel/AdvancedFeaturePkg/Include/AdvancedFeatures.dsc
index 804aab89bc1b..f1fc643394a3 100644
--- a/Features/Intel/AdvancedFeaturePkg/Include/AdvancedFeatures.dsc
+++ b/Features/Intel/AdvancedFeaturePkg/Include/AdvancedFeatures.dsc
@@ -21,6 +21,10 @@
   !include BeepDebugFeaturePkg/Include/BeepDebugFeature.dsc
 !endif
 
+!if gEarlySpiFlashRescueFeaturePkgTokenSpaceGuid.PcdFlashRescueFeatureEnable 
== TRUE
+  !include EarlySpiFlashRescueFeaturePkg/Include/EarlySpiFlashRescueFeature.dsc
+!endif
+
 !if gPostCodeDebugFeaturePkgTokenSpaceGuid.PcdPostCodeDebugFeatureEnable == 
TRUE
   !include PostCodeDebugFeaturePkg/Include/PostCodeDebugFeature.dsc
 !endif
diff --git a/Features/Intel/AdvancedFeaturePkg/Include/AdvancedFeaturesPcd.dsc 
b/Features/Intel/AdvancedFeaturePkg/Include/AdvancedFeaturesPcd.dsc
index 56743db239b0..798839a6a228 100644
--- a/Features/Intel/AdvancedFeaturePkg/Include/AdvancedFeaturesPcd.dsc
+++ b/Features/Intel/AdvancedFeaturePkg/Include/AdvancedFeaturesPcd.dsc
@@ -22,6 +22,7 @@
   #
   

Re: [edk2-devel] [PATCH 0/2] Add support EFI_MP_SERVICES_PROTOCOL on AARCH64

2022-09-06 Thread Ard Biesheuvel
On Tue, 6 Sept 2022 at 19:01, Rebecca Cran  wrote:
>
> On 9/5/22 09:55, Ard Biesheuvel wrote:
> > I think you've got things covered: I suggested RPi4 because it uses
> > A72, and I seem to remember the issues I observed were either on A57
> > or A72 (which are quite similar). But between Juno and HoneyComb, I
> > don't think the RPi4 data point is that useful.
>
> My only concern is about the call in MpServicesTest:
>
> WriteBackDataCacheRange ((VOID *), 32);
>
> Obviously the '32' is a magic number and should be something based on the 
> size of ApFunction.
> But I don't think there's a portable way to calculate what that value should 
> be.
>

Why exactly do we need that call?

I understand that some of the code needs to be clean to the PoC (on
ARM) so that the AP can fetch instructions with the MMU and caches
disabled. But the actual routine passed into the API is called with
the MMU and caches on, right?


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[edk2-devel][edk2-platforms][PATCH v1 7/7] KabylakeOpenBoardPkg/AspireVn7Dash572G: Align DEBUG() use

2022-09-06 Thread Benjamin Doron
Cc: Sai Chaganty 
Cc: Isaac Oram 
Cc: Nate DeSimone 
Cc: Chasel Chiu 
Signed-off-by: Benjamin Doron 
---
 .../DxeAspireVn7Dash572GAcpiTableLib.c|  5 
 .../BoardAcpiLib/DxeBoardAcpiTableLib.inf |  1 +
 .../SmmAspireVn7Dash572GAcpiEnableLib.c   |  8 -
 .../Library/BoardEcLib/EcCommands.c   | 16 +-
 .../Library/BoardInitLib/DxeBoardConfigHii.c  |  8 ++---
 .../Library/BoardInitLib/DxeBoardInitLib.c| 23 +--
 .../PeiAspireVn7Dash572GInitPostMemLib.c  | 29 ++-
 .../PeiAspireVn7Dash572GInitPreMemLib.c   | 20 ++---
 .../BoardInitLib/PeiBoardInitPreMemLib.c  |  2 ++
 .../DxeSiliconPolicyUpdateLib.c   |  6 ++--
 10 files changed, 80 insertions(+), 38 deletions(-)

diff --git 
a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Library/BoardAcpiLib/DxeAspireVn7Dash572GAcpiTableLib.c
 
b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Library/BoardAcpiLib/DxeAspireVn7Dash572GAcpiTableLib.c
index 131e6460279a..994f18b2dc0e 100644
--- 
a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Library/BoardAcpiLib/DxeAspireVn7Dash572GAcpiTableLib.c
+++ 
b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Library/BoardAcpiLib/DxeAspireVn7Dash572GAcpiTableLib.c
@@ -9,6 +9,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -23,6 +24,8 @@ AspireVn7Dash572GUpdateGlobalNvs (
   EFI_STATUS  Status;
   UINT8   PowerRegister;
 
+  DEBUG ((DEBUG_INFO, "%a() Start\n", __FUNCTION__));
+
   //
   // Allocate and initialize the NVS area for SMM and ASL communication.
   //
@@ -57,6 +60,8 @@ AspireVn7Dash572GUpdateGlobalNvs (
   mGlobalNvsArea.Area->Ps2KbMsEnable  = PcdGet8 (PcdPs2KbMsEnable);
 
   mGlobalNvsArea.Area->BoardId = (UINT8) LibPcdGetSku ();
+
+  DEBUG ((DEBUG_INFO, "%a() End\n", __FUNCTION__));
 }
 
 EFI_STATUS
diff --git 
a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Library/BoardAcpiLib/DxeBoardAcpiTableLib.inf
 
b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Library/BoardAcpiLib/DxeBoardAcpiTableLib.inf
index 660afe9292ec..dc5bc80d0380 100644
--- 
a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Library/BoardAcpiLib/DxeBoardAcpiTableLib.inf
+++ 
b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Library/BoardAcpiLib/DxeBoardAcpiTableLib.inf
@@ -23,6 +23,7 @@
 
 [LibraryClasses]
   PcdLib
+  DebugLib
   EcLib
 
 [Packages]
diff --git 
a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Library/BoardAcpiLib/SmmAspireVn7Dash572GAcpiEnableLib.c
 
b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Library/BoardAcpiLib/SmmAspireVn7Dash572GAcpiEnableLib.c
index fa2ed9745ea6..22c9c76a62e0 100644
--- 
a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Library/BoardAcpiLib/SmmAspireVn7Dash572GAcpiEnableLib.c
+++ 
b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Library/BoardAcpiLib/SmmAspireVn7Dash572GAcpiEnableLib.c
@@ -8,7 +8,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
 **/
 
 #include 
-#include 
+#include 
 #include 
 #include 
 
@@ -20,6 +20,8 @@ AspireVn7Dash572GBoardEnableAcpi (
 {
   EFI_STATUS  Status;
 
+  DEBUG ((DEBUG_INFO, "%a() Start\n", __FUNCTION__));
+
   /* Tests at runtime show this re-enables charging and battery reporting
* - Obtained from somewhere in vendor's SmmKbcDriver.
*   Further information is needed */
@@ -36,6 +38,7 @@ AspireVn7Dash572GBoardEnableAcpi (
   }
 
   /* TODO: Set touchpad GPP owner to ACPI? */
+  DEBUG ((DEBUG_INFO, "%a() End\n", __FUNCTION__));
 
   return EFI_SUCCESS;
 }
@@ -48,6 +51,8 @@ AspireVn7Dash572GBoardDisableAcpi (
 {
   EFI_STATUS  Status;
 
+  DEBUG ((DEBUG_INFO, "%a() Start\n", __FUNCTION__));
+
   /* Tests at runtime show this disables charging and battery reporting
* - Obtained from somewhere in vendor's SmmKbcDriver.
*   Further information is needed */
@@ -64,6 +69,7 @@ AspireVn7Dash572GBoardDisableAcpi (
   }
 
   /* TODO: Set touchpad GPP owner to GPIO? */
+  DEBUG ((DEBUG_INFO, "%a() End\n", __FUNCTION__));
 
   return EFI_SUCCESS;
 }
diff --git 
a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Library/BoardEcLib/EcCommands.c
 
b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Library/BoardEcLib/EcCommands.c
index 182cda6f1933..24737d9ecb90 100644
--- 
a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Library/BoardEcLib/EcCommands.c
+++ 
b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Library/BoardEcLib/EcCommands.c
@@ -65,19 +65,19 @@ EcCmd90Read (
 
   Status = SendEcCommand (0x90);
   if (EFI_ERROR (Status)) {
-DEBUG((DEBUG_ERROR, "%a(): SendEcCommand(0x90) failed!\n", __FUNCTION__));
+DEBUG ((DEBUG_ERROR, "%a(): SendEcCommand(0x90) failed!\n", __FUNCTION__));
 return Status;
   }
 
   Status = SendEcData (Address);
   if (EFI_ERROR (Status)) {
-DEBUG((DEBUG_ERROR, "%a(): SendEcData(Address) failed!\n", __FUNCTION__));
+DEBUG ((DEBUG_ERROR, 

[edk2-devel][edk2-platforms][PATCH v1 6/7] KabylakeOpenBoardPkg/AspireVn7Dash572G: Improve board detection

2022-09-06 Thread Benjamin Doron
Improvements based on ENE KB9012Q datasheet. Values read from EC ADC are
much more consistent now. Some improvement still necessary before this
is reliable, as my Rayleigh-SL (PCH-LP) is now consistently detected as
a Newgate-SLS (PCH-H).

Cc: Sai Chaganty 
Cc: Isaac Oram 
Cc: Chasel Chiu 
Cc: Nate DeSimone 
Cc: Ankit Sinha 
Signed-off-by: Benjamin Doron 
---
 .../Include/Library/BoardEcLib.h  |  5 +-
 .../Library/BoardEcLib/BoardEcLib.inf |  1 +
 .../Library/BoardEcLib/EcCommands.c   | 36 ++
 .../BoardInitLib/PeiAspireVn7Dash572GDetect.c | 47 +++
 .../AspireVn7Dash572G/OpenBoardPkg.dsc|  5 +-
 .../PeiBoardPolicyUpdate.c|  2 +-
 .../Include/PlatformBoardId.h |  5 +-
 7 files changed, 65 insertions(+), 36 deletions(-)

diff --git 
a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Include/Library/BoardEcLib.h
 
b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Include/Library/BoardEcLib.h
index 8bb4cccb8f19..56fdd4ed756c 100644
--- 
a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Include/Library/BoardEcLib.h
+++ 
b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Include/Library/BoardEcLib.h
@@ -82,8 +82,9 @@ EcIdxWrite (
   );
 
 /**
-  Read EC analog-digital converter.
-  TODO: Check if ADC is valid.
+  Read an analog-digital converter from the EC.
+  TODO: There are actually 8 ADCs, but those can remain unused.
+  - Handling port enable bits and pin IE could get complicated.
 
   @param[in]  Adc
   @param[out] DataBuffer
diff --git 
a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Library/BoardEcLib/BoardEcLib.inf
 
b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Library/BoardEcLib/BoardEcLib.inf
index 56527c3b9a3c..7287301583e0 100644
--- 
a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Library/BoardEcLib/BoardEcLib.inf
+++ 
b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Library/BoardEcLib/BoardEcLib.inf
@@ -18,6 +18,7 @@
   DebugLib
   EcLib
   IoLib
+  TimerLib
 
 [Packages]
   MdePkg/MdePkg.dec
diff --git 
a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Library/BoardEcLib/EcCommands.c
 
b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Library/BoardEcLib/EcCommands.c
index 54cfaba47b1b..182cda6f1933 100644
--- 
a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Library/BoardEcLib/EcCommands.c
+++ 
b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Library/BoardEcLib/EcCommands.c
@@ -9,9 +9,11 @@
 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
+#include 
 
 /*
  * Notes:
@@ -193,8 +195,9 @@ EcIdxWrite (
 }
 
 /**
-  Read EC analog-digital converter.
-  TODO: Check if ADC is valid.
+  Read an analog-digital converter from the EC.
+  TODO: There are actually 8 ADCs, but those can remain unused.
+  - Handling port enable bits and pin IE could get complicated.
 
   @param[in]  Adc
   @param[out] DataBuffer
@@ -205,23 +208,36 @@ ReadEcAdcConverter (
   OUT UINT16   *DataBuffer
   )
 {
-  UINT8AdcConvertersEnabled;  // Contains some ADCs and some DACs
+  UINT8LowAdcsEnabled;  // Contains some ADCs and some DACs
   UINT8IdxData;
 
   if (DataBuffer == NULL) {
 return;
   }
 
+  if (Adc >= 4) {
+DEBUG ((DEBUG_ERROR, "Handling ADC%d is unsupported!\n", Adc));
+return;
+  }
+
   // Backup enabled ADCs
-  EcIdxRead (0xff15, );  // ADDAEN
+  EcIdxRead (0xff15, );   // ADDAEN
 
-  // Enable desired ADC in bitmask (not enabled by EC FW, not used by vendor 
FW)
-  EcIdxWrite (0xff15, AdcConvertersEnabled | ((1 << Adc) & 0xf));  // ADDAEN
+  /* 1. Clear IE of the related pin - ADC0: "GPIOIE38[0] (0xFC67[0]) = 0b" */
+  EcIdxRead (0xfc67, );
+  IdxData &= ~(1 << Adc);
+  EcIdxWrite (0xfc67, IdxData);
 
-  // Sample the desired ADC in binary field; OR the start bit
-  EcIdxWrite (0xff18, ((Adc << 1) & 0xf) | 1);  // ADCTRL
+  /* 2. Enable desired ADC function in bitmask */
+  EcIdxWrite (0xff15, (1 << Adc) & 0xf);  // ADDAEN
 
-  // Read the desired ADC
+  /* 3. Enable control of desired ADC in bit field, OR the start bit */
+  EcIdxWrite (0xff18, ((Adc << 1) & 7) | 1);  // ADCTRL
+
+  /* TODO: Await ADC interrupt */
+  MicroSecondDelay (256);  // Wait "Voltage Conversion Time"
+
+  /* 4. Read the desired ADC */
   EcIdxRead (0xff19, );  // ADCDAT
   *DataBuffer = (IdxData << 2);
   // Lower 2-bits of 10-bit ADC are in high bits of next register
@@ -229,5 +245,5 @@ ReadEcAdcConverter (
   *DataBuffer |= ((IdxData & 0xc0) >> 6);
 
   // Restore enabled ADCs
-  EcIdxWrite (0xff15, AdcConvertersEnabled);  // ADDAEN
+  EcIdxWrite (0xff15, LowAdcsEnabled);   // ADDAEN
 }
diff --git 
a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Library/BoardInitLib/PeiAspireVn7Dash572GDetect.c
 
b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Library/BoardInitLib/PeiAspireVn7Dash572GDetect.c
index 344e06859e9b..0ce747bb67c6 100644
--- 

[edk2-devel][edk2-platforms][PATCH v1 5/7] KabylakeOpenBoardPkg/AspireVn7Dash572G: Use Setup to control security

2022-09-06 Thread Benjamin Doron
Add a HII form to Setup for controlling lockdown UPDs. Default to
strict security, allowing it to be lifted for the user's convenience.

This is not board-specific, and could be ported to other boards. To add
more entries to the HII form, modify the VFR, VFR strings, variable
structure and consume the variable in the appropriate place.

Cc: Sai Chaganty 
Cc: Isaac Oram 
Cc: Chasel Chiu 
Cc: Nate DeSimone 
Signed-off-by: Benjamin Doron 
---
 .../PeiBoardPolicyUpdate.c|  56 ++-
 .../PeiSiliconPolicyUpdateLibFsp.inf  |   7 +-
 .../Include/BoardConfigNvData.h   |  37 ++
 .../Library/BoardInitLib/BoardConfigVfr.vfr   |  68 
 .../BoardInitLib/BoardConfigVfrStrings.uni|  29 ++
 .../Library/BoardInitLib/DxeBoardConfigHii.c  | 374 ++
 .../Library/BoardInitLib/DxeBoardInitLib.c|  21 +-
 .../Library/BoardInitLib/DxeBoardInitLib.h| 131 ++
 .../Library/BoardInitLib/DxeBoardInitLib.inf  |  10 +
 9 files changed, 712 insertions(+), 21 deletions(-)
 create mode 100644 
Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Include/BoardConfigNvData.h
 create mode 100644 
Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Library/BoardInitLib/BoardConfigVfr.vfr
 create mode 100644 
Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Library/BoardInitLib/BoardConfigVfrStrings.uni
 create mode 100644 
Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Library/BoardInitLib/DxeBoardConfigHii.c
 create mode 100644 
Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Library/BoardInitLib/DxeBoardInitLib.h

diff --git 
a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/FspWrapper/Library/PeiSiliconPolicyUpdateLibFsp/PeiBoardPolicyUpdate.c
 
b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/FspWrapper/Library/PeiSiliconPolicyUpdateLibFsp/PeiBoardPolicyUpdate.c
index 452c961b17ac..425deb4d16c0 100644
--- 
a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/FspWrapper/Library/PeiSiliconPolicyUpdateLibFsp/PeiBoardPolicyUpdate.c
+++ 
b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/FspWrapper/Library/PeiSiliconPolicyUpdateLibFsp/PeiBoardPolicyUpdate.c
@@ -6,11 +6,13 @@
 
 **/
 
+#include "PeiSaPolicyUpdate.h"
 #include "PeiPchPolicyUpdate.h"
 #include 
-#include 
 #include 
-#include 
+#include 
+#include 
+#include 
 
 /*
  * TODO:
@@ -54,8 +56,6 @@ PeiFspBoardPolicyUpdatePreMem (
   DEBUG ((DEBUG_INFO, "%a() Start\n", __FUNCTION__));
 
   // BUGBUG: Preserve FSP defaults - PeiSiliconPolicyInitLibFsp ultimately 
overrides to 0.
-  // Drop when https://edk2.groups.io/g/devel/message/79391 is merged
-  FspmUpd->FspmConfig.PeciC10Reset = 1;
   FspmUpd->FspmConfig.RefClk = 1;  // Maybe "auto" is safe, but that isn't the 
FSP default
 
   // TODO: Why should this be here?
@@ -92,18 +92,43 @@ PeiFspBoardPolicyUpdate (
   IN OUT FSPS_UPD*FspsUpd
   )
 {
-  INTN  Index;
+  EFI_STATUS   Status;
+  EFI_PEI_READ_ONLY_VARIABLE2_PPI  *VariablePpi;
+  UINTNDataSize;
+  EFI_GUID BoardConfigFormsetGuid = 
BOARD_CONFIG_FORMSET_GUID;
+  BOARD_CONFIGURATION  BoardConfig;
+  INTN Index;
 
   DEBUG ((DEBUG_INFO, "%a() Start\n", __FUNCTION__));
 
-  // FIXME/NB: This is insecure and not production-ready!
-  // TODO: Configure SPI lockdown by variable on FrontPage?
-  // - Later, also configure stronger protection: PRRs
-  FspsUpd->FspsConfig.PchLockDownBiosLock = 0;  // Default. Will enable, not 
remove
-  FspsUpd->FspsConfig.PchLockDownSpiEiss = 0;
-  // This may be PWRM+0x18[BIT22], causing HSTI "PCH Security Configuration -  
Reserved Check failure"
-  // I think the intel_pmc_core kernel module requires this to populate 
debugfs?
-  FspsUpd->FspsTestConfig.PchPmPmcReadDisable = 0;
+  // Use variable services directly, to avoid casting reference to pointer 
into struct
+  // from PeiGetVariable()
+  Status = PeiServicesLocatePpi (, 0, NULL, 
(VOID **) );
+  ASSERT_EFI_ERROR (Status);
+
+  DataSize = sizeof (BoardConfig);
+  Status = VariablePpi->GetVariable (
+  VariablePpi,
+  BOARD_CONFIG_NV_NAME,
+  ,
+  NULL,
+  ,
+  
+  );
+  // TODO: Also configure stronger protection: PRRs
+  // - Also, we could lift lockdown here for BOOT_ON_FLASH_UPDATE.
+  //   User must do this themselves for flashrom
+  if (!EFI_ERROR (Status)) {
+DEBUG ((DEBUG_INFO, "BoardConfig: Set FSP UPDs from variable\n"));
+FspsUpd->FspsConfig.PchLockDownBiosLock = BoardConfig.LockDownBiosLock;
+FspsUpd->FspsConfig.PchLockDownSpiEiss = BoardConfig.LockDownBiosLock;
+FspsUpd->FspsTestConfig.PchPmPmcReadDisable = 
BoardConfig.LockDownPmcReadDisable;
+  } else {
+DEBUG ((DEBUG_INFO, "BoardConfig: Set FSP UPDs to secure default\n"));
+FspsUpd->FspsConfig.PchLockDownBiosLock = 1;  

[edk2-devel][edk2-platforms][PATCH v1 3/7] KabylakeOpenBoardPkg/AspireVn7Dash572G/Acpi: Improvements for EC ACPI

2022-09-06 Thread Benjamin Doron
Perform EC read and write via SystemIO when EmbeddedControl is
unavailable. Not properly tested yet.

Re-sync against coreboot port.

Does not yet handle SMM traps. In-progress.

Cc: Sai Chaganty 
Cc: Isaac Oram 
Cc: Nate DeSimone 
Cc: Chasel Chiu 
Signed-off-by: Benjamin Doron 
---
 .../Acpi/BoardAcpiTables.inf  |   4 +
 .../AspireVn7Dash572G/Acpi/BoardSsdt.asl  |  29 +++-
 .../AspireVn7Dash572G/Acpi/battery.asl|  11 +-
 .../AspireVn7Dash572G/Acpi/ec.asl | 130 
 .../AspireVn7Dash572G/Acpi/eclib.asl  | 141 ++
 .../AspireVn7Dash572G/Acpi/mainboard.asl  |   6 +-
 .../AspireVn7Dash572G/Acpi/thermal.asl|  16 +-
 7 files changed, 256 insertions(+), 81 deletions(-)
 create mode 100644 
Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Acpi/eclib.asl

diff --git 
a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Acpi/BoardAcpiTables.inf
 
b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Acpi/BoardAcpiTables.inf
index 806c0d2575c8..9a31b400a35e 100644
--- 
a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Acpi/BoardAcpiTables.inf
+++ 
b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Acpi/BoardAcpiTables.inf
@@ -13,5 +13,9 @@
   MODULE_TYPE  = USER_DEFINED
   VERSION_STRING   = 1.0
 
+[Packages]
+  KabylakeOpenBoardPkg/OpenBoardPkg.dec
+  MdePkg/MdePkg.dec
+
 [Sources]
   BoardSsdt.asl
diff --git 
a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Acpi/BoardSsdt.asl 
b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Acpi/BoardSsdt.asl
index cdec0434883e..d1609131ecf7 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Acpi/BoardSsdt.asl
+++ b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Acpi/BoardSsdt.asl
@@ -6,17 +6,44 @@
 
 **/
 
+#include 
+
 DefinitionBlock (
   "Board.aml",
   "SSDT",
-  0x02,
+  EFI_ACPI_6_3_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_REVISION,
   "ACRSKL",
   "AcerSKL ",
   0x20141018
   )
 {
+  External (SSMP, IntObj)
+  External (SMIF, IntObj)
   External (\MDBG, MethodObj)
 
+  // SW SMI data port
+  OperationRegion (DPRT, SystemIO, 0xB3, 1)
+  Field (DPRT, ByteAcc, Lock, Preserve)
+  {
+SSDP, 8
+  }
+
+  Name (ESMI, 0xDD)  // TODO: Patch at runtime
+  Method (TRPS, 3, Serialized)
+  {
+\DBGH (Concatenate ("SMIF: ", ToHexString (Arg0)))
+\DBGH (Concatenate ("Param0: ", ToHexString (Arg1)))
+\DBGH (Concatenate ("Param1: ", ToHexString (Arg2)))
+
+Local0 = Arg1
+Local0 |= (Arg2 << 4)
+\DBGH (Concatenate ("Local0: ", ToHexString (Local0)))
+
+SMIF = Arg0
+SSDP = Local0
+SSMP = ESMI
+  }
+
   // Debug print helper
   Method (DBGH, 1)
   {
diff --git 
a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Acpi/battery.asl 
b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Acpi/battery.asl
index 5ae4bdca89d5..1bf652c4a01e 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Acpi/battery.asl
+++ b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Acpi/battery.asl
@@ -184,11 +184,17 @@ Method (GBIF, 3, NotSerialized)
 Local7 = EBSN
 #endif
 Name (SERN, Buffer (0x06) { " " })
+/* Convert hex to decimal.
+ * - There appears to be a bug in the vendor's implementation:
+ *   The correct answer has, or can have, 5 digits, so Local6 = 5.
+ *   Also see "SERN" buffer.
+ * - Userspace prints reversed serial number?
+ */
 Local6 = 4
 While (Local7)
 {
   Divide (Local7, 10, Local5, Local7)
-  SERN[Local6] = (Local5 + 0x30)  // Add ASCII 0x30 to get character
+  SERN[Local6] = (Local5 + 0x30)  // Add 0x30 to get numeric character
   Local6--
 }
 
@@ -310,7 +316,7 @@ Method (GBST, 4, NotSerialized)  // All on one page
 If (Arg2)
 {
   Local1 *= Local3
-  Local1 /= 1000  /* Remainder ignored */
+  Local1 /= 1000  /* Remainder ignored by vendor */
 }
   }
   Else
@@ -382,6 +388,7 @@ Device (BAT0)
 
   Method (_BIF, 0, NotSerialized)  // _BIF: Battery Information
   {
+/* Bitwise AND by vendor is lossy? */
 Local6 = B0ST
 Local7 = 20
 While (Local6 && Local7)
diff --git a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Acpi/ec.asl 
b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Acpi/ec.asl
index df71dd69b491..b8f0dba1597f 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Acpi/ec.asl
+++ b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Acpi/ec.asl
@@ -5,18 +5,33 @@
 
 **/
 
-/* Global TODO: (externally: Optimus GC6 and GPS)
+/*
+ * Global TODO: (externally: Optimus GC6 and GPS)
  * - TRPS: This is SMI 0xDD, likely in SmmOemDriver. This SW SMI adds to and 
executes
  * a table of function pointers produced throughout the OEM 
'value-add' stack.
+ * - Arg0 - "SFUN" - is index into "$FNC" pointer table? It's easier to
+ *   correlate *CommonService use: Offset 13 creates TRPS handlers.
+ * - Known functions:
+ * 

[edk2-devel][edk2-platforms][PATCH v1 4/7] KabylakeOpenBoardPkg/AspireVn7Dash572G/DxeBoardInitLib: Resets notify EC

2022-09-06 Thread Benjamin Doron
Add a callback to notify the EC of platform resets.

Cc: Sai Chaganty 
Cc: Isaac Oram 
Cc: Chasel Chiu 
Cc: Nate DeSimone 
Signed-off-by: Benjamin Doron 
---
 .../Library/BoardInitLib/DxeBoardInitLib.c| 92 ++-
 .../Library/BoardInitLib/DxeBoardInitLib.inf  |  4 +
 2 files changed, 91 insertions(+), 5 deletions(-)

diff --git 
a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Library/BoardInitLib/DxeBoardInitLib.c
 
b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Library/BoardInitLib/DxeBoardInitLib.c
index 5c5c26d85c58..07278d956ddc 100644
--- 
a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Library/BoardInitLib/DxeBoardInitLib.c
+++ 
b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Library/BoardInitLib/DxeBoardInitLib.c
@@ -8,17 +8,22 @@
 **/
 
 #include 
-#include 
+#include 
 #include 
 #include 
 #include 
-#include 
+#include 
+#include 
+#include 
+
+EFI_RESET_NOTIFICATION_PROTOCOL  *mResetNotify = NULL;
 
 /**
-  Update the EC's clock?
+  Update the EC's clock.
 
 **/
 VOID
+EFIAPI
 EcSendTime (
   VOID
   )
@@ -26,11 +31,13 @@ EcSendTime (
   EFI_STATUS  Status;
   EFI_TIMEEfiTime;
   // Time could be negative (before 2016)
-  INTNEcTime;
+  INT32   EcTime;
   UINT8   EcTimeByte;
   INTNIndex;
   UINT8   EcResponse;
 
+  DEBUG ((DEBUG_INFO, "%a() Starts\n", __FUNCTION__));
+
   Status = gRT->GetTime (, NULL);
   if (EFI_ERROR (Status)) {
 DEBUG ((DEBUG_INFO, "Failed to retrieve current time\n"));
@@ -56,25 +63,72 @@ EcSendTime (
   if (!EFI_ERROR (Status)) {
 DEBUG ((DEBUG_INFO, "EC: response 0x%x\n", EcResponse));
   }
+
+  DEBUG ((DEBUG_INFO, "%a() Ends\n", __FUNCTION__));
 }
 
 /**
-  Configure EC
+  Process an EC time request.
 
 **/
 VOID
+EFIAPI
 EcRequestsTime (
   VOID
   )
 {
   UINT8   Dat;
 
+  DEBUG ((DEBUG_INFO, "%a() Starts\n", __FUNCTION__));
+
   /* This is executed as protocol notify in vendor's RtKbcDriver when 
*CommonService
* protocol is installed. Effectively, this code could execute from the 
entrypoint */
   EcCmd90Read (0x79, );
   if (Dat & BIT0) {
 EcSendTime ();
   }
+
+  DEBUG ((DEBUG_INFO, "%a() Ends\n", __FUNCTION__));
+}
+
+/**
+  Notify EC of reset events.
+
+  @param[in] ResetTypeThe type of reset to perform.
+  @param[in] ResetStatus  The status code for the reset.
+  @param[in] DataSize The size, in bytes, of ResetData.
+  @param[in] ResetDataFor a ResetType of EfiResetCold, EfiResetWarm, or 
EfiResetShutdown
+  the data buffer starts with a Null-terminated 
string, optionally
+  followed by additional binary data. The string is a 
description
+  that the caller may use to further indicate the 
reason for the
+  system reset. For a ResetType of 
EfiResetPlatformSpecific the data
+  buffer also starts with a Null-terminated string 
that is followed
+  by an EFI_GUID that describes the specific type of 
reset to
+  perform.
+
+**/
+VOID
+EFIAPI
+EcResetSystemHook (
+  IN EFI_RESET_TYPE   ResetType,
+  IN EFI_STATUS   ResetStatus,
+  IN UINTNDataSize,
+  IN VOID *ResetData OPTIONAL
+  )
+{
+  // If boolean PCD tokens 0xBD, 0xBE and 0xBF are set in vendor FW,
+  // OEM also sends command 0x5A with argument 0xAA via ACPI "CMDB" method and 
stalls for
+  // 10, then sets ResetType to EfiResetShutdown.
+  // PCD token 0xBF may be set in a separate function of DxeOemDriver if
+  // some bits of EC RAM offset 0x5E are set.
+  // TODO: More information is needed
+  if (ResetType == EfiResetShutdown) {
+EcCmd91Write (0x76, 7);  // "ECSS" register
+// TODO: Write twice, like OEM?
+EcCmd91Write (0x76, 7);  // "ECSS" register
+// Now OEM calls function offset 2 in 
ACER_BOOT_DEVICE_SERVICE_PROTOCOL_GUID.
+// TODO: What does this do?
+  }
 }
 
 /**
@@ -89,7 +143,23 @@ BoardInitAfterPciEnumeration (
   VOID
   )
 {
+  EFI_STATUS   Status;
+
+  DEBUG ((DEBUG_INFO, "%a() Starts\n", __FUNCTION__));
+
+  // Send EC the present time, if requested
   EcRequestsTime ();
+
+  // Add a callback to gRT->ResetSystem() to notify EC, rather than hooking 
the table,
+  // (as vendor's DxeOemDriver does)
+  Status = gBS->LocateProtocol (, NULL, 
(VOID **) );
+  if (!EFI_ERROR (Status)) {
+Status = mResetNotify->RegisterResetNotify (mResetNotify, 
EcResetSystemHook);
+ASSERT_EFI_ERROR (Status);
+DEBUG ((DEBUG_INFO, "EC: Added callback to notify EC of resets\n"));
+  }
+
+  DEBUG ((DEBUG_INFO, "%a() Ends\n", __FUNCTION__));
   return EFI_SUCCESS;
 }
 
@@ -120,5 +190,17 @@ BoardInitEndOfFirmware (
   VOID
   )
 {
+  EFI_STATUS   Status;
+
+  DEBUG ((DEBUG_INFO, "%a() Starts\n", __FUNCTION__));
+
+  // Remove ResetSystem callback. ACPI will be notifying EC of events
+  if 

[edk2-devel][edk2-platforms][PATCH v1 2/7] KabylakeOpenBoardPkg/AspireVn7Dash572G: Enhance the build-logic

2022-09-06 Thread Benjamin Doron
Update the AspireVn7Dash572G DSC files with assorted enhancements since
the initial porting work. Some planned features, such as Secure Boot and
measuring the default FSP UPDs to a TPM (which does have security
relevance), are now fully working.

Enable the working advanced features in use on this board.

Cc: Sai Chaganty 
Cc: Isaac Oram 
Cc: Nate DeSimone 
Cc: Chasel Chiu 
Signed-off-by: Benjamin Doron 
---
 .../AspireVn7Dash572G/OpenBoardPkg.dsc| 63 +++
 .../AspireVn7Dash572G/OpenBoardPkgPcd.dsc | 59 ++---
 2 files changed, 74 insertions(+), 48 deletions(-)

diff --git 
a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/OpenBoardPkg.dsc 
b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/OpenBoardPkg.dsc
index f4552ee83d6b..75c537f1253f 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/OpenBoardPkg.dsc
+++ b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/OpenBoardPkg.dsc
@@ -22,15 +22,6 @@
   #
   DEFINE BIOS_SIZE_OPTION = SIZE_60
 
-  #
-  # Debug logging
-  #
-  DEFINE USE_HDMI_DEBUG_PORT  = FALSE
-  DEFINE USE_PEI_SPI_LOGGING  = FALSE
-  DEFINE USE_MEMORY_LOGGING   = FALSE
-  DEFINE RELEASE_LOGGING  = ($(USE_HDMI_DEBUG_PORT) || 
$(USE_PEI_SPI_LOGGING) || $(USE_MEMORY_LOGGING))
-  DEFINE TESTING  = TRUE
-
   PLATFORM_NAME   = $(PLATFORM_PACKAGE)
   PLATFORM_GUID   = 
AEEEF17C-36B6-4B68-949A-1E54CB33492F
   PLATFORM_VERSION= 0.1
@@ -40,9 +31,17 @@
   BUILD_TARGETS   = DEBUG|RELEASE
   SKUID_IDENTIFIER= ALL
   FLASH_DEFINITION= $(PROJECT)/OpenBoardPkg.fdf
-
   FIX_LOAD_TOP_MEMORY_ADDRESS = 0x0
 
+  #
+  # Debug logging
+  #
+  DEFINE USE_HDMI_DEBUG_PORT  = FALSE
+  DEFINE USE_PEI_SPI_LOGGING  = FALSE
+  DEFINE USE_MEMORY_LOGGING   = FALSE
+  DEFINE RELEASE_LOGGING  = ($(USE_HDMI_DEBUG_PORT) || 
$(USE_PEI_SPI_LOGGING) || $(USE_MEMORY_LOGGING))
+  DEFINE TESTING  = FALSE
+
   #
   # Include PCD configuration for this board.
   #
@@ -143,7 +142,7 @@
   ###
   
FspWrapperApiLib|IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/BaseFspWrapperApiLib.inf
   
FspWrapperApiTestLib|IntelFsp2WrapperPkg/Library/PeiFspWrapperApiTestLib/PeiFspWrapperApiTestLib.inf
-  # This board will set debugging library instances; FIXME: UART2 not used
+  # Board DSC will select debug library instances; NOTE: UART2 not used
   SerialPortLib|MdePkg/Library/BaseSerialPortLibNull/BaseSerialPortLibNull.inf
 
   ###
@@ -198,12 +197,11 @@
   ###
   
PlatformHookLib|MdeModulePkg/Library/BasePlatformHookLibNull/BasePlatformHookLibNull.inf
 
-# NB: MinPlatform sets a NULL DebugLib and only overrides it for DEBUG builds
-# TODO: Now that all debug logging is routed through RSC, correct the defines
 [LibraryClasses.IA32.SEC]
   ###
   # Edk2 Packages
   ###
+# NOTE: No way that RSC avoids PeiServices in SEC? Even if valid on re-entry...
   DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf
 
 !if $(USE_HDMI_DEBUG_PORT) == TRUE
@@ -231,7 +229,8 @@
   # Edk2 Packages
   ###
 # SPI logging requires local patch: InitializeMemoryServices() before 
ProcessLibraryConstructorList()
-# In-memory logging may require too many services for early core debug output
+# Strongly suspect DebugLibSerialPort constructor presents 
PeiDxeSerialPortLibMem dependency on services as a bug
+# - While RSC calls Initialize after dependencies and constructors are 
satisfied
 !if $(RELEASE_LOGGING) == TRUE
   
DebugLib|MdeModulePkg/Library/PeiDxeDebugLibReportStatusCode/PeiDxeDebugLibReportStatusCode.inf
 !endif
@@ -257,7 +256,7 @@
   
FspWrapperPlatformLib|$(PLATFORM_PACKAGE)/FspWrapper/Library/PeiFspWrapperPlatformLib/PeiFspWrapperPlatformLib.inf
   
MultiBoardInitSupportLib|$(PLATFORM_PACKAGE)/PlatformInit/Library/MultiBoardInitSupportLib/PeiMultiBoardInitSupportLib.inf
   
TestPointLib|$(PLATFORM_PACKAGE)/Test/Library/TestPointLib/PeiTestPointLib.inf
-!if ($(TARGET) == DEBUG || $(TESTING) == TRUE)
+!if ($(TARGET) == DEBUG || $(RELEASE_LOGGING) == TRUE)
   
TestPointCheckLib|$(PLATFORM_PACKAGE)/Test/Library/TestPointCheckLib/PeiTestPointCheckLib.inf
 !endif
   
SetCacheMtrrLib|$(PLATFORM_PACKAGE)/Library/SetCacheMtrrLib/SetCacheMtrrLibNull.inf
@@ -287,7 +286,8 @@
   ###
   # Edk2 Packages
   ###
-# In-memory logging may require too many services for early core debug output
+# Strongly suspect DebugLibSerialPort constructor presents 
PeiDxeSerialPortLibMem dependency on services as a bug
+# - While RSC calls Initialize after dependencies and constructors are 
satisfied
 !if 

[edk2-devel][edk2-platforms][PATCH v1 1/7] KabylakeOpenBoardPkg/AspireVn7Dash572G: Cleanup library includes

2022-09-06 Thread Benjamin Doron
Remove unused includes, LibraryClasses and update a comment or two.

Cc: Sai Chaganty 
Cc: Isaac Oram 
Cc: Chasel Chiu 
Cc: Nate DeSimone 
Signed-off-by: Benjamin Doron 
---
 .../PcieDeviceTable.c  |  1 -
 .../PeiBoardPolicyUpdate.c |  6 --
 .../PeiPchPolicyUpdate.h   |  3 ++-
 .../PeiPchPolicyUpdatePreMem.c |  1 -
 .../PeiSiliconPolicyUpdateLibFsp.inf   |  5 ++---
 .../BoardAcpiLib/DxeBoardAcpiTableLib.inf  |  5 +
 .../SmmAspireVn7Dash572GAcpiEnableLib.c|  9 +
 .../BoardAcpiLib/SmmBoardAcpiEnableLib.inf |  3 ++-
 .../Library/BoardEcLib/EcCommands.c| 14 --
 .../AspireVn7Dash572GHdaVerbTables.c   |  3 ++-
 .../BoardInitLib/PeiAspireVn7Dash572GInitLib.h |  3 +--
 .../PeiAspireVn7Dash572GInitPreMemLib.c| 18 +-
 .../BoardInitLib/PeiBoardInitPostMemLib.inf|  4 +---
 .../BoardInitLib/PeiBoardInitPreMemLib.inf |  5 +
 .../AspireVn7Dash572G/OpenBoardPkg.fdf |  3 ++-
 .../OpenBoardPkgBuildOption.dsc|  4 ++--
 .../DxeGopPolicyInit.h |  3 ---
 .../DxeSaPolicyInit.h  |  3 ---
 .../DxeSiliconPolicyUpdateLib.c|  3 +--
 .../DxeSiliconPolicyUpdateLib.inf  |  2 ++
 20 files changed, 45 insertions(+), 53 deletions(-)

diff --git 
a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/FspWrapper/Library/PeiSiliconPolicyUpdateLibFsp/PcieDeviceTable.c
 
b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/FspWrapper/Library/PeiSiliconPolicyUpdateLibFsp/PcieDeviceTable.c
index 205ca581c6f3..537fb5c8e4f4 100644
--- 
a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/FspWrapper/Library/PeiSiliconPolicyUpdateLibFsp/PcieDeviceTable.c
+++ 
b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/FspWrapper/Library/PeiSiliconPolicyUpdateLibFsp/PcieDeviceTable.c
@@ -7,7 +7,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
 **/
 
 #include "PeiPchPolicyUpdate.h"
-#include 
 
 #define PCI_CLASS_NETWORK 0x02
 #define PCI_CLASS_NETWORK_ETHERNET0x00
diff --git 
a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/FspWrapper/Library/PeiSiliconPolicyUpdateLibFsp/PeiBoardPolicyUpdate.c
 
b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/FspWrapper/Library/PeiSiliconPolicyUpdateLibFsp/PeiBoardPolicyUpdate.c
index 81cd8b940f05..452c961b17ac 100644
--- 
a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/FspWrapper/Library/PeiSiliconPolicyUpdateLibFsp/PeiBoardPolicyUpdate.c
+++ 
b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/FspWrapper/Library/PeiSiliconPolicyUpdateLibFsp/PeiBoardPolicyUpdate.c
@@ -12,14 +12,16 @@
 #include 
 #include 
 
-/* TODO:
+/*
+ * TODO:
  * - Validate PCH Sample policies: only SA one used by default.
  * - Remove likely fuse-disabled devices when reset handling is committed?
  * - Remove duplicate policy
  *   - Consider updating some policies, rather than overriding. This could be 
factored into
  * BoardInitLib for deduplication
  * - Copy initialised array, where sane
- * - Set IgdDvmt50PreAlloc? */
+ * - Set IgdDvmt50PreAlloc?
+ */
 
 #define SA_VR   0
 #define IA_VR   1
diff --git 
a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/FspWrapper/Library/PeiSiliconPolicyUpdateLibFsp/PeiPchPolicyUpdate.h
 
b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/FspWrapper/Library/PeiSiliconPolicyUpdateLibFsp/PeiPchPolicyUpdate.h
index 5e720b0041e8..134188698077 100644
--- 
a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/FspWrapper/Library/PeiSiliconPolicyUpdateLibFsp/PeiPchPolicyUpdate.h
+++ 
b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/FspWrapper/Library/PeiSiliconPolicyUpdateLibFsp/PeiPchPolicyUpdate.h
@@ -17,10 +17,11 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
 #include 
 #include 
 #include 
-#include 
 
 #include 
 #include 
 #include 
 
+#include 
+
 #endif
diff --git 
a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/FspWrapper/Library/PeiSiliconPolicyUpdateLibFsp/PeiPchPolicyUpdatePreMem.c
 
b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/FspWrapper/Library/PeiSiliconPolicyUpdateLibFsp/PeiPchPolicyUpdatePreMem.c
index 2bc142c0e5ff..28e4e45375c2 100644
--- 
a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/FspWrapper/Library/PeiSiliconPolicyUpdateLibFsp/PeiPchPolicyUpdatePreMem.c
+++ 
b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/FspWrapper/Library/PeiSiliconPolicyUpdateLibFsp/PeiPchPolicyUpdatePreMem.c
@@ -9,7 +9,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
 #include "PeiPchPolicyUpdate.h"
 #include 
 #include 
-#include 
 #include 
 #include 
 #include 
diff --git 
a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/FspWrapper/Library/PeiSiliconPolicyUpdateLibFsp/PeiSiliconPolicyUpdateLibFsp.inf
 

[edk2-devel][edk2-platforms][PATCH v1 0/7]

2022-09-06 Thread Benjamin Doron
Cleanup some unnecessary library #include's and LibraryClasses copied
from KabylakeRvp3 as part of the initial bring-up work. Some
quality-of-life improvements, such as working Secure Boot.

Enhancement to the EC support, preparing to implement the SMI handler.
Board detection data is now predictable, though more work is required
to finalise the desired output buffer correspondence with board ID.

Implement a HII form to control BIOS lock functionality. Other
configuration options planned.

Benjamin Doron (7):
  KabylakeOpenBoardPkg/AspireVn7Dash572G: Cleanup library includes
  KabylakeOpenBoardPkg/AspireVn7Dash572G: Enhance the build-logic
  KabylakeOpenBoardPkg/AspireVn7Dash572G/Acpi: Improvements for EC ACPI
  KabylakeOpenBoardPkg/AspireVn7Dash572G/DxeBoardInitLib: Resets notify
EC
  KabylakeOpenBoardPkg/AspireVn7Dash572G: Use Setup to control security
  KabylakeOpenBoardPkg/AspireVn7Dash572G: Improve board detection
  KabylakeOpenBoardPkg/AspireVn7Dash572G: Align DEBUG() use

 .../Acpi/BoardAcpiTables.inf  |   4 +
 .../AspireVn7Dash572G/Acpi/BoardSsdt.asl  |  29 +-
 .../AspireVn7Dash572G/Acpi/battery.asl|  11 +-
 .../AspireVn7Dash572G/Acpi/ec.asl | 130 +++---
 .../AspireVn7Dash572G/Acpi/eclib.asl  | 141 +++
 .../AspireVn7Dash572G/Acpi/mainboard.asl  |   6 +-
 .../AspireVn7Dash572G/Acpi/thermal.asl|  16 +-
 .../PcieDeviceTable.c |   1 -
 .../PeiBoardPolicyUpdate.c|  62 ++-
 .../PeiPchPolicyUpdate.h  |   3 +-
 .../PeiPchPolicyUpdatePreMem.c|   1 -
 .../PeiSiliconPolicyUpdateLibFsp.inf  |  12 +-
 .../Include/BoardConfigNvData.h   |  37 ++
 .../Include/Library/BoardEcLib.h  |   5 +-
 .../DxeAspireVn7Dash572GAcpiTableLib.c|   5 +
 .../BoardAcpiLib/DxeBoardAcpiTableLib.inf |   6 +-
 .../SmmAspireVn7Dash572GAcpiEnableLib.c   |  17 +-
 .../BoardAcpiLib/SmmBoardAcpiEnableLib.inf|   3 +-
 .../Library/BoardEcLib/BoardEcLib.inf |   1 +
 .../Library/BoardEcLib/EcCommands.c   |  66 ++--
 .../AspireVn7Dash572GHdaVerbTables.c  |   3 +-
 .../Library/BoardInitLib/BoardConfigVfr.vfr   |  68 
 .../BoardInitLib/BoardConfigVfrStrings.uni|  29 ++
 .../Library/BoardInitLib/DxeBoardConfigHii.c  | 374 ++
 .../Library/BoardInitLib/DxeBoardInitLib.c| 116 +-
 .../Library/BoardInitLib/DxeBoardInitLib.h| 131 ++
 .../Library/BoardInitLib/DxeBoardInitLib.inf  |  14 +
 .../BoardInitLib/PeiAspireVn7Dash572GDetect.c |  47 ++-
 .../PeiAspireVn7Dash572GInitLib.h |   3 +-
 .../PeiAspireVn7Dash572GInitPostMemLib.c  |  29 +-
 .../PeiAspireVn7Dash572GInitPreMemLib.c   |  38 +-
 .../BoardInitLib/PeiBoardInitPostMemLib.inf   |   4 +-
 .../BoardInitLib/PeiBoardInitPreMemLib.c  |   2 +
 .../BoardInitLib/PeiBoardInitPreMemLib.inf|   5 +-
 .../AspireVn7Dash572G/OpenBoardPkg.dsc|  68 ++--
 .../AspireVn7Dash572G/OpenBoardPkg.fdf|   3 +-
 .../OpenBoardPkgBuildOption.dsc   |   4 +-
 .../AspireVn7Dash572G/OpenBoardPkgPcd.dsc |  59 +--
 .../DxeGopPolicyInit.h|   3 -
 .../DxeSaPolicyInit.h |   3 -
 .../DxeSiliconPolicyUpdateLib.c   |   9 +-
 .../DxeSiliconPolicyUpdateLib.inf |   2 +
 .../PeiBoardPolicyUpdate.c|   2 +-
 .../Include/PlatformBoardId.h |   5 +-
 44 files changed, 1309 insertions(+), 268 deletions(-)
 create mode 100644 
Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Acpi/eclib.asl
 create mode 100644 
Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Include/BoardConfigNvData.h
 create mode 100644 
Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Library/BoardInitLib/BoardConfigVfr.vfr
 create mode 100644 
Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Library/BoardInitLib/BoardConfigVfrStrings.uni
 create mode 100644 
Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Library/BoardInitLib/DxeBoardConfigHii.c
 create mode 100644 
Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Library/BoardInitLib/DxeBoardInitLib.h

-- 
2.37.2



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[edk2-devel][edk2-platforms][PATCH v1 2/3] [WIP] KabylakeOpenBoardPkg/I2cHdmiDebugSerialPortLib: Commit local

2022-09-06 Thread Benjamin Doron
While the key patches here should probably be merged into the initial
patches for this library, it appears it isn't being merged soon.
Therefore, commit the patches that improve the library for S3 use.

Other than edits to INF LibraryClasses and header `#include`s, the
primary patch here assists runtime by creating events to toggle a
boolean such that gBS is not used after end-of-BS. This is necessary for
DebugLibSerialPort, but not RSC, which uninstalls the serial port
handler at end-of-BS.

For S3 resume, a key finding was that this is still insufficient. The
image is copied into the lockbox for its own security at
DxeSmmReadyToLock, so toggling booleans in the data section is
ineffective. Early DXE is fairly single-threaded and testing indicates
that simply consuming ..TplNull.c is workable.

Also, GCC 12 requires a patch to a `switch` block that
improved flow coherency.

Cc: Sai Chaganty 
Cc: Isaac Oram 
Cc: Nate DeSimone 
Cc: Ankit Sinha 
Cc: Chasel Chiu 
Signed-off-by: Benjamin Doron 
---
 ...ptExecutorDxeI2cHdmiDebugSerialPortLib.inf | 48 ++
 .../DxeI2cHdmiDebugSerialPortLib.inf  |  8 +-
 .../DxeSmmI2cHdmiDebugSerialPortLib.c |  2 -
 .../Library/I2cHdmiDebugSerialPortLib/Gmbus.c | 39 
 .../I2cDebugPortProtocol.c|  2 -
 .../I2cDebugPortTplDxe.c  |  9 ++
 .../I2cDebugPortTplRuntimeDxe.c   | 93 +++
 .../I2cHdmiDebugSerialPortLib.c   |  3 -
 .../I2cHdmiDebugSerialPortLib/IgfxI2c.c   |  9 +-
 .../PeiI2cHdmiDebugSerialPortLib.c|  1 -
 .../PeiI2cHdmiDebugSerialPortLib.inf  |  5 +-
 .../RuntimeDxeI2cHdmiDebugSerialPortLib.inf   | 51 ++
 .../SecI2cHdmiDebugSerialPortLib.c|  1 -
 .../SecI2cHdmiDebugSerialPortLib.inf  |  7 +-
 .../SmmI2cHdmiDebugSerialPortLib.inf  |  6 +-
 15 files changed, 231 insertions(+), 53 deletions(-)
 create mode 100644 
Platform/Intel/KabylakeOpenBoardPkg/Library/I2cHdmiDebugSerialPortLib/BootScriptExecutorDxeI2cHdmiDebugSerialPortLib.inf
 create mode 100644 
Platform/Intel/KabylakeOpenBoardPkg/Library/I2cHdmiDebugSerialPortLib/I2cDebugPortTplRuntimeDxe.c
 create mode 100644 
Platform/Intel/KabylakeOpenBoardPkg/Library/I2cHdmiDebugSerialPortLib/RuntimeDxeI2cHdmiDebugSerialPortLib.inf

diff --git 
a/Platform/Intel/KabylakeOpenBoardPkg/Library/I2cHdmiDebugSerialPortLib/BootScriptExecutorDxeI2cHdmiDebugSerialPortLib.inf
 
b/Platform/Intel/KabylakeOpenBoardPkg/Library/I2cHdmiDebugSerialPortLib/BootScriptExecutorDxeI2cHdmiDebugSerialPortLib.inf
new file mode 100644
index ..995e67bde7d4
--- /dev/null
+++ 
b/Platform/Intel/KabylakeOpenBoardPkg/Library/I2cHdmiDebugSerialPortLib/BootScriptExecutorDxeI2cHdmiDebugSerialPortLib.inf
@@ -0,0 +1,48 @@
+### @file
+# Component description file for Serial I/O Port library for the HDMI I2C 
Debug Port
+#
+# Copyright (c) 2022, Intel Corporation. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+  INF_VERSION= 0x00010005
+  BASE_NAME  = RuntimeDxeI2cHdmiDebugSerialPortLib
+  FILE_GUID  = 7E514680-470B-409C-8FC4-2FE62BF010BC
+  VERSION_STRING = 1.0
+  MODULE_TYPE= DXE_DRIVER
+  LIBRARY_CLASS  = SerialPortLib|DXE_CORE DXE_DRIVER 
DXE_RUNTIME_DRIVER DXE_SMM_DRIVER UEFI_APPLICATION UEFI_DRIVER SMM_CORE
+#
+# The following information is for reference only and not required by the 
build tools.
+#
+# VALID_ARCHITECTURES = IA32 X64
+#
+
+[LibraryClasses]
+  BaseMemoryLib
+  PcdLib
+  TimerLib
+  IoLib
+  PciLib
+  UefiLib
+
+[Packages]
+  MdePkg/MdePkg.dec
+  KabylakeOpenBoardPkg/OpenBoardPkg.dec
+
+[Sources]
+  DxeSmmI2cHdmiDebugSerialPortLib.c
+  Gmbus.c
+  Gmbus.h
+  I2cDebugPortProtocol.c
+  I2cDebugPortProtocol.h
+  I2cDebugPortTplNull.c
+  I2cHdmiDebugSerialPortLib.c
+  IgfxI2c.c
+  IgfxI2c.h
+
+[Pcd]
+  gKabylakeOpenBoardPkgTokenSpaceGuid.PcdI2cHdmiDebugPortDdcI2cChannel## 
CONSUMES
+  gKabylakeOpenBoardPkgTokenSpaceGuid.PcdGttMmAddress ## 
CONSUMES
diff --git 
a/Platform/Intel/KabylakeOpenBoardPkg/Library/I2cHdmiDebugSerialPortLib/DxeI2cHdmiDebugSerialPortLib.inf
 
b/Platform/Intel/KabylakeOpenBoardPkg/Library/I2cHdmiDebugSerialPortLib/DxeI2cHdmiDebugSerialPortLib.inf
index 5403d8ae0fd7..5504c7ec 100644
--- 
a/Platform/Intel/KabylakeOpenBoardPkg/Library/I2cHdmiDebugSerialPortLib/DxeI2cHdmiDebugSerialPortLib.inf
+++ 
b/Platform/Intel/KabylakeOpenBoardPkg/Library/I2cHdmiDebugSerialPortLib/DxeI2cHdmiDebugSerialPortLib.inf
@@ -21,11 +21,13 @@
 #
 
 [LibraryClasses]
-  BaseLib
   BaseMemoryLib
   PcdLib
   TimerLib
+  IoLib
   PciLib
+  UefiBootServicesTableLib
+  UefiLib
 
 [Packages]
   MdePkg/MdePkg.dec
@@ -42,10 +44,6 @@
   IgfxI2c.c
   IgfxI2c.h
 
-[Ppis]
-
-[Guids]
-
 [Pcd]
   gKabylakeOpenBoardPkgTokenSpaceGuid.PcdI2cHdmiDebugPortDdcI2cChannel## 
CONSUMES
   

[edk2-devel][edk2-platforms][PATCH v1 1/3] MinPlatformPkg,WhiskeylakeOpenBoardPkg/SecFspWrapperPlatformSecLib: First BoardInitLib

2022-09-06 Thread Benjamin Doron
SecBoardInitLib is called to enable serial port before
SerialPortInitialize and DEBUG().

This is strongly assumed to be necessary for I2cHdmiDebugSerialPortLib
in SEC phase, which presently initialises this way.

No testing was performed before, it's assumed too risky unless the GPIO
happens to have the desired default. Presently, DEBUG() works in SEC
phase.

Cc: Sai Chaganty 
Cc: Isaac Oram 
Cc: Nate DeSimone 
Cc: Ankit Sinha 
Cc: Chasel Chiu 
Cc: Liming Gao 
Cc: Eric Dong 
Signed-off-by: Benjamin Doron 
---
 .../Library/SecFspWrapperPlatformSecLib/PlatformInit.c| 8 ++--
 .../Library/SecFspWrapperPlatformSecLib/PlatformInit.c| 8 ++--
 2 files changed, 12 insertions(+), 4 deletions(-)

diff --git 
a/Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatformSecLib/PlatformInit.c
 
b/Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatformSecLib/PlatformInit.c
index ef89e3f31018..d74b07bc062b 100644
--- 
a/Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatformSecLib/PlatformInit.c
+++ 
b/Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatformSecLib/PlatformInit.c
@@ -28,6 +28,12 @@ PlatformInit (
   IN VOID *EndOfRange
   )
 {
+  //
+  // Board/Silicon initialization
+  // Prepare controllers before enabling serial port
+  //
+  BoardAfterTempRamInit ();
+
   //
   // Platform initialization
   // Enable Serial port here
@@ -41,7 +47,5 @@ PlatformInit (
   DEBUG ((DEBUG_INFO, "StartOfRange - 0x%x\n", StartOfRange));
   DEBUG ((DEBUG_INFO, "EndOfRange - 0x%x\n", EndOfRange));
 
-  BoardAfterTempRamInit ();
-
   TestPointTempMemoryFunction (StartOfRange, EndOfRange);
 }
diff --git 
a/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/FspWrapper/Library/SecFspWrapperPlatformSecLib/PlatformInit.c
 
b/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/FspWrapper/Library/SecFspWrapperPlatformSecLib/PlatformInit.c
index 486c8c72616e..53f95c29bde5 100644
--- 
a/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/FspWrapper/Library/SecFspWrapperPlatformSecLib/PlatformInit.c
+++ 
b/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/FspWrapper/Library/SecFspWrapperPlatformSecLib/PlatformInit.c
@@ -28,6 +28,12 @@ PlatformInit (
   IN VOID *EndOfRange
   )
 {
+  //
+  // Board/Silicon initialization
+  // Prepare controllers before enabling serial port
+  //
+  BoardAfterTempRamInit ();
+
   //
   // Platform initialization
   // Enable Serial port here
@@ -41,7 +47,5 @@ PlatformInit (
   DEBUG ((DEBUG_INFO, "StartOfRange - 0x%x\n", StartOfRange));
   DEBUG ((DEBUG_INFO, "EndOfRange - 0x%x\n", EndOfRange));
 
-  BoardAfterTempRamInit ();
-
   TestPointTempMemoryFunction (StartOfRange, EndOfRange);
 }
-- 
2.37.2



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[edk2-devel][edk2-platforms][PATCH v1 3/3] KabylakeOpenBoardPkg/AspireVn7Dash572G: Hook-up HDMI debug port to build

2022-09-06 Thread Benjamin Doron
HDMI port can be used with I2cHdmiDebugSerialPortLib, for debugging in
all phases.

Cc: Chasel Chiu 
Cc: Sai Chaganty 
Cc: Isaac Oram 
Cc: Nate DeSimone 
Cc: Ankit Sinha 
Signed-off-by: Benjamin Doron 
---
 .../AspireVn7Dash572G/OpenBoardPkg.dsc| 85 +++
 .../AspireVn7Dash572G/OpenBoardPkg.fdf| 11 ++-
 .../AspireVn7Dash572G/OpenBoardPkgPcd.dsc | 54 ++--
 3 files changed, 121 insertions(+), 29 deletions(-)

diff --git 
a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/OpenBoardPkg.dsc 
b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/OpenBoardPkg.dsc
index 261f141056f5..c71b7169a38a 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/OpenBoardPkg.dsc
+++ b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/OpenBoardPkg.dsc
@@ -25,9 +25,10 @@
   #
   # Debug logging
   #
+  DEFINE USE_HDMI_DEBUG_PORT  = FALSE
   DEFINE USE_PEI_SPI_LOGGING  = FALSE
   DEFINE USE_MEMORY_LOGGING   = FALSE
-  DEFINE RELEASE_LOGGING  = ($(USE_PEI_SPI_LOGGING) || 
$(USE_MEMORY_LOGGING))
+  DEFINE RELEASE_LOGGING  = ($(USE_HDMI_DEBUG_PORT) || 
$(USE_PEI_SPI_LOGGING) || $(USE_MEMORY_LOGGING))
   DEFINE TESTING  = TRUE
 
   PLATFORM_NAME   = $(PLATFORM_PACKAGE)
@@ -205,6 +206,15 @@
   ###
   DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf
 
+!if $(USE_HDMI_DEBUG_PORT) == TRUE
+  DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf
+
+  ###
+  # Board-specific/Silicon Package
+  ###
+  
SerialPortLib|$(PLATFORM_BOARD_PACKAGE)/Library/I2cHdmiDebugSerialPortLib/SecI2cHdmiDebugSerialPortLib.inf
+!endif
+
   ###
   # Platform Package
   ###
@@ -277,7 +287,7 @@
   # Edk2 Packages
   ###
 # In-memory logging may require too many services for early core debug output
-!if $(USE_MEMORY_LOGGING) == TRUE
+!if ($(USE_MEMORY_LOGGING) == TRUE || $(USE_HDMI_DEBUG_PORT) == TRUE)
   
DebugLib|MdeModulePkg/Library/PeiDxeDebugLibReportStatusCode/PeiDxeDebugLibReportStatusCode.inf
 !endif
 
@@ -285,7 +295,7 @@
   ###
   # Edk2 Packages
   ###
-!if $(USE_MEMORY_LOGGING) == TRUE
+!if ($(USE_MEMORY_LOGGING) == TRUE || $(USE_HDMI_DEBUG_PORT) == TRUE)
   
DebugLib|MdeModulePkg/Library/PeiDxeDebugLibReportStatusCode/PeiDxeDebugLibReportStatusCode.inf
 !endif
 
@@ -322,7 +332,7 @@
   ###
   # Edk2 Packages
   ###
-!if $(USE_MEMORY_LOGGING) == TRUE
+!if ($(USE_MEMORY_LOGGING) == TRUE || $(USE_HDMI_DEBUG_PORT) == TRUE)
   
DebugLib|MdeModulePkg/Library/PeiDxeDebugLibReportStatusCode/PeiDxeDebugLibReportStatusCode.inf
 !endif
 
@@ -336,7 +346,7 @@
   # Edk2 Packages
   ###
 # In-memory logging may require too many services for early core debug output
-!if $(USE_MEMORY_LOGGING) == TRUE
+!if ($(USE_MEMORY_LOGGING) == TRUE || $(USE_HDMI_DEBUG_PORT) == TRUE)
   
DebugLib|MdeModulePkg/Library/PeiDxeDebugLibReportStatusCode/PeiDxeDebugLibReportStatusCode.inf
 !endif
 
@@ -344,7 +354,7 @@
   ###
   # Edk2 Packages
   ###
-!if $(USE_MEMORY_LOGGING) == TRUE
+!if ($(USE_MEMORY_LOGGING) == TRUE || $(USE_HDMI_DEBUG_PORT) == TRUE)
   
DebugLib|MdeModulePkg/Library/PeiDxeDebugLibReportStatusCode/PeiDxeDebugLibReportStatusCode.inf
 !endif
 
@@ -363,7 +373,21 @@
   
TestPointCheckLib|$(PLATFORM_PACKAGE)/Test/Library/TestPointCheckLib/SmmTestPointCheckLib.inf
 !endif
 
-# TODO: DebugLib override for UEFI_DRIVER and UEFI_APPLICATION?
+[LibraryClasses.common.UEFI_DRIVER]
+  ###
+  # Edk2 Packages
+  ###
+!if ($(USE_MEMORY_LOGGING) == TRUE || $(USE_HDMI_DEBUG_PORT) == TRUE)
+  
DebugLib|MdeModulePkg/Library/PeiDxeDebugLibReportStatusCode/PeiDxeDebugLibReportStatusCode.inf
+!endif
+
+[LibraryClasses.common.UEFI_APPLICATION]
+  ###
+  # Edk2 Packages
+  ###
+!if ($(USE_MEMORY_LOGGING) == TRUE || $(USE_HDMI_DEBUG_PORT) == TRUE)
+  
DebugLib|MdeModulePkg/Library/PeiDxeDebugLibReportStatusCode/PeiDxeDebugLibReportStatusCode.inf
+!endif
 
 # TODO: Add and improve feature support
 ###
@@ -389,6 +413,9 @@
 !if $(USE_MEMORY_LOGGING) == TRUE
   
SerialPortLib|MdeModulePkg/Library/PeiDxeSerialPortLibMem/PeiSerialPortLibMem.inf
 !endif
+!endif
+!if $(USE_HDMI_DEBUG_PORT) == TRUE
+  
SerialPortLib|$(PLATFORM_BOARD_PACKAGE)/Library/I2cHdmiDebugSerialPortLib/PeiI2cHdmiDebugSerialPortLib.inf
 !endif
 
   gEfiMdeModulePkgTokenSpaceGuid.PcdStatusCodeUseSerial|$(RELEASE_LOGGING)
@@ -517,14 

[edk2-devel][edk2-platforms][PATCH v1 0/3]

2022-09-06 Thread Benjamin Doron
Enable the HDMI debug port to be used for SEC phase debug. Commit my
build configuration, which successfully ouputs debug messages in all
phases and boot-flows: SEC, PEI, DXE and SMM, with handling for the
special case that is BootScriptExecutorDxe.

This patch series comprises the work product for my second planned GSoC
2022 project.

These are enhancements to Nate's series here:
https://edk2.groups.io/g/devel/message/90591.

Benjamin Doron (3):
  MinPlatformPkg,WhiskeylakeOpenBoardPkg/SecFspWrapperPlatformSecLib:
First BoardInitLib
  [WIP] KabylakeOpenBoardPkg/I2cHdmiDebugSerialPortLib: Commit local
  KabylakeOpenBoardPkg/AspireVn7Dash572G: Hook-up HDMI debug port to
build

 .../AspireVn7Dash572G/OpenBoardPkg.dsc| 85 +
 .../AspireVn7Dash572G/OpenBoardPkg.fdf| 11 +--
 .../AspireVn7Dash572G/OpenBoardPkgPcd.dsc | 54 ++-
 ...ptExecutorDxeI2cHdmiDebugSerialPortLib.inf | 48 ++
 .../DxeI2cHdmiDebugSerialPortLib.inf  |  8 +-
 .../DxeSmmI2cHdmiDebugSerialPortLib.c |  2 -
 .../Library/I2cHdmiDebugSerialPortLib/Gmbus.c | 39 
 .../I2cDebugPortProtocol.c|  2 -
 .../I2cDebugPortTplDxe.c  |  9 ++
 .../I2cDebugPortTplRuntimeDxe.c   | 93 +++
 .../I2cHdmiDebugSerialPortLib.c   |  3 -
 .../I2cHdmiDebugSerialPortLib/IgfxI2c.c   |  9 +-
 .../PeiI2cHdmiDebugSerialPortLib.c|  1 -
 .../PeiI2cHdmiDebugSerialPortLib.inf  |  5 +-
 .../RuntimeDxeI2cHdmiDebugSerialPortLib.inf   | 51 ++
 .../SecI2cHdmiDebugSerialPortLib.c|  1 -
 .../SecI2cHdmiDebugSerialPortLib.inf  |  7 +-
 .../SmmI2cHdmiDebugSerialPortLib.inf  |  6 +-
 .../PlatformInit.c|  8 +-
 .../PlatformInit.c|  8 +-
 20 files changed, 364 insertions(+), 86 deletions(-)
 create mode 100644 
Platform/Intel/KabylakeOpenBoardPkg/Library/I2cHdmiDebugSerialPortLib/BootScriptExecutorDxeI2cHdmiDebugSerialPortLib.inf
 create mode 100644 
Platform/Intel/KabylakeOpenBoardPkg/Library/I2cHdmiDebugSerialPortLib/I2cDebugPortTplRuntimeDxe.c
 create mode 100644 
Platform/Intel/KabylakeOpenBoardPkg/Library/I2cHdmiDebugSerialPortLib/RuntimeDxeI2cHdmiDebugSerialPortLib.inf

-- 
2.37.2



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[edk2-devel] [RFC PATCH 2/2] Maintainers.txt: Add entry for new RiscVVirt

2022-09-06 Thread Sunil V L
Signed-off-by: Sunil V L 
---
 Maintainers.txt | 5 +
 1 file changed, 5 insertions(+)

diff --git a/Maintainers.txt b/Maintainers.txt
index a4a0e4b907..6fac3369dd 100644
--- a/Maintainers.txt
+++ b/Maintainers.txt
@@ -381,6 +381,11 @@ F: Silicon/RISC-V/ProcessorPkg/
 M: Sunil V L 
 R: Daniel Schaefer 
 
+QEMU RISC-V virt platform
+F: Platform/Qemu/RiscVVirt/
+M: Sunil V L 
+R: Daniel Schaefer 
+
 Silicon/SiFive
 F: Silicon/SiFive/
 M: Daniel Schaefer 
-- 
2.25.1



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[edk2-devel] [RFC PATCH 1/2] RISC-V: Add Qemu Virt platform support

2022-09-06 Thread Sunil V L
Add build infrastructure files to boot qemu virt machine.

EDK2 will boot as S-mode payload of opensbi. There is no
integrated opensbi (M-mode firmware) within EDK2 for virt
machine.

It relies on the RISC-V calling convention that M-mode firmware like
opensbi will pass the BootHartId and the DTB to EDK2. This helps
to simplify the platform specific PCD variables required. It
can parse the DTB to know all the details. Even for future ACPI
support, EDK2 can parse the DTB to create static tables.

Signed-off-by: Sunil V L 
---
 Platform/Qemu/RiscVVirt/RiscVVirt.dsc | 713 ++
 Platform/Qemu/RiscVVirt/RiscVVirt.fdf | 379 
 Platform/Qemu/RiscVVirt/RiscVVirt.fdf.inc |  49 ++
 Platform/Qemu/RiscVVirt/VarStore.fdf.inc  |  79 +++
 4 files changed, 1220 insertions(+)
 create mode 100644 Platform/Qemu/RiscVVirt/RiscVVirt.dsc
 create mode 100644 Platform/Qemu/RiscVVirt/RiscVVirt.fdf
 create mode 100644 Platform/Qemu/RiscVVirt/RiscVVirt.fdf.inc
 create mode 100644 Platform/Qemu/RiscVVirt/VarStore.fdf.inc

diff --git a/Platform/Qemu/RiscVVirt/RiscVVirt.dsc 
b/Platform/Qemu/RiscVVirt/RiscVVirt.dsc
new file mode 100644
index 00..3bd030fb87
--- /dev/null
+++ b/Platform/Qemu/RiscVVirt/RiscVVirt.dsc
@@ -0,0 +1,713 @@
+## @file
+#  RISC-V EFI on RiscVVirt RISC-V platform
+#
+#  Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All rights 
reserved.
+#  Copyright (c) 2022, Ventana Micro Systems Inc. All rights reserved.
+#
+#  SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+
+#
+# Defines Section - statements that will be processed to create a Makefile.
+#
+
+[Defines]
+  PLATFORM_NAME  = RiscVVirt
+  PLATFORM_GUID  = 39DADB39-1B21-4867-838E-830B6149B9E0
+  PLATFORM_VERSION   = 0.1
+  DSC_SPECIFICATION  = 0x0001001c
+  OUTPUT_DIRECTORY   = Build/$(PLATFORM_NAME)
+  SUPPORTED_ARCHITECTURES= RISCV64
+  BUILD_TARGETS  = DEBUG|RELEASE|NOOPT
+  SKUID_IDENTIFIER   = DEFAULT
+  FLASH_DEFINITION   = Platform/Qemu/RiscVVirt/RiscVVirt.fdf
+
+  #
+  # Enable below options may cause build error or may not work on
+  # the initial version of RISC-V package
+  # Defines for default states.  These can be changed on the command line.
+  # -D FLAG=VALUE
+  #
+  DEFINE SECURE_BOOT_ENABLE  = FALSE
+  DEFINE DEBUG_ON_SERIAL_PORT= TRUE
+
+  #
+  # Network definition
+  #
+  DEFINE NETWORK_SNP_ENABLE   = FALSE
+  DEFINE NETWORK_IP6_ENABLE   = FALSE
+  DEFINE NETWORK_TLS_ENABLE   = TRUE
+  DEFINE NETWORK_HTTP_BOOT_ENABLE = TRUE
+  DEFINE NETWORK_ISCSI_ENABLE = FALSE
+  DEFINE NETWORK_ALLOW_HTTP_CONNECTIONS = TRUE
+
+[BuildOptions]
+  GCC:RELEASE_*_*_CC_FLAGS   = -DMDEPKG_NDEBUG
+!ifdef $(SOURCE_DEBUG_ENABLE)
+  GCC:*_*_RISCV64_GENFW_FLAGS= --keepexceptiontable
+!endif
+
+[BuildOptions.common.EDKII.DXE_RUNTIME_DRIVER]
+  GCC:  *_*_*_DLINK_FLAGS = -z common-page-size=0x1000
+  MSFT: *_*_*_DLINK_FLAGS = /ALIGN:4096
+
+
+#
+# SKU Identification section - list of all SKU IDs supported by this Platform.
+#
+
+[SkuIds]
+  0|DEFAULT
+
+
+#
+# Library Class section - list of all Library Classes needed by this Platform.
+#
+
+
+!include MdePkg/MdeLibs.dsc.inc
+
+[LibraryClasses]
+  PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
+  PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf
+  BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf
+  BaseLib|MdePkg/Library/BaseLib/BaseLib.inf
+  SafeIntLib|MdePkg/Library/BaseSafeIntLib/BaseSafeIntLib.inf
+  
SynchronizationLib|MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf
+  CpuLib|MdePkg/Library/BaseCpuLib/BaseCpuLib.inf
+  
PerformanceLib|MdePkg/Library/BasePerformanceLibNull/BasePerformanceLibNull.inf
+  PeCoffLib|MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf
+  
CacheMaintenanceLib|MdePkg/Library/BaseCacheMaintenanceLib/BaseCacheMaintenanceLib.inf
+  
UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.inf
+  
UefiHiiServicesLib|MdeModulePkg/Library/UefiHiiServicesLib/UefiHiiServicesLib.inf
+  HiiLib|MdeModulePkg/Library/UefiHiiLib/UefiHiiLib.inf
+  CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf
+  DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf
+  
DxeServicesTableLib|MdePkg/Library/DxeServicesTableLib/DxeServicesTableLib.inf
+  
PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.inf
+  

[edk2-devel] [RFC PATCH 17/17] MdeModulePkg/Universal: Add TimerDxe module

2022-09-06 Thread Sunil V L
This DXE module initializes the timer interrupt handler
and installs the Arch Timer protocol.

Signed-off-by: Sunil V L 
---
 .../Universal/TimerDxe/RiscV64/Timer.c| 293 ++
 .../Universal/TimerDxe/RiscV64/Timer.h| 174 +++
 MdeModulePkg/Universal/TimerDxe/Timer.uni |  15 +
 MdeModulePkg/Universal/TimerDxe/TimerDxe.inf  |  52 
 .../Universal/TimerDxe/TimerExtra.uni |  13 +
 5 files changed, 547 insertions(+)
 create mode 100644 MdeModulePkg/Universal/TimerDxe/RiscV64/Timer.c
 create mode 100644 MdeModulePkg/Universal/TimerDxe/RiscV64/Timer.h
 create mode 100644 MdeModulePkg/Universal/TimerDxe/Timer.uni
 create mode 100644 MdeModulePkg/Universal/TimerDxe/TimerDxe.inf
 create mode 100644 MdeModulePkg/Universal/TimerDxe/TimerExtra.uni

diff --git a/MdeModulePkg/Universal/TimerDxe/RiscV64/Timer.c 
b/MdeModulePkg/Universal/TimerDxe/RiscV64/Timer.c
new file mode 100644
index 00..4deb91766d
--- /dev/null
+++ b/MdeModulePkg/Universal/TimerDxe/RiscV64/Timer.c
@@ -0,0 +1,293 @@
+/** @file
+  RISC-V Timer Architectural Protocol
+
+  Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All rights 
reserved.
+  Copyright (c) 2022, Ventana Micro Systems Inc. All rights reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include "Timer.h"
+#include 
+#include 
+
+//
+// The handle onto which the Timer Architectural Protocol will be installed
+//
+STATIC EFI_HANDLE mTimerHandle = NULL;
+
+//
+// The Timer Architectural Protocol that this driver produces
+//
+EFI_TIMER_ARCH_PROTOCOL   mTimer = {
+  TimerDriverRegisterHandler,
+  TimerDriverSetTimerPeriod,
+  TimerDriverGetTimerPeriod,
+  TimerDriverGenerateSoftInterrupt
+};
+
+//
+// Pointer to the CPU Architectural Protocol instance
+//
+EFI_CPU_ARCH_PROTOCOL *mCpu;
+
+//
+// The notification function to call on every timer interrupt.
+// A bug in the compiler prevents us from initializing this here.
+//
+STATIC EFI_TIMER_NOTIFY mTimerNotifyFunction;
+
+//
+// The current period of the timer interrupt
+//
+STATIC UINT64 mTimerPeriod = 0;
+
+/**
+  Timer Interrupt Handler.
+
+  @param InterruptTypeThe type of interrupt that occured
+  @param SystemContextA pointer to the system context when the interrupt 
occured
+**/
+
+VOID
+EFIAPI
+TimerInterruptHandler (
+  IN EFI_EXCEPTION_TYPE   InterruptType,
+  IN EFI_SYSTEM_CONTEXT   SystemContext
+  )
+{
+  EFI_TPL OriginalTPL;
+  UINT64 RiscvTimer;
+
+  OriginalTPL = gBS->RaiseTPL (TPL_HIGH_LEVEL);
+  if (mTimerNotifyFunction != NULL) {
+  mTimerNotifyFunction (mTimerPeriod);
+  }
+  csr_clear(CSR_SIE, SIP_STIP); // Disable SMode timer int
+  csr_clear(CSR_SIP, SIP_STIP);
+  if (mTimerPeriod == 0) {
+gBS->RestoreTPL (OriginalTPL);
+csr_clear(CSR_SIE, SIP_STIP); // Disable SMode timer int
+return;
+  }
+  RiscvTimer = csr_read(CSR_TIME);
+  SbiSetTimer (RiscvTimer += mTimerPeriod);
+  gBS->RestoreTPL (OriginalTPL);
+  csr_set(CSR_SIE, SIP_STIP); // enable SMode timer int
+}
+
+/**
+
+  This function registers the handler NotifyFunction so it is called every time
+  the timer interrupt fires.  It also passes the amount of time since the last
+  handler call to the NotifyFunction.  If NotifyFunction is NULL, then the
+  handler is unregistered.  If the handler is registered, then EFI_SUCCESS is
+  returned.  If the CPU does not support registering a timer interrupt handler,
+  then EFI_UNSUPPORTED is returned.  If an attempt is made to register a 
handler
+  when a handler is already registered, then EFI_ALREADY_STARTED is returned.
+  If an attempt is made to unregister a handler when a handler is not 
registered,
+  then EFI_INVALID_PARAMETER is returned.  If an error occurs attempting to
+  register the NotifyFunction with the timer interrupt, then EFI_DEVICE_ERROR
+  is returned.
+
+  @param This The EFI_TIMER_ARCH_PROTOCOL instance.
+  @param NotifyFunction   The function to call when a timer interrupt fires.  
This
+  function executes at TPL_HIGH_LEVEL.  The DXE Core 
will
+  register a handler for the timer interrupt, so it 
can know
+  how much time has passed.  This information is used 
to
+  signal timer based events.  NULL will unregister the 
handler.
+
+  @retvalEFI_SUCCESSThe timer handler was registered.
+  @retvalEFI_UNSUPPORTEDThe platform does not support timer 
interrupts.
+  @retvalEFI_ALREADY_STARTEDNotifyFunction is not NULL, and a 
handler is already
+registered.
+  @retvalEFI_INVALID_PARAMETER  NotifyFunction is NULL, and a handler 
was not
+previously registered.
+  @retvalEFI_DEVICE_ERROR   The timer handler could not be 
registered.
+
+**/
+EFI_STATUS
+EFIAPI
+TimerDriverRegisterHandler (
+  IN EFI_TIMER_ARCH_PROTOCOL  *This,
+  IN 

[edk2-devel] [RFC PATCH 16/17] UefiCpuPkg/CpuDxe: Add RISC-V support in CpuDxe module

2022-09-06 Thread Sunil V L
This DXE module initializes the RISC-V CPU by installing
the CPU specific ARCH protocol handlers. This also initializes
the RISCV_EFI_BOOT_PROTOCOL which is required on RISC-V
platforms.

Signed-off-by: Sunil V L 
---
 UefiCpuPkg/CpuDxe/CpuDxe.inf   |  16 +-
 UefiCpuPkg/CpuDxe/RiscV64/CpuDxe.c | 337 +
 UefiCpuPkg/CpuDxe/RiscV64/CpuDxe.h | 200 +
 3 files changed, 552 insertions(+), 1 deletion(-)
 create mode 100644 UefiCpuPkg/CpuDxe/RiscV64/CpuDxe.c
 create mode 100644 UefiCpuPkg/CpuDxe/RiscV64/CpuDxe.h

diff --git a/UefiCpuPkg/CpuDxe/CpuDxe.inf b/UefiCpuPkg/CpuDxe/CpuDxe.inf
index 4f2ea42f16..17cf2b1ecd 100644
--- a/UefiCpuPkg/CpuDxe/CpuDxe.inf
+++ b/UefiCpuPkg/CpuDxe/CpuDxe.inf
@@ -1,8 +1,12 @@
 ## @file
-#  CPU driver installs CPU Architecture Protocol and CPU MP protocol.
+#  On X86, CPU driver installs CPU Architecture Protocol and CPU MP protocol.
+#
+#  On RISC-V, CPU driver installs CPU Architecture Protocol and RISC-V boot
+#  protocol
 #
 #  Copyright (c) 2008 - 2019, Intel Corporation. All rights reserved.
 #  Copyright (c) 2017, AMD Incorporated. All rights reserved.
+#  Copyright (c) 2022, Ventana Micro Systems Inc. All rights reserved.
 #
 #  SPDX-License-Identifier: BSD-2-Clause-Patent
 #
@@ -44,6 +48,9 @@
   MtrrLib
   UefiCpuLib
 
+[LibraryClasses.RISCV64]
+  RiscVSbiLib
+
 [Sources.IA32, Sources.X64]
   CpuDxe.c
   CpuDxe.h
@@ -62,11 +69,18 @@
   X64/CpuAsm.nasm
   X64/PagingAttribute.c
 
+[Sources.RISCV64]
+  RiscV64/CpuDxe.c
+  RiscV64/CpuDxe.h
+
 [Protocols]
   gEfiCpuArchProtocolGuid   ## PRODUCES
   gEfiMpServiceProtocolGuid ## PRODUCES
   gEfiSmmBase2ProtocolGuid  ## SOMETIMES_CONSUMES
 
+[Protocols.RISCV64]
+  gRiscVEfiBootProtocolGuid ## PRODUCES
+
 [Guids]
   gIdleLoopEventGuid## CONSUMES   ## Event
   gEfiVectorHandoffTableGuid## SOMETIMES_CONSUMES ## 
SystemTable
diff --git a/UefiCpuPkg/CpuDxe/RiscV64/CpuDxe.c 
b/UefiCpuPkg/CpuDxe/RiscV64/CpuDxe.c
new file mode 100644
index 00..4112b6b8c6
--- /dev/null
+++ b/UefiCpuPkg/CpuDxe/RiscV64/CpuDxe.c
@@ -0,0 +1,337 @@
+/** @file
+  RISC-V CPU DXE driver.
+
+  Copyright (c) 2016 - 2022, Hewlett Packard Enterprise Development LP. All 
rights reserved.
+  Copyright (c) 2022, Ventana Micro Systems Inc. All rights reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include 
+#include 
+#include "CpuDxe.h"
+
+//
+// Global Variables
+//
+STATIC BOOLEAN mInterruptState = FALSE;
+STATIC EFI_HANDLE  mCpuHandle  = NULL;
+STATIC UINTN mBootHartId;
+RISCV_EFI_BOOT_PROTOCOL gRiscvBootProtocol;
+
+EFI_STATUS
+EFIAPI
+RiscvGetBootHartId (
+  IN RISCV_EFI_BOOT_PROTOCOL   *This,
+  OUT UINTN*BootHartId
+  )
+{
+  if((This != ) || (BootHartId == NULL)) {
+return EFI_INVALID_PARAMETER;
+  }
+
+  *BootHartId = mBootHartId;
+  return EFI_SUCCESS;
+}
+
+RISCV_EFI_BOOT_PROTOCOL  gRiscvBootProtocol = {
+  RISCV_EFI_BOOT_PROTOCOL_LATEST_VERSION,
+  RiscvGetBootHartId
+};
+
+EFI_CPU_ARCH_PROTOCOL  gCpu = {
+  CpuFlushCpuDataCache,
+  CpuEnableInterrupt,
+  CpuDisableInterrupt,
+  CpuGetInterruptState,
+  CpuInit,
+  CpuRegisterInterruptHandler,
+  CpuGetTimerValue,
+  CpuSetMemoryAttributes,
+  1,  // NumberOfTimers
+  4   // DmaBufferAlignment
+};
+
+//
+// CPU Arch Protocol Functions
+//
+
+/**
+  Flush CPU data cache. If the instruction cache is fully coherent
+  with all DMA operations then function can just return EFI_SUCCESS.
+
+  @param  This  Protocol instance structure
+  @param  Start Physical address to start flushing from.
+  @param  LengthNumber of bytes to flush. Round up to chipset
+granularity.
+  @param  FlushType Specifies the type of flush operation to perform.
+
+  @retval EFI_SUCCESS   If cache was flushed
+  @retval EFI_UNSUPPORTED   If flush type is not supported.
+  @retval EFI_DEVICE_ERROR  If requested range could not be flushed.
+
+**/
+EFI_STATUS
+EFIAPI
+CpuFlushCpuDataCache (
+  IN EFI_CPU_ARCH_PROTOCOL  *This,
+  IN EFI_PHYSICAL_ADDRESS   Start,
+  IN UINT64 Length,
+  IN EFI_CPU_FLUSH_TYPE FlushType
+  )
+{
+  return EFI_SUCCESS;
+}
+
+/**
+  Enables CPU interrupts.
+
+  @param  This  Protocol instance structure
+
+  @retval EFI_SUCCESS   If interrupts were enabled in the CPU
+  @retval EFI_DEVICE_ERROR  If interrupts could not be enabled on the CPU.
+
+**/
+EFI_STATUS
+EFIAPI
+CpuEnableInterrupt (
+  IN EFI_CPU_ARCH_PROTOCOL  *This
+  )
+{
+  EnableInterrupts ();
+  mInterruptState = TRUE;
+  return EFI_SUCCESS;
+}
+
+/**
+  Disables CPU interrupts.
+
+  @param  This  Protocol instance structure
+
+  @retval EFI_SUCCESS   If interrupts were disabled in the CPU.
+  @retval EFI_DEVICE_ERROR  If interrupts could not be 

[edk2-devel] [RFC PATCH 15/17] UefiCpuPkg/CpuDxe: Refactor to allow other CPU architectures

2022-09-06 Thread Sunil V L
Currently, CpuDxe driver is mostly x86 specific. Refactor the INF
to allow other architectures like RISC-V.

Signed-off-by: Sunil V L 
---
 UefiCpuPkg/CpuDxe/CpuDxe.inf | 12 +++-
 1 file changed, 7 insertions(+), 5 deletions(-)

diff --git a/UefiCpuPkg/CpuDxe/CpuDxe.inf b/UefiCpuPkg/CpuDxe/CpuDxe.inf
index 2352418992..4f2ea42f16 100644
--- a/UefiCpuPkg/CpuDxe/CpuDxe.inf
+++ b/UefiCpuPkg/CpuDxe/CpuDxe.inf
@@ -29,20 +29,22 @@
   DebugLib
   DxeServicesTableLib
   MemoryAllocationLib
-  MtrrLib
   UefiBootServicesTableLib
   UefiDriverEntryPoint
-  LocalApicLib
-  UefiCpuLib
   UefiLib
   CpuExceptionHandlerLib
   HobLib
   ReportStatusCodeLib
-  MpInitLib
   TimerLib
   PeCoffGetEntryPointLib
 
-[Sources]
+[LibraryClasses.IA32, LibraryClasses.X64]
+  LocalApicLib
+  MpInitLib
+  MtrrLib
+  UefiCpuLib
+
+[Sources.IA32, Sources.X64]
   CpuDxe.c
   CpuDxe.h
   CpuGdt.c
-- 
2.25.1



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[edk2-devel] [RFC PATCH 14/17] MdeModulePkg/Universal: Add PlatformPei module for RISC-V

2022-09-06 Thread Sunil V L
Thie PEIM is required to do platform specific initialization like
detecting the permanent memory and install memory HOB, install the
FDT Hob etc.

Signed-off-by: Sunil V L 
---
 .../Universal/PlatformPei/PlatformPei.inf |  65 +++
 .../Universal/PlatformPei/RiscV64/Fv.c|  83 
 .../Universal/PlatformPei/RiscV64/MemDetect.c | 179 +
 .../Universal/PlatformPei/RiscV64/Platform.c  | 372 ++
 .../Universal/PlatformPei/RiscV64/Platform.h  |  97 +
 5 files changed, 796 insertions(+)
 create mode 100644 MdeModulePkg/Universal/PlatformPei/PlatformPei.inf
 create mode 100644 MdeModulePkg/Universal/PlatformPei/RiscV64/Fv.c
 create mode 100644 MdeModulePkg/Universal/PlatformPei/RiscV64/MemDetect.c
 create mode 100644 MdeModulePkg/Universal/PlatformPei/RiscV64/Platform.c
 create mode 100644 MdeModulePkg/Universal/PlatformPei/RiscV64/Platform.h

diff --git a/MdeModulePkg/Universal/PlatformPei/PlatformPei.inf 
b/MdeModulePkg/Universal/PlatformPei/PlatformPei.inf
new file mode 100644
index 00..220f4a7ee5
--- /dev/null
+++ b/MdeModulePkg/Universal/PlatformPei/PlatformPei.inf
@@ -0,0 +1,65 @@
+## @file
+#  Platform PEI driver
+#
+#  This module provides platform specific functions
+#
+#  Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All rights 
reserved.
+#  Copyright (c) 2022, Ventana Micro Systems Inc. All rights reserved.
+#
+#  SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+  INF_VERSION= 0x0001001b
+  BASE_NAME  = PlatformPei
+  FILE_GUID  = 0F26B9AF-3E38-46E8-9D35-0318E903E049
+  MODULE_TYPE= PEIM
+  VERSION_STRING = 1.0
+  ENTRY_POINT= InitializePlatform
+
+#
+# The following information is for reference only and not required by the 
build tools.
+#
+#  VALID_ARCHITECTURES   = RISCV64
+#
+
+[Sources]
+  RiscV64/Fv.c
+  RiscV64/MemDetect.c
+  RiscV64/Platform.c
+  RiscV64/Platform.h
+
+[Packages]
+  EmbeddedPkg/EmbeddedPkg.dec
+  MdeModulePkg/MdeModulePkg.dec
+  MdePkg/MdePkg.dec
+  UefiCpuPkg/UefiCpuPkg.dec
+
+[Guids]
+  gEfiMemoryTypeInformationGuid
+
+[LibraryClasses]
+  DebugLib
+  HobLib
+  FdtLib
+  IoLib
+  PcdLib
+  PeimEntryPoint
+  PeiResourcePublicationLib
+  PlatformPeiLib
+
+[LibraryClasses.RISCV64]
+  RiscVSbiLib
+
+[Pcd.RISCV64]
+  gEfiMdeModulePkgTokenSpaceGuid.PcdPeiMemFvBase
+  gEfiMdeModulePkgTokenSpaceGuid.PcdPeiMemFvSize
+  gEfiMdeModulePkgTokenSpaceGuid.PcdDxeMemFvBase
+  gEfiMdeModulePkgTokenSpaceGuid.PcdDxeMemFvSize
+
+[Ppis]
+  gEfiPeiMasterBootModePpiGuid
+
+[Depex]
+  TRUE
diff --git a/MdeModulePkg/Universal/PlatformPei/RiscV64/Fv.c 
b/MdeModulePkg/Universal/PlatformPei/RiscV64/Fv.c
new file mode 100644
index 00..15e77fcf7e
--- /dev/null
+++ b/MdeModulePkg/Universal/PlatformPei/RiscV64/Fv.c
@@ -0,0 +1,83 @@
+/** @file
+  Build FV related hobs for platform.
+
+  Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All rights 
reserved.
+  Copyright (c) 2006 - 2013, Intel Corporation. All rights reserved.
+  Copyright (c) 2022, Ventana Micro Systems Inc. All rights reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include "PiPei.h"
+#include "Platform.h"
+#include 
+#include 
+#include 
+#include 
+
+/**
+  Publish PEI & DXE (Decompressed) Memory based FVs to let PEI
+  and DXE know about them.
+
+  @retval EFI_SUCCESS   Platform PEI FVs were initialized successfully.
+
+**/
+EFI_STATUS
+PeiFvInitialization (
+  VOID
+  )
+{
+  DEBUG ((DEBUG_INFO, "Platform PEI Firmware Volume Initialization\n"));
+
+  // Create a memory allocation HOB for the DXE FV.
+  //
+  // If "secure" S3 is needed, then SEC will decompress both PEI and DXE
+  // firmware volumes at S3 resume too, hence we need to keep away the OS from
+  // DXEFV as well. Otherwise we only need to keep away DXE itself from the
+  // DXEFV area.
+  //
+  BuildMemoryAllocationHob (
+PcdGet32 (PcdPeiMemFvBase),
+PcdGet32 (PcdPeiMemFvSize),
+EfiBootServicesData
+);
+
+
+  //
+  // Let DXE know about the DXE FV
+  //
+  BuildFvHob (PcdGet32 (PcdDxeMemFvBase), PcdGet32 (PcdDxeMemFvSize));
+  DEBUG ((
+DEBUG_INFO,
+"Platform builds DXE FV at %x, size %x.\n",
+PcdGet32 (PcdDxeMemFvBase),
+PcdGet32 (PcdDxeMemFvSize)
+));
+
+  // Create a memory allocation HOB for the DXE FV.
+  //
+  // If "secure" S3 is needed, then SEC will decompress both PEI and DXE
+  // firmware volumes at S3 resume too, hence we need to keep away the OS from
+  // DXEFV as well. Otherwise we only need to keep away DXE itself from the
+  // DXEFV area.
+  //
+  BuildMemoryAllocationHob (
+PcdGet32 (PcdDxeMemFvBase),
+PcdGet32 (PcdDxeMemFvSize),
+EfiBootServicesData
+);
+
+  //
+  // Let PEI know about the DXE FV so it can find the DXE Core
+  //
+  PeiServicesInstallFvInfoPpi (
+NULL,
+(VOID *)(UINTN)PcdGet32 (PcdDxeMemFvBase),
+PcdGet32 (PcdDxeMemFvSize),
+

[edk2-devel] [RFC PATCH 13/17] MdePkg: Add PlatformPeiLib library

2022-09-06 Thread Sunil V L
This library is required in RISC-V to build the FDT Hob. The
library can be leveraged by other architectures like ARM if
required.

Signed-off-by: Sunil V L 
---
 MdePkg/Include/Library/PlatformPeiLib.h   | 15 
 .../Library/PlatformPeiLib/PlatformPeiLib.inf | 40 +++
 .../PlatformPeiLib/RiscV64/PlatformPeiLib.c   | 68 +++
 3 files changed, 123 insertions(+)
 create mode 100644 MdePkg/Include/Library/PlatformPeiLib.h
 create mode 100644 MdePkg/Library/PlatformPeiLib/PlatformPeiLib.inf
 create mode 100644 MdePkg/Library/PlatformPeiLib/RiscV64/PlatformPeiLib.c

diff --git a/MdePkg/Include/Library/PlatformPeiLib.h 
b/MdePkg/Include/Library/PlatformPeiLib.h
new file mode 100644
index 00..1e8c5f98cf
--- /dev/null
+++ b/MdePkg/Include/Library/PlatformPeiLib.h
@@ -0,0 +1,15 @@
+/** @file
+  Library to initialize platform data at PEI phase
+
+  Copyright (c) 2021-2022, Hewlett Packard Development LP. All rights 
reserved.
+  Copyright (c) 2022, Ventana Micro Systems Inc. All rights reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#ifndef _PLATFORM_PEI_LIB_H_
+#define _PLATFORM_PEI_LIB_H_
+
+EFI_STATUS PlatformPeim(VOID);
+
+#endif
diff --git a/MdePkg/Library/PlatformPeiLib/PlatformPeiLib.inf 
b/MdePkg/Library/PlatformPeiLib/PlatformPeiLib.inf
new file mode 100644
index 00..d682b3c0f9
--- /dev/null
+++ b/MdePkg/Library/PlatformPeiLib/PlatformPeiLib.inf
@@ -0,0 +1,40 @@
+## @file
+#  Platform Initialization Pei Library
+#
+#  Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights 
reserved.
+#  Copyright (c) 2022, Ventana Micro Systems Inc. All rights reserved.
+#
+#  SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+  INF_VERSION= 0x0001001b
+  BASE_NAME  = PlatformPeiLib
+  FILE_GUID  = B35BD738-787B-47FB-8139-20193442CC49
+  MODULE_TYPE= PEIM
+  VERSION_STRING = 1.0
+  LIBRARY_CLASS  = PlatformPeiLib
+
+[Sources.RISCV64]
+  RiscV64/PlatformPeiLib.c
+
+[Packages]
+  MdePkg/MdePkg.dec
+  MdeModulePkg/MdeModulePkg.dec
+  UefiCpuPkg/UefiCpuPkg.dec
+  EmbeddedPkg/EmbeddedPkg.dec
+
+[LibraryClasses]
+  DebugLib
+  HobLib
+  FdtLib
+  PcdLib
+  PeimEntryPoint
+  BaseLib
+
+[LibraryClasses.RISCV64]
+  RiscVSbiLib
+
+[Guids]
+  gFdtHobGuid   ## PRODUCES
diff --git a/MdePkg/Library/PlatformPeiLib/RiscV64/PlatformPeiLib.c 
b/MdePkg/Library/PlatformPeiLib/RiscV64/PlatformPeiLib.c
new file mode 100644
index 00..e62aa26df9
--- /dev/null
+++ b/MdePkg/Library/PlatformPeiLib/RiscV64/PlatformPeiLib.c
@@ -0,0 +1,68 @@
+/** @file
+The library call to pass the device tree to DXE via HOB.
+
+Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All rights 
reserved.
+Copyright (c) 2022, Ventana Micro Systems Inc. All rights reserved.
+
+SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
+#include 
+
+/**
+  @retval EFI_SUCCESSThe address of FDT is passed in HOB.
+  EFI_UNSUPPORTEDCan't locate FDT.
+**/
+EFI_STATUS
+EFIAPI
+PlatformPeim (
+  VOID
+  )
+{
+  EFI_RISCV_FIRMWARE_CONTEXT *FirmwareContext;
+  VOID   *FdtPointer;
+  VOID   *Base;
+  VOID   *NewBase;
+  UINTN  FdtSize;
+  UINTN  FdtPages;
+  UINT64 *FdtHobData;
+
+  FirmwareContext = NULL;
+  GetFirmwareContextPointer ();
+
+  if (FirmwareContext == NULL) {
+DEBUG ((DEBUG_ERROR, "%a: Firmware Context is NULL\n", __FUNCTION__));
+return EFI_UNSUPPORTED;
+  }
+
+  FdtPointer = (VOID *)FirmwareContext->FlattenedDeviceTree;
+  if (FdtPointer == NULL) {
+DEBUG ((DEBUG_ERROR, "%a: Invalid FDT pointer\n", __FUNCTION__));
+return EFI_UNSUPPORTED;
+  }
+
+  DEBUG ((DEBUG_INFO, "%a: Build FDT HOB - FDT at address: 0x%x \n", 
__FUNCTION__, FdtPointer));
+  Base = FdtPointer;
+  ASSERT (Base != NULL);
+  ASSERT (fdt_check_header (Base) == 0);
+
+  FdtSize  = fdt_totalsize (Base);
+  FdtPages = EFI_SIZE_TO_PAGES (FdtSize);
+  NewBase  = AllocatePages (FdtPages);
+  ASSERT (NewBase != NULL);
+  fdt_open_into (Base, NewBase, EFI_PAGES_TO_SIZE (FdtPages));
+
+  FdtHobData = BuildGuidHob (, sizeof *FdtHobData);
+  ASSERT (FdtHobData != NULL);
+  *FdtHobData = (UINTN)NewBase;
+
+  return EFI_SUCCESS;
+}
-- 
2.25.1



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[edk2-devel] [RFC PATCH 12/17] UefiCpuPkg/SecCore: Add SEC startup code for RISC-V

2022-09-06 Thread Sunil V L
Generic RISC-V platforms will start in S-mode directly.
Previous M-mode firmware like opensbi will branch to the
entry point in this module. This module initializes the
firmware context pointer and branches to the PEI phase.

Signed-off-by: Sunil V L 
---
 UefiCpuPkg/SecCore/RiscV64/SecEntry.S |  23 +
 UefiCpuPkg/SecCore/RiscV64/SecMain.c  | 796 ++
 UefiCpuPkg/SecCore/RiscV64/SecMain.h  |  63 ++
 UefiCpuPkg/SecCore/SecCoreRiscV.inf   |  59 ++
 4 files changed, 941 insertions(+)
 create mode 100644 UefiCpuPkg/SecCore/RiscV64/SecEntry.S
 create mode 100644 UefiCpuPkg/SecCore/RiscV64/SecMain.c
 create mode 100644 UefiCpuPkg/SecCore/RiscV64/SecMain.h
 create mode 100644 UefiCpuPkg/SecCore/SecCoreRiscV.inf

diff --git a/UefiCpuPkg/SecCore/RiscV64/SecEntry.S 
b/UefiCpuPkg/SecCore/RiscV64/SecEntry.S
new file mode 100644
index 00..1bd0174e27
--- /dev/null
+++ b/UefiCpuPkg/SecCore/RiscV64/SecEntry.S
@@ -0,0 +1,23 @@
+/*
+  Copyright (c) 2021-2022 , Hewlett Packard Enterprise Development LP. All 
rights reserved.
+  Copyright (c) 2019 Western Digital Corporation or its affiliates.
+  Copyright (c) 2022 Ventana Micro Systems Inc.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+ */
+
+#include "SecMain.h"
+
+.text
+.align 3
+
+ASM_FUNC (_ModuleEntryPoint)
+  /* Use Temp memory as the stack for calling to C code */
+  lia4, FixedPcdGet32 (PcdSecPeiTempRamBase)
+  lia5, FixedPcdGet32 (PcdSecPeiTempRamSize)
+
+  /* Use Temp memory as the stack for calling to C code */
+  add   sp, a4, a5
+
+  call SecStartup
diff --git a/UefiCpuPkg/SecCore/RiscV64/SecMain.c 
b/UefiCpuPkg/SecCore/RiscV64/SecMain.c
new file mode 100644
index 00..d9dacce319
--- /dev/null
+++ b/UefiCpuPkg/SecCore/RiscV64/SecMain.c
@@ -0,0 +1,796 @@
+/** @file
+  RISC-V SEC phase module.
+
+  Copyright (c) 2008 - 2015, Intel Corporation. All rights reserved.
+  Copyright (c) 2021-2022, Hewlett Packard Enterprise Development LP. All 
rights reserved.
+  Copyright (c) 2022, Ventana Micro Systems Inc. All rights reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include "SecMain.h"
+
+EFI_STATUS
+EFIAPI
+TemporaryRamMigration (
+  IN CONST EFI_PEI_SERVICES   **PeiServices,
+  IN EFI_PHYSICAL_ADDRESS TemporaryMemoryBase,
+  IN EFI_PHYSICAL_ADDRESS PermanentMemoryBase,
+  IN UINTNCopySize
+  );
+
+EFI_STATUS
+EFIAPI
+TemporaryRamDone (
+  VOID
+  );
+
+STATIC EFI_PEI_TEMPORARY_RAM_SUPPORT_PPI mTemporaryRamSupportPpi = {
+  TemporaryRamMigration
+};
+
+STATIC EFI_PEI_TEMPORARY_RAM_DONE_PPI mTemporaryRamDonePpi = {
+  TemporaryRamDone
+};
+
+STATIC EFI_PEI_PPI_DESCRIPTOR mPrivateDispatchTable[] = {
+  {
+EFI_PEI_PPI_DESCRIPTOR_PPI,
+,
+
+  },
+  {
+(EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),
+,
+
+  },
+};
+
+/** Temporary RAM migration function.
+
+  This function migrates the data from temporary RAM to permanent
+  memory.
+
+  @param[in]  PeiServices   PEI service
+  @param[in]  TemporaryMemoryBase   Temporary memory base address
+  @param[in]  PermanentMemoryBase   Permanent memory base address
+  @param[in]  CopySize  Size to copy
+
+**/
+EFI_STATUS
+EFIAPI
+TemporaryRamMigration (
+  IN CONST EFI_PEI_SERVICES   **PeiServices,
+  IN EFI_PHYSICAL_ADDRESS TemporaryMemoryBase,
+  IN EFI_PHYSICAL_ADDRESS PermanentMemoryBase,
+  IN UINTNCopySize
+  )
+{
+  VOID  *OldHeap;
+  VOID  *NewHeap;
+  VOID  *OldStack;
+  VOID  *NewStack;
+  EFI_RISCV_FIRMWARE_CONTEXT *FirmwareContext;
+
+  DEBUG ((DEBUG_INFO,
+"%a: Temp Mem Base:0x%Lx, Permanent Mem Base:0x%Lx, CopySize:0x%Lx\n",
+__FUNCTION__,
+TemporaryMemoryBase,
+PermanentMemoryBase,
+(UINT64)CopySize
+));
+
+  OldHeap = (VOID*)(UINTN)TemporaryMemoryBase;
+  NewHeap = (VOID*)((UINTN)PermanentMemoryBase + (CopySize >> 1));
+
+  OldStack = (VOID*)((UINTN)TemporaryMemoryBase + (CopySize >> 1));
+  NewStack = (VOID*)(UINTN)PermanentMemoryBase;
+
+  CopyMem (NewHeap, OldHeap, CopySize >> 1);   // Migrate Heap
+  CopyMem (NewStack, OldStack, CopySize >> 1); // Migrate Stack
+
+  //
+  // Reset firmware context pointer
+  //
+  GetFirmwareContextPointer ();
+  FirmwareContext = (VOID *)FirmwareContext + (unsigned long)((UINTN)NewStack 
- (UINTN)OldStack);
+  SetFirmwareContextPointer (FirmwareContext);
+
+  DEBUG ((DEBUG_INFO, "%a: Firmware Context is relocated to 0x%x\n", 
__FUNCTION__, FirmwareContext));
+
+  register UINTN  a0 asm ("a0") = (UINTN)((UINTN)NewStack - (UINTN)OldStack);
+  asm volatile ("add sp, sp, a0"::"r"(a0):);
+  return EFI_SUCCESS;
+}
+
+/** Temprary RAM done function.
+
+**/
+EFI_STATUS EFIAPI TemporaryRamDone (
+  VOID
+  )
+{
+  DEBUG ((DEBUG_INFO, "%a: 2nd time PEI core, temporary ram done.\n", 
__FUNCTION__));
+  return EFI_SUCCESS;
+}
+/** Return platform SEC PPI before PEI Core
+
+  @param[in,out]  ThisPpiList   Pointer to retrieve EFI_PEI_PPI_DESCRIPTOR.
+
+**/

[edk2-devel] [RFC PATCH 11/17] MdePkg/Library: Add ResetSystemLib library

2022-09-06 Thread Sunil V L
This library implements system reset interfaces like cold reboot,
warm reboot etc. On RISC-V platforms, these are implemented using
SBI calls.

Signed-off-by: Sunil V L 
---
 .../Library/ResetSystemLib/ResetSystemLib.inf |  35 +
 .../ResetSystemLib/RiscV64/ResetSystemLib.c   | 128 ++
 2 files changed, 163 insertions(+)
 create mode 100644 MdePkg/Library/ResetSystemLib/ResetSystemLib.inf
 create mode 100644 MdePkg/Library/ResetSystemLib/RiscV64/ResetSystemLib.c

diff --git a/MdePkg/Library/ResetSystemLib/ResetSystemLib.inf 
b/MdePkg/Library/ResetSystemLib/ResetSystemLib.inf
new file mode 100644
index 00..7c8a7d1142
--- /dev/null
+++ b/MdePkg/Library/ResetSystemLib/ResetSystemLib.inf
@@ -0,0 +1,35 @@
+## @file
+#  Library instance for ResetSystem library class
+#
+#  Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All rights 
reserved.
+#  Copyright (c) 2022, Ventana Micro Systems Inc. All rights reserved.
+#  SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+
+[Defines]
+  INF_VERSION= 0x00010005
+  BASE_NAME  = ResetSystemLib
+  FILE_GUID  = 425DC96A-BF26-4684-90F9-1B5FF43BE927
+  MODULE_TYPE= BASE
+  VERSION_STRING = 1.0
+  LIBRARY_CLASS  = ResetSystemLib
+
+#
+# The following information is for reference only and not required by the 
build tools.
+#
+#  VALID_ARCHITECTURES   = RISCV64
+#
+
+[Sources.RISCV64]
+  RiscV64/ResetSystemLib.c
+
+[Packages]
+  MdePkg/MdePkg.dec
+  MdeModulePkg/MdeModulePkg.dec
+  UefiCpuPkg/UefiCpuPkg.dec
+
+[LibraryClasses]
+  DebugLib
+
+[LibraryClasses.RISCV64]
+  RiscVSbiLib
diff --git a/MdePkg/Library/ResetSystemLib/RiscV64/ResetSystemLib.c 
b/MdePkg/Library/ResetSystemLib/RiscV64/ResetSystemLib.c
new file mode 100644
index 00..c077ef6ac7
--- /dev/null
+++ b/MdePkg/Library/ResetSystemLib/RiscV64/ResetSystemLib.c
@@ -0,0 +1,128 @@
+/** @file
+  Reset System Library functions for RISC-V
+
+  Copyright (c) 2021, Hewlett Packard Development LP. All rights reserved.
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include 
+#include 
+#include 
+
+/**
+  This function causes a system-wide reset (cold reset), in which
+  all circuitry within the system returns to its initial state. This type of 
reset
+  is asynchronous to system operation and operates without regard to
+  cycle boundaries.
+
+  If this function returns, it means that the system does not support cold 
reset.
+**/
+VOID
+EFIAPI
+ResetCold (
+  VOID
+  )
+{
+  // Warm Reset via SBI ecall
+  SbiSystemReset (SBI_SRST_RESET_TYPE_COLD_REBOOT, SBI_SRST_RESET_REASON_NONE);
+}
+
+/**
+  This function causes a system-wide initialization (warm reset), in which all 
processors
+  are set to their initial state. Pending cycles are not corrupted.
+
+  If this function returns, it means that the system does not support warm 
reset.
+**/
+VOID
+EFIAPI
+ResetWarm (
+  VOID
+  )
+{
+  // Warm Reset via SBI ecall
+  SbiSystemReset (SBI_SRST_RESET_TYPE_WARM_REBOOT, SBI_SRST_RESET_REASON_NONE);
+}
+
+/**
+  This function causes the system to enter a power state equivalent
+  to the ACPI G2/S5 or G3 states.
+
+  If this function returns, it means that the system does not support shutdown 
reset.
+**/
+VOID
+EFIAPI
+ResetShutdown (
+  VOID
+  )
+{
+  // Shut down via SBI ecall
+  SbiSystemReset (SBI_SRST_RESET_TYPE_SHUTDOWN, SBI_SRST_RESET_REASON_NONE);
+}
+
+/**
+  This function causes a systemwide reset. The exact type of the reset is
+  defined by the EFI_GUID that follows the Null-terminated Unicode string 
passed
+  into ResetData. If the platform does not recognize the EFI_GUID in ResetData
+  the platform must pick a supported reset type to perform. The platform may
+  optionally log the parameters from any non-normal reset that occurs.
+
+  @param[in]  DataSize   The size, in bytes, of ResetData.
+  @param[in]  ResetData  The data buffer starts with a Null-terminated string,
+ followed by the EFI_GUID.
+**/
+VOID
+EFIAPI
+ResetPlatformSpecific (
+  IN UINTN  DataSize,
+  IN VOID   *ResetData
+  )
+{
+  //
+  // Can map to OpenSBI vendor or platform specific reset type.
+  //
+  return;
+}
+
+/**
+  The ResetSystem function resets the entire platform.
+
+  @param[in] ResetType  The type of reset to perform.
+  @param[in] ResetStatusThe status code for the reset.
+  @param[in] DataSize   The size, in bytes, of ResetData.
+  @param[in] ResetData  For a ResetType of EfiResetCold, EfiResetWarm, or 
EfiResetShutdown
+the data buffer starts with a Null-terminated 
string, optionally
+followed by additional binary data. The string is 
a description
+that the caller may use to further indicate the 
reason for the
+system reset.
+**/
+VOID
+EFIAPI
+ResetSystem (
+  IN EFI_RESET_TYPE  ResetType,
+  IN EFI_STATUS 

[edk2-devel] [RFC PATCH 10/17] UefiCpuPkg: Add RISC-V support in DxeCpuExceptionHandlerLib

2022-09-06 Thread Sunil V L
Add low level interfaces to register exception and interrupt handlers
for RISC-V.

Signed-off-by: Sunil V L 
---
 .../DxeCpuExceptionHandlerLib.inf |   7 +-
 .../RiscV64/CpuExceptionHandlerLib.c  | 136 ++
 .../RiscV64/CpuExceptionHandlerLib.h  | 112 +++
 .../RiscV64/SupervisorTrapHandler.S   | 105 ++
 4 files changed, 359 insertions(+), 1 deletion(-)
 create mode 100644 
UefiCpuPkg/Library/CpuExceptionHandlerLib/RiscV64/CpuExceptionHandlerLib.c
 create mode 100644 
UefiCpuPkg/Library/CpuExceptionHandlerLib/RiscV64/CpuExceptionHandlerLib.h
 create mode 100644 
UefiCpuPkg/Library/CpuExceptionHandlerLib/RiscV64/SupervisorTrapHandler.S

diff --git 
a/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib.inf 
b/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib.inf
index bf33d54bae..8570b83e8a 100644
--- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib.inf
+++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib.inf
@@ -18,7 +18,7 @@
 #
 # The following information is for reference only and not required by the 
build tools.
 #
-#  VALID_ARCHITECTURES   = IA32 X64
+#  VALID_ARCHITECTURES   = IA32 X64 RISCV64
 #
 
 [Sources.Ia32]
@@ -38,6 +38,11 @@
   PeiDxeSmmCpuException.c
   DxeException.c
 
+[Sources.RISCV64]
+  RiscV64/SupervisorTrapHandler.S
+  RiscV64/CpuExceptionHandlerLib.c
+  RiscV64/CpuExceptionHandlerLib.h
+
 [Pcd]
   gEfiMdeModulePkgTokenSpaceGuid.PcdCpuStackGuard
   gUefiCpuPkgTokenSpaceGuid.PcdCpuStackSwitchExceptionList
diff --git 
a/UefiCpuPkg/Library/CpuExceptionHandlerLib/RiscV64/CpuExceptionHandlerLib.c 
b/UefiCpuPkg/Library/CpuExceptionHandlerLib/RiscV64/CpuExceptionHandlerLib.c
new file mode 100644
index 00..f4427599a6
--- /dev/null
+++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/RiscV64/CpuExceptionHandlerLib.c
@@ -0,0 +1,136 @@
+/** @file
+  RISC-V Exception Handler library implementation.
+
+  Copyright (c) 2016 - 2022, Hewlett Packard Enterprise Development LP. All 
rights reserved.
+  Copyright (c) 2022, Ventana Micro Systems Inc. All rights reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "CpuExceptionHandlerLib.h"
+
+STATIC EFI_CPU_INTERRUPT_HANDLER  mInterruptHandlers[2];
+
+/**
+  Initializes all CPU exceptions entries and provides the default exception 
handlers.
+
+  Caller should try to get an array of interrupt and/or exception vectors that 
are in use and need to
+  persist by EFI_VECTOR_HANDOFF_INFO defined in PI 1.3 specification.
+  If caller cannot get reserved vector list or it does not exists, set 
VectorInfo to NULL.
+  If VectorInfo is not NULL, the exception vectors will be initialized per 
vector attribute accordingly.
+
+  @param[in]  VectorInfoPointer to reserved vector list.
+
+  @retval EFI_SUCCESS   CPU Exception Entries have been successfully 
initialized
+with default exception handlers.
+  @retval EFI_INVALID_PARAMETER VectorInfo includes the invalid content if 
VectorInfo is not NULL.
+  @retval EFI_UNSUPPORTED   This function is not supported.
+
+**/
+EFI_STATUS
+EFIAPI
+InitializeCpuExceptionHandlers (
+  IN EFI_VECTOR_HANDOFF_INFO  *VectorInfo OPTIONAL
+  )
+{
+  csr_write (CSR_STVEC, SupervisorModeTrap);
+  return EFI_SUCCESS;
+}
+
+
+/**
+  Registers a function to be called from the processor interrupt handler.
+
+  This function registers and enables the handler specified by 
InterruptHandler for a processor
+  interrupt or exception type specified by InterruptType. If InterruptHandler 
is NULL, then the
+  handler for the processor interrupt or exception type specified by 
InterruptType is uninstalled.
+  The installed handler is called once for each processor interrupt or 
exception.
+  NOTE: This function should be invoked after InitializeCpuExceptionHandlers() 
or
+  InitializeCpuInterruptHandlers() invoked, otherwise EFI_UNSUPPORTED returned.
+
+  @param[in]  InterruptType Defines which interrupt or exception to hook.
+  @param[in]  InterruptHandler  A pointer to a function of type 
EFI_CPU_INTERRUPT_HANDLER that is called
+when a processor interrupt occurs. If this 
parameter is NULL, then the handler
+will be uninstalled.
+
+  @retval EFI_SUCCESS   The handler for the processor interrupt was 
successfully installed or uninstalled.
+  @retval EFI_ALREADY_STARTED   InterruptHandler is not NULL, and a handler 
for InterruptType was
+previously installed.
+  @retval EFI_INVALID_PARAMETER InterruptHandler is NULL, and a handler for 
InterruptType was not
+previously installed.
+  @retval EFI_UNSUPPORTED   The interrupt specified by InterruptType is 
not supported,
+or this 

[edk2-devel] [RFC PATCH 09/17] UefiCpuPkg/DxeCpuExceptionHandlerLib: Refactor to add other architectures

2022-09-06 Thread Sunil V L
Currently the common sources mean x86 only in this library. To add
support for other architectures like RISC-V, we need to build these
files only for x86.

Signed-off-by: Sunil V L 
---
 .../CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib.inf| 6 --
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git 
a/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib.inf 
b/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib.inf
index e7a81bebdb..bf33d54bae 100644
--- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib.inf
+++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib.inf
@@ -32,7 +32,7 @@
   X64/ArchExceptionHandler.c
   X64/ArchInterruptDefs.h
 
-[Sources.common]
+[Sources.IA32, Sources.X64]
   CpuExceptionCommon.h
   CpuExceptionCommon.c
   PeiDxeSmmCpuException.c
@@ -56,8 +56,10 @@
   SerialPortLib
   PrintLib
   SynchronizationLib
-  LocalApicLib
   PeCoffGetEntryPointLib
   MemoryAllocationLib
   DebugLib
+
+[LibraryClasses.IA32, LibraryClasses.X64]
+  LocalApicLib
   VmgExitLib
-- 
2.25.1



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[edk2-devel] [RFC PATCH 08/17] MdePkg: Add RiscVSbiLib Library for RISC-V

2022-09-06 Thread Sunil V L
This library is required to make SBI ecalls from the S-mode EDK2.

Signed-off-by: Sunil V L 
---
 MdePkg/Include/Library/RiscVSbiLib.h   | 129 
 MdePkg/Library/RiscVSbiLib/RiscVSbiLib.c   | 228 +
 MdePkg/Library/RiscVSbiLib/RiscVSbiLib.inf |  28 +++
 3 files changed, 385 insertions(+)
 create mode 100644 MdePkg/Include/Library/RiscVSbiLib.h
 create mode 100644 MdePkg/Library/RiscVSbiLib/RiscVSbiLib.c
 create mode 100644 MdePkg/Library/RiscVSbiLib/RiscVSbiLib.inf

diff --git a/MdePkg/Include/Library/RiscVSbiLib.h 
b/MdePkg/Include/Library/RiscVSbiLib.h
new file mode 100644
index 00..e94adb08fd
--- /dev/null
+++ b/MdePkg/Include/Library/RiscVSbiLib.h
@@ -0,0 +1,129 @@
+/** @file
+  Library to call the RISC-V SBI ecalls
+
+  Copyright (c) 2021-2022, Hewlett Packard Development LP. All rights 
reserved.
+  Copyright (c) 2022, Ventana Micro Systems Inc. All rights reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+  @par Glossary:
+- Hart - Hardware Thread, similar to a CPU core
+
+  Currently, EDK2 needs to call SBI only to set the time and to do system 
reset.
+
+**/
+
+#ifndef RISCV_SBI_LIB_H_
+#define RISCV_SBI_LIB_H_
+
+#include 
+
+/* SBI Extension IDs */
+#define SBI_EXT_TIME   0x54494D45
+#define SBI_EXT_SRST   0x53525354
+
+/* SBI function IDs for TIME extension*/
+#define SBI_EXT_TIME_SET_TIMER  0x0
+
+/* SBI function IDs for SRST extension */
+#define SBI_EXT_SRST_RESET  0x0
+
+#define SBI_SRST_RESET_TYPE_SHUTDOWN0x0
+#define SBI_SRST_RESET_TYPE_COLD_REBOOT 0x1
+#define SBI_SRST_RESET_TYPE_WARM_REBOOT 0x2
+#define SBI_SRST_RESET_TYPE_LAST SBI_SRST_RESET_TYPE_WARM_REBOOT
+
+#define SBI_SRST_RESET_REASON_NONE  0x0
+#define SBI_SRST_RESET_REASON_SYSFAIL   0x1
+
+/* SBI return error codes */
+#define SBI_SUCCESS  0
+#define SBI_ERR_FAILED  -1
+#define SBI_ERR_NOT_SUPPORTED   -2
+#define SBI_ERR_INVALID_PARAM   -3
+#define SBI_ERR_DENIED  -4
+#define SBI_ERR_INVALID_ADDRESS -5
+#define SBI_ERR_ALREADY_AVAILABLE   -6
+#define SBI_ERR_ALREADY_STARTED -7
+#define SBI_ERR_ALREADY_STOPPED -8
+
+#define SBI_LAST_ERR SBI_ERR_ALREADY_STOPPED
+
+typedef struct {
+  UINT64 BootHartId;
+  VOID   *PeiServiceTable;// PEI Service table
+  UINT64 FlattenedDeviceTree; // Pointer to Flattened Device tree
+} EFI_RISCV_FIRMWARE_CONTEXT;
+
+
+//
+// EDK2 OpenSBI firmware extension return status.
+//
+typedef struct {
+  UINTNError; ///< SBI status code
+  UINTNValue; ///< Value returned
+} SBI_RET;
+
+VOID
+EFIAPI
+SbiSetTimer (
+  IN  UINT64  Time
+  );
+
+EFI_STATUS
+EFIAPI
+SbiSystemReset (
+  IN  UINTN  ResetType,
+  IN  UINTN  ResetReason
+  );
+
+/**
+  Get firmware context of the calling hart.
+
+  @param[out] FirmwareContext  The firmware context pointer.
+**/
+VOID
+EFIAPI
+GetFirmwareContext (
+  OUT EFI_RISCV_FIRMWARE_CONTEXT  **FirmwareContext
+  );
+
+/**
+  Set firmware context of the calling hart.
+
+  @param[in] FirmwareContext   The firmware context pointer.
+**/
+VOID
+EFIAPI
+SetFirmwareContext (
+  IN EFI_RISCV_FIRMWARE_CONTEXT  *FirmwareContext
+  );
+
+/**
+  Get pointer to OpenSBI Firmware Context
+
+  Get the pointer of firmware context.
+
+  @paramFirmwareContextPtr   Pointer to retrieve pointer to the
+ Firmware Context.
+**/
+VOID
+EFIAPI
+GetFirmwareContextPointer (
+  IN OUT EFI_RISCV_FIRMWARE_CONTEXT  **FirmwareContextPtr
+  );
+
+/**
+  Set pointer to OpenSBI Firmware Context
+
+  Set the pointer of firmware context.
+
+  @paramFirmwareContextPtr   Pointer to Firmware Context.
+**/
+VOID
+EFIAPI
+SetFirmwareContextPointer (
+  IN EFI_RISCV_FIRMWARE_CONTEXT  *FirmwareContextPtr
+  );
+
+#endif
diff --git a/MdePkg/Library/RiscVSbiLib/RiscVSbiLib.c 
b/MdePkg/Library/RiscVSbiLib/RiscVSbiLib.c
new file mode 100644
index 00..39cc6628be
--- /dev/null
+++ b/MdePkg/Library/RiscVSbiLib/RiscVSbiLib.c
@@ -0,0 +1,228 @@
+/** @file
+  Instance of the SBI ecall library.
+
+  It allows calling an SBI function via an ecall from S-Mode.
+
+  Copyright (c) 2021-2022, Hewlett Packard Development LP. All rights 
reserved.
+  Copyright (c) 2022, Ventana Micro Systems Inc. All rights reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include 
+#include 
+#include 
+#include 
+
+//
+// Maximum arguments for SBI ecall
+// It's possible to pass more but no SBI call uses more as of SBI 0.2.
+// The additional arguments would have to be passed on the stack instead of as
+// registers, like it's done now.
+//
+#define SBI_CALL_MAX_ARGS  6
+
+/**
+  Call SBI call using ecall instruction.
+
+  Asserts when NumArgs exceeds SBI_CALL_MAX_ARGS.
+
+  @param[in] ExtIdSBI extension ID.
+  @param[in] FuncId   SBI 

[edk2-devel] [RFC PATCH 07/17] MdePkg: Add ArchTimerLib library

2022-09-06 Thread Sunil V L
This library implements the TimerLib.h functionality. This library
is similar to CpuTimerLib but needs the library constructor.

Signed-off-by: Sunil V L 
---
 MdePkg/Library/ArchTimerLib/ArchTimerLib.inf  |  40 +++
 MdePkg/Library/ArchTimerLib/ArchTimerLib.uni  |  14 +
 .../ArchTimerLib/RiscV64/CpuTimerLib.c| 299 ++
 3 files changed, 353 insertions(+)
 create mode 100644 MdePkg/Library/ArchTimerLib/ArchTimerLib.inf
 create mode 100644 MdePkg/Library/ArchTimerLib/ArchTimerLib.uni
 create mode 100644 MdePkg/Library/ArchTimerLib/RiscV64/CpuTimerLib.c

diff --git a/MdePkg/Library/ArchTimerLib/ArchTimerLib.inf 
b/MdePkg/Library/ArchTimerLib/ArchTimerLib.inf
new file mode 100644
index 00..b61ae58d01
--- /dev/null
+++ b/MdePkg/Library/ArchTimerLib/ArchTimerLib.inf
@@ -0,0 +1,40 @@
+## @file
+# Timer Library Instance which needs a constructor for the architecture.
+#
+#  Copyright (c) 2016 - 2019, Hewlett Packard Enterprise Development LP. All 
rights reserved.
+#  Copyright (c) 2022, Ventana Micro System Inc. All rights reserved.
+#
+#  SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+  INF_VERSION  = 0x0001001b
+  BASE_NAME= ArchTimerLib
+  FILE_GUID= D3CF51A9-1CEA-4776-A8AB-CCFD14D7DAAF
+  MODULE_TYPE  = BASE
+  VERSION_STRING   = 1.0
+  LIBRARY_CLASS= TimerLib
+  MODULE_UNI_FILE  = ArchTimerLib.uni
+  CONSTRUCTOR  = ArchTimerLibConstructor
+
+[Sources.RISCV64]
+  RiscV64/CpuTimerLib.c
+
+[Packages]
+  MdePkg/MdePkg.dec
+  MdeModulePkg/MdeModulePkg.dec
+  UefiCpuPkg/UefiCpuPkg.dec
+  EmbeddedPkg/EmbeddedPkg.dec
+
+[LibraryClasses]
+  BaseLib
+  DebugLib
+  FdtLib
+  HobLib
+
+[Pcd]
+  gUefiCpuPkgTokenSpaceGuid.PcdRiscVTimerFrequencyInHz  ## CONSUMES
+
+[Guids]
+  gFdtHobGuid
diff --git a/MdePkg/Library/ArchTimerLib/ArchTimerLib.uni 
b/MdePkg/Library/ArchTimerLib/ArchTimerLib.uni
new file mode 100644
index 00..1c900bea42
--- /dev/null
+++ b/MdePkg/Library/ArchTimerLib/ArchTimerLib.uni
@@ -0,0 +1,14 @@
+// /** @file
+// Base CPU Timer Library
+//
+// Provides basic timer support using architecture specific methods.
+//
+// Copyright (c) 2022, Ventana Micro Systems Inc. All rights reserved.
+//
+// SPDX-License-Identifier: BSD-2-Clause-Patent
+//
+// **/
+
+#string STR_MODULE_ABSTRACT #language en-US "CPU Timer Library"
+
+#string STR_MODULE_DESCRIPTION  #language en-US "Provides basic timer 
support using architecture specific methods"
diff --git a/MdePkg/Library/ArchTimerLib/RiscV64/CpuTimerLib.c 
b/MdePkg/Library/ArchTimerLib/RiscV64/CpuTimerLib.c
new file mode 100644
index 00..a81ac8c37c
--- /dev/null
+++ b/MdePkg/Library/ArchTimerLib/RiscV64/CpuTimerLib.c
@@ -0,0 +1,299 @@
+/** @file
+  RISC-V instance of Timer Library.
+
+  Copyright (c) 2016 - 2022, Hewlett Packard Enterprise Development LP. All 
rights reserved.
+  Copyright (c) 2022, Ventana Micro Systems Inc. All rights reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+
+STATIC UINT32 mTimeBaseFrequency;
+STATIC BOOLEAN mTimeBaseFreqInitialized;
+
+UINT32
+InternalGetTimerFrequency(
+  VOID
+  )
+{
+  return mTimeBaseFrequency;
+}
+
+
+/**
+  Stalls the CPU for at least the given number of ticks.
+
+  Stalls the CPU for at least the given number of ticks. It's invoked by
+  MicroSecondDelay() and NanoSecondDelay().
+
+  @param  Delay A period of time to delay in ticks.
+
+**/
+VOID
+InternalRiscVTimerDelay (
+  IN UINT32  Delay
+  )
+{
+  UINT32  Ticks;
+  UINT32  Times;
+
+  Times  = Delay >> (RISCV_TIMER_COMPARE_BITS - 2);
+  Delay &= ((1 << (RISCV_TIMER_COMPARE_BITS - 2)) - 1);
+  do {
+//
+// The target timer count is calculated here
+//
+Ticks = csr_read(CSR_TIME) + Delay;
+Delay = 1 << (RISCV_TIMER_COMPARE_BITS - 2);
+while (((Ticks - csr_read(CSR_TIME)) & (1 << (RISCV_TIMER_COMPARE_BITS - 
1))) == 0) {
+  CpuPause ();
+}
+  } while (Times-- > 0);
+}
+
+/**
+  Stalls the CPU for at least the given number of microseconds.
+
+  Stalls the CPU for the number of microseconds specified by MicroSeconds.
+
+  @param  MicroSeconds  The minimum number of microseconds to delay.
+
+  @return MicroSeconds
+
+**/
+UINTN
+EFIAPI
+MicroSecondDelay (
+  IN UINTN  MicroSeconds
+  )
+{
+  InternalRiscVTimerDelay (
+(UINT32)DivU64x32 (
+  MultU64x32 (
+MicroSeconds,
+InternalGetTimerFrequency()
+),
+  100u
+  )
+);
+  return MicroSeconds;
+}
+
+/**
+  Stalls the CPU for at least the given number of nanoseconds.
+
+  Stalls the CPU for the number of nanoseconds specified by NanoSeconds.
+
+  @param  NanoSeconds The minimum number of nanoseconds to delay.
+
+  @return NanoSeconds
+
+**/
+UINTN
+EFIAPI
+NanoSecondDelay (
+  IN UINTN  

[edk2-devel] [RFC PATCH 06/17] MdePkg/BaseLib: RISC-V: Add generic CPU related functions

2022-09-06 Thread Sunil V L
EDK2 in S-mode needs to use SSCRATCH register. Implement functions
to set/get the SSCRATCH register.

Signed-off-by: Sunil V L 
---
 MdePkg/Include/Library/BaseLib.h| 10 
 MdePkg/Library/BaseLib/BaseLib.inf  |  1 +
 MdePkg/Library/BaseLib/RiscV64/CpuGen.S | 33 +
 3 files changed, 44 insertions(+)
 create mode 100644 MdePkg/Library/BaseLib/RiscV64/CpuGen.S

diff --git a/MdePkg/Include/Library/BaseLib.h b/MdePkg/Include/Library/BaseLib.h
index a6f9a194ef..a742de61a4 100644
--- a/MdePkg/Include/Library/BaseLib.h
+++ b/MdePkg/Include/Library/BaseLib.h
@@ -150,6 +150,16 @@ typedef struct {
 
 #define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT  8
 
+VOID
+RiscVSetSupervisorScratch (
+  UINT64
+  );
+
+UINT64
+RiscVGetSupervisorScratch (
+  VOID
+  );
+
 #endif // defined (MDE_CPU_RISCV64)
 
 //
diff --git a/MdePkg/Library/BaseLib/BaseLib.inf 
b/MdePkg/Library/BaseLib/BaseLib.inf
index 6be5be9428..5429329e39 100644
--- a/MdePkg/Library/BaseLib/BaseLib.inf
+++ b/MdePkg/Library/BaseLib/BaseLib.inf
@@ -401,6 +401,7 @@
   RiscV64/RiscVCpuPause.S   | GCC
   RiscV64/RiscVInterrupt.S  | GCC
   RiscV64/FlushCache.S  | GCC
+  RiscV64/CpuGen.S  | GCC
 
 [Packages]
   MdePkg/MdePkg.dec
diff --git a/MdePkg/Library/BaseLib/RiscV64/CpuGen.S 
b/MdePkg/Library/BaseLib/RiscV64/CpuGen.S
new file mode 100644
index 00..d11929cf32
--- /dev/null
+++ b/MdePkg/Library/BaseLib/RiscV64/CpuGen.S
@@ -0,0 +1,33 @@
+//--
+//
+// Generic CPU related functions for RISC-V
+//
+// Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights 
reserved.
+// Copyright (c) 2022, Ventana Micro Systems Inc. All rights reserved.
+//
+// SPDX-License-Identifier: BSD-2-Clause-Patent
+//
+//--
+
+#include 
+#include 
+
+.data
+.align 3
+.section .text
+
+//
+// Set Supervisor mode scratch.
+// @param a0 : Value set to Supervisor mode scratch
+//
+ASM_FUNC (RiscVSetSupervisorScratch)
+csrrw a1, CSR_SSCRATCH, a0
+ret
+
+//
+// Get Supervisor mode scratch.
+// @retval a0 : Value in Supervisor mode scratch
+//
+ASM_FUNC (RiscVGetSupervisorScratch)
+csrr a0, CSR_SSCRATCH
+ret
-- 
2.25.1



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[edk2-devel] [RFC PATCH 05/17] UefiCpuPkg.dec: Add PCD variable for RISC-V

2022-09-06 Thread Sunil V L
RISC-V platforms need PCD variable to indicate the mtimer
frequency which will be consumed by CpuDxe and TimerLib.

Signed-off-by: Sunil V L 
---
 UefiCpuPkg/UefiCpuPkg.dec | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/UefiCpuPkg/UefiCpuPkg.dec b/UefiCpuPkg/UefiCpuPkg.dec
index 718323d904..5e94bde5fe 100644
--- a/UefiCpuPkg/UefiCpuPkg.dec
+++ b/UefiCpuPkg/UefiCpuPkg.dec
@@ -350,6 +350,9 @@
   # @Prompt Access to non-SMRAM memory is restricted to reserved, runtime and 
ACPI NVS type after SmmReadyToLock.
   
gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmRestrictedMemoryAccess|TRUE|BOOLEAN|0x3213210F
 
+[PcdsFixedAtBuild.RISCV64]
+  gUefiCpuPkgTokenSpaceGuid.PcdRiscVTimerFrequencyInHz|0|UINT32|0x5000
+
 [PcdsDynamic, PcdsDynamicEx]
   ## Contains the pointer to a CPU S3 data buffer of structure ACPI_CPU_DATA.
   # @Prompt The pointer to a CPU S3 data buffer.
-- 
2.25.1



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[edk2-devel] [RFC PATCH 04/17] MdeModulePkg/MdeModulePkg.dec: Add PCD variables for RISC-V

2022-09-06 Thread Sunil V L
Add few PCD variables for RISC-V platforms to indicate the
memory locations of the firmware volumes, temporary RAM etc.

Signed-off-by: Sunil V L 
---
 MdeModulePkg/MdeModulePkg.dec | 13 +
 1 file changed, 13 insertions(+)

diff --git a/MdeModulePkg/MdeModulePkg.dec b/MdeModulePkg/MdeModulePkg.dec
index 7d98910832..557fc2f3d4 100644
--- a/MdeModulePkg/MdeModulePkg.dec
+++ b/MdeModulePkg/MdeModulePkg.dec
@@ -2176,5 +2176,18 @@
   # @Prompt 64bit VPD base address.
   gEfiMdeModulePkgTokenSpaceGuid.PcdVpdBaseAddress64|0x0|UINT64|0x00030006
 
+[PcdsFixedAtBuild.RISCV64]
+  gEfiMdeModulePkgTokenSpaceGuid.PcdSecMemFvBase|0|UINT32|0x5000
+  gEfiMdeModulePkgTokenSpaceGuid.PcdSecMemFvSize|0|UINT32|0x5001
+  gEfiMdeModulePkgTokenSpaceGuid.PcdPeiMemFvBase|0|UINT32|0x5003
+  gEfiMdeModulePkgTokenSpaceGuid.PcdPeiMemFvSize|0|UINT32|0x5004
+  gEfiMdeModulePkgTokenSpaceGuid.PcdDxeMemFvBase|0|UINT32|0x5005
+  gEfiMdeModulePkgTokenSpaceGuid.PcdDxeMemFvSize|0|UINT32|0x5006
+  gEfiMdeModulePkgTokenSpaceGuid.PcdVariableFdBaseAddress|0|UINT32|0x5007
+  gEfiMdeModulePkgTokenSpaceGuid.PcdVariableFdSize|0|UINT32|0x5008
+  gEfiMdeModulePkgTokenSpaceGuid.PcdVariableFdBlockSize|0|UINT32|0x5009
+  gEfiMdeModulePkgTokenSpaceGuid.PcdSecPeiTempRamBase|0|UINT32|0x500a
+  gEfiMdeModulePkgTokenSpaceGuid.PcdSecPeiTempRamSize|0|UINT32|0x500b
+
 [UserExtensions.TianoCore."ExtraFiles"]
   MdeModulePkgExtra.uni
-- 
2.25.1



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[edk2-devel] [RFC PATCH 03/17] MdePkg/Protocol: Add RiscVBootProtocol.h

2022-09-06 Thread Sunil V L
RISC-V UEFI platforms need to implement RISCV_EFI_BOOT_PROTOCOL.
Add header file with the definitions of this protocol.

Signed-off-by: Sunil V L 
---
 MdePkg/Include/Protocol/RiscVBootProtocol.h | 35 +
 1 file changed, 35 insertions(+)
 create mode 100644 MdePkg/Include/Protocol/RiscVBootProtocol.h

diff --git a/MdePkg/Include/Protocol/RiscVBootProtocol.h 
b/MdePkg/Include/Protocol/RiscVBootProtocol.h
new file mode 100644
index 00..7ceb7d8309
--- /dev/null
+++ b/MdePkg/Include/Protocol/RiscVBootProtocol.h
@@ -0,0 +1,35 @@
+
+/** @file
+  RISC-V Boot Protocol mandatory for RISC-V UEFI platforms.
+
+  Specification available at
+   
https://github.com/riscv-non-isa/riscv-uefi/releases/download/1.0.0/RISCV_UEFI_PROTOCOL-spec.pdf
+
+  Copyright (c) 2022, Ventana Micro Systems Inc. All rights reserved.
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef _RISCV_BOOT_PROTOCOL_H_
+#define _RISCV_BOOT_PROTOCOL_H_
+
+//extern EFI_GUID  gRiscVEfiBootProtocolGuid;
+
+typedef struct _RISCV_EFI_BOOT_PROTOCOL RISCV_EFI_BOOT_PROTOCOL;
+
+#define RISCV_EFI_BOOT_PROTOCOL_REVISION 0x0001
+#define RISCV_EFI_BOOT_PROTOCOL_LATEST_VERSION \
+RISCV_EFI_BOOT_PROTOCOL_REVISION
+
+typedef EFI_STATUS
+(EFIAPI *EFI_GET_BOOT_HARTID) (
+  IN RISCV_EFI_BOOT_PROTOCOL   *This,
+  OUT UINTN*BootHartId
+  );
+
+typedef struct _RISCV_EFI_BOOT_PROTOCOL {
+  UINT64Revision;
+  EFI_GET_BOOT_HARTID   GetBootHartId;
+} RISCV_EFI_BOOT_PROTOCOL;
+
+#endif
-- 
2.25.1



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[edk2-devel] [RFC PATCH 02/17] MdePkg/MdePkg.dec: Add RISCV_EFI_BOOT_PROTOCOL GUID

2022-09-06 Thread Sunil V L
RISC-V UEFI based platforms need to support RISCV_EFI_BOOT_PROTOCOL.
Add this protocol GUID definition.

Signed-off-by: Sunil V L 
---
 MdePkg/MdePkg.dec | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/MdePkg/MdePkg.dec b/MdePkg/MdePkg.dec
index f1ebf9e251..3010557bd8 100644
--- a/MdePkg/MdePkg.dec
+++ b/MdePkg/MdePkg.dec
@@ -1915,6 +1915,12 @@
   ## Include/Protocol/ShellDynamicCommand.h
   gEfiShellDynamicCommandProtocolGuid  = { 0x3c7200e9, 0x005f, 0x4ea4, {0x87, 
0xde, 0xa3, 0xdf, 0xac, 0x8a, 0x27, 0xc3 }}
 
+  #
+  # Protocols defined for RISC-V systems
+  #
+  ## Include/Protocol/RiscVBootProtocol.h
+  gRiscVEfiBootProtocolGuid  = { 0xccd15fec, 0x6f73, 0x4eec, { 0x83, 0x95, 
0x3e, 0x69, 0xe4, 0xb9, 0x40, 0xbf}}
+
 #
 # [Error.gEfiMdePkgTokenSpaceGuid]
 #   0x8001 | Invalid value provided.
-- 
2.25.1



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[edk2-devel] [RFC PATCH 01/17] MdePkg/Register: Add register definition header files for RISC-V

2022-09-06 Thread Sunil V L
Add register definitions and access routines for RISC-V. These
headers are leveraged from opensbi repo.

Signed-off-by: Sunil V L 
---
 MdePkg/Include/Register/RiscV64/RiscVAsm.h| 104 ++
 MdePkg/Include/Register/RiscV64/RiscVConst.h  |  46 +++
 .../Include/Register/RiscV64/RiscVEncoding.h  | 129 ++
 MdePkg/Include/Register/RiscV64/RiscVImpl.h   |  24 
 4 files changed, 303 insertions(+)
 create mode 100644 MdePkg/Include/Register/RiscV64/RiscVAsm.h
 create mode 100644 MdePkg/Include/Register/RiscV64/RiscVConst.h
 create mode 100644 MdePkg/Include/Register/RiscV64/RiscVEncoding.h
 create mode 100644 MdePkg/Include/Register/RiscV64/RiscVImpl.h

diff --git a/MdePkg/Include/Register/RiscV64/RiscVAsm.h 
b/MdePkg/Include/Register/RiscV64/RiscVAsm.h
new file mode 100644
index 00..e566061b73
--- /dev/null
+++ b/MdePkg/Include/Register/RiscV64/RiscVAsm.h
@@ -0,0 +1,104 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2019 Western Digital Corporation or its affiliates.
+ * Copyright (c) 2022 Ventana Micro Systems Inc.
+ *
+ * Authors:
+ *   Anup Patel 
+ */
+
+#ifndef __RISCV_ASM_H__
+#define __RISCV_ASM_H__
+
+#include 
+
+#ifdef __ASSEMBLER__
+#define __ASM_STR(x)x
+#else
+#define __ASM_STR(x)#x
+#endif
+
+#ifndef __ASSEMBLER__
+
+#define csr_swap(csr, val)  \
+  ({\
+unsigned long __v = (unsigned long)(val);   \
+__asm__ __volatile__("csrrw %0, " __ASM_STR(csr) ", %1" \
+ : "=r"(__v)\
+ : "rK"(__v)\
+ : "memory");   \
+__v;\
+  })
+
+#define csr_read(csr)   \
+  ({\
+register unsigned long __v; \
+__asm__ __volatile__("csrr %0, " __ASM_STR(csr) \
+ : "=r"(__v)\
+ :  \
+ : "memory");   \
+__v;\
+  })
+
+#define csr_write(csr, val)\
+  ({   \
+unsigned long __v = (unsigned long)(val);  \
+__asm__ __volatile__("csrw " __ASM_STR(csr) ", %0" \
+ : \
+ : "rK"(__v)   \
+ : "memory");  \
+  })
+
+#define csr_read_set(csr, val)  \
+  ({\
+unsigned long __v = (unsigned long)(val);   \
+__asm__ __volatile__("csrrs %0, " __ASM_STR(csr) ", %1" \
+ : "=r"(__v)\
+ : "rK"(__v)\
+ : "memory");   \
+__v;\
+  })
+
+#define csr_set(csr, val)  \
+  ({   \
+unsigned long __v = (unsigned long)(val);  \
+__asm__ __volatile__("csrs " __ASM_STR(csr) ", %0" \
+ : \
+ : "rK"(__v)   \
+ : "memory");  \
+  })
+
+#define csr_read_clear(csr, val)\
+  ({\
+unsigned long __v = (unsigned long)(val);   \
+__asm__ __volatile__("csrrc %0, " __ASM_STR(csr) ", %1" \
+ : "=r"(__v)\
+ : "rK"(__v)\
+ : "memory");   \
+__v;\
+  })
+
+#define csr_clear(csr, val)\
+  ({   \
+unsigned long __v = (unsigned long)(val);  \
+__asm__ __volatile__("csrc " __ASM_STR(csr) ", %0" \
+ : \
+ : "rK"(__v)   \
+ : "memory");  \
+  })
+
+#define wfi() \
+  do {\
+__asm__ __volatile__("wfi" ::: "memory"); \
+  } while (0)
+
+#define ebreak() \
+  do {   \
+__asm__ __volatile__("ebreak" ::: "memory"); \
+  } while (0)
+
+
+#endif /* !__ASSEMBLER__ */
+
+#endif
diff --git a/MdePkg/Include/Register/RiscV64/RiscVConst.h 

[edk2-devel][edk2-platforms][PATCH v2 6/6] KabylakeOpenBoardPkg: Example of board S3

2022-09-06 Thread Benjamin Doron
Use silicon code to detect S3 resume state. Apply some relevant policy
modifications.

PcdPeiMemSize must be in common scope, for a DXE module to allocate
required memory. Libraries that produce required PPIs are defined.

BootScriptExecutorDxe should only be linked against a functionally
compatible debug stack.

Cc: Nate DeSimone 
Cc: Ankit Sinha 
Cc: Chasel Chiu 
Cc: Jeremy Soller 
Cc: Sai Chaganty 
Cc: Isaac Oram 
Signed-off-by: Benjamin Doron 
---
 .../PeiFspMiscUpdUpdateLib.c  | 12 +++-
 .../PeiSaPolicyUpdate.c   | 12 +++-
 .../PeiAspireVn7Dash572GInitPreMemLib.c   | 61 ++-
 .../BoardInitLib/PeiBoardInitPreMemLib.inf|  3 +
 .../AspireVn7Dash572G/OpenBoardPkg.dsc| 21 +++
 .../AspireVn7Dash572G/OpenBoardPkgPcd.dsc | 16 ++---
 .../PeiSiliconPolicyUpdateLib.c   | 11 +++-
 .../PeiSiliconPolicyUpdateLib.inf |  1 +
 .../PeiFspMiscUpdUpdateLib.c  | 11 +++-
 .../PeiSaPolicyUpdate.c   | 12 +++-
 .../BoardInitLib/PeiBoardInitPreMemLib.inf|  1 +
 .../BoardInitLib/PeiGalagoPro3InitPreMemLib.c | 27 +++-
 .../PeiMultiBoardInitPreMemLib.inf|  1 +
 .../GalagoPro3/OpenBoardPkg.dsc   | 15 +
 .../GalagoPro3/OpenBoardPkgPcd.dsc|  2 +-
 .../PeiFspMiscUpdUpdateLib.c  | 12 +++-
 .../PeiSaPolicyUpdate.c   | 12 +++-
 .../BoardInitLib/PeiBoardInitPreMemLib.inf|  1 +
 .../PeiKabylakeRvp3InitPreMemLib.c| 27 +++-
 .../PeiMultiBoardInitPreMemLib.inf|  1 +
 .../KabylakeRvp3/OpenBoardPkg.dsc | 12 
 .../KabylakeRvp3/OpenBoardPkgPcd.dsc  |  2 +-
 .../PeiSiliconPolicyUpdateLib.c   | 11 +++-
 .../PeiSiliconPolicyUpdateLib.inf |  1 +
 24 files changed, 245 insertions(+), 40 deletions(-)

diff --git 
a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/FspWrapper/Library/PeiSiliconPolicyUpdateLibFsp/PeiFspMiscUpdUpdateLib.c
 
b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/FspWrapper/Library/PeiSiliconPolicyUpdateLibFsp/PeiFspMiscUpdUpdateLib.c
index a9b7e446c8d6..7e4194bf4fe6 100644
--- 
a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/FspWrapper/Library/PeiSiliconPolicyUpdateLibFsp/PeiFspMiscUpdUpdateLib.c
+++ 
b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/FspWrapper/Library/PeiSiliconPolicyUpdateLibFsp/PeiFspMiscUpdUpdateLib.c
@@ -11,6 +11,8 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
 #include 
 #include 
 #include 
+#include 
+
 #include 
 #include 
 #include 
@@ -32,11 +34,15 @@ PeiFspMiscUpdUpdatePreMem (
   )
 {
   EFI_STATUSStatus;
+  EFI_BOOT_MODE BootMode;
   UINTN VariableSize;
   VOID  *FspNvsBufferPtr;
   UINT8 MorControl;
   VOID  *MorControlPtr;
 
+  Status = PeiServicesGetBootMode ();
+  ASSERT_EFI_ERROR (Status);
+
   //
   // Initialize S3 Data variable (S3DataPtr). It may be used for warm and fast 
boot paths.
   //
@@ -70,7 +76,11 @@ PeiFspMiscUpdUpdatePreMem (
  
  );
   DEBUG ((DEBUG_INFO, "MorControl - 0x%x (%r)\n", MorControl, Status));
-  if (MOR_CLEAR_MEMORY_VALUE (MorControl)) {
+  //
+  // Do not set CleanMemory on S3 resume
+  // TODO: Handle advanced features later - capsule update is in-memory list
+  //
+  if (MOR_CLEAR_MEMORY_VALUE (MorControl) && BootMode != BOOT_ON_S3_RESUME) {
 FspmUpd->FspmConfig.CleanMemory = (BOOLEAN)(MorControl & 
MOR_CLEAR_MEMORY_BIT_MASK);
   }
 
diff --git 
a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/FspWrapper/Library/PeiSiliconPolicyUpdateLibFsp/PeiSaPolicyUpdate.c
 
b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/FspWrapper/Library/PeiSiliconPolicyUpdateLibFsp/PeiSaPolicyUpdate.c
index 4621cbd3ca3a..1299bf504fbd 100644
--- 
a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/FspWrapper/Library/PeiSiliconPolicyUpdateLibFsp/PeiSaPolicyUpdate.c
+++ 
b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/FspWrapper/Library/PeiSiliconPolicyUpdateLibFsp/PeiSaPolicyUpdate.c
@@ -11,6 +11,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
 #include 
 #include 
 #include 
+#include 
 
 /**
   Performs FSP SA PEI Policy initialization.
@@ -27,12 +28,17 @@ PeiFspSaPolicyUpdate (
   IN OUT FSPS_UPD*FspsUpd
   )
 {
+  EFI_STATUS  Status;
+  EFI_BOOT_MODE   BootMode;
   VOID*Buffer;
   VOID*MemBuffer;
   UINT32  Size;
 
   DEBUG((DEBUG_INFO, "\nUpdating SA Policy in Post Mem\n"));
 
+  Status = PeiServicesGetBootMode ();
+  ASSERT_EFI_ERROR (Status);
+
 FspsUpd->FspsConfig.PeiGraphicsPeimInit = 1;
 
 Size   = 0;
@@ -40,7 +46,11 @@ PeiFspSaPolicyUpdate (
 PeiGetSectionFromAnyFv (PcdGetPtr (PcdGraphicsVbtGuid), EFI_SECTION_RAW, 
0, , 

[edk2-devel][edk2-platforms][PATCH v2 5/6] MinPlatformPkg: Implement working S3 resume

2022-09-06 Thread Benjamin Doron
Consume S3 resume memory allocation on resume flow.

Also, include complementary FirmwarePerformanceDataTablePei module in
MinPlatform FV for S3 resume performance measurement.

Cc: Chasel Chiu 
Cc: Nate DeSimone 
Cc: Ankit Sinha 
Cc: Isaac Oram 
Cc: Liming Gao 
Cc: Eric Dong 
Signed-off-by: Benjamin Doron 
---
 .../FspWrapperHobProcessLib.c | 69 ++-
 .../PeiFspWrapperHobProcessLib.inf|  2 +
 .../Include/Dsc/CorePeiInclude.dsc|  2 +
 .../Include/Fdf/CorePostMemoryInclude.fdf |  2 +
 4 files changed, 74 insertions(+), 1 deletion(-)

diff --git 
a/Platform/Intel/MinPlatformPkg/FspWrapper/Library/PeiFspWrapperHobProcessLib/FspWrapperHobProcessLib.c
 
b/Platform/Intel/MinPlatformPkg/FspWrapper/Library/PeiFspWrapperHobProcessLib/FspWrapperHobProcessLib.c
index 7ee4d3a31c49..9bd6fe6290c5 100644
--- 
a/Platform/Intel/MinPlatformPkg/FspWrapper/Library/PeiFspWrapperHobProcessLib/FspWrapperHobProcessLib.c
+++ 
b/Platform/Intel/MinPlatformPkg/FspWrapper/Library/PeiFspWrapperHobProcessLib/FspWrapperHobProcessLib.c
@@ -16,14 +16,17 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
 #include 
 #include 
 #include 
+#include 
 
 #include 
+#include 
 
 //
 // Additional pages are used by DXE memory manager.
@@ -130,6 +133,55 @@ GetPeiMemSize (
   return MinSize + Size + PEI_ADDITIONAL_MEMORY_SIZE;
 }
 
+/**
+  Get S3 PEI memory information.
+
+  @note At this point, memory is ready, and PeiServices are available to use.
+  Platform can get some data from SMRAM directly.
+
+  @param[out] S3PeiMemSize  PEI memory size to be installed in S3 phase.
+  @param[out] S3PeiMemBase  PEI memory base to be installed in S3 phase.
+
+  @return If S3 PEI memory information is got successfully.
+**/
+EFI_STATUS
+EFIAPI
+GetS3MemoryInfo (
+  OUT UINT64*S3PeiMemSize,
+  OUT EFI_PHYSICAL_ADDRESS  *S3PeiMemBase
+  )
+{
+  EFI_STATUS   Status;
+  EFI_PEI_READ_ONLY_VARIABLE2_PPI  *VariablePpi;
+  UINTNDataSize;
+  ACPI_S3_MEMORY   S3MemoryInfo;
+
+  *S3PeiMemBase = 0;
+  *S3PeiMemSize = 0;
+
+  Status = PeiServicesLocatePpi (, 0, NULL, 
(VOID **) );
+  ASSERT_EFI_ERROR (Status);
+
+  DataSize = sizeof (S3MemoryInfo);
+  Status = VariablePpi->GetVariable (
+  VariablePpi,
+  ACPI_S3_MEMORY_NV_NAME,
+  ,
+  NULL,
+  ,
+  
+  );
+  ASSERT_EFI_ERROR (Status);
+
+  if (EFI_ERROR (Status)) {
+return Status;
+  }
+
+  *S3PeiMemBase = S3MemoryInfo.S3PeiMemBase;
+  *S3PeiMemSize = S3MemoryInfo.S3PeiMemSize;
+  return EFI_SUCCESS;
+}
+
 /**
   Post FSP-M HOB process for Memory Resource Descriptor.
 
@@ -280,7 +332,7 @@ PostFspmHobProcess (
 0x1000
 );
 
-
+  if (BootMode != BOOT_ON_S3_RESUME) {
 //
 // Capsule mode
 //
@@ -337,7 +389,22 @@ PostFspmHobProcess (
 if (Capsule != NULL) {
   Status = Capsule->CreateState ((EFI_PEI_SERVICES **)PeiServices, 
CapsuleBuffer, CapsuleBufferLength);
 }
+  } else {
+Status = GetS3MemoryInfo (, );
+ASSERT_EFI_ERROR (Status);
 
+DEBUG ((DEBUG_INFO, "S3 resume PeiMemBase: 0x%08x\n", PeiMemBase));
+DEBUG ((DEBUG_INFO, "S3 resume PeiMemSize: 0x%08x\n", PeiMemSize));
+
+//
+// Install efi memory
+//
+Status = PeiServicesInstallPeiMemory (
+   PeiMemBase,
+   PeiMemSize
+   );
+ASSERT_EFI_ERROR (Status);
+  }
 
   //
   // Create a memory allocation HOB at fixed location for MP Services PPI AP 
wait loop.
diff --git 
a/Platform/Intel/MinPlatformPkg/FspWrapper/Library/PeiFspWrapperHobProcessLib/PeiFspWrapperHobProcessLib.inf
 
b/Platform/Intel/MinPlatformPkg/FspWrapper/Library/PeiFspWrapperHobProcessLib/PeiFspWrapperHobProcessLib.inf
index b846e7af1d2d..e2aac36bf018 100644
--- 
a/Platform/Intel/MinPlatformPkg/FspWrapper/Library/PeiFspWrapperHobProcessLib/PeiFspWrapperHobProcessLib.inf
+++ 
b/Platform/Intel/MinPlatformPkg/FspWrapper/Library/PeiFspWrapperHobProcessLib/PeiFspWrapperHobProcessLib.inf
@@ -75,7 +75,9 @@
   gZeroGuid
   gEfiGraphicsInfoHobGuid
   gEfiGraphicsDeviceInfoHobGuid
+  gEfiAcpiVariableGuid
 
 [Ppis]
   gEfiPeiCapsulePpiGuid   ## CONSUMES
+  gEfiPeiReadOnlyVariable2PpiGuid ## CONSUMES
   gEdkiiSiliconInitializedPpiGuid ## PRODUCES
diff --git a/Platform/Intel/MinPlatformPkg/Include/Dsc/CorePeiInclude.dsc 
b/Platform/Intel/MinPlatformPkg/Include/Dsc/CorePeiInclude.dsc
index 08e50cac075f..f271fb26b189 100644
--- a/Platform/Intel/MinPlatformPkg/Include/Dsc/CorePeiInclude.dsc
+++ b/Platform/Intel/MinPlatformPkg/Include/Dsc/CorePeiInclude.dsc
@@ -41,3 +41,5 @@
   

[edk2-devel][edk2-platforms][PATCH v2 4/6] S3FeaturePkg: Implement working S3 resume

2022-09-06 Thread Benjamin Doron
Follow-up commits to MinPlatform (PeiFspWrapperHobProcessLib for
memory) and FSP-related board libraries (policy overrides)
required for successful S3 resume.

Factored allocation logic into new module to avoid MinPlatform
dependency on S3Feature package.

TODO: Can optimise required size.

Cc: Nate DeSimone 
Cc: Ankit Sinha 
Cc: Sai Chaganty 
Cc: Isaac Oram 
Cc: Liming Gao 
Signed-off-by: Benjamin Doron 
---
 .../S3FeaturePkg/Include/PostMemory.fdf   |  13 ++
 .../S3FeaturePkg/Include/PreMemory.fdf|   8 +-
 .../S3FeaturePkg/Include/S3Feature.dsc|  38 -
 .../S3FeaturePkg/S3Dxe/S3Dxe.c| 155 ++
 .../S3FeaturePkg/S3Dxe/S3Dxe.inf  |  49 ++
 .../S3FeaturePkg/S3Pei/S3Pei.c|  83 +-
 .../S3FeaturePkg/S3Pei/S3Pei.inf  |   8 +-
 .../Include/AcpiS3MemoryNvData.h  |  22 +++
 8 files changed, 365 insertions(+), 11 deletions(-)
 create mode 100644 Features/Intel/PowerManagement/S3FeaturePkg/S3Dxe/S3Dxe.c
 create mode 100644 Features/Intel/PowerManagement/S3FeaturePkg/S3Dxe/S3Dxe.inf
 create mode 100644 Platform/Intel/MinPlatformPkg/Include/AcpiS3MemoryNvData.h

diff --git a/Features/Intel/PowerManagement/S3FeaturePkg/Include/PostMemory.fdf 
b/Features/Intel/PowerManagement/S3FeaturePkg/Include/PostMemory.fdf
index 9e17f853c630..7f630908fa2c 100644
--- a/Features/Intel/PowerManagement/S3FeaturePkg/Include/PostMemory.fdf
+++ b/Features/Intel/PowerManagement/S3FeaturePkg/Include/PostMemory.fdf
@@ -2,7 +2,20 @@
 #  FDF file for post-memory S3 advanced feature modules.
 #
 # Copyright (c) 2019, Intel Corporation. All rights reserved.
+# Copyright (c) 2022, Baruch Binyamin Doron.
 #
 # SPDX-License-Identifier: BSD-2-Clause-Patent
 #
 ##
+
+## Dependencies
+  INF UefiCpuPkg/PiSmmCommunication/PiSmmCommunicationSmm.inf
+  INF MdeModulePkg/Universal/LockBox/SmmLockBox/SmmLockBox.inf
+
+## Save-state module stack
+  INF S3FeaturePkg/S3Dxe/S3Dxe.inf
+  INF MdeModulePkg/Universal/Acpi/S3SaveStateDxe/S3SaveStateDxe.inf
+  INF UefiCpuPkg/CpuS3DataDxe/CpuS3DataDxe.inf
+
+## Restore-state module stack
+  INF 
MdeModulePkg/Universal/Acpi/BootScriptExecutorDxe/BootScriptExecutorDxe.inf
diff --git a/Features/Intel/PowerManagement/S3FeaturePkg/Include/PreMemory.fdf 
b/Features/Intel/PowerManagement/S3FeaturePkg/Include/PreMemory.fdf
index fdd16a4e0356..e130fa5f098d 100644
--- a/Features/Intel/PowerManagement/S3FeaturePkg/Include/PreMemory.fdf
+++ b/Features/Intel/PowerManagement/S3FeaturePkg/Include/PreMemory.fdf
@@ -2,9 +2,15 @@
 #  FDF file for pre-memory S3 advanced feature modules.
 #
 # Copyright (c) 2019, Intel Corporation. All rights reserved.
+# Copyright (c) 2022, Baruch Binyamin Doron.
 #
 # SPDX-License-Identifier: BSD-2-Clause-Patent
 #
 ##
 
-INF S3FeaturePkg/S3Pei/S3Pei.inf
+## Dependencies
+  INF S3FeaturePkg/S3Pei/S3Pei.inf
+  INF UefiCpuPkg/PiSmmCommunication/PiSmmCommunicationPei.inf
+
+## Restore-state module stack
+  INF UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume2Pei.inf
diff --git a/Features/Intel/PowerManagement/S3FeaturePkg/Include/S3Feature.dsc 
b/Features/Intel/PowerManagement/S3FeaturePkg/Include/S3Feature.dsc
index cc34e785076a..d8bfc7909413 100644
--- a/Features/Intel/PowerManagement/S3FeaturePkg/Include/S3Feature.dsc
+++ b/Features/Intel/PowerManagement/S3FeaturePkg/Include/S3Feature.dsc
@@ -7,6 +7,7 @@
 # for the build infrastructure.
 #
 # Copyright (c) 2019 - 2021, Intel Corporation. All rights reserved.
+# Copyright (c) 2022, Baruch Binyamin Doron.
 #
 # SPDX-License-Identifier: BSD-2-Clause-Patent
 #
@@ -25,6 +26,10 @@
 !error "DXE_ARCH must be specified to build this feature!"
   !endif
 
+[PcdsFixedAtBuild]
+  # Attempts to improve performance at the cost of more DRAM usage
+  gEfiMdeModulePkgTokenSpaceGuid.PcdShadowPeimOnS3Boot|TRUE
+
 

 #
 # Library Class section - list of all Library Classes needed by this feature.
@@ -32,7 +37,14 @@
 

 
 [LibraryClasses.common.PEIM]
-  
SmmAccessLib|IntelSiliconPkg/Feature/SmmAccess/Library/PeiSmmAccessLib/PeiSmmAccessLib.inf
+  
#SmmAccessLib|IntelSiliconPkg/Feature/SmmAccess/Library/PeiSmmAccessLibSmramc/PeiSmmAccessLib.inf
+  
SmmControlLib|IntelSiliconPkg/Feature/SmmControl/Library/PeiSmmControlLib/PeiSmmControlLib.inf
+
+[LibraryClasses.common.DXE_DRIVER, LibraryClasses.common.DXE_SMM_DRIVER]
+  ###
+  # Edk2 Packages
+  ###
+  
S3BootScriptLib|MdeModulePkg/Library/PiDxeS3BootScriptLib/DxeS3BootScriptLib.inf
 
 

 #
@@ -60,8 +72,26 @@
   # S3 Feature Package
   #
 
-  # Add library instances here that are not included in package components and 
should be tested
-  # in the package build.
-
  

[edk2-devel][edk2-platforms][PATCH v2 3/6] IntelSiliconPkg/Feature/SmmControl: Implement PPI with chipset support

2022-09-06 Thread Benjamin Doron
S3 resume may require communication with SMM, for which we need the
SmmControl PPI. Therefore, port the DXE drivers to a library, like there
is for SMM Access.

Tested, working on Kabylake. Further testing required after the refactor
for compatibility.

Cc: Nate DeSimone 
Cc: Ankit Sinha 
Cc: Ray Ni 
Cc: Rangasai V Chaganty 
Cc: Isaac Oram 
Signed-off-by: Benjamin Doron 
---
 .../PeiSmmControlLib/PeiSmmControlLib.c   | 309 ++
 .../PeiSmmControlLib/PeiSmmControlLib.inf |  34 ++
 .../Include/Library/SmmControlLib.h   |  26 ++
 .../Intel/IntelSiliconPkg/IntelSiliconPkg.dec |   4 +
 4 files changed, 373 insertions(+)
 create mode 100644 
Silicon/Intel/IntelSiliconPkg/Feature/SmmControl/Library/PeiSmmControlLib/PeiSmmControlLib.c
 create mode 100644 
Silicon/Intel/IntelSiliconPkg/Feature/SmmControl/Library/PeiSmmControlLib/PeiSmmControlLib.inf
 create mode 100644 
Silicon/Intel/IntelSiliconPkg/Include/Library/SmmControlLib.h

diff --git 
a/Silicon/Intel/IntelSiliconPkg/Feature/SmmControl/Library/PeiSmmControlLib/PeiSmmControlLib.c
 
b/Silicon/Intel/IntelSiliconPkg/Feature/SmmControl/Library/PeiSmmControlLib/PeiSmmControlLib.c
new file mode 100644
index ..cc6c7f8fe672
--- /dev/null
+++ 
b/Silicon/Intel/IntelSiliconPkg/Feature/SmmControl/Library/PeiSmmControlLib/PeiSmmControlLib.c
@@ -0,0 +1,309 @@
+/** @file
+  This is to publish the SMM Control Ppi instance.
+
+  Copyright (c) 2019 - 2020, Intel Corporation. All rights reserved.
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+#define SMM_CONTROL_PRIVATE_DATA_SIGNATURE  SIGNATURE_32 ('i', '4', 's', 'c')
+
+typedef struct {
+  UINTN   Signature;
+  EFI_HANDLE  Handle;
+  EFI_PEI_MM_CONTROL_PPI  SmmControl;
+} SMM_CONTROL_PRIVATE_DATA;
+
+#define SMM_CONTROL_PRIVATE_DATA_FROM_THIS(a) \
+CR (a, \
+  SMM_CONTROL_PRIVATE_DATA, \
+  SmmControl, \
+  SMM_CONTROL_DEV_SIGNATURE \
+  )
+
+//
+// Common registers:
+//
+//
+// APM Registers
+//
+#define R_PCH_APM_CNT 0xB2
+//
+// ACPI and legacy I/O register offsets from ACPIBASE
+//
+#define R_PCH_ACPI_PM1_STS0x00
+#define B_PCH_ACPI_PM1_STS_PRBTNORBIT11
+
+#define R_PCH_SMI_EN  0x30
+
+#define R_PCH_SMI_STS 0x34
+#define B_PCH_SMI_STS_APM BIT5
+#define B_PCH_SMI_EN_APMC BIT5
+#define B_PCH_SMI_EN_EOS  BIT1
+#define B_PCH_SMI_EN_GBL_SMI  BIT0
+
+/**
+  Trigger the software SMI
+
+  @param[in] Data The value to be set on the software SMI data 
port
+
+  @retval EFI_SUCCESS Function completes successfully
+**/
+EFI_STATUS
+EFIAPI
+SmmTrigger (
+  UINT8   Data
+  )
+{
+  UINT16  ABase;
+  UINT32  OutputData;
+  UINT32  OutputPort;
+
+  ABase = FixedPcdGet16 (PcdAcpiBaseAddress);
+
+  ///
+  /// Enable the APMC SMI
+  ///
+  OutputPort  = ABase + R_PCH_SMI_EN;
+  OutputData  = IoRead32 ((UINTN) OutputPort);
+  OutputData |= (B_PCH_SMI_EN_APMC | B_PCH_SMI_EN_GBL_SMI);
+  DEBUG (
+(DEBUG_EVENT,
+ "The SMI Control Port at address %x will be written to %x.\n",
+ OutputPort,
+ OutputData)
+);
+  IoWrite32 (
+(UINTN) OutputPort,
+(UINT32) (OutputData)
+);
+
+  OutputPort  = R_PCH_APM_CNT;
+  OutputData  = Data;
+
+  ///
+  /// Generate the APMC SMI
+  ///
+  IoWrite8 (
+(UINTN) OutputPort,
+(UINT8) (OutputData)
+);
+
+  return EFI_SUCCESS;
+}
+
+/**
+  Clear the SMI status
+
+
+  @retval EFI_SUCCESS The function completes successfully
+  @retval EFI_DEVICE_ERRORSomething error occurred
+**/
+EFI_STATUS
+EFIAPI
+SmmClear (
+  VOID
+  )
+{
+  UINT16  ABase;
+  UINT32  OutputData;
+  UINT32  OutputPort;
+
+  ABase = FixedPcdGet16 (PcdAcpiBaseAddress);
+
+  ///
+  /// Clear the Power Button Override Status Bit, it gates EOS from being set.
+  ///
+  OutputPort  = ABase + R_PCH_ACPI_PM1_STS;
+  OutputData  = B_PCH_ACPI_PM1_STS_PRBTNOR;
+  DEBUG (
+(DEBUG_EVENT,
+ "The PM1 Status Port at address %x will be written to %x.\n",
+ OutputPort,
+ OutputData)
+);
+  IoWrite16 (
+(UINTN) OutputPort,
+(UINT16) (OutputData)
+);
+
+  ///
+  /// Clear the APM SMI Status Bit
+  ///
+  OutputPort  = ABase + R_PCH_SMI_STS;
+  OutputData  = B_PCH_SMI_STS_APM;
+  DEBUG (
+(DEBUG_EVENT,
+ "The SMI Status Port at address %x will be written to %x.\n",
+ OutputPort,
+ OutputData)
+);
+  IoWrite32 (
+(UINTN) OutputPort,
+(UINT32) (OutputData)
+);
+
+  ///
+  /// Set the EOS Bit
+  ///
+  OutputPort  = ABase + R_PCH_SMI_EN;
+  OutputData  = IoRead32 ((UINTN) OutputPort);
+  OutputData |= B_PCH_SMI_EN_EOS;
+  DEBUG (
+(DEBUG_EVENT,
+ "The SMI Control Port at 

[edk2-devel][edk2-platforms][PATCH v2 2/6] IntelSiliconPkg/Feature/SmmAccess: Implement PPI with chipset support

2022-09-06 Thread Benjamin Doron
SMRAM must be opened to retrieve the lockbox for S3, and SMM
communication depends on this PPI. For security purposes, SMRAM
lock must be performed before EndOfPei (although FSP notify performs
lockdown too).

It seems to me that this library is generic and applicable to all Intel
platforms in the tree using the MCH SMRAMC register.

Cc: Nate DeSimone 
Cc: Ankit Sinha 
Cc: Ray Ni 
Cc: Rangasai V Chaganty 
Cc: Isaac Oram 
Signed-off-by: Benjamin Doron 
---
 .../PeiSmmAccessLibSmramc/PeiSmmAccessLib.c   | 430 ++
 .../PeiSmmAccessLibSmramc/PeiSmmAccessLib.inf |  36 ++
 2 files changed, 466 insertions(+)
 create mode 100644 
Silicon/Intel/IntelSiliconPkg/Feature/SmmAccess/Library/PeiSmmAccessLibSmramc/PeiSmmAccessLib.c
 create mode 100644 
Silicon/Intel/IntelSiliconPkg/Feature/SmmAccess/Library/PeiSmmAccessLibSmramc/PeiSmmAccessLib.inf

diff --git 
a/Silicon/Intel/IntelSiliconPkg/Feature/SmmAccess/Library/PeiSmmAccessLibSmramc/PeiSmmAccessLib.c
 
b/Silicon/Intel/IntelSiliconPkg/Feature/SmmAccess/Library/PeiSmmAccessLibSmramc/PeiSmmAccessLib.c
new file mode 100644
index ..5b472bf86abf
--- /dev/null
+++ 
b/Silicon/Intel/IntelSiliconPkg/Feature/SmmAccess/Library/PeiSmmAccessLibSmramc/PeiSmmAccessLib.c
@@ -0,0 +1,430 @@
+/** @file
+  This is to publish the SMM Access Ppi instance.
+
+  Copyright (c) 2019 - 2020, Intel Corporation. All rights reserved.
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+#define SMM_ACCESS_PRIVATE_DATA_SIGNATURE SIGNATURE_32 ('4', '5', 's', 'a')
+
+///
+/// Private data
+///
+typedef struct {
+  UINTN Signature;
+  EFI_HANDLEHandle;
+  EFI_PEI_MM_ACCESS_PPI SmmAccess;
+  //
+  // Local Data for SMM Access interface goes here
+  //
+  UINTN NumberRegions;
+  EFI_SMRAM_DESCRIPTOR  *SmramDesc;
+} SMM_ACCESS_PRIVATE_DATA;
+
+#define SMM_ACCESS_PRIVATE_DATA_FROM_THIS(a) \
+CR (a, \
+  SMM_ACCESS_PRIVATE_DATA, \
+  SmmAccess, \
+  SMM_ACCESS_PRIVATE_DATA_SIGNATURE \
+  )
+
+//
+// Common registers:
+//
+// DEVICE 0 (Memory Controller Hub)
+//
+#define SA_MC_BUS  0x00
+#define SA_MC_DEV  0x00
+#define SA_MC_FUN  0x00
+///
+/// Description:
+///  The SMRAMC register controls how accesses to Compatible SMRAM spaces are 
treated.  The Open, Close and Lock bits function only when G_SMRAME bit is set 
to 1.  Also, the Open bit must be reset before the Lock bit is set.
+///
+#define R_SA_SMRAMC  (0x88)
+#define B_SA_SMRAMC_D_LCK_MASK (0x10)
+#define B_SA_SMRAMC_D_CLS_MASK (0x20)
+#define B_SA_SMRAMC_D_OPEN_MASK(0x40)
+
+/**
+  This routine accepts a request to "open" a region of SMRAM.  The
+  region could be legacy ABSEG, HSEG, or TSEG near top of physical memory.
+  The use of "open" means that the memory is visible from all PEIM
+  and SMM agents.
+
+  @param[in] PeiServices -  General purpose services available to 
every PEIM.
+  @param[in] This-  Pointer to the SMM Access Interface.
+  @param[in] DescriptorIndex -  Region of SMRAM to Open.
+
+  @retval EFI_SUCCESS-  The region was successfully opened.
+  @retval EFI_DEVICE_ERROR   -  The region could not be opened because 
locked by
+chipset.
+  @retval EFI_INVALID_PARAMETER  -  The descriptor index was out of bounds.
+**/
+EFI_STATUS
+EFIAPI
+Open (
+  IN EFI_PEI_SERVICES   **PeiServices,
+  IN EFI_PEI_MM_ACCESS_PPI  *This,
+  IN UINTN  DescriptorIndex
+  )
+{
+  SMM_ACCESS_PRIVATE_DATA *SmmAccess;
+  UINT8   Index;
+  UINT64  Address;
+  UINT8   SmramControl;
+
+  SmmAccess = SMM_ACCESS_PRIVATE_DATA_FROM_THIS (This);
+  if (DescriptorIndex >= SmmAccess->NumberRegions) {
+DEBUG ((DEBUG_WARN, "SMRAM region out of range\n"));
+
+return EFI_INVALID_PARAMETER;
+  } else if (SmmAccess->SmramDesc[DescriptorIndex].RegionState & 
EFI_SMRAM_LOCKED) {
+//
+// Cannot open a "locked" region
+//
+DEBUG ((DEBUG_WARN, "Cannot open a locked SMRAM region\n"));
+
+return EFI_DEVICE_ERROR;
+  }
+
+  ///
+  /// BEGIN CHIPSET CODE
+  ///
+  ///
+  /// SMRAM register is PCI 0:0:0:88, SMRAMC (8 bit)
+  ///
+  Address = PCI_SEGMENT_LIB_ADDRESS (0, SA_MC_BUS, SA_MC_DEV, SA_MC_FUN, 
R_SA_SMRAMC);
+  SmramControl = PciSegmentRead8 (Address);
+  ///
+  ///  Is SMRAM locked?
+  ///
+  if ((SmramControl & B_SA_SMRAMC_D_LCK_MASK) != 0) {
+///
+/// Cannot Open a locked region
+///
+for (Index = 0; Index < SmmAccess->NumberRegions; Index++) {
+  SmmAccess->SmramDesc[Index].RegionState |= EFI_SMRAM_LOCKED;
+}
+DEBUG ((DEBUG_WARN, "Cannot open a locked SMRAM region\n"));
+return EFI_DEVICE_ERROR;
+  }
+  ///
+  /// Open SMRAM region
+  ///
+  SmramControl |= B_SA_SMRAMC_D_OPEN_MASK;
+  SmramControl 

[edk2-devel][edk2-platforms][PATCH v2 1/6] {Platform,Silicon}/Intel: Move PcdAcpiBaseAddress definition

2022-09-06 Thread Benjamin Doron
All these platforms have an ABase, so move the definition to enable
common silicon code in IntelSiliconPkg. Otherwise, library shims would
be required, because PCDs are GUID-ed and package DEC specific.

Cc: Rangasai V Chaganty 
Cc: Isaac Oram 
Cc: Nate DeSimone 
Cc: Ankit Sinha 
Cc: Ray Ni 
Cc: Chasel Chiu 
Cc: Sai Chaganty 
Cc: Heng Luo 
Signed-off-by: Benjamin Doron 
---
 .../CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPkgPcd.dsc  | 1 +
 .../Features/Tbt/TbtInit/Smm/TbtSmm.inf  | 2 +-
 .../AspireVn7Dash572G/OpenBoardPkgPcd.dsc| 1 +
 .../KabylakeOpenBoardPkg/Features/Tbt/TbtInit/Smm/TbtSmm.inf | 2 +-
 .../Library/BasePlatformHookLib/BasePlatformHookLib.inf  | 2 +-
 .../KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkgPcd.dsc  | 1 +
 .../Library/BasePlatformHookLib/BasePlatformHookLib.inf  | 2 +-
 .../KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkgPcd.dsc| 1 +
 .../TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkgPcd.dsc  | 1 +
 .../Features/Tbt/TbtInit/Smm/TbtSmm.inf  | 2 +-
 .../WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkgPcd.dsc | 1 +
 .../WhiskeylakeURvp/OpenBoardPkgPcd.dsc  | 1 +
 Silicon/Intel/CoffeelakeSiliconPkg/CoffeelakeSiliconPkg.dsc  | 1 +
 .../Library/PeiSiliconInitLib/PeiSiliconInitLib.inf  | 5 +++--
 .../Pch/Library/PeiDxeSmmPmcLib/PeiDxeSmmPmcLib.inf  | 3 ++-
 .../PeiDxeSmmPmcPrivateLib/PeiDxeSmmPmcPrivateLibCnl.inf | 2 +-
 Silicon/Intel/CoffeelakeSiliconPkg/SiPkg.dec | 1 -
 Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec| 4 
 Silicon/Intel/KabylakeSiliconPkg/KabylakeSiliconPkg.dsc  | 1 +
 .../Library/PeiSiliconInitLib/PeiSiliconInitLib.inf  | 2 +-
 .../Pch/Library/PeiDxeSmmPchPmcLib/PeiDxeSmmPchPmcLib.inf| 3 ++-
 .../Pch/Library/PeiPchPolicyLib/PeiPchPolicyLib.inf  | 2 +-
 .../KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.inf   | 2 +-
 Silicon/Intel/KabylakeSiliconPkg/SiPkg.dec   | 1 -
 .../IpBlock/Pmc/Library/PeiDxeSmmPmcLib/PeiDxeSmmPmcLib.inf  | 3 ++-
 .../PeiDxeSmmPmcPrivateLib/PeiDxeSmmPmcPrivateLibVer2.inf| 3 ++-
 Silicon/Intel/TigerlakeSiliconPkg/SiPkg.dec  | 1 -
 Silicon/Intel/TigerlakeSiliconPkg/TigerlakeSiliconPkg.dsc| 1 +
 28 files changed, 34 insertions(+), 18 deletions(-)

diff --git 
a/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPkgPcd.dsc 
b/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPkgPcd.dsc
index 79924f1fda7f..81dc0747fab8 100644
--- a/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPkgPcd.dsc
+++ b/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPkgPcd.dsc
@@ -65,6 +65,7 @@
 
   gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xE000
   gMinPlatformPkgTokenSpaceGuid.PcdPciExpressRegionLength|0x1000
+  gIntelSiliconPkgTokenSpaceGuid.PcdAcpiBaseAddress|0x1800
   #
   # PCIe Reserved Memory Space Range
   #
diff --git 
a/Platform/Intel/CometlakeOpenBoardPkg/Features/Tbt/TbtInit/Smm/TbtSmm.inf 
b/Platform/Intel/CometlakeOpenBoardPkg/Features/Tbt/TbtInit/Smm/TbtSmm.inf
index e3fdd3981653..c4dd863c3ee8 100644
--- a/Platform/Intel/CometlakeOpenBoardPkg/Features/Tbt/TbtInit/Smm/TbtSmm.inf
+++ b/Platform/Intel/CometlakeOpenBoardPkg/Features/Tbt/TbtInit/Smm/TbtSmm.inf
@@ -49,7 +49,7 @@
   gMinPlatformPkgTokenSpaceGuid.PcdPciExpressRegionLength  ## CONSUMES
 
 [FixedPcd]
-  gSiPkgTokenSpaceGuid.PcdAcpiBaseAddress   ## CONSUMES
+  gIntelSiliconPkgTokenSpaceGuid.PcdAcpiBaseAddress## CONSUMES
 
 [Sources]
   TbtSmiHandler.h
diff --git 
a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/OpenBoardPkgPcd.dsc 
b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/OpenBoardPkgPcd.dsc
index a4ea524e26bc..3ed7aa0a2b10 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/OpenBoardPkgPcd.dsc
+++ b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/OpenBoardPkgPcd.dsc
@@ -241,6 +241,7 @@
   gEfiMdeModulePkgTokenSpaceGuid.PcdMaxPeiPerformanceLogEntries|140
 !endif
   gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xE000
+  gIntelSiliconPkgTokenSpaceGuid.PcdAcpiBaseAddress|0x1800
 
   gEfiMdeModulePkgTokenSpaceGuid.PcdAriSupport|FALSE
   gEfiMdeModulePkgTokenSpaceGuid.PcdBrowserFieldTextColor|0x01
diff --git 
a/Platform/Intel/KabylakeOpenBoardPkg/Features/Tbt/TbtInit/Smm/TbtSmm.inf 
b/Platform/Intel/KabylakeOpenBoardPkg/Features/Tbt/TbtInit/Smm/TbtSmm.inf
index e6c185a4bd91..13116488eaa0 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/Features/Tbt/TbtInit/Smm/TbtSmm.inf
+++ b/Platform/Intel/KabylakeOpenBoardPkg/Features/Tbt/TbtInit/Smm/TbtSmm.inf
@@ -46,7 +46,7 @@
   gKabylakeOpenBoardPkgTokenSpaceGuid.PcdSwSmiDTbtEnumerate ## CONSUMES
 
 [FixedPcd]
-  gSiPkgTokenSpaceGuid.PcdAcpiBaseAddress   ## CONSUMES
+  gIntelSiliconPkgTokenSpaceGuid.PcdAcpiBaseAddress ## CONSUMES
 
 [Sources]
   TbtSmiHandler.h
diff --git 

[edk2-devel][edk2-platforms][PATCH v2 0/6] Implement S3 resume

2022-09-06 Thread Benjamin Doron
MinPlatform is an open-source EDK2 firmware project that can boot some
mainstream boards. However, it lacked working support for S3 resume, an
important feature for mobile platforms, which means that its
applicability as-is to mainstream use is limited. Therefore, I have now
implemented working S3 resume support on MinPlatform. This patch series
comprises a majority of one of my work products for GSoC 2022.

The BootScript-related modules are EDK2 open-source and fairly
straightforward to include. However, the partial dependency
PiSmmCommunicationPei (for signalling SMM) creates a dependency on both
the SmmAccess and SmmControl PPIs, so these are implemented here as
libraries, ported from the DXE drivers. As the register definitions are
generic, one library shim is implemented for compatibility, so the
library can be generic too. SmmAccess shall be required regardless of
SMM signalling, for the LockBox.

Like all boots, S3 resume will require working DRAM. To my
understanding, we do not need to parse the memory map HOBs again, so
some memory is allocated in DXE phase (to reserve it), the address
stashed in a variable and consumed on S3 resume flows. Some
optimisation can be performed here, regarding how much is necessary.
Stashing in a variable is imperfect, but the details must be available
without DRAM. As the FSP HOBs are published later, SmmAccess cannot be
used to retrieve from the LockBox.

Per my suspicions, notes from my mentors, Nate and Ankit, and the
coreboot code, the PAMs are opened for access to the AP wake vectors.
Presently, all are opened, more research can be performed here.

As noted, either FSP or PiSmmCpuDxeSmm can apply boot CPU structures
(GDT, IDT, MTRRs, etc). Per my research and findings by my mentors, the
closed-source module CpuInitDxe would be required, so this
implementation includes CpuS3DataDxe and open-source code will perform
this task instead.

Unfortunately, board-specific code has some tasks to perform too. I've
implemented these for Kabylake, the platform I can test. This includes
detecting the boot mode, policy (memory overwrite is contraindicated,
do not pass a VBT so FSP does not initialise graphics again) and
ensuring a special provision, if desired, for debugging
BootScriptExecutorDxe.

One major bug that blocked progress was simply specific to debugging.
DebugLibReportStatusCode should not be used for that module, because
RSC has uninstalled the serial port handler at end-of-BS. Furthermore,
it's obvious that the boot services are now unavailable. So,
DebugLibSerialPort should be used. As an aside, due to AutoGen ordering,
gBS cannot be used in SerialPortInitialize(). What really makes this
module a unique case is the fact that it's behaviour is very like
runtime drivers. For the integrity of the platform's security, the
module is copied to the LockBox at DxeSmmReadyToLock. This caused one
major bug that was blocking progress: libraries cannot attempt to
modify globals (the data section) with end-of-BS events; they will
never reach the true copy. So, rather than using flags to control code
flow, it must be coded this way instead. For instance, there is now a
special variant of I2cHdmiDebugSerialPortLib that does not use gBS in
SerialPortWrite().

Previous revisions of this patch-set tested on my Aspire VN7-572G
(Skylake). It's my belief and intention that this implementation be
ready for other platforms too (some Intel-specific assumptions made),
with a minimum of porting effort, though readying for some debugging is
recommended.

Some potential bugs include:
- Power failure is being set (PMC PWR_FLR), so BootMode == 0x0. This bit
  is RW/1C, so mitigate it. Until finalised and I close the laptop
  chassis, I don't know if this is a bug in Kabylake's PchPmcLib.
- Very early in testing I saw a memory init error, which means that
  self-refresh failed. A BaseMemoryTest() predictably failed too,
  inserted before the PEI core installs memory. Either this was fixed
  in the code as I finished the implementation, or it's a bug. A major
  difference in build options is SerialPortSpiFlash ->
  I2cHdmiDebugSerialPortLib, but this seemed irrelevant. If it's simply
  the finalised implementation, I think this isn't worth a diff against
  the reflog.

Benjamin Doron (6):
  {Platform,Silicon}/Intel: Move PcdAcpiBaseAddress definition
  IntelSiliconPkg/Feature/SmmAccess: Implement PPI with chipset support
  IntelSiliconPkg/Feature/SmmControl: Implement PPI with chipset support
  S3FeaturePkg: Implement working S3 resume
  MinPlatformPkg: Implement working S3 resume
  KabylakeOpenBoardPkg: Example of board S3

 .../S3FeaturePkg/Include/PostMemory.fdf   |  13 +
 .../S3FeaturePkg/Include/PreMemory.fdf|   8 +-
 .../S3FeaturePkg/Include/S3Feature.dsc|  38 +-
 .../S3FeaturePkg/S3Dxe/S3Dxe.c| 155 +++
 .../S3FeaturePkg/S3Dxe/S3Dxe.inf  |  49 ++
 .../S3FeaturePkg/S3Pei/S3Pei.c|  83 +++-
 

Re: [edk2-devel] [PATCH 0/2] Add support EFI_MP_SERVICES_PROTOCOL on AARCH64

2022-09-06 Thread Rebecca Cran

On 9/5/22 09:55, Ard Biesheuvel wrote:

I think you've got things covered: I suggested RPi4 because it uses
A72, and I seem to remember the issues I observed were either on A57
or A72 (which are quite similar). But between Juno and HoneyComb, I
don't think the RPi4 data point is that useful.


My only concern is about the call in MpServicesTest:

WriteBackDataCacheRange ((VOID *), 32);

Obviously the '32' is a magic number and should be something based on the size 
of ApFunction.
But I don't think there's a portable way to calculate what that value should be.

--
Rebecca Cran



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Re: [edk2-devel] [PATCH 1/1] OvmfPkg/QemuBootOrderLib: add StoreQemuBootOrder()

2022-09-06 Thread Ard Biesheuvel
On Tue, 19 Jul 2022 at 17:12, Gerd Hoffmann  wrote:
>
> The function reads the boot order from qemu fw_cfg, translates it into
> device paths and stores them in 'QemuBootOrder' variables.  In case
> there is no boot ordering configured the function will do nothing.
>
> Use case: Allow applications loaded via 'qemu -kernel bootloader.efi'
> obey the boot order.
>
> Signed-off-by: Gerd Hoffmann 

Reviewed-by: Ard Biesheuvel  ---
>  OvmfPkg/OvmfPkg.dec   |   1 +
>  .../QemuBootOrderLib/QemuBootOrderLib.inf |   1 +
>  OvmfPkg/Include/Library/QemuBootOrderLib.h|  14 ++
>  .../PlatformBootManagerLib/BdsPlatform.c  |   5 +
>  .../QemuBootOrderLib/QemuBootOrderLib.c   | 122 ++
>  5 files changed, 143 insertions(+)
>
> diff --git a/OvmfPkg/OvmfPkg.dec b/OvmfPkg/OvmfPkg.dec
> index 5af76a540529..6b1296b15afa 100644
> --- a/OvmfPkg/OvmfPkg.dec
> +++ b/OvmfPkg/OvmfPkg.dec
> @@ -146,6 +146,7 @@ [Guids]
>gConfidentialComputingSecretGuid  = {0xadf956ad, 0xe98c, 0x484c, 
> {0xae, 0x11, 0xb5, 0x1c, 0x7d, 0x33, 0x64, 0x47}}
>gConfidentialComputingSevSnpBlobGuid  = {0x067b1f5f, 0xcf26, 0x44c5, 
> {0x85, 0x54, 0x93, 0xd7, 0x77, 0x91, 0x2d, 0x42}}
>gUefiOvmfPkgPlatformInfoGuid  = {0xdec9b486, 0x1f16, 0x47c7, 
> {0x8f, 0x68, 0xdf, 0x1a, 0x41, 0x88, 0x8b, 0xa5}}
> +  gQemuBootOrderGuid= {0x668f4529, 0x63d0, 0x4bb5, 
> {0xb6, 0x5d, 0x6f, 0xbb, 0x9d, 0x36, 0xa4, 0x4a}}
>
>  [Ppis]
># PPI whose presence in the PPI database signals that the TPM base address
> diff --git a/OvmfPkg/Library/QemuBootOrderLib/QemuBootOrderLib.inf 
> b/OvmfPkg/Library/QemuBootOrderLib/QemuBootOrderLib.inf
> index 7c02f04e7009..211344fb0b89 100644
> --- a/OvmfPkg/Library/QemuBootOrderLib/QemuBootOrderLib.inf
> +++ b/OvmfPkg/Library/QemuBootOrderLib/QemuBootOrderLib.inf
> @@ -49,6 +49,7 @@ [LibraryClasses]
>  [Guids]
>gEfiGlobalVariableGuid
>gVirtioMmioTransportGuid
> +  gQemuBootOrderGuid
>
>  [FeaturePcd]
>gUefiOvmfPkgTokenSpaceGuid.PcdQemuBootOrderPciTranslation
> diff --git a/OvmfPkg/Include/Library/QemuBootOrderLib.h 
> b/OvmfPkg/Include/Library/QemuBootOrderLib.h
> index 9f06439aed1e..f0369298a134 100644
> --- a/OvmfPkg/Include/Library/QemuBootOrderLib.h
> +++ b/OvmfPkg/Include/Library/QemuBootOrderLib.h
> @@ -47,6 +47,20 @@ ConnectDevicesFromQemu (
>VOID
>);
>
> +/**
> +  Write qemu boot order to uefi variables.
> +
> +  Attempt to retrieve the "bootorder" fw_cfg file from QEMU. Translate
> +  the OpenFirmware device paths therein to UEFI device path fragments.
> +
> +  On Success store the device path in QemuBootOrder variables.
> +**/
> +VOID
> +EFIAPI
> +StoreQemuBootOrder (
> +  VOID
> +  );
> +
>  /**
>
>Set the boot order based on configuration retrieved from QEMU.
> diff --git a/OvmfPkg/Library/PlatformBootManagerLib/BdsPlatform.c 
> b/OvmfPkg/Library/PlatformBootManagerLib/BdsPlatform.c
> index 51016a5548cb..98f6f07341ec 100644
> --- a/OvmfPkg/Library/PlatformBootManagerLib/BdsPlatform.c
> +++ b/OvmfPkg/Library/PlatformBootManagerLib/BdsPlatform.c
> @@ -1694,6 +1694,11 @@ PlatformBootManagerAfterConsole (
>//
>PciAcpiInitialization ();
>
> +  //
> +  // Write qemu bootorder to efi variables
> +  //
> +  StoreQemuBootOrder ();
> +
>//
>// Process QEMU's -kernel command line option
>//
> diff --git a/OvmfPkg/Library/QemuBootOrderLib/QemuBootOrderLib.c 
> b/OvmfPkg/Library/QemuBootOrderLib/QemuBootOrderLib.c
> index 67d29ac6429f..398de7fab4ba 100644
> --- a/OvmfPkg/Library/QemuBootOrderLib/QemuBootOrderLib.c
> +++ b/OvmfPkg/Library/QemuBootOrderLib/QemuBootOrderLib.c
> @@ -1686,6 +1686,128 @@ ConnectDevicesFromQemu (
>return Status;
>  }
>
> +/**
> +  Write qemu boot order to uefi variables.
> +
> +  Attempt to retrieve the "bootorder" fw_cfg file from QEMU. Translate
> +  the OpenFirmware device paths therein to UEFI device path fragments.
> +
> +  On Success store the device path in QemuBootOrder variables.
> +**/
> +VOID
> +EFIAPI
> +StoreQemuBootOrder (
> +  VOID
> +  )
> +{
> +  RETURN_STATUS Status;
> +  FIRMWARE_CONFIG_ITEM  FwCfgItem;
> +  UINTN FwCfgSize;
> +  CHAR8 *FwCfg;
> +  EFI_STATUSEfiStatus;
> +  EXTRA_ROOT_BUS_MAP*ExtraPciRoots;
> +  CONST CHAR8   *FwCfgPtr;
> +  UINTN TranslatedSize;
> +  CHAR16Translated[TRANSLATION_OUTPUT_SIZE];
> +  UINTN VariableIndex = 0;
> +  CHAR16VariableName[20];
> +
> +  Status = QemuFwCfgFindFile ("bootorder", , );
> +  if (RETURN_ERROR (Status)) {
> +return;
> +  }
> +
> +  if (FwCfgSize == 0) {
> +return;
> +  }
> +
> +  FwCfg = AllocatePool (FwCfgSize);
> +  if (FwCfg == NULL) {
> +return;
> +  }
> +
> +  QemuFwCfgSelectItem (FwCfgItem);
> +  QemuFwCfgReadBytes (FwCfgSize, FwCfg);
> +  if (FwCfg[FwCfgSize - 1] != '\0') {
> +Status = RETURN_INVALID_PARAMETER;
> +goto FreeFwCfg;
> +  }
> +
> 

Re: [edk2-devel] [PATCH V2 1/1] OvmfPkg/OvmfPkg*.dsc: Increase ACPI Reclaim memory size

2022-09-06 Thread Ard Biesheuvel
On Fri, 22 Jul 2022 at 14:43, annie li  wrote:
>
> Hello Ard,
>
> Looks there hasn't any feedback from other maintainers yet.
>
> Would you like to merge this patch in or still wait for more feedback?
>
> Could anyone else please review this patch? thank you!
>

Reviewed-by: Ard Biesheuvel 

Merged as #3298




> On 5/13/2022 7:28 AM, Annie.li wrote:

> > On 5/3/2022 12:25 PM, Ard Biesheuvel wrote:
> >> On Tue, 3 May 2022 at 17:54, annie li  wrote:
> >>> Adding maintainers into the CC list...
> >>>
> >>> On 5/2/2022 5:05 PM, annie li wrote:
>  Hello
> 
>  I am wondering if anyone will review this patch please? Any comments
>  are welcome.
> 
>  Thanks
> 
>  Annie
> 
>  On 4/15/2022 5:15 PM, annie li wrote:
> > The current ACPI Reclaim memory size is set as 0x10(64k). The
> > ACPI table size will be increased if the memory slots' number of
> > the guest gets increased. In the guest with more memory slots,
> > the ACPI Reclaim memory size may not be sufficient for hibernation.
> > This may cause resume failure of the hibernated guest that was
> > booted up with a fresh copied writable OVMF_VARS file. However,
> > the failure doesn't happen in following hibernation/resume
> > cycles.
> >
> > The ACPI_MAX_RAM_SLOTS is set as 256 in the current QEMU. With
> > ACPI_MAX_RAM_SLOTS, 18 pages are required to be allocated in ACPI
> > Reclaim memory. However, due to the 0x10(16 pages) setting, 2 extra
> > pages will be allocated in other space. This may break the
> > hibernation/resume in the above scenario.
> >
> > This patch increases the ACPI Reclaim memory size to 0x12, i.e.
> > PcdMemoryTypeEfiACPIReclaimMemory is set as 0x12(18 pages).
> >
> > Signed-off-by: Annie Li 
> > ---
> >OvmfPkg/OvmfPkgIa32.dsc| 2 +-
> >OvmfPkg/OvmfPkgIa32X64.dsc | 2 +-
> >OvmfPkg/OvmfPkgX64.dsc | 2 +-
> >3 files changed, 3 insertions(+), 3 deletions(-)
> >
> >> No objections from me but before merging this, I'll give the other
> >> folks the opportunity to chime in as well.
> >
> > Thank you Ard for reviewing this.
> >
> > Could anyone else please review this patch? thank you!
> >
> > Thanks
> >
> > Annie
> >
> >>
> > diff --git a/OvmfPkg/OvmfPkgIa32.dsc b/OvmfPkg/OvmfPkgIa32.dsc
> > index 29eea82571..fb158f98c9 100644
> > --- a/OvmfPkg/OvmfPkgIa32.dsc
> > +++ b/OvmfPkg/OvmfPkgIa32.dsc
> > @@ -547,7 +547,7 @@
> >  # unknown) workloads / boot paths.
> >
> >  #
> >
> > gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiACPIMemoryNVS|0x80
> >
> > - gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiACPIReclaimMemory|0x10
> >
> > + gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiACPIReclaimMemory|0x12
> >
> > gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiReservedMemoryType|0x80
> >
> > gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiRuntimeServicesCode|0x100
> >
> > gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiRuntimeServicesData|0x100
> >
> > diff --git a/OvmfPkg/OvmfPkgIa32X64.dsc b/OvmfPkg/OvmfPkgIa32X64.dsc
> > index 56d3c49ab2..30d47ca28a 100644
> > --- a/OvmfPkg/OvmfPkgIa32X64.dsc
> > +++ b/OvmfPkg/OvmfPkgIa32X64.dsc
> > @@ -552,7 +552,7 @@
> >  # unknown) workloads / boot paths.
> >
> >  #
> >
> > gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiACPIMemoryNVS|0x80
> >
> > - gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiACPIReclaimMemory|0x10
> >
> > + gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiACPIReclaimMemory|0x12
> >
> > gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiReservedMemoryType|0x80
> >
> > gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiRuntimeServicesCode|0x100
> >
> > gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiRuntimeServicesData|0x100
> >
> > diff --git a/OvmfPkg/OvmfPkgX64.dsc b/OvmfPkg/OvmfPkgX64.dsc
> > index f0924c0f9d..6c10ceedd7 100644
> > --- a/OvmfPkg/OvmfPkgX64.dsc
> > +++ b/OvmfPkg/OvmfPkgX64.dsc
> > @@ -552,7 +552,7 @@
> >  # unknown) workloads / boot paths.
> >
> >  #
> >
> > gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiACPIMemoryNVS|0x80
> >
> > - gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiACPIReclaimMemory|0x10
> >
> > + gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiACPIReclaimMemory|0x12
> >
> > gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiReservedMemoryType|0x80
> >
> > gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiRuntimeServicesCode|0x100
> >
> > gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiRuntimeServicesData|0x100
> >
> 
> 
> 
> 
> >>>
> >>>
> >>>
> >>>
>
>
> 
>
>


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[edk2-devel][edk2-platforms][PATCH v1 4/4] WhiskeylakeOpenBoardPkg/Acpi: BoardAcpiDxe also installs all PcdAcpiTableStorageFile

2022-09-06 Thread Benjamin Doron
Follow AcpiPlatformDxe (from which this module is derived) and install
all ACPI tables added by board.

Cc: Chasel Chiu 
Cc: Nate DeSimone 
Signed-off-by: Benjamin Doron 
---
 .../Acpi/BoardAcpiDxe/BoardAcpiDxe.c  | 15 ++-
 .../Acpi/BoardAcpiDxe/BoardAcpiDxe.inf|  2 ++
 2 files changed, 16 insertions(+), 1 deletion(-)

diff --git 
a/Platform/Intel/WhiskeylakeOpenBoardPkg/Acpi/BoardAcpiDxe/BoardAcpiDxe.c 
b/Platform/Intel/WhiskeylakeOpenBoardPkg/Acpi/BoardAcpiDxe/BoardAcpiDxe.c
index cb5f328a3909..c8c1e0cc2cf2 100644
--- a/Platform/Intel/WhiskeylakeOpenBoardPkg/Acpi/BoardAcpiDxe/BoardAcpiDxe.c
+++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/Acpi/BoardAcpiDxe/BoardAcpiDxe.c
@@ -270,7 +270,20 @@ InstallAcpiBoard (
   //
   // Platform ACPI Tables
   //
-  PublishAcpiTablesFromFv ();
+  Status = PublishAcpiTablesFromFv ();
+  if (EFI_ERROR (Status)) {
+DEBUG ((DEBUG_ERROR, "Error: PublishAcpiTablesFromFv[%g] - %r", 
, Status));
+  }
+  Status = PublishAcpiTablesFromFv (PcdGetPtr (PcdAcpiTableStorageFile));
+  if (EFI_ERROR (Status)) {
+DEBUG ((
+  DEBUG_ERROR,
+  "Error: PublishAcpiTablesFromFv[%g] - %r",
+  PcdGetPtr (PcdAcpiTableStorageFile),
+  Status
+  ));
+DEBUG ((DEBUG_INFO, "Does board contain ACPI tables?\n"));
+  }
 
   //
   // This protocol publish must be done after PublishAcpiTablesFromFv.
diff --git 
a/Platform/Intel/WhiskeylakeOpenBoardPkg/Acpi/BoardAcpiDxe/BoardAcpiDxe.inf 
b/Platform/Intel/WhiskeylakeOpenBoardPkg/Acpi/BoardAcpiDxe/BoardAcpiDxe.inf
index af5c8f1c0609..f17fb588ddb8 100644
--- a/Platform/Intel/WhiskeylakeOpenBoardPkg/Acpi/BoardAcpiDxe/BoardAcpiDxe.inf
+++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/Acpi/BoardAcpiDxe/BoardAcpiDxe.inf
@@ -60,6 +60,8 @@
   gWhiskeylakeOpenBoardPkgTokenSpaceGuid.PcdDisablePassiveTripPoints
   gWhiskeylakeOpenBoardPkgTokenSpaceGuid.PcdDisableCriticalTripPoints
 
+  gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiTableStorageFile
+
 [Depex]
   gEfiAcpiTableProtocolGuid   AND
   gEfiFirmwareVolume2ProtocolGuid AND
-- 
2.37.2



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[edk2-devel][edk2-platforms][PATCH v1 2/4] CometlakeOpenBoardPkg/Acpi: BoardAcpiDxe also installs all PcdAcpiTableStorageFile

2022-09-06 Thread Benjamin Doron
Follow AcpiPlatformDxe (from which this module is derived) and install
all ACPI tables added by board.

Cc: Chasel Chiu 
Cc: Nate DeSimone 
Cc: Rangasai V Chaganty 
Cc: Deepika Kethi Reddy 
Cc: Kathappan Esakkithevar 
Signed-off-by: Benjamin Doron 
---
 .../Acpi/BoardAcpiDxe/BoardAcpiDxe.c  | 15 ++-
 .../Acpi/BoardAcpiDxe/BoardAcpiDxe.inf|  2 ++
 2 files changed, 16 insertions(+), 1 deletion(-)

diff --git 
a/Platform/Intel/CometlakeOpenBoardPkg/Acpi/BoardAcpiDxe/BoardAcpiDxe.c 
b/Platform/Intel/CometlakeOpenBoardPkg/Acpi/BoardAcpiDxe/BoardAcpiDxe.c
index 7fc71bca644a..ba59c84fd4ba 100644
--- a/Platform/Intel/CometlakeOpenBoardPkg/Acpi/BoardAcpiDxe/BoardAcpiDxe.c
+++ b/Platform/Intel/CometlakeOpenBoardPkg/Acpi/BoardAcpiDxe/BoardAcpiDxe.c
@@ -270,7 +270,20 @@ InstallAcpiBoard (
   //
   // Platform ACPI Tables
   //
-  PublishAcpiTablesFromFv ();
+  Status = PublishAcpiTablesFromFv ();
+  if (EFI_ERROR (Status)) {
+DEBUG ((DEBUG_ERROR, "Error: PublishAcpiTablesFromFv[%g] - %r", 
, Status));
+  }
+  Status = PublishAcpiTablesFromFv (PcdGetPtr (PcdAcpiTableStorageFile));
+  if (EFI_ERROR (Status)) {
+DEBUG ((
+  DEBUG_ERROR,
+  "Error: PublishAcpiTablesFromFv[%g] - %r",
+  PcdGetPtr (PcdAcpiTableStorageFile),
+  Status
+  ));
+DEBUG ((DEBUG_INFO, "Does board contain ACPI tables?\n"));
+  }
 
   //
   // This protocol publish must be done after PublishAcpiTablesFromFv.
diff --git 
a/Platform/Intel/CometlakeOpenBoardPkg/Acpi/BoardAcpiDxe/BoardAcpiDxe.inf 
b/Platform/Intel/CometlakeOpenBoardPkg/Acpi/BoardAcpiDxe/BoardAcpiDxe.inf
index 09b67376fbc1..e201964a6896 100644
--- a/Platform/Intel/CometlakeOpenBoardPkg/Acpi/BoardAcpiDxe/BoardAcpiDxe.inf
+++ b/Platform/Intel/CometlakeOpenBoardPkg/Acpi/BoardAcpiDxe/BoardAcpiDxe.inf
@@ -62,6 +62,8 @@
   gMinPlatformPkgTokenSpaceGuid.PcdPciReservedMemBase
   gMinPlatformPkgTokenSpaceGuid.PcdPciReservedMemLimit
 
+  gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiTableStorageFile
+
 [Depex]
   gEfiAcpiTableProtocolGuid   AND
   gEfiFirmwareVolume2ProtocolGuid AND
-- 
2.37.2



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