Re: [Emc-users] G38.2

2007-05-01 Thread Gene Heskett
On Tuesday 01 May 2007, Dean Hedin wrote:
>> And something that would be better done, and with fewer mistakes, with
>> a filter program of some sort.  If I have to write it, well, my C is a
>> little
>> rusty but I think I could come up with something that works eventually.
>
>This is basically what my emcprobe program did in EMC1:
>
>You told it a region specified as a range in XY, a safe Z, and resolution in
>an .ini file
>You then put a probe tip on to match what ever profile you wanted to machine
>with.

So far I've only made one tip, with a conical shape, at about 95 degrees 
included angle, and polished to about an .003 radius so as not to mark up the 
workpiece.  I haven't tried to measure the diamond burr, but I figure its 
probably bigger than that by the time its cut .010" and settled in for what I 
hope is the rest of the pattern.  Much less included angle too.  But what I'm 
looking at doing, the high crown in the middle of a 1.25" run across it might 
be 1/8", and my engraving traces won't go off the edge as I'll scale it to 
stay about 1/8" from the edges.

I measured the ID of the inner pipe and came up with .1875", but when I cut a 
pin on the other end of the tip at .188, it fell in and out, so I had to cut 
expansion slots in the pin with one of those dremel diamond wheels at a feed 
rate of about .05"/minute, then drive my pocket knife blade in to expand it a 
few thou and it grips nicely now.

The only spring I could find at Ace Hdwe that fit turned out to be pretty 
strong for this application, taking well over a pound to compress it the 
width of the cutout window.  A hunk of black ty-wrap was slid in to make the 
adjustable interrupter itself and by carefull adjustment of that & maybe some 
glue to make sure it stays put, I can probably bring the tip pressure at the 
off point to the 4-8 ounce range & not damage the workpiece.

Then I figure on making a duplicate surface to use as a test cut scrap for the 
real engraving.  The actual target of all this I only have one of, and its 
now 90 years old, so I'd rather not further damage it till the pattern is 
worked out.

The last jerk that I had put a barrel in it was handed a finish I did 20 years 
previously and had that un-mistakable 1965 style Colt-Sauer/Weatherby quality 
mirror finish on it.  I told him to blue it not thinking he would blue the 
whole thing, just the new barrel.  I was horrified when I went back to get it 
and could see he'd taken it all off, and his final polish grit was maybe 180!  
Scratch patterns running ever which way at random.  It still to this day 
looks like a J. C. Higgens shotgun after a month rattling around in the 
ranches pickup, in the bed that is.  About due for yet another fresh barrel, 
I'll see what I can do toward getting it ready for the hot salts tanks myself 
this time.

>The utility then ran by directly talking to EMC through NML and scanned the
>surface.
>It's output was a gcode file that you could then play back into EMC to
>machine the surface.
>
>The utility could handle multiple region definitions.  For example you could
>scan one area at a fine resolution,
>and another area at a course resolution.
>
>Another tip.  I would use modeling clay to build up smooth approaches to the
>edge of the model.
>I would then probe a square XY region slightly larger than the model.
>
>I wouldn't bother trying to scan along curves in the XY plane, since
>ultimately I would
>be machining with a ball mill and would end up with a scalloped surface.
>You kind of want the scallops at a regular interval.  Makes it easy to final
>finish with a file.
>This is pretty much how the professional CAM programs do it.

Yeah, the test piece will be cut with a 1/4" ball mill as all curves are 
convex to the ball anyway.

>FYI,  It took several hours to probe a 4"x5" surface even at .1 grid
>resolution.

At my machines speed, I figure about a day to probe that floor plate on 
a .010" grid.  At least that won't be putting hours on the spindle drive. :)

>Because of this it is important to make sure the probe does'nt bind and the
>wires
>to the probe are carefuly mounted out of the way, etc..

Haven't gotten that far, the digikey stuff is still on an ox-cart with ups 
decals on it, someplace between Thief River Falls Minn., and the middle of 
West Virginia.

>I'd like to get this utility working with EMC2.  However I can't afford the
>risk of upgrading my machine to
>EMC2 right now (too many active projects in the pipeline).

For me, the "growing pains" have been relatively minor.  Old capabilities 
haven't gone away that I know of.  With backlash comp now working even for 
steppers, its running pretty sweetly here, some cvs HEAD beta of 2.1 IIRC.  I 
really should do a fresh cvs pull though, its been nearly a year now. OTOH, 
if its a production cash cow, you don't bring her fresh till the production 
is going down anyway. :)

-- 
Cheers, Gene
"There are four boxes to be used in defense of liberty:
 soap, ballot, jury, a

[Emc-users] Newest 5i20 FPGA code

2007-05-01 Thread Seb James
Hi List,

This message is about the latest 5i20 FPGA code which John Kasunich said
he was working on in February this year (around then anyhow).

The feature in this new code which I need is the ability to configure
the 5i20 with between 0 and 8 axes of (pwm)servo outputs and encoder
inputs with the rest of the 5i20 I/O being used as simple logic inputs
and outputs. 

In my case, the servo/encoder i/o will be routed through a Mesa 7i33
board for signal conditioning.

Has this new code made its way into a release yet? I'm going to check
out the CVS EMC2 version and have a look in there right now. None of the
changelogs say anything about this code in a release, so I guess it
hasn't been released yet.

I'm going to try to make use of the code, so I may have some questions
for the list!

best regards,

Seb James


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Re: [Emc-users] G38.2

2007-05-01 Thread Sven Mueller
Dean Hedin wrote:

[probing by going to x,y on safe z, than plunging down until probe hits
object]

> FYI,  It took several hours to probe a 4"x5" surface even at .1 grid 
> resolution.

Hmm, I'm wondering: If I used a probe that is detecting horizontal hits
as easily as it detects vertical hits (e.g. a renishaw type probe),
wouldn't it normally result in a faster scan to basically:

For any x position you want to scan:

go to minimum y,z

increase y until probe hits (record height minimum_z for all points
skipped over by this)

retract y until probe doesn't hit

loop:

increase z by step_z

increase y by step_z

if the probe hits: retract z until probe doesn't hit, increase again
until it hits. (record z)

if probe didn't hit: increase z until probe hits. (record z)

goto loop until y>max_y



Since you don't need to retract z to safe height each time, you would
save quite a bit of time, I would assume. Even more savings could be
achieved if you did the first part (scanning at minimum_z) from both
sides first and only did the detailed surface scan (the loop) for the
y-range where the probe hit an object.

Unfortunately, this couldn't be done with g-code until now I think. But
perhaps the emc2 devs could come up with a C routine one could use from
the GUI parts which did that. Would be really neat.

regards,
Sven

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Re: [Emc-users] Newest 5i20 FPGA code

2007-05-01 Thread John Kasunich
Seb James wrote:
> Hi List,
> 
> This message is about the latest 5i20 FPGA code which John Kasunich said
> he was working on in February this year (around then anyhow).
> 
> The feature in this new code which I need is the ability to configure
> the 5i20 with between 0 and 8 axes of (pwm)servo outputs and encoder
> inputs with the rest of the 5i20 I/O being used as simple logic inputs
> and outputs. 
> 
> In my case, the servo/encoder i/o will be routed through a Mesa 7i33
> board for signal conditioning.
> 
> Has this new code made its way into a release yet? I'm going to check
> out the CVS EMC2 version and have a look in there right now. None of the
> changelogs say anything about this code in a release, so I guess it
> hasn't been released yet.
> 
> I'm going to try to make use of the code, so I may have some questions
> for the list!

My stuff isn't there yet.  I have been getting bogged down in a bunch
of "infrastructure" issues having to do with managing various FPGA 
configurations.  In addition, my first target is step generators.

However, I believe the existing "hostmot5-8" configuration will meet 
your needs.  For some notes, see: 
http://cvs.linuxcnc.org/cgi-bin/cvsweb.cgi/emc2/src/hal/drivers/m5i20/README.txt?rev=1.3

That config is not part of the version 2.1.4 release - you'll need to
get a CVS checkout to use it.  It will be in 2.2.0 however.

Regards,

John Kasunich

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Re: [Emc-users] Newest 5i20 FPGA code

2007-05-01 Thread Seb James
On Tue, 2007-05-01 at 08:56 -0400, John Kasunich wrote:
> Seb James wrote:
> > Hi List,
> > 
> > This message is about the latest 5i20 FPGA code which John Kasunich said
> > he was working on in February this year (around then anyhow).
> > 
> > The feature in this new code which I need is the ability to configure
> > the 5i20 with between 0 and 8 axes of (pwm)servo outputs and encoder
> > inputs with the rest of the 5i20 I/O being used as simple logic inputs
> > and outputs. 
> > 
> > In my case, the servo/encoder i/o will be routed through a Mesa 7i33
> > board for signal conditioning.
> > 
> > Has this new code made its way into a release yet? I'm going to check
> > out the CVS EMC2 version and have a look in there right now. None of the
> > changelogs say anything about this code in a release, so I guess it
> > hasn't been released yet.
> > 
> > I'm going to try to make use of the code, so I may have some questions
> > for the list!
> 
> My stuff isn't there yet.  I have been getting bogged down in a bunch
> of "infrastructure" issues having to do with managing various FPGA 
> configurations.  In addition, my first target is step generators.
> 
> However, I believe the existing "hostmot5-8" configuration will meet 
> your needs.  For some notes, see: 
> http://cvs.linuxcnc.org/cgi-bin/cvsweb.cgi/emc2/src/hal/drivers/m5i20/README.txt?rev=1.3
> 
> That config is not part of the version 2.1.4 release - you'll need to
> get a CVS checkout to use it.  It will be in 2.2.0 however.
> 

I've been having a look at the emc2-trunk source tree. Is your new stuff
going in emc2-trunk/src/hal/drivers/mesa_5i2x?

I think the hostmot5-8 configuration will be close to what I require for
one of my boards (we're doing a simple 2 axis machine with one 5i20 then
we'll move on to the 9 axis machine which requires 4 5i20 boards). Does
the hostmot5-8 configuration bind 5i20 pins to particular servo/encoder
functions? By that I means would hostmot5-8 fix, say, pin 25 to be a
servo pwm direction output?

Initially I need a configuration which has exactly two servo/encoder
axes (12 pins in all), 31 logic inputs and 29 logic outputs. 

I think I need to write a new VHDL configuration for this setup. Would
you agree?

Seb


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Re: [Emc-users] Newest 5i20 FPGA code

2007-05-01 Thread Anders Wallin
 > By that I means would hostmot5-8 fix, say, pin 25 to be a
> servo pwm direction output?

yes, the hostmot-4 configuration pinout is in the manual:
http://www.linuxcnc.org/docs/html/hal/drivers/index.html

> Initially I need a configuration which has exactly two servo/encoder
> axes (12 pins in all), 31 logic inputs and 29 logic outputs. 

hostmot-4 uses one 50-pin connector to provide 4 axes of motion and two 
50-pin connectors to provide 16 inputs and 8 outputs each.

hostmot-8 uses two 50-pin connectors for 8 axes of motion and you are 
left with a single connector for IO, i.e. 16 inputs 8 outputs.

if none of these are what you want then yes you need to write your own VHDL.



Anders

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Re: [Emc-users] Newest 5i20 FPGA code

2007-05-01 Thread Peter C. Wallace
On Tue, 1 May 2007, Seb James wrote:

> Date: Tue, 01 May 2007 14:26:35 +0100
> From: Seb James <[EMAIL PROTECTED]>
> Reply-To: "Enhanced Machine Controller (EMC)"
> 
> To: "Enhanced Machine Controller (EMC)" 
> Subject: Re: [Emc-users] Newest 5i20 FPGA code
> 
> On Tue, 2007-05-01 at 08:56 -0400, John Kasunich wrote:
>> Seb James wrote:
>>> Hi List,
>>>
>>> This message is about the latest 5i20 FPGA code which John Kasunich said
>>> he was working on in February this year (around then anyhow).
>>>
>>> The feature in this new code which I need is the ability to configure
>>> the 5i20 with between 0 and 8 axes of (pwm)servo outputs and encoder
>>> inputs with the rest of the 5i20 I/O being used as simple logic inputs
>>> and outputs.
>>>
>>> In my case, the servo/encoder i/o will be routed through a Mesa 7i33
>>> board for signal conditioning.
>>>
>>> Has this new code made its way into a release yet? I'm going to check
>>> out the CVS EMC2 version and have a look in there right now. None of the
>>> changelogs say anything about this code in a release, so I guess it
>>> hasn't been released yet.
>>>
>>> I'm going to try to make use of the code, so I may have some questions
>>> for the list!
>>
>> My stuff isn't there yet.  I have been getting bogged down in a bunch
>> of "infrastructure" issues having to do with managing various FPGA
>> configurations.  In addition, my first target is step generators.
>>
>> However, I believe the existing "hostmot5-8" configuration will meet
>> your needs.  For some notes, see:
>> http://cvs.linuxcnc.org/cgi-bin/cvsweb.cgi/emc2/src/hal/drivers/m5i20/README.txt?rev=1.3
>>
>> That config is not part of the version 2.1.4 release - you'll need to
>> get a CVS checkout to use it.  It will be in 2.2.0 however.
>>
>
> I've been having a look at the emc2-trunk source tree. Is your new stuff
> going in emc2-trunk/src/hal/drivers/mesa_5i2x?
>
> I think the hostmot5-8 configuration will be close to what I require for
> one of my boards (we're doing a simple 2 axis machine with one 5i20 then
> we'll move on to the 9 axis machine which requires 4 5i20 boards). Does
> the hostmot5-8 configuration bind 5i20 pins to particular servo/encoder
> functions? By that I means would hostmot5-8 fix, say, pin 25 to be a
> servo pwm direction output?
>
> Initially I need a configuration which has exactly two servo/encoder
> axes (12 pins in all), 31 logic inputs and 29 logic outputs.
>
> I think I need to write a new VHDL configuration for this setup. Would
> you agree?
>
> Seb
>
>
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>

If someone would write a updated driver, I have a 12 axis servo configuration 
with servo outputs overlaid on I/O (so if they are not enabled you have 72 bit 
of I/O). This is not a fancy as John K's, but the pinout definition is just a 
little section that wires the servo pins to I/O pins so the pinout is easy to 
change plus, if you can live with the existing pinout, it can easily be 
programmed to do what you want by just enabling 2 servo axis (leaving 60 pins 
as I/O)


Also we are coming out with a USB/SPI I/O expander with 24 isolated inputs and 
24 isolated outputs. This can use 6 pins on a 50 pin interface connector, (SPI 
mode) allowing 4 expanders to share a 50 pin cable. If you are using isolated 
I/O this could save a lot of 5I20 I/O pins.



Peter Wallace
Mesa Electronics

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(")_(") signature to help him gain world domination.


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Re: [Emc-users] Newest 5i20 FPGA code

2007-05-01 Thread Seb James
On Tue, 2007-05-01 at 16:35 +0300, Anders Wallin wrote:
>  > By that I means would hostmot5-8 fix, say, pin 25 to be a
> > servo pwm direction output?
> 
> yes, the hostmot-4 configuration pinout is in the manual:
> http://www.linuxcnc.org/docs/html/hal/drivers/index.html
> 
> > Initially I need a configuration which has exactly two servo/encoder
> > axes (12 pins in all), 31 logic inputs and 29 logic outputs. 
> 
> hostmot-4 uses one 50-pin connector to provide 4 axes of motion and two 
> 50-pin connectors to provide 16 inputs and 8 outputs each.
> 
> hostmot-8 uses two 50-pin connectors for 8 axes of motion and you are 
> left with a single connector for IO, i.e. 16 inputs 8 outputs.
> 
> if none of these are what you want then yes you need to write your own VHDL.

Yes, that's what I need to do..

I downloaded the Xilinx developer code. Wow - there's a lot of it, but
it seems it caters for all of their products. Can anyone help kickstart
my vhdl tinkering by a quick description of the development process to
create the .bit files that you load onto the Xilinx chip on the Mesa
board?

Cheers,

Se


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Re: [Emc-users] Newest 5i20 FPGA code

2007-05-01 Thread Seb James
On Tue, 2007-05-01 at 07:06 -0700, Peter C. Wallace wrote:
> On Tue, 1 May 2007, Seb James wrote:
> 
> > Date: Tue, 01 May 2007 14:26:35 +0100
> > From: Seb James <[EMAIL PROTECTED]>
> > Reply-To: "Enhanced Machine Controller (EMC)"
> > 
> > To: "Enhanced Machine Controller (EMC)" 
> > Subject: Re: [Emc-users] Newest 5i20 FPGA code
> > 
> > On Tue, 2007-05-01 at 08:56 -0400, John Kasunich wrote:
> >> Seb James wrote:
> >>> Hi List,
> >>>
> >>> This message is about the latest 5i20 FPGA code which John Kasunich said
> >>> he was working on in February this year (around then anyhow).
> >>>
> >>> The feature in this new code which I need is the ability to configure
> >>> the 5i20 with between 0 and 8 axes of (pwm)servo outputs and encoder
> >>> inputs with the rest of the 5i20 I/O being used as simple logic inputs
> >>> and outputs.
> >>>
> >>> In my case, the servo/encoder i/o will be routed through a Mesa 7i33
> >>> board for signal conditioning.
> >>>
> >>> Has this new code made its way into a release yet? I'm going to check
> >>> out the CVS EMC2 version and have a look in there right now. None of the
> >>> changelogs say anything about this code in a release, so I guess it
> >>> hasn't been released yet.
> >>>
> >>> I'm going to try to make use of the code, so I may have some questions
> >>> for the list!
> >>
> >> My stuff isn't there yet.  I have been getting bogged down in a bunch
> >> of "infrastructure" issues having to do with managing various FPGA
> >> configurations.  In addition, my first target is step generators.
> >>
> >> However, I believe the existing "hostmot5-8" configuration will meet
> >> your needs.  For some notes, see:
> >> http://cvs.linuxcnc.org/cgi-bin/cvsweb.cgi/emc2/src/hal/drivers/m5i20/README.txt?rev=1.3
> >>
> >> That config is not part of the version 2.1.4 release - you'll need to
> >> get a CVS checkout to use it.  It will be in 2.2.0 however.
> >>
> >
> > I've been having a look at the emc2-trunk source tree. Is your new stuff
> > going in emc2-trunk/src/hal/drivers/mesa_5i2x?
> >
> > I think the hostmot5-8 configuration will be close to what I require for
> > one of my boards (we're doing a simple 2 axis machine with one 5i20 then
> > we'll move on to the 9 axis machine which requires 4 5i20 boards). Does
> > the hostmot5-8 configuration bind 5i20 pins to particular servo/encoder
> > functions? By that I means would hostmot5-8 fix, say, pin 25 to be a
> > servo pwm direction output?
> >
> > Initially I need a configuration which has exactly two servo/encoder
> > axes (12 pins in all), 31 logic inputs and 29 logic outputs.
> >
> > I think I need to write a new VHDL configuration for this setup. Would
> > you agree?
> >
> > Seb
> >
> 
> If someone would write a updated driver, I have a 12 axis servo configuration 
> with servo outputs overlaid on I/O (so if they are not enabled you have 72 
> bit 
> of I/O). This is not a fancy as John K's, but the pinout definition is just a 
> little section that wires the servo pins to I/O pins so the pinout is easy to 
> change plus, if you can live with the existing pinout, it can easily be 
> programmed to do what you want by just enabling 2 servo axis (leaving 60 pins 
> as I/O)

Hi Peter,

Does this "configuration with servo outputs overlaid on I/O" place any
limit on the rate at which a pwm can be generated? Not that I am too
worried about this, so long as these outputs can drive your 7I33 board.

What do you mean by an updated driver? What changes need to be made in
the driver? Is the work that John K has been doing on a new driver going
to fit the bill?

When you say "this is not as fancy as John K's" do you mean that your
configuration is not as fancy as the hostmotXXX configurations which are
in the emc2 cvs trunk?

> Also we are coming out with a USB/SPI I/O expander with 24 isolated inputs 
> and 
> 24 isolated outputs. This can use 6 pins on a 50 pin interface connector, 
> (SPI 
> mode) allowing 4 expanders to share a 50 pin cable. If you are using isolated 
> I/O this could save a lot of 5I20 I/O pins.

That sounds interesting, but I have just had some great big pcbs made up
with 12 50 pin IDCs on to connect to an array of 4 of your 5I20 boards!

Seb


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Re: [Emc-users] Newest 5i20 FPGA code

2007-05-01 Thread John Prentice
Seb

>> if none of these are what you want then yes you need to write your own 
>> VHDL.
>
> Yes, that's what I need to do..
>
> I downloaded the Xilinx developer code. Wow - there's a lot of it, but
> it seems it caters for all of their products. Can anyone help kickstart
> my vhdl tinkering by a quick description of the development process to
> create the .bit files that you load onto the Xilinx chip on the Mesa
> board?
>

That is a tall order and I am afraid I am only going to give a superficial 
idea - I hope it is not insulting.

You essentially provide two inputs. A source file of the hardware 
description language and a set of "constraints". In the simplest form these 
constraints are the mapping of HDL signal names onto physical pins of the 
chip and defining the electrical characteristics (e.g. LSTTL, pullups etc.) 
of the pins.

The Xilinix ISE automates the workflow when you have this data by double 
clicking on any stage in the Process pane..

I have uploaded a short movie of this at

www.castlewoodconsultants.com/Misc/ISEWorkflow.wmv

I am afraid I use Verilog as HDL so cannot give you a VHDL example with 
which to play.

John Prentice 




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Re: [Emc-users] Newest 5i20 FPGA code

2007-05-01 Thread Peter C. Wallace
On Tue, 1 May 2007, Seb James wrote:

> Date: Tue, 01 May 2007 15:28:43 +0100
> From: Seb James <[EMAIL PROTECTED]>
> Reply-To: "Enhanced Machine Controller (EMC)"
> 
> To: "Enhanced Machine Controller (EMC)" 
> Subject: Re: [Emc-users] Newest 5i20 FPGA code
> 
> On Tue, 2007-05-01 at 07:06 -0700, Peter C. Wallace wrote:
>> On Tue, 1 May 2007, Seb James wrote:
>>
>>> Date: Tue, 01 May 2007 14:26:35 +0100
>>> From: Seb James <[EMAIL PROTECTED]>
>>> Reply-To: "Enhanced Machine Controller (EMC)"
>>> 
>>> To: "Enhanced Machine Controller (EMC)" 
>>> Subject: Re: [Emc-users] Newest 5i20 FPGA code
>>>
>>> On Tue, 2007-05-01 at 08:56 -0400, John Kasunich wrote:
 Seb James wrote:
> Hi List,
>
> This message is about the latest 5i20 FPGA code which John Kasunich said
> he was working on in February this year (around then anyhow).
>
> The feature in this new code which I need is the ability to configure
> the 5i20 with between 0 and 8 axes of (pwm)servo outputs and encoder
> inputs with the rest of the 5i20 I/O being used as simple logic inputs
> and outputs.
>
> In my case, the servo/encoder i/o will be routed through a Mesa 7i33
> board for signal conditioning.
>
> Has this new code made its way into a release yet? I'm going to check
> out the CVS EMC2 version and have a look in there right now. None of the
> changelogs say anything about this code in a release, so I guess it
> hasn't been released yet.
>
> I'm going to try to make use of the code, so I may have some questions
> for the list!

 My stuff isn't there yet.  I have been getting bogged down in a bunch
 of "infrastructure" issues having to do with managing various FPGA
 configurations.  In addition, my first target is step generators.

 However, I believe the existing "hostmot5-8" configuration will meet
 your needs.  For some notes, see:
 http://cvs.linuxcnc.org/cgi-bin/cvsweb.cgi/emc2/src/hal/drivers/m5i20/README.txt?rev=1.3

 That config is not part of the version 2.1.4 release - you'll need to
 get a CVS checkout to use it.  It will be in 2.2.0 however.

>>>
>>> I've been having a look at the emc2-trunk source tree. Is your new stuff
>>> going in emc2-trunk/src/hal/drivers/mesa_5i2x?
>>>
>>> I think the hostmot5-8 configuration will be close to what I require for
>>> one of my boards (we're doing a simple 2 axis machine with one 5i20 then
>>> we'll move on to the 9 axis machine which requires 4 5i20 boards). Does
>>> the hostmot5-8 configuration bind 5i20 pins to particular servo/encoder
>>> functions? By that I means would hostmot5-8 fix, say, pin 25 to be a
>>> servo pwm direction output?
>>>
>>> Initially I need a configuration which has exactly two servo/encoder
>>> axes (12 pins in all), 31 logic inputs and 29 logic outputs.
>>>
>>> I think I need to write a new VHDL configuration for this setup. Would
>>> you agree?
>>>
>>> Seb
>>>
>>
>> If someone would write a updated driver, I have a 12 axis servo configuration
>> with servo outputs overlaid on I/O (so if they are not enabled you have 72 
>> bit
>> of I/O). This is not a fancy as John K's, but the pinout definition is just a
>> little section that wires the servo pins to I/O pins so the pinout is easy to
>> change plus, if you can live with the existing pinout, it can easily be
>> programmed to do what you want by just enabling 2 servo axis (leaving 60 pins
>> as I/O)
>
> Hi Peter,
>
> Does this "configuration with servo outputs overlaid on I/O" place any
> limit on the rate at which a pwm can be generated? Not that I am too
> worried about this, so long as these outputs can drive your 7I33 board.

The PWM generators have been simplified (no signed/unsigned mode) but have a 
resolution mask so they can be 8/9/10/11/12 bits. Base PWM rate is 100 MHz so 
10 bit PWM goes up to ~100 KHz, 12 bit up to ~25 KHz. Symmetrical PWM mode is 
supported (for 3 phase AC or 2 phase AC for (variable) voltage mode step motor 
drive) . No problem with 7I33 card.


>
> What do you mean by an updated driver? What changes need to be made in
> the driver? Is the work that John K has been doing on a new driver going
> to fit the bill?

This is updated so its all 32 bit access, bus interface has been cleaned up 
and supports burst mode access. Just added wait state support so 50 MHz local 
bus is supported (Requires added surface mount 0 Ohm "resistors" on 5I20)

Quadrature counters can be the same as old (32 bit count) or new version that 
John K suggested with 16 bit counter and 16 bit "last encoder edge" timestamp 
for less "crunchy" velocity measurement at low speeds.

>
> When you say "this is not as fancy as John K's" do you mean that your
> configuration is not as fancy as the hostmotXXX configurations which are
> in the emc2 cvs trunk?

No, not as fancy as Johns auto build and driver hardware capability 
detect/setup stuff.


>
>> Also we are coming out with a USB/SPI I

Re: [Emc-users] Newest 5i20 FPGA code

2007-05-01 Thread John Kasunich
Seb James wrote:
>>>
>> If someone would write a updated driver, I have a 12 axis servo 
>> configuration 
>> with servo outputs overlaid on I/O (so if they are not enabled you have 72 
>> bit 
>> of I/O). This is not a fancy as John K's, but the pinout definition is just 
>> a 
>> little section that wires the servo pins to I/O pins so the pinout is easy 
>> to 
>> change plus, if you can live with the existing pinout, it can easily be 
>> programmed to do what you want by just enabling 2 servo axis (leaving 60 
>> pins 
>> as I/O)
> 
> Hi Peter,
> 
> Does this "configuration with servo outputs overlaid on I/O" place any
> limit on the rate at which a pwm can be generated? Not that I am too
> worried about this, so long as these outputs can drive your 7I33 board.
> 
> What do you mean by an updated driver? What changes need to be made in
> the driver? Is the work that John K has been doing on a new driver going
> to fit the bill?

I'm working on a driver that will adapt itself to whatever is in the 
FPGA (within reason), and automatically export the right HAL pins and
functions.  The existing configurations (hostmotX-X) rely on the driver
knowing exactly what is in the FPGA, hence the need to revise the driver
whenever you come up with a new FPGA configuration.

> When you say "this is not as fancy as John K's" do you mean that your
> configuration is not as fancy as the hostmotXXX configurations which are
> in the emc2 cvs trunk?

No.  My stuff is intended to go beyond (and maybe replace) the hostmot 
configs.  If I understand Peter correctly, his new config would be 
something like "hostmot5-12".  It would probably work with minor 
revisions to the existing driver.

Seb also wrote:

 > I've been having a look at the emc2-trunk source tree. Is your new
 > stuff going in emc2-trunk/src/hal/drivers/mesa_5i2x?

Yes.

Regards,

John Kasunich

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Re: [Emc-users] Newest 5i20 FPGA code

2007-05-01 Thread John Kasunich
John Prentice wrote:
> Seb
> 
>>> if none of these are what you want then yes you need to write your own 
>>> VHDL.
>> Yes, that's what I need to do..
>>
>> I downloaded the Xilinx developer code. Wow - there's a lot of it, but
>> it seems it caters for all of their products. Can anyone help kickstart
>> my vhdl tinkering by a quick description of the development process to
>> create the .bit files that you load onto the Xilinx chip on the Mesa
>> board?
>>
> 
> That is a tall order and I am afraid I am only going to give a superficial 
> idea - I hope it is not insulting.
> 
> You essentially provide two inputs. A source file of the hardware 
> description language and a set of "constraints". In the simplest form these 
> constraints are the mapping of HDL signal names onto physical pins of the 
> chip and defining the electrical characteristics (e.g. LSTTL, pullups etc.) 
> of the pins.
> 
> The Xilinix ISE automates the workflow when you have this data by double 
> clicking on any stage in the Process pane..
> 
> I have uploaded a short movie of this at
> 
> www.castlewoodconsultants.com/Misc/ISEWorkflow.wmv
> 
Nice demonstration.

I must admit that when I downloaded and installed ISE, I found the GUI 
to be VERY opaque.  "Ok, theres a screen, now what do I do?"  The manual
tells you to push this button, and then that button, but not what the 
buttons really do.  (I guess I'm just not a fan of IDE type systems.)

I started reading the manuals, and once I realized the the real work is 
done by command line programs that are invoked by the GUI, I tossed the 
GUI and never looked back.  I'm using my favorite editor to write the 
VHDL, and GNU make to run the toolchain.  If there is a "foo.vhd", I can 
type "make foo.bit" and the various tools are invoked in the proper 
order.  A few special comments in the top level VHDL are parsed by the 
makefile to tell it what constraints file and FPGA device to use.

That makefile is in CVS (actually I have a few tweaks that I haven't
committed yet, but they will be there soon).  The makefile is in
src/hal/drivers/mesa5i2x/firmware.  In addition to running the Xilinx
tools, it can use GHDL and GtkWave (GPL software) to do simulations,
which I've found very handy.  I'm trying to include simulation testbeds
for the VHDL that I write, and they will wind up in CVS as well.

I will try to get over some of the infrastructure issues and get some
working code in CVS soon (this weekend hopefully).

Regards,

John Kasunich

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Re: [Emc-users] Probing

2007-05-01 Thread Chris Radek
On Mon, Apr 30, 2007 at 08:11:39AM +, Manfredi Leto wrote:
> Hi,
> 
> I proposed the problem of manual tool change and offset determination some 
> time ago, I have a small mill (always an MF70) without tool holders, so I'm 
> very interested.
> I'm happy to see there is a first solution for the problem now.
> 
> Maybe I will be able to test it in a couple of days.
> thanks chris,
> 
> Manfredi


I set up a switch on my machine last night to test.  I fixed a few
little bugs with probing but other than that there were no problems.

Here is example gcode for handling random tool lengths using this
scheme:

http://cvs.linuxcnc.org/cvs/emc2/nc_files/tool-length-probe.ngc?rev=1.1


Chris

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