Re: gEDA-user: Power relay question (Rob Butts)
I would use a microcontroller, for instance Atmel ATtiny ( [1]8 pin version) to replace the relays needed to keep track of 4 states, and an [2]L293 dual H-bridge motor driver to drive the two motors in forward and reverse directions. You would need 4 pins to control the two motors in two directions each, and 1 pin for the momentary contact switch. If you wanted two separate momentary contact switches, one start, the other to return, that would take all 6 I/O pins of the 8 pin chip. Or you could get a larger, 20 pin Attiny, or PIC from Microchip, or an Arduino or PickAxe or Basic Stamp to use for the controller. Mike This is a dumb question but I'm having a mental block. I have a 12 volt dc motor that I want to run from the push of a momentary pushbutton which will run until a limit switch gets hit. Digikey has a power latching relay PB1088-ND (cheap) that I can't tell if it actually latches once energized. (I attached the relay document) Is relays and switches even the best/cheapest solution? Suggestions? Power: quantity of 2 12 volt batteries available Input: momenary 12 volt pushbutton #1 Requirements: 12 volt dc motor #1 12 volt dc motor #2 The application: Stage 1: momentary signal from pushbutton #1 starts motor #1 that runs until a limit switch is hit triggering stage 2 Stage 2: motor #2 runs until another limit switch is hit and remains stable Stage 3: momentary signal from pushbutton #1 reverses the polarity of power to the motor #2 running it until back to it's start position and triggering stage 4 Stage 4: reverse of the ploarity of the power to motor #1 running it until it is back to the start position Thanks for any suggestions if non I'll just wing it. -- Burn the Land, Boil the Sea, You can't take the SKY from me! References 1. http://search.digikey.com/scripts/DkSearch/dksus.dll?Detailname=ATTINY13A-PU-ND 2. http://search.digikey.com/scripts/DkSearch/dksus.dll?Detailname=497-1389-5-ND ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Task list for: Solving the light/heavy symbol problem
DJ, while reading your comments about gschem and pcb requesting ALL the 'packets' that match the partial information in order to fill in gaps reminds me of another minor problem I have with the occasional work _I_ do. I usually start with an Atmel microcontroller and add on parts and wires from there. I can see the packet starting with ATMega64 that would select a microcontroller with given memory size, but with several different package styles, and thus footprints, and different clock speeds and thus spice models. But another problem rather specific to microcontrollers, whether they by PIC, Atmel, Parallax, etc is that most pins have multiple uses, and that is hard to squeeze into the symbol without needing a E size drawing for the schematic. I Know John Doty will roll over in his eventual grave over this, but could the 'packet' of data also have choices for alternate naming in the schematic of pins with multiple uses? You would also have to allow for the fact that the DIP part is often limited to 40 pins, but the TQFP has 44 pins, and when they have one the BGA is 49. Since one of the hardest parts for me of the gschem, gshcm2pcb, pcb tool chain is finding the right footprints for device, switch, connector, I am glad that a heavy library approach is being tried. I think if this works it will further open up the schematic to pcb tool chain for newcomers. Mike -- Burn the Land, Boil the Sea, You can't take the SKY from me! ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: chip data directories in a library ( library packages )
I have not been following this closely, so let me make a guess at what the basics are, and in so doing through my little 2 kopecks worth in. If there were a combined, heavy library with both circuit element symbols and footprints contained within a single grouping for a single device, part number, group of related parts, so that from either gschem or pcb you could search for the root name of that part/device and be given a list of possible symbols to use in gschem (I know Atmel Atmega parts have differing numbers of pins based on DIP, TSOP, etc) and then the matching footprint (or footprints, if several package/mounting styles or sizes could still fit) would be stuffed into the element attributes. Or, if you were working directly in pcb, you would access the same library, search for the same root device name, and be given a list of all known footprints for it ( and possibly stuff the corresponding symbol in the element attributes incase you ever wanted to go backwards to gschem). This group, bundle, set of data might also include spice model data for the part (possibly once again linked to a package style). In either case, you could open up the linked data in either gschem or pcb to 'heavy up' the item you are working on to export the data to some other tool flow (does pcb to spice to verify the design make sense?) As for names, data pack would be similar industry standard data sheets. Technically, these would be data nodes or data branches or data clusters. You could even call them device seeds because they seed desired data into whatever tool path they have data for and you desire. Mike ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: Keyboard shortcut in pcb to increase line width
For some reason, I can not find the keyboard shortcut to increase the width of the selected trace/line. I know I _used_ to use that shortcut a whole lot, but now I have to go through the Select pull-down menu each time, so I am not tweaking the layout as much as I should I tried the Info pull-down menu and read through the key bindings, but I could not find one for line width, just the line tool. And when I select a line and try s, S, CTRL-s, CTRL-S, l' L + +CTRL-+, nothing happens. Occasionally, when I really bang some variations, the line shrivels up, but still does not get wider. I am sure it is something simple and obvious, but I seem to be completely missing it this time around. Mike -- Burn the Land, Boil the Sea, You can't take the SKY from me! ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: Stuck on magnetic nets
I just started up again using gschem after a long break, and was surprised to see a new feature called magnet net. I general, it was great, but it also caused problems. I started with probably an undersized title block, and the page rapidly got stuffed with just a 40 pin ATMega and 3 L293 motor drivers. I had the lines spaced very close, and the magnet net would not let me pick which pin or line to connect to when they were closely spaced. Also, if the line was very close to the pin, it would reject the line altogether. I tried turning it off, and then nothing would connect. Lines were not on the same grid spacing as the pins, and it was really tough making gschem accept a net connection. In short, is there a way to reduce the 'radius' of the magnet net for tight spacing? Mike -- Burn the Land, Boil the Sea, You can't take the SKY from me! ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: Pins not on grid
The second problem I had was the pins on all objects, dips, connectors and power symbols alike, were offset from the grid. When I used snap to grid for net lines, they would never connect without magnetic net, which was causing its own problems. Any idea how reducing the grid size from 100 to 25 mills caused all the pins to be offset? Is there anyway, other than starting over, to fix it? I tried moving the chips and power symbols after the grid size was reduced, but they snapped to a different grid, it seemed. I am also guessing that since I did not remember to do a fresh git of the most recent release but still had these new features that Ubuntu has included gshcem in part of the automatic updates? Mike -- Burn the Land, Boil the Sea, You can't take the SKY from me! ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Pins not on grid
Kai-Martin Knaak, Thank, that cleaned things up a whole lot! I had noticed a 3 stage toggle, but did not understand the third mode and so avoided it. Now, I agree that it seems to be the best idea for default. Thanks again for the help and quick reply! Mike -- Burn the Land, Boil the Sea, You can't take the SKY from me! ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Stuck on magnetic nets
Collin, with snap to grid not set to R and the lines and pins lining up, I won't need the magnetic net as much. I agree, it often short cuts to the point of making routing other lines hard or even making false net connections. I had not thought of holding down CRTL while zooming in to get it to use the new pixel spacing. I will try that later. Now the problem is getting pcb to accept the output of gsch2pcb. It fails the very first element. Last years pcb files started with all the letters and number, then with elements with the name and value on the first line. This year, the output from gsch2pcb jumps straight to elements, and this one fails around its third line: Element(0x00600 0 0 100 0x00) ( Pin(150 300 60 50 1 0x101) Pin(450 300 60 50 2 0x01) ElementArc(300 300 300 300 0 360 10) ElementLine(-60 300-20 300 10) ElementLine(-40 280 -40 320 10) ElementLine(620 300 660 300 10) Mark (150 300) ).fp(RCY300P.fp,C3,10uF) Mike -- Burn the Land, Boil the Sea, You can't take the SKY from me! ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: gsch2pcb output looks wrong
I have fixed up the schematic with the help from above, but when I try to transfer it to pcb, the element groups have almost nothing in the open line (which is usually a parentheses rather than square braces) and the item name, value, etc at at the bottom inside a trailing parentheses. I have attached the circuit schematic and the output from gsch2pcb. I also tried using Xgsch2pcb, but it never seemed to actually convert the schematic. The 2009 version of pcb has a file command for import schematics, but clicking nothing seems to happen. I do not see where you are supposed to identify which schematics to enter. I also tried loading the 2010 version of pcb to see if that fixed whatever the problem is, but I can't get past the ./configure. It hangs looking for GD library, which does not seem to be available on the net anymore. Is there any other way to load the most recent version without gdlib-config? And how do I tell what version of pcb I am running. The Window/About gives the date (version 20091103), but the header from gsch2pcb says pcb 1.99x? Mike -- Burn the Land, Boil the Sea, You can't take the SKY from me! mini_ROV.pcb Description: application/pcb-layout mini_ROV.sch Description: application/geda-schematic ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: gsch2pcb output looks wrong
I noticed that all the footprints were coming from the m4 processor. I did a --help, saw that -s suppressed m4 processing, ran it again with fresh files, and suddenly the whole file loads and disperse all actually has something to disperse. Sorry about the previous bandwidth consumption! Now on to the rats net! Mike -- Burn the Land, Boil the Sea, You can't take the SKY from me! ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Disposing of Etch Solution
I have excess muratic acid/hydrogen per oxcide etch solution after making a board. What is an acceptable way to dispose of it? The hydrogen peroxide is easy to neutralize; just put a piece of charcoal in the bottle and it should decompose. First pour water into a container, then mix in a calculated amount of base, then slowly pour in the acid. I don't know the relevant environmental regs, but I'm sure that at pH 5-9 those chemicals should be safe for any sewer. I had not heard about using charcoal to neutralize the H2O2, I will try that int he future. When I have dumped old muriatic (hydrochloric) acid/hydrogen peroxide, I first sprinkle baking soda or pool soda ash in until it stops foaming, then pour down the sink and rinse well. However, this tarnishes the stainless steel sink, so obviously I have not yet fully neutralized it. Next time I will start with the charcoal. Mike ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: GNUduino - Arduino made with gEDA
Very nice design. I see you have managed to keep it to a single layer board. Very tough to do with so many signal pins. Now I need to design a shield for it that control motor driver H-bridges to control a practice robot for our FIRST FRC competition! Mike ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: [OT] Fluorescent tube help
I do not know much about fluorescent tube ballasts, but I can give some general guesses. 1) Wattage is going to relate to total amount of heat dissipation that the ballast can handle. 2) Tube length (each in parallel or both in series) relates to the voltage needed to first strike and arc, and then maintain the arc that gets converted into light. 3) Tube diameter relates to steady state current needed to change the full width of the tubes. This would be summed (by area, nit diameter) for tubes in parallel. Looking on McMasters-Car, you can pull the same trick of double the input voltage, double the output voltage, two tubes in series on a ballast only rated for one: [1]http://www.mcmaster.com/?orderview=new#fluorescent-ballasts/=8dz6aa NOTE: this is only rates for 120V mains voltage. All the listings at MaMasters for 208 or 240 are for compact fluorescent folded tubes. It seems that the F8T5 tube is only directly supported on 120V ballasts. You might do better to buy a cheap 2 tube, 120V mains F8T5 ballast and a 240 to 120 transformer. Or just buy a brand new two tube lamp at the store and swap for the high UV bulbs. Mike References 1. http://www.mcmaster.com/?orderview=new#fluorescent-ballasts/=8dz6aa ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: gsch2pcb to pcb error
as I am now for the Underwater Robotics Competition. The one in Space and Naval Warfare Systems Center? I watched some of the races on youtube. Seems like the task is getting harder over the years. No, actually this one is a spin off from that one. One of the local 'dissadvantaged' high shcool was in the MATE competitions, until they help them in Canada one year. They were not willing to ask each individual student if he or she had papers to get back into the country, so they started their own competition. It got so popular last year that they had to add a pre-qualifying round to limit the number of teams in the pool on Saturday night. The link is [1]h2orobots.org. If anyone is interested, the competition on Saturday night, (June 12th) will be webcast, just click on the link for Live Video. I am Team Rocket Scientists, but last year I blew out a MOSFET when I applied full power to the electronics and had to throw in the towel before the ROV ever even got wet. I hope to do better this year, but with all the time lost working the problems I had gschem and gsch2pcb, It is getting very tight. Mike References 1. http://h2orobots.org/zindex.htm ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: gsch2pcb to pcb error
On May 31, 2010, at 11:30 AM, Mike Bushroe wrote: 2) I found that several IC have no power. I know that John Doty does not like to have his schematics cluttered up with surperfluous Vcc and Gnd connections. No, I (and others) tend to use separate power symbols, like: [1]http://www.gedasymbols.org/user/kai_martin_knaak/symbols/digital/ 74_pwr.sym Thank you Kai-Martin! And Thank You, John. I had not seen or heard of that one before, and it would go great on the separate power and bypass cap page to link a specific capacitor with a specific IC. Now I wish that I had equivalents for all the others that don't have by[qass caps inherently in their schematic (voltage regulators, MAX232s, etc). But at the other extreme, I just discovered that 7404-1.fp has implicit connections to Vcc and Gnd nets in non-printing attributes, but the identical looking 7404-4.fp does not. I believe you are confusing pcb footprints with gschem symbols. They are very different things. Yes, my bad. i was writing quickly and imprecisely. It was exactly the SYMBOL that I was talking about, not the footprint. Is there some way to indicate which symbols are powerless and which have non-printing power connections built in? From command line: grep net= `locate name-of-symbol.sym` From gschem: 1. Select the symbol. 2. HierarchyDown Symbol 3. EditShow/Hide Inv Text 4. Look for net= attributes. This is especially important in quads and hex parts that have many slots. And is there a way to change the symbol used without deleting the instance and re-entering all the data by hand? The .sch file is text, so a global change of of the symbol name does the trick. I don't gattrib allows changing the actuacl symbol file used, just a few of the attributes. These problems are why I recommend making project-specific copies of symbols rather than using the library symbols as-is. John Doty Noqsi Aerospace, Ltd. I had also done some gedit work on the file, and created an error I could not find to undo, so I stopped using direct editing on the .sch files. Perhaps on the next project, when I am not as far behind a hard schedule as I am now for the Underwater Robotics Competition. Mike References 1. http://www.gedasymbols.org/user/kai_martin_knaak/symbols/digital/74_pwr.sym ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: gsch2pcb to pcb error
I have the PCB layout pretty much arranged and was just starting on the power traces when discovered some more problems. 1) AT some point I must have shorted something out, because several of the bypass caps now have BOTH pins glowing green for being part of the Vcc net. I have not yet tracked done the cause of this, or the fix. Hopefully more on this later. 2) I found that several IC have no power. I know that John Doty does not like to have his schematics cluttered up with surperfluous Vcc and Gnd connections. But at the other extreme, I just discovered that 7404-1.fp has implicit connections to Vcc and Gnd nets in non-printing attributes, but the identical looking 7404-4.fp does not. Is there some way to indicate which symbols are powerless and which have non-printing power connections built in? This is especially important in quads and hex parts that have many slots. And is there a way to change the symbol used without deleting the instance and re-entering all the data by hand? I don't gattrib allows changing the actuacl symbol file used, just a few of the attributes. Slowly making progress. Mike ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: Next problem, PCB looses rats
OK, I have the layout. I found that some symbols don't have explicit OR implicit power connections. Others use VDD and VSS instead of Vcc and GND. I found where I have moved a component slightly a caused a short between ground an power. I got all that fixed. But every time I start to run the power buss, I reach a point where pins are highlighted green, but the rat lines disappear, and the DRC makes it impossible to run a trace to the pin. I have to keep saving the layout, exiting the program, and starting over. Even reloading the net list and displaying the rat lines does not help. This is slowing things down quit a bit. But I don't think I can build a 4 layer board at home, and with only two layers, there is no ground an power planes, so I want the power and ground lines thick and well laid out, so I don't want to rey autorouting just yet. What I am doing wrong this time? Mike ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: gsch2pcb to pcb error
It seems that you had really much trouble -- more than me in the last 3 years since I started using gEDA/PCB. Maybe you can make a summary of the most serious problems and someone can put that list in the wiki. Unintended use of M4 macros seems to be one of your problems, I had that problem long ago too, but I can not remember details. Best regards Stefan Salewski I think the double footprint entries came either when I was fixing placeholder footprint strings with the correct file names and ended up with both the old and the new. But I am not sure if it happened in gschem, or more likely when doing a bulk re-edit in gattrib. At the very least, gattrib is not currently able to indicate double entries, let alone fix them. The next problem I found was connectors that were not connected in PCB when I had all rats displayed. Not until that moment was any error indicated, but it said that it was unable to attach rats for CONN pin 11, CONN pin 11, CONN pin 12, CONN pin 12, etc. It turns out that for some connectors, I put a space between 'CONN' and the number. This space then caused gnetlist to consider a whole bunch of small connectors as one big connector with lots of high numbered pins, PCB could no connect with rat lines because it had nothing matching. Perhaps the tutorial might be modified to remind people to never allow a space in the refdes attribute. Over 170 components to place now, then route the traces! Mike ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: gsch2pcb to pcb error
Are you footprints in the directories you indicate, or subdirectories of the directories you indicate? Are you running gsch2pcb project to use that project file? You might also have a file name that matches an M4 macro name. I like to put a suffix on mine to prevent that, like 0603dj.fp instead of 0603.fp. First off, thanks to all! I FINALLY got PCB to open a file, and an un-edited one straight from gsch2cpb! However, many elements have no, or at most only 1 rat line, so I still need to find what is wrong a fix those. I have never successfully added rat lines in PCB, I always had to uncheck drc and draw in the traces and then drc back on. DJ, thanks again for all the help. No, there are no subdirectories. I have an unsorted pile of downloaded and home made footprints in the package directory. And no they don't match M4 macros. Before I copied them all into /usr/share gsch2pcb reported them as unfindable, and therefore items not added to the layout. And yes, that is exactly the way I call gsch2pcb. I could not conceive of typing all the schematic files names by hand each time. I am REAL glad that there is a project file that does that for me! During the night, I had trouble finding the duplicate footprint symbols and so used gedit. When I next ran gsch2pcb I got a 'Tried to attach a non-text item as an attribute' error message multiple times. It appeared to be localised to ROV_2010_analog.sch, but I could not find exactly where or what it was complaining about. Perhaps I needed a Hex editor to see non-printing characters, Have the error message mention the last successful refdes in the error message would help localise the problem if it shows up again in the future. This time I copied a slightly older version of the file over and went back to trying to make the fixes through gschem and gattrib. I also tried using gnetlist with drc2 to locate the errors, but it always did a segfault before leaving any text on screen or in the file. It looks like geda symbol nmos-2 uses pinnumber S,G,D instead of 1,2,3, and that might be causing some of my missing rat lines. I am just about to try changing the symbol file and see how much that fixes. Then the scary job of placing all those components, connectors, and traces! Mike ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: gsch2pcb to pcb error
John, thanks for the advice on input/output connections. Last year when I did this, I rolled my own H-Bridge motor drivers, and used hierarchy. This year I am simplifying things a little, and using the Solarbotics 2AMP Dual motor drivers instead. Hierarchy still would have work well in most spots, but sometime the page was too small. However, I found that if used the same name with with different numbers after the colon, it did not work. I saw the suggestion to run gnletlist with drc2 and looking at the output I could see many connections to nets named OUTPUT and INPUT, so clearly I was not using the connection symbols correctly. It took much trial and error to discover that I should not have a device type other than none (otherwise it wanted a footprint for the connection), and that the critical attribute was net, not netname or refdes. And that I needed a unique text string before the colon for each separate signal. And that it did not matter whether I used input/output symbols 1, 2 or 3. That took several hours last night and today to iron out, but now the netlist looks good, and drc2 only reports expected errors (test points have pintype input/output, which conlicts with output pins, Reset in a net causes it to be listed as undriven, etc.) Now I have a clean set of schematics, with all the multiply referenced parts given new part numbers (next I will know to just not bother putting refdes numbers on each part and run refdes afterward and let IT keep track of what has been used and what hasn't!) I have run gsch2pcb with double verbose redirected into log files and checked everything there. I still NEVER managed to get any footprint libraries added, even after using gafrc in /gaf, gafrc in /motherboard, setting the PCBLIBPATH environment variable to include them, or putting element-library and element-dir commands in the project file. No matter what I did, the double verbose list of all the directories checked for the custom footprints never varied from /usr/share/pcb! The _only_ way I could fix it was to copy the custom footprints to /usr/share/pcb/pcblib-new/geda. even though that is a write protected folder. However, something worked right on the symbol side, so the custom symbols could remain in /gaf/symbols. Once I moved all the footprints into /usr/share/pcb and got gsch2pcb to find a footprint (element) for every symbol, I tried running pcb. However, that failed every time. I opened up the .new.pcb file and found something strange. the first few elements were formatted like this: Element(0x00 SIP2 CONN18 Video Center 160 10 3 100 0x00) ( Pin(50 50 60 28 1 0x101) Pin(50 150 60 28 2 0x01) ElementLine( 0 50 0 150 20) ElementLine(100 50 100 150 20) ElementLine( 0 100 100 100 10) ElementArc(50 50 50 50 180 180 20) ElementArc(50 150 50 50 0 180 20) Mark(50 50) ) But the pcb log window indicated an error at line 63, and the element there was formatted differently, like this: Element(0x00400 0 0 100 0x00) ( Pin(100 200 60 30 1 0x101) Pin(300 200 60 30 2 0x01) ElementArc(200 200 200 200 0 360 10) Mark (100 200) ).fp(RCY200.fp,C26,150pf) I found that if I hand edited the .pcb file to cut and past the footprint name, refdes, and value into the element line, and then delete everything that trailed the closing parenthesis, the file error moved further down. And looking through the file I see a mix of both formats. Is there any way to re-run or process the file to convert every element into something that pcb will recognize? Or do I need a newer version, that apt-get does not know about? If I have to edit the whole file, it will take some time. But my scripting and Python skills are a bit weak to whip up a script to read each element in, check for trailing details, and move them into the first line then spit out the corrected element and get the next.There are over 4000 lines in the .pcb file, so it will take awhile to hand process. Once again I have to ask for help. Any suggestions? # release: pcb 1.6.3 gsch2pcb version 1.6 Mike ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: gsch2pcb to pcb error
I still NEVER managed to get any footprint libraries added, even after using gafrc in /gaf, gafrc in /motherboard, setting the PCBLIBPATH environment variable Those don't set the paths! You have to pass them to the file gsc2pcb reads, which I name *.prj. I forgot to mention I put several lines in the project file. I am still new enough to just call it 'project'. The file is: component-library /home/mike/gaf/symbols element-library /home/mike/gaf/packages element-dir /home/mike/gaf/packages schematics ATMega164P_motherboard.sch ROV_2010_analog.sch ROV_2010_power.sch ROV_2010_Hydraulics.sch ROV_2010_I2C.sch ROV_2010_subprocesser.sch ROV_2010_camera.sch output -name ROV-2010_motherboard ).fp(RCY200.fp,C26,150pf) This means you have a fooprint with a subtaction (-) in the filename. No subtaction in the file name, file, or footprint attribute. But I _did_ discover when reading the schematic files with gedit that some entries had TWO footprint attributes. When I ran gattrib this was not evident. They seem to be faster to find with gedit highlighting each 'footprint=' and just looking for two that are too close together. It would be nice if drc2 or gattrib would warn about this kind of problem. Mike ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: Source file not found
I am just transitioning from gschem to pcb for a robot controller board I am making. It spans several sheets, and has never successfully been exported by gsch2pcb. One of the error messages is cannot find file ROV_2010_analog.sch. This is one of the sheets in the overall motherboard, and is included in the project file. I even copied the file name and cut-n-pasted it into the project file to make sure that all the spelling and capitalization was correct. Then I did a text search through each schematic file and found only one occurrence of ROV_2010_ananlog.sch in any of the schematic files, and that was part of an 'input' symbol and was listed as 'source'. Do I need to have a source file name for every input and output symbol? Or is it not necessary if both schematics are read in at the same time as part of one project? If I have to add them to each input and output symbol, using gattrib won't help much because it does not create a column for data elements that are never called out in that schematic. Also, I clearly do not understand about the name:number convention on the net reference. Should I change the name for every type of signal, and only use numbers when I have a data bus or very similar signals? Or should I use one name for the entire sheet and number each output in sequence? If so, does the name have to be equal to the schematic's file name? I have not yet succeeded getting all the symbols translated to footprints, so I have not yet seen the results of the input/output pairs on the rats list to see if I got it to work or not. Any help getting that fixed BEFORE I start trying to move all the components and layout the traces would be greatly appreciated! Mike ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: Still confused on using PCB to make footprints
I was trying to make footprints for the screw terminals I am using in my current project. They are on 5 mm spacing, not inches, so I was hesitant to start with a different footprint and try to change it for fear of getting the units mixed up and creating a mess. So I switched PCB to mm with 0.5mm grid spacing. I had no trouble laying out a silkscreen outline, and little trouble adding vias for the three through holes. But then I could not figure out how to change the vias to pins to assign them numbers and or names. And I am still confused on how to make sure that the pins in a footprint I make will match up with the correct nets from the schematic symbol pins. I looked through every drop down menu several times, and checked the key mapping info. I am sure that there is a tutorial somewhere that helps with this, but the only ones I have read seem to skip over the pin creation and naming, and verifying that they associate with the correct pins on the symbol. Could someone explain to me how to create a footprint in PCB with pins and assign names/numbers to them? And what information is needed to get gscht2pcb to correctly assign nets to pads? Is there any way to test a symbol - gsch2pcb - footprint translation without making a whole schematic? And is there a better tutorial on making footprints with PCB for gschem symbols that I should have been reading instead (and if so, where can I find it)? I managed to gerrymander a 2 row header perl script in inches into making the mm spaced single row of holes for the screw terminals using Luciani's perl scripts, but I was doubtful until they finally worked. Mike ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Still confused on using PCB to make footprints
Thanks DJ. The first part of that looks familiar. I guess I never read down far enough to get the footprint creation. I now realize that my problem was that the menu did not indicate that converting the buffer to an element converted vias to pins. I had no idea at all how the pin numbers were assigned. Is there a way to change the pin numbers if you create the vias in the wrong order? Or do you have to cut the element back to the buffer, break the element back to pieces, and manually move the vias around to get the pin numbers in the right places? And also how do you add names to the pins? I know that the gschem symbols have a pin number, a pin sequence number, and a pin label (John Doty is probably snarling already at how heavy this makes the symbols :)). Which governs the association of symbol pin to footprint pin? The pin number, or the pin name/label? And what does the pin sequence number do? Does adding a pin label override the pin numbers if they disagree? Hopefully at this point, most of these questions are for future learning. I _think_ I have the schematics ready to populate the board. The last big hold out, and what was going to be my first plea for help, was CONN8 finding the RJ45 footprint, then not finding it. In the process of documenting all the relevant files, I found that my RJ45.fp footprint was actually the html code for the page that gave the link to the footprint file! It found the file, but failed to make a footprint of it. Now that I have that solved, I should be able to get all elements to load tonight. Mike ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Source file not found
John, Thanks for the clarification. I checked and I have created a unique 'name':'number' for each net attribute, and matched input to output names. If a net is formed for each unique name:number, and all inputs and outputs with that unique name are combined together, then that was exactly what I was looking for. I briefly tried the up/down hierarchy, but clearly did not understand what it was doing, so I went back to just using input and output symbols and giving each connection a unique name. Mike ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Still confused on using PCB to make footprints
Thanks and DJ and John. Now I finally begin to feel comfortable with creating footprints in PCB. But I am still finding another problem with getting the whole pile to translate. I have made or downloaded several custom symbols and footprints. But not matter how many times I insert a gafrc into /gaf or /myproject, it still fails to help gsch2pcb find the custom footprints. For awhile, I was getting an error message saying possible unbalanced parenthesis, but that has gone away, even though I have not changed the parenthesis in either gafrc file. Only the project file seems to actually register when I use the double verbose mode, but even though the element-library is correctly mentioned, it is not searched when looking for footprints. Here is the gafrc in the /gaf directory: (component-library /media/TOSHIBA/gaf/symbols) (element-library /media/TOSHIBA/gaf/footprints) (element-library /media/TOSHIBA/gaf/packages) And here is the one from the project directory (component-library /media/TOSHIBA/gaf/symbols) (element-library /media/TOSHIBA/gaf/footprints) (element-library /media/TOSHIBA/gaf/packages) These are currently setup to run off my USB drive so that I can work off a KNOPPIX disk at work that has gschem and pcb, but the same files ar eon my home drive, with /media/TOSHIBA replaced with /home/mike. The project file is: component-library /media/TOSHIBA/gaf/symbols element-library /media/TOSHIBA/gaf/packages schematics ATMega164P_motherboard.sch ROV_2010_analog.sch ROV_2010_power.sch ROV_2010_Hydraulics.sch ROV_2010_I2C.sch ROV_2010_subprocesser.sch ROV_2010_camera.sch output -name ROV-2010_motherboard When processed, the verbose output is : Loading schematic [/media/TOSHIBA/gaf/ROV_2010/motherboard/ATMega164P_motherboard.sch] Loading schematic [/media/TOSHIBA/gaf/ROV_2010/motherboard/ROV_2010_analog.sch] Loading schematic [/media/TOSHIBA/gaf/ROV_2010/motherboard/ROV_2010_power.sch] Loading schematic [/media/TOSHIBA/gaf/ROV_2010/motherboard/ROV_2010_Hydraulics.sch] Loading schematic [/media/TOSHIBA/gaf/ROV_2010/motherboard/ROV_2010_I2C.sch] Loading schematic [/media/TOSHIBA/gaf/ROV_2010/motherboard/ROV_2010_subprocesser.sch] Loading schematic [/media/TOSHIBA/gaf/ROV_2010/motherboard/ROV_2010_camera.sch] Loading schematic [/media/TOSHIBA/gaf/ROV_2010/motherboard/ATMega164P_motherboard.sch] Loading schematic [/media/TOSHIBA/gaf/ROV_2010/motherboard/ROV_2010_analog.sch] Loading schematic [/media/TOSHIBA/gaf/ROV_2010/motherboard/ROV_2010_power.sch] Loading schematic [/media/TOSHIBA/gaf/ROV_2010/motherboard/ROV_2010_Hydraulics.sch] Loading schematic [/media/TOSHIBA/gaf/ROV_2010/motherboard/ROV_2010_I2C.sch] Loading schematic [/media/TOSHIBA/gaf/ROV_2010/motherboard/ROV_2010_subprocesser.sch] Loading schematic [/media/TOSHIBA/gaf/ROV_2010/motherboard/ROV_2010_camera.sch] Using the m4 processor for pcb footprints Loading schematic [/media/TOSHIBA/gaf/ROV_2010/motherboard/ATMega164P_motherboard.sch] Loading schematic [/media/TOSHIBA/gaf/ROV_2010/motherboard/ROV_2010_analog.sch] Loading schematic [/media/TOSHIBA/gaf/ROV_2010/motherboard/ROV_2010_power.sch] Loading schematic [/media/TOSHIBA/gaf/ROV_2010/motherboard/ROV_2010_Hydraulics.sch] Loading schematic [/media/TOSHIBA/gaf/ROV_2010/motherboard/ROV_2010_I2C.sch] Loading schematic [/media/TOSHIBA/gaf/ROV_2010/motherboard/ROV_2010_subprocesser.sch] Loading schematic [/media/TOSHIBA/gaf/ROV_2010/motherboard/ROV_2010_camera.sch] Reading project file: project component-library /media/TOSHIBA/gaf/symbols element-library /media/TOSHIBA/gaf/packages schematics ATMega164P_motherboard.sch ROV_2010_analog.sch ROV_2010_power.sch ROV_2010_Hydraulics.sch ROV_2010_I2C.sch ROV_2010_subprocesser.sch ROV_2010_camera.sch output -name ROV-2010_motherboard Processing PCBLIBPATH=/usr/share/pcb/pcblib-newlib:/usr/share/pcb/newlib Adding /usr/share/pcb/pcblib-newlib to the newlib search path Adding /usr/share/pcb/newlib to the newlib search path Running command: gnetlist -g pcbpins -o ATMega164P_motherboard.cmd ATMega164P_motherboard.sch ROV_2010_analog.sch ROV_2010_power.sch ROV_2010_Hydraulics.sch ROV_2010_I2C.sch ROV_2010_subprocesser.sch ROV_2010_camera.sch Running command: gnetlist -g PCB -o ATMega164P_motherboard.net ATMega164P_motherboard.sch ROV_2010_analog.sch ROV_2010_power.sch ROV_2010_Hydraulics.sch ROV_2010_I2C.sch ROV_2010_subprocesser.sch ROV_2010_camera.sch Default m4-pcbdir: /usr/share/pcb/m4 gnet-gsch2pcb-tmp.scm override file: (define m4-pcbdir /usr/share/pcb/m4) (define gsch2pcb:use-m4 #t) Running command: gnetlist -g gsch2pcb -o ATMega164P_motherboard.pcb -m gnet-gsch2pcb-tmp.scm
Re: gEDA-user: gattrib
John, Are you even reading my posts? You comments, even when directly connected to quotes of my own text seem completely unrelated and non sequiturs, and often self contradictory. On Apr 27, 2010, at 5:43 PM, Mike Bushroe wrote: John Doty: These refer to the device, not the pattern of copper on the board. The pattern of copper corresponding to a given device footprint should be chosen in the layout process, because it depends (like other layout parameters) on the manufacturing processes. I am still confused by your continual assertion that the copper pattern should be completely separate from the physical part. As pointed out above, a DIP-16 is a through-hole device in any process, the pins are always 0.100 inches apart, the part number defines if it is a typical 300 mill spacing, or a wide 600 mill. What ever process you use to attach the chip to a circuit board, those things never change for that physical part number. The closest I can guess to something that would be 'process dependent' would be the size of the copper pads, and possibly the exclusion zone around them. I could see having one version for hand soldered work, with 40 mill pads and only enough room to run one signal line between them; and a professional fab shop version with 15 mill pads, 10 mill or smaller traces and and spaces and room for 4 or more signals between pins. These properties are critical, not trivial at all. Which properties? What makes them critical? How does these two sentences relate to to the two paragraphs above? I am more confused about what you mean after reading this, not less. If there was a parameter that could be set by gattrib for each part, Each part? Ugh! Specify the parameters of the *process*, leave the schematics alone. Aside from the fact that a part by part process is miserably low productivity, there's no reason to restrict a schematic to a particular process downstream. What process ? You have used that term many times without giving any examples. I gave two that proved the point in the opposite direction, that process has little or no affect on PCB copper patterns (commonly called footprints). If you can not offer an example of a process that PCB is used to design for but requires radically different copper patterns for the same physical part, I might be able to begin to understand what you point is. I know that PCB footprints are useless for designing a VLSI part, or and FPGA, or CPLD. But I also doubt very much that PCB can be used in anyway to design VLSI parts, pr FPGA arrays, or CPLD devices, so claiming that the *process* selects whether you use PCB footprints or FPGA blocks is meaningless. If you were using gschem to design an FPGA, you would not use gsch2pcb, and therefor even if you ran gattrib to fatten out your schematic symbols, you would not bother to do anything with PCB footprints. I agree that the *process* defines the tool chain. But once you have decided on the gschem to PCB tool chain as being best for your process, PCB footprints, as in copper traces, pins, pads, holes, silk screen, and solder mask pattern attached to a specific physical part, is not only needed but required, and should be as easy to reliably edit to make a good conversion to PCB as the original schematic designing was in gschem. Each part? Ugh! Emotional baggage rather then stating facts, observations, or offering arguments tend to convince me that you have no facts, observations, or arguments to back up your opinions. It is difficult to carry on a meaningful, informative, instructive discussion when your chief reply is Ugh! This response of yours also seems to contradict your self again. You keep calling for flexibility, yet when I mention something that increases flexibility, you suddenly throw up your arms and cry loose of flexibility. I have not yet used gattrib, but from what I have read here and elsewhere, its very purpose is to provide the designer with a text based interface to change attributes of symbols one at a time, or possibly in blocks. How can editing a parameter for each symbol to suggest to gsch2pcb that it use a fat pad and trace based footprint of a skinning based pad and trace pattern be anything other using exactly for what it was designed for? And if you do not intend to run PCB, you can run you own special wizard level too chain and never have to worry about any additions to gsch2pcb, and even if you use gatrib, you can easily ignore the portions that relate to PCBs. or gsch2pcb for all to pick from fat or skinny pads, I could see some use in that. But as far
Re: gEDA-user: gattrib
I guess part of my problem with gschem, pcb, and gsch2pcb is that I never understood what gattrib was for. I though it was an internal function used by gschem and gsch2pcb to get the values of symbols attributes out of the schematic file. I never realized it was intended for humans to use. And I DEFINITELY did not understand that it entered new values into the tables. Perhaps if it were called editattrib or setattrib it would be more obvious to newcommers to use it after creating light symbols in gcshem to add pcb footprints and other 'heavy symbol' attributes that are more easily handled in text. Also, this might be more clearly explained in the tutorials. But I still think that some tool, between gschem and pcb so that neither needs to change and John Doty can be happy, that matches up the graphics PCB footprints with the symbol, maybe a text compare of pin names or functions to see if pin 1 of the symbol matches pin A of the footprint. I also like the idea of a database of component part numbers, critical specs like capacitance, resistance, wattage, peak reverse voltage, and also had a footprint for that part. I just cower at the sheer scale of building such a database from many different distributors supplying parts from so many different vendors, each using different styles for their spec sheets, only most of which are online and in PDF form. If we can build such a database, that would help tremendously. But creating it and maintaining it, even with just static data like that listed above, would be a tremendous amount of work. Mike Not because of the bugs I ran into but since choosing a footprint is a difficult process in it self I was longing for a footprint browser. The easiest place to start a clean implementation may be gattrib, that I found conventient to duplicate footprint choices, once one has been assigned gschem. However, the best overview of what is what and therefore choose the right footprint is probably gschem. With gschem open, gattrib should work however, if one remembers, that gschem is in read only then. The problem could be split out of gschem, if it were better supported, to assign a physical part to the symbol. This will probably help other tools too, since e.g. a Spice model is tied to a part, not to a bunch of lines with pins (symbol). I first thought device were the thing to use, but in the standard library it's occupied by names like CAPACITOR_POLARIZED which says noting about rated voltage or ESR. Any ideas? Just my 2 cents ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: gattrib
John Doty: These refer to the device, not the pattern of copper on the board. The pattern of copper corresponding to a given device footprint should be chosen in the layout process, because it depends (like other layout parameters) on the manufacturing processes. I am still confused by your continual assertion that the copper pattern should be completely separate from the physical part. As pointed out above, a DIP-16 is a through-hole device in any process, the pins are always 0.100 inches apart, the part number defines if it is a typical 300 mill spacing, or a wide 600 mill. What ever process you use to attach the chip to a circuit board, those things never change for that physical part number. The closest I can guess to something that would be 'process dependent' would be the size of the copper pads, and possibly the exclusion zone around them. I could see having one version for hand soldered work, with 40 mill pads and only enough room to run one signal line between them; and a professional fab shop version with 15 mill pads, 10 mill or smaller traces and and spaces and room for 4 or more signals between pins. If there was a parameter that could be set by gattrib for each part, or gsch2pcb for all to pick from fat or skinny pads, I could see some use in that. But as far as I know, you can also do all of that in pcb, so there is no range of process variation that still uses a 16 pin dip that could not be edited in pcb. So why must we divorce the copper pattern from the component? How divergent a process are you holding out for that would still be laid out in pcb? Mike ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Matching footprints with symbols
No, that's not what I'm talking about. Footprints depend on the layout tool: gschem is properly agnostic about what layout tool you're using. John Doty Noqsi Aerospace, Ltd. [1]http://www.noqsi.com/ [2]...@noqsi.com So that means the shortcoming is with gchs2cpb? We need a better way of stitching two disparate (and intentionally agnostic) tools that newcomers wish to use as if they were an application suite. We need some way for gsch2pcb to stop at each undefined or unmatched footprint, and since we are running gsch2pcb, we know that the origin of the item is a symbol in gschem, so the symbol can be listed, described, tabulated, or displayed, and then a file browsing window, dialog box, command line menu would open up to go searching to find a matching footprint for that symbol, do some basic reality checks on the pin numbers/names/attributes and possibly either allow the user to fix problems in the symbol or footprint and save the modified version in the project directory, or allow the user to keep looking for a better match. This would be easiest if done in a GUI like gschem and pcb, but possible even for a command line only interface. Although matching up pins and pads in two text listings of symbol and footprint attributes would be difficult. By moving the 'repair' process to gsch2pcb, it would allow gschem and pcb to remain completely agnostic of each other, although to me that sounds more like slightly incompatible with each other. On the other hand, I have never used Spice or any other the other second programs (backends?) that gschem is expected to feed. It may be that with that wider perspective I would be able to see clearly why you want gschem and pcb to remain disjoint. On the other hand, if the interface and conversion programs and scripts between all the tools was more complete, intuitive and foolproof, then the entire package of tools could be combined under a single IDE and act like a unified suite of tools, like I expect most of the commercial packages work. Mike References 1. http://www.noqsi.com/ 2. mailto:j...@noqsi.com ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Matching footprints with symbols
I think it's far more important to have the symbol browser import symbols into the *project* (not the schematic) as they are selected, so they can be customized as necessary. And it should pop up an annoying information box reminding the user to check the symbol until the user turns the box off. John Doty Noqsi Aerospace, Ltd. If this means adding a footprint viewer and editor to the gschem application, and defining a default directory to store 'tweaked' footprints for that project (., or .gaf/packages, etc) then I would still consider that a HUGE improvement over what we have to work with now. I use gEDA on and off, so I do not get enough experience to quickly and efficiently find, make, modify footprints. Having to run a second window with pcb running does not help much, because what is easily visible to pcb may not be in the predefined directory structure of gschem, and therefore gsch2pcb. If there was a second library function/window/file browser in gschem, then if it could find the file, then I would be certain that gsch2pcb also would find it and it would cut way down on the 'element not found, pcb board is incomplete' runs I keep making. Or perhaps just a script or tools that will help set up all the resource files so that both programs access the same directories. I am new enough to Linux that it is not always obvious to me that a resource file is missing, has the wrong information, or the syntax is off and I never see a warning message that it is wrong, only that my board is once again incomplete. Mike ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: GSoC -- Not accepted :-(
I have recently joined another open-source, open-hardware group working on self-replicating rapid prototypers ([1]RepRap) they were also hoping to get supported in this years Google Summer of Code. And I think that they have a worthy project (and have already addicted me to trying to make and improve my own designs), but they started building an application way to late, and also missed the boat this year. Maybe next. There is still a HUGE amount of development to go. Mike References 1. http://www.reprap.org/wiki/WebHome ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: Making circles in PCB
Does anyone know why there is no button or menu command to create a full circle in PCB? I know that the file format actually describes arcs as fractions of a circle, and that it can just as easily be a 360 degree fraction as the 90 degree limit imposed by the GUI. But when making foot prints for non-typical components (this time around an on/off switch), I often want to add circles to the layout or silk layer, but it is very difficult to do using the PCB interface. I haven't tried saving and exiting, manually editing the file to expand an arc to a full circle, saving the edit and re-opening PCB, but trying to piece together 4 separate arcs to make one circle is probably just as difficult. I believe that there is a manually typed command to do something like this, but I don't use gschem and PCB often enough to remember commands not on the pull down menus or GUI buttons. Mike ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: FIRST robotics...
I am also mentoring a FIRST Robotics team. We have already had one session on trying to learn gEDA/PCB and have them etch their own boards using the PCB-in-a-box kit. But since most are running Windoze or MAC, most of the time went to just configuring a KNOPPIX live CD loaded with gEDA. I am hoping to resume the training once we ship, and have them teach others during the Arizona Regionals. I also want to have a simple kit for them to do a manual servo/Victor controller that they can use next year to test servo and motor drive parts without having the whole robot powered up or the main software running. I am planning on using an ATTiny24 to read 2 1-turn pots and an analog joystick to generate 4 PWM outputs. Do you have LEDs for both directions on every channel? That would push the pin out to 16, and require the next larger ATTiny, or maybe even an ATMega to handle that many LEDs, along with 4 analog inputs and 4 PWM outputs. Mike ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: ANN: gschem symbol rotation script (Mark Rages)
Mark, how doy you call the python script? You gave some nice screen shots of the results, but my quick look through the code I did not see an example of how to call it. Does it only do 45 degree rotations, or is one of the arguments the rotation angle? Also, will this work on PCB newlib footprints? I recently made an LED pendant circuit with 12 LEDs arranged in a circle. But with only PCB rotations on 90 steps, I had trouble with line clearances on the outer circle ground line and the one LEd that needed a transistor. So I manually made two more LED footprints, one rotated 30 degrees, and one 60. The square pads were still on 90 degree steps, but the rest of the LED layout was much prettier. Thanks for writing the script for the rest of us. Mike ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: ANN: gschem symbol rotation script (Mark Rages)
Cut to buffer :FreeRotateBuffer(45) Paste GREAT! Wish I had seen that feature last week when trying to get the button battery holder to fit on the backside between the 14 pin DIP and the 12 LEDs. A 45 might have just hit the spot. Thanks, I'll rotate a few symbols to try it out. Mike ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: Multiple copies of single, small board
I have been working with a High School Robotics team, trying to teach them how to design their own circuits using gschem and board layouts using PCB Fab in a Box to etch the boards. But no one practiced before the workshop, so no one got to see their board own board made. To make up for that, I made a nice, tight layout of the 12 blinking LEDs, and I want to make 20 copies of it in one run to send to them to practice soldering, and so that we can all have identical blinking lights at the robotics competitions. However, I could not find a way to get PCB to export the layout in Postscript and have it tile part of the page with multiple copies. So I tried using GIMP and I got so frustrated trying to align the pasted in masks that I gave up on Gimp and tried Open Office Draw. That didn't work either so I went to OO Word Processor. Even there I could find no way to align the 20 copies in 4 rows of 5 each without drawing temporary lines, moving them by hand, and removing the lines. So my first question, does any one know what I was doing wrong in Gimp that I could not get 20 copies of the mask in 4 neat, even rows of 5 spaced, level (for most room between to cut them out) pastes of the solder side mask? The more appropriate question for this forum is: Should we add a three more questions to the Post Script export dialog box. 1) how many copies tiled across do you want, default to 1 2) how many copies tiled down do you want, default to 1 3 what spacing between rows do you want, default to 100 mills, not used if previous value is one I am sure that I am not the only one that want to etch more than one copy of a simple board at once. I assume that if I cut-n-paste within PCB, that it will have to increment the refdes names otherwise the netlist becomes wonky. And it would like to send these out with simple, step-by-step instructions on how to build them, and that won't work of the silkscreen numbers are different on every one. Mike ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: Footprint blues
I am once again wasting hours of time fighting to find a way to get
custom footprints to be recognized by the software. I keep tweaking
gafrc in .gEDA, and in the project folder, and adding lines to the
project file itself. At one point, I had gsch2pcb report looking for
element lithium_button_battery, on the next line found element
lithium_button_battery, and the line after that no element for
lithium_button_battery found, net element B1 will not be included on
the layout.
It is easy to find element files, even custom ones, in pcb. I also
realize that PCB is but one destination for gschem schematics. But if
it were possible to add a little interactivity to gsch2pcb, so that
every time it could not find an M4 macro or newlib element file, it
opened up a dialog box and said can't find element foo for netref
bar, do you want to browse for a file to use?
That would first of be able to get past MANY of my frustrations
every time I start using gschem and pcb again after any length of
time. And maybe it might provide some clues why you got close in your
gafrc, but there were too many '/' in the assembled path name, of the
expected file extension was wrong or something.
I am further limited in my current efforts because I am trying to
teach a course in making pcbs at home, and most of the students do not
have Linux, so we are all running of KNOPPIX 5.2, and I can not add
any permanent files to the built in symbol or footprint lists, and all
exported environment disappear with each new session. So I am trying
to make minimal amounts of extra overhead to add in the custom symbols
and footprints needed for the demo circuits.
And speaking of trouble with gsch2pcb, every gafrc file I have
writen returns a vague error message maybe missmatched parenthesis,
but looking at the system gafrc_gschem in /etc/gEDA the command lines
look exactly the same. Here is my ~/.gEDA/gafrc incase you can help me
figure out what I am doing wrong.
(m4-pcbdir /usr/share/pcb/m4)
(component-library ${HOME}/gschem-sym)
(elements-dir ${HOME}/pcb-elements)
(footprint-library ./packages)
(pcbdir ./packages)
Mike
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Re: gEDA-user: geda-user Digest, Vol 41, Issue 55
Thanks for the reply. I will try the suggestions. I have gotten many footprints from [1]gedasymbols.org, and I think I have been on lucian, too. One question is what folder to download the new foot prints too so that gsch2pcb and pcb can find them. I will look into the idea of keeping a directory of sym links just for a project. That would help with simpler names, too. Mike B On Mon, 2009-10-26 at 11:48 -0700, Mike Bushroe wrote: Is there any plan to add a footprint library to gschem similar to the component library, or the foot print library function in pcb? Mike This was discussed a lot on this mailing list -- you may search the archives. One problem is, that gschem is not PCB centric. gschem - PCB is one workflow, among many others, i.e. spice. A PCB footprint browser or previewer for gschem may not hurt, but there will not be too much benefit. For people familiar with gEDA/PCB finding footprints is no problem. (Checking that footprints fit to parts is much more work -- making printout of layout and putting parts on footprints.) You may try something like ste...@amd64-x2 ~ $ locate -i qfp |grep 64 If unsure, load footprint in PCB for inspection. And see [2]http://www.luciani.org/geda/pcb/pcb-footprint-list.html and [3]http://www.gedasymbols.org/ References 1. http://gedasymbols.org/ 2. http://www.luciani.org/geda/pcb/pcb-footprint-list.html 3. http://www.gedasymbols.org/ ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: missing pcb footprints.
I have been having a lot of trouble with this too. gschem does not have a library search routine for foot prints, and so I often create schematics that gsch2pcb fails to find many of the foot prints and I have to struggle to find the foot prints, sometimes type in huge long names that are easy to get wrong, and try to figure which folders both gsch2pcb and pcb can find the foot prints in. Is there any plan to add a footprint library to gschem similar to the component library, or the foot print library function in pcb? Mike On Mon, 2009-10-26 at 10:07 -0400, Barry Demers wrote: If Peter C. is still interested in having me perform the procedure that he outlined, I'd be more than pleased to do so, however, I believe, that had xgsch2pcb reported to me that the footprint files listed in my schematic attributes were not found/ or not usable for whatever reason, then I wouldn't have created my post. I do understand now that xgsch2pcb is in beta, so Its not really in beta.. although how well it works will depend upon what version you have! The latest version is [1]http://geda.seul.org/dist/geda-xgsch2pcb-0.1.3.tar.gz Although I think I was slack and didn't get a release announcement out. If you push the About button on xgsch2pcb, you will see what version it is, please report back. Version 1.1.2 onwards reports missing footprints. I'd appreciate a copy of the output from xgsch2pcb for interest's sake - although if you have now fixed your schematic, don't worry about doing that. You might still like to try opening up the .gsch2pcb project file with xgsch2pcb, as once you have it working, the GUI is nice to use (IMO - but I'm biased there). Best wishes, Peter C. -- ___ geda-user mailing list [2]geda-u...@moria.seul.org [3]http://www.seul.org/cgi-bin/mailman/listinfo/geda-user End of geda-user Digest, Vol 41, Issue 54 * References 1. http://geda.seul.org/dist/geda-xgsch2pcb-0.1.3.tar.gz 2. mailto:geda-user@moria.seul.org 3. http://www.seul.org/cgi-bin/mailman/listinfo/geda-user ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: rat lines on top/bottom layer
Thanks! I will try that on the next board. Sorry if I have asked old questions. I have been too busy trying to finish the first real PCB board and install it in my under water robot to take the time to search the archives for answers to my questions. If I can't find them, _then_ I will start asking questions here. Mike On Wed, 2009-10-14 at 09:36 -0700, Mike Bushroe wrote: WOW, that looks nice! And having that might help me to remember that PCB keeps defaulting to putting the rat lines on the component side for a single sided board, so when I finally produce the board, I have to turn it over and flip all the components. Mike Rat lines have no default layer, they are just drawn on top of which ever view is shown. I wonder if the issue you've noted is due to the fact that layer 1, the default selected drawing layer is component. Switching to layer 2 solder before drawing any tracks is probably what you need to do. Best wishes, Peter C. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: PCB+GL+3D (Z-coord) Eye-candy
WOW, that looks nice! And having that might help me to remember that PCB keeps defaulting to putting the rat lines on the component side for a single sided board, so when I finally produce the board, I have to turn it over and flip all the components. Mike ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
