Re: Error in compiling STPC Consumer

2005-03-24 Thread Richard Smith
On Thu, 24 Mar 2005 05:54:17 + (GMT), Ramesh Chhaba 

[EMAIL PROTECTED] wrote:
 Yes Sir , 
  u was right that I was missing that payload = line in configuration :) 
 So I have aded that line 
 and also enabled STD_FLASH 
 and ELF_BOOT 
 options and also added 
 PAY_LOAD_SIZE = 64KB 
 and ROM_SIZE =126KB 
 But I want to make my romimage within 256KB 
   
 So what options I acn change to do that 
 currently my image is 356 (approx) KB 

PAY_LOAD_SIZE is not a maximum size.  its the blocksize option thats
used in the 'dd' statemnet that copies the payload into a file.  So
64k is the minimum it will be but it could be 128k, 192k, 256k, etc.

Make your ROM_SIZE be the size you want the image - payload size.  You
can see all the magic for this in the makefile that the config tool
generates.  I remember I had to tweak with my numbers till I got to to
come out the right size.

356k seems a little large for just linubios and etherboot.  How big is
your payload?

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Re: Notebook 340s2 (sis630) 256k Flash

2005-03-24 Thread Richard Smith
  Just hope they didn't route the Flash write through the 87570. The micro has
  2KB or ROM so you can't change that if it's been burned in.
 
 Does that mean something like if I rewrite the Flash, a Part of the old
 Bios is still in the ROM of the 87570. The modified code in flash will
 never be able to work?

It means that the 87570 may have control of the write enable line on
the flash.  If its not asserted no writes to the flash will be
possible unless you pull the chip.  Figureing out whats involved in
allowing the write line to be enabled usually requires snooping on the
IO ports while the factory re-flash routine runs.  Note: thats not the
same as disassembling  the factory re-flash code which could taint
linuxbios with copyrighted code.

 How can I test this, is there any way?

If you have access to a oscope then you can watch the write enable and
the chip enable lines while running the linuxbios flash routine they
must both be asserted at the time you try to write to the flash.

If you are software only then boot bochs on the machine and enable IO
logging then run the factory re-flash.  If it does a buch of port IO
to the 87570 prior to starting to program then WE has a good chance of
being under its control and you will have to duplicate that IO prior
to and/or while running the linuxbios reflash.
 
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Re: Error in compiling STPC Consumer

2005-03-24 Thread Richard Smith
 Second thing I have got the BIOS writer guide for STPC 
 So If I think I changes the replaces the code of STPC_ELITE 
 for that of STPC_ATLAS then I can make it for STPC_ATLAS

If you are going to have to do a lot of re-write work I encourage you
to start over with V2.  V1 is a dead end product and will be very
difficult for the linuxbios developers to support you as we are all
focusing on V2.  V2 is so much nicer to work with compared to V1.  In
V2 almost everything is in C rather than assembly, even all your RAM
init code is C due to Eric's marvelous romcc which is a C compiler
designed to use registers rather than RAM.

The STPC Atlas is basically a fast cryix 486 so I don't know what
impact that has on romcc due to its smaller register set and if its
been tested on that arch much but its shouldn't be too much effort to
make it work.  Right Eric?

I'll be happy to help you with V2.  We have several boards that use
the Atlas here at bitworks and I'd love to see them boot linuxbios
rather than what we are using now.  However, since what I have now
works I don't have much leverage at spending developemnt $$ on
replacing it.  It would be really nice however to be able to boot from
IDE CD-ROM or USB which is something our current BIOS can't do.

But I have systems that I can test on and help you get V2 up and going.

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Re: Error in compiling STPC Consumer

2005-03-24 Thread Richard Smith
 
 
 this is a clear FAQ entry.

For v1 yes but not for v2 and most of our docs now are all for v2.  I
think I would still make v1 people ask so we can tell them not to use
v1.

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Re: developing new BIOS

2005-03-23 Thread Richard Smith
 I alsoo need the help regarding when to write code for BIOS 
   
 what sequence should I follow 
 I mean which part to init first and which to next 
   
 Ex . 
 1. Enable flat mode 
 2.  init memory 
 then ?? 

Are you following the examples from the BIOS Writers guide on the ST
dev site?  I think it may help with your questions.

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Re: Error in compiling STPC Consumer

2005-03-23 Thread Richard Smith
On Wed, 23 Mar 2005 06:53:22 + (GMT), Ramesh Chhaba
[EMAIL PROTECTED] wrote:

 I am using tulip.zelf   as payload that I have taken
 from the rom-o-matic
 
 I have copied this file to the place  of linux kernel
 
 But when i compile it ,it gives eorror. 
 
 6+0 records in
 6+0 records out
 /bin/cp -f linuxbios.rom /root/linuxbios_stpc.bin
 objcopy -O binary -R .note -R .comment -S
 /usr/src/linux//vmlinux linux.bin
 objcopy: there are no sections to be copied!
 make: *** [linux.bin] Error 1
 --

Its still trying to add a kernel to your image.  Check your payload statement. 

LinuxBIOS however built.  That's whats in linuxbios_stpc.bin it just
does not have a payload.

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Re: PCI oddities, OT?

2005-03-15 Thread Richard Smith
 Now something strange happens:
 The Riser allows to jumper the IDSEL/AD to 12 different positions, all but one
 position lead to a collision of 2 PCI cards, yes, only in one position i have
 a collision.

You have a board with 12 different PCI devices on it? Yikes.
 
 Now the strange thing is, that only in this position i can access both devices
 (video-cards) properly (one card is then conflicting with the onboard network
 card).

You will have to tell us what you mean by conflicting.  IO space,
memory space or what? Your description dosen't have enough info in it.

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Re: PCI oddities, OT?

2005-03-15 Thread Richard Smith
  You have a board with 12 different PCI devices on it? Yikes.
 
 No, it are more, see below ;-)
 #lspci

 00:00.0 Host bridge: Intel Corp. 82852/855GM Host Bridge (rev 02)
 00:02.0 VGA compatible controller: Intel Corp. 82852/855GM Integrated Graphics
 00:1d.0 USB Controller: Intel Corp. 82801DB USB (Hub #1) (rev 02)
 00:1e.0 PCI bridge: Intel Corp. 82801BA/CA/DB/EB PCI Bridge (rev 82)
 00:1f.0 ISA bridge: Intel Corp. 82801DB LPC Interface Controller (rev 02)

 01:03.0 Multimedia controller: Philips Semiconductors SAA7146 (rev 01)
 01:07.0 Multimedia video controller: Brooktree Corporation Bt878 Video Capture
 01:09.0 FireWire (IEEE 1394): Texas Instruments TSB43AB22/A IEEE-1394a-2000
 Controller (PHY/Link)

Ok so you have 2 pci buses one with 5 devices and one with 3 and you
are trying to plug the BT device into Bus 1 to make it 4 devices.
 
 But thats not the point - it is the PCI-Riser-Card which allows me to set the
 IDSEL for one of the PCI-Slots, that means, if i set the jumper to another
 location, the board at 01:07 moves to 01:09 of 01:0F - it changes the
 device-number used.

If your riser card  (which BTW unless it has a bridge is not allowed
by the PCI spec)  has 12 AD lines that can attach to the IDSEL line
but you only have 3 devices on your bus I don't see how you can have a
conflict with 11 of those 12 devices. Seems at maximum you should only
be able to conflict with 3 of the 12.

   Now the strange thing is, that only in this position i can access both
   devices (video-cards) properly (one card is then conflicting with the
   onboard network card).
 The onboard network card (intel) is exactly at 01:07 - but not listed above,
 obviously because the Bt878 is sitting in its place.

I'm confused.  Your video cards are on bus 0 how does that relate to
conflicts on Bus 1?

 If i move the Bt878 to, say 01:0F i cannot access it, although listed via
 lspci, it simply wont work, the network card is then visible and functional.
 (currently running 2.6.3 but same with 2.6.10 kernel).

Hmmm.. That seems like some sort of driver issue.  If it shows in an
lspci then the rest is all driver stuff.


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Re: PCI oddities, OT?

2005-03-15 Thread Richard Smith
 Well - it was the one available for the mini-itx-case as low profile one, no
 doubt the manufacturers know why they do not use bridges...

Ah I'm probably talking about a different device.  The riser PCI cards
I'm thinking of will generally add too much extra capacitance to the
bus.  The clock spec is only expects one connector between the
devices.   However, if you don't have a full bus then you can get by. 
The PCI spec is tight but you can push it pretty far out of spec.

 No, no!
 
 The conflicting devices are indeed on the same bus 1, theoretically it would
 look like this:
 01:07.0 Network controller: Intel ...
 01:07.0 Multimedia video controller: Brooktree Corporation Bt878 Video

Sorry I was confusing your VGA devices with your BT framegrabber.
 
 I guessed it must be a problem with interrupt or DMA not working or the card
 not being correctly initialised (PCI-memory ranges), just wild guesses.

Sounds like you will have to work with the driver writer(s). 

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Re: Geode GX1 and IRQ tables

2005-03-09 Thread Richard Smith
 
 Looking at Stefan's /dev/bios code I see the use of 6
 to enable write access to the flash. But I don't see
 the ability to disable the CS5530A's claim of the read
 cycle. So no way to map F elsewhere.

I'm kind of doubtful on this.  ROM shadowing has been part of chipsets
for a long time and it seems really odd that they would just leave it
out.

Do you have the factory bios for the board?  If so fire it up and make
dd read from the f area and then watch the chip select on the bios
chip to see if its asserted.

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Re: Anyone tried LinuxBIOS with freeBSD?

2005-03-09 Thread Richard Smith
 The ADLO loader needs to handle the conversion from the format linuxbios uses
 and whatever bochs bios uses.  Currently the loader is terribly primitive.

Bochs dosen't use any of those tables IIRC.  The ADLO build just
sticks them in the image file and they get block copied by the loader
along with the rest of the code.

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Re: Anyone tried LinuxBIOS with freeBSD?

2005-03-09 Thread Richard Smith
 Richard, can you please make one and post it?  Then I can drop it in the
 wiki if you don't have time.

Here's my additions to the ADLO serial patch.  This will output info
to both the video head and the serial port.

I also preserved the original full redirect which may be useful if
writes to the video device crash things.   Setting DEBUG_SERIAL_REDIR
to 1 enables the serial only redirect.

So DEBUG_SERIAL controls if serial output is done at all and _REDIR if
its only serial or both  serial and video.

Somebody either apply it or stick it somewhere useful.

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adlo_serial.diff
Description: Binary data


diff help

2005-03-09 Thread Richard Smith
I'm trying to create the patch for my 440bx stuff but I need some
help.  I have a bunch of new files that I added in the tree.  So 'cvs
diff' dosen't know about these files and dosen't show anything on the
diffs.

If I check out a new copy of the repository and then diff vs that I
get loads of changes in the CVS directories.

Whats the best way to do this?  Can I make diff ignore certain
directory patterns?  I don't see anything in the man page about
excluding directories just files.

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Re: diff help

2005-03-09 Thread Richard Smith
 I always do something like
 cvs update | grep ^? | cut -f2 -d\ |while read name
 do
 diff -uN /dev/null $name  mypatch.newfiles.diff
 done
 
 but it is not exactly elegant

I can't seem to make that work.  Do I have to protect something from
the shell?  I get a bash: syntax error near unexpected token 'done'
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Re: diff help

2005-03-09 Thread Richard Smith
On Wed, 9 Mar 2005 19:41:28 +0100, Stefan Reinauer [EMAIL PROTECTED] wrote:

  I can't seem to make that work.  Do I have to protect something from
  the shell?  I get a bash: syntax error near unexpected token 'done'
 
 What version of bash are you using? It seems to work fine here.
 echo $BASH_VERSION
 3.00.0(1)-release
 
 Try replacing the diff with an echo $name to see what's wrong. You also
 need to watch the space after '-d\ '

Same error. 

my $BASH_VERSION is 2.05b.0(1)-release

Don't worry about it.  I just created 2 trees and made a find command
that nuked the CVS directories.

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Re: Geode GX1 and IRQ tables

2005-03-09 Thread Richard Smith
On Wed, 9 Mar 2005 17:08:20 -0800 (PST), ramesh bios
[EMAIL PROTECTED] wrote:

 As for watching the chip select line, I'd love to do
 that but I don't have a logic analyzer or probes. I
 guess I could do it with an LED and a sharpened wire
 but I'd rather not risk damage to my board. :-)

Oh.  for some reason I thought you had a scope.  You couldn't do it
with an LED anyway the signal is too fast (you would never see it) 
and it doubtful that the chip select line would be able to source
enough current to light and LED anyway.

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Re: Does anybody needs LinuxBIOS for VMware virtual machines?

2005-03-08 Thread Richard Smith
 As I found on some chipsets, the CPU can be too fast, and it should:
 1. start op
 2. wait for 'smbus active' indicator to go to 1
 3. wait for 'smbus active' indicator to go to 0
 
 is this by any chance your problem?

The code is basiclly a port of the working V1 assembly code converted
to C.  I seem to remember that the V1 code did exactly what you are
talking about.  Perhaps I goofed up a flag polarity or some other core
piece of info while doing it.

I'll whip up a patch today when I get to work and post it up for
anyone interested to look at.  Perhaps a fresh set of eyes will catch
the issue.

I'll need a place to upload to.  Or I guess you can commit to CVS.
Didn't someone mention that they were going to provide space for stuff
like this?

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Re: Does anybody needs LinuxBIOS for VMware virtual machines?

2005-03-08 Thread Richard Smith
  How difficult is it to port Intel 440BX chipset support from
  V1 to V2?
 
 easy. Been done. Ask Richard Smith.
 

Been working on it.  Not even close to done.

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Re: Re[2]: Build error on the EPIA-M

2005-03-08 Thread Richard Smith
 RS I don't think in-kernel will be enough.  pcmica services depend on the
 RS card manager deamon to detect device insertions and register the
 RS device.  cardmgr is user space.
 
 No, you're a bit wrong. PCMCIA services do not _depend_ on cardmgr.
 They may take advantage of it, but do not depend on it. The only case
 when you need cardmgr is for removable (not potentially, but actually)
 devices. If you place your CF card into EPIA MII once and for all, you
 can easily load all your pcmcia drivers manually (or put them
 in-kernel) and have a working PCMCIA IDE.

I did a test where I did exactly that. And the IDE device did not
appear until I ran cardmgr  even though both the card bridge driver
and ide-cs were compiled in.

I'm guessing thought that cardmgr just knows the right /proc/ things
to tickle to make the IDE device appear.  Do you happen to know what
those are?

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Re: Does anybody needs LinuxBIOS for VMware virtual machines?

2005-03-08 Thread Richard Smith
On Tue, 8 Mar 2005 10:31:41 -0500, [EMAIL PROTECTED]
[EMAIL PROTECTED] wrote:
 If you haven't already tried... maybe a few out's to port 0x80 to slow things 
 down.

Thats a pretty quick and easy test.  I'll do that in a bit and see what happens.

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Re: Does anybody needs LinuxBIOS for VMware virtual machines?

2005-03-08 Thread Richard Smith
 [EMAIL PROTECTED] wrote:
  If you haven't already tried... maybe a few out's to port 0x80 to slow 
  things down.
 
 Thats a pretty quick and easy test.  I'll do that in a bit and see what 
 happens.

No change.  I still get all 0xff's (not all zeros like I said earlier)  

I think I'm a victim of my own cleverness.  Digging back into the code
I now rember that my port is _not_ just a port of the V1 assembly. 
Its a total rewrite.

My port is heavly based on the AMD solo board.  Thats the mainboard
that had a superIO closest to mine and out of all the boards I looked
at the AMD north and southbridge code was the cleanist and easiest to
follow.  So I basically took the smbus code from the amd8111 and
changed the register defines and bit flags to match the i440bx.

Well at least thats the theory.  Obviously I got something wrong.  The
structure for the sm_bus read already has a delay function in it.  It
was only one out(80,80) I bumped it up to 6 but no change.

I suspect that one of my flags is just incorrect.  What needs to
happen is lots of debug prints to watch the status register and verify
that a single read really does the right thing.

I was kinda hopeing it would just work.  Sigh.  

I can't really mess with it again till this weekend but if someone
else wants the code let me know.

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Re: Anyone tried LinuxBIOS with freeBSD?

2005-03-08 Thread Richard Smith
On Tue, 8 Mar 2005 09:53:03 -0800, yhlu [EMAIL PROTECTED] wrote:
 So need to make shadowing work in V2 before make ADLO working...?
 
 which region?
 

0xf - 0xf and 0xc- 0xc.  Look at util/ADLO/loader.s 
That shows you the ranges.

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Re: Does anybody needs LinuxBIOS for VMware virtual machines?

2005-03-08 Thread Richard Smith
 
 I think I'll just clean this structure up a bit ... it's just an smbus
 controller ... how hard can it be? 

It was more like.  Hey this is known to work and it looks like it does
exaclty the same thing.  All I have to do change the bits.

 PC hardware. blech.
 
 I don't have any 440 stuff left.

You should.  What did you do with my XMS system I sent you long ago? 
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Re: we need to sequence this

2005-03-08 Thread Richard Smith
On Tue, 08 Mar 2005 14:23:48 -0700, Li-Ta Lo [EMAIL PROTECTED] wrote:
 On Tue, 2005-03-08 at 14:32, YhLu wrote:
  why does the Linux kernel use bitkeeper?
 
  YH
 
I seem to remember it was because bitkeeper has really advanced patch
handling and merging tools.

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Re: Does anybody needs LinuxBIOS for VMware virtual machines?

2005-03-08 Thread Richard Smith
  You should.  What did you do with my XMS system I sent you long ago?
 
 oh, I still have it.
 
 ok, I'll try to bring it out and revive it.

Ok. I'll whip up a patch for v2 and send it to you.

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Re: Does anybody needs LinuxBIOS for VMware virtual machines?

2005-03-08 Thread Richard Smith
 
 Ok. I'll whip up a patch for v2 and send it to you.
 

I'm trying to do a cvs diff command that will show all the new files
I've added to my V2 tree.  Whats the magic options?

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Re: Anyone tried LinuxBIOS with freeBSD?

2005-03-08 Thread Richard Smith
On Tue, 8 Mar 2005 14:44:41 -0800, yhlu [EMAIL PROTECTED] wrote:
 some questions
 1. Where is the defacto location for the serial patch for ADLO?

There isn't one.  Search the archvies or I'll have to make you one
later on tonight.

 2. about vga init, linuxbios v2 already init that and copy that into
 0xc, ADLO still need vga...bin, or let the ADLO do vga init

If you are doing ADLO anyway it may be best to just let ADLO do it but
x86emu is certainly more flexable.  I guess its up to you...

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Re: The way to use a custom BIOS for VMware virtual machines

2005-03-08 Thread Richard Smith
 to a VM's config file:
 
 bios440.filename = path to the BIOS ROM file
 
 The BIOS has to support Intel 440BX chipset and in general
 doesn't need significant changes to support the virtual chipset:
 we do a good job emulating 440BX.

Does it do all the status bits of the smbus controller?  Perhaps I (or
you) can debug my smbus routines with it?

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Re: Anyone tried LinuxBIOS with freeBSD?

2005-03-08 Thread Richard Smith
  There isn't one.  Search the archvies or I'll have to make you one
  later on tonight.
   We need to fix this in the wiki on the ADLO page:
 /!\ FixMe Where is the defacto location for the serial patch?
 
 Richard, can you please make one and post it?  Then I can drop it in the
 wiki if you don't have time.

Well then looks like I'm the defacto location.  I've actually improved
it since the original anyway.  It can now do both video and serial
output simultainously.

I don't know if I have that stuff here with me @ home.  If not then
I'll send the patch in tommorow.

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Re: Anyone tried LinuxBIOS with freeBSD?

2005-03-08 Thread Richard Smith
We need to fix this in the wiki on the ADLO page:
  /!\ FixMe Where is the defacto location for the serial patch?
 
  Richard, can you please make one and post it?  Then I can drop it in the
  wiki if you don't have time.
 
 Well then looks like I'm the defacto location.  I've actually improved
 it since the original anyway.  It can now do both video and serial
 output simultainously.

I just checked CVS and the serial patch is already in.  Hmm I don't
remember doing that but  it got in there somehow.   Not my new and
improved one but the original.  You activate it by setting
DEBUG_SERIAL to 1 in ./util/ADLO/bochs/bios/rombios.c and rebuild. 
Then its just like the wiki says you won't get any video output
because all prints are directed out the serial port.

I've got to run right now but later on tonight I'll ssh in to work and
pick up my fix that does both video and serial.

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Re: we need to sequence this

2005-03-08 Thread Richard Smith
  ??? I thought vfat support long filenames.
 
 I believe it is the length of the pathname rather than individual filenames.
 Although some filenames may also be affected.  I really don't understand
 it either.  This is my dim recollection from watching some of the 
 conversation.

 It probally due to the fact that relative paths are limited to 255
characters.

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Re: Anyone tried LinuxBIOS with freeBSD?

2005-03-08 Thread Richard Smith
 this in CMOS...
 3. VGA BIOS already be copied by LinuxBIOS, but should still need let
 ADLO know the dev and fun of that .--- put that in CMOS?
 4. mptable is alredy in the RAM.
 
 Any suggestion about 1 and 2.

If you use CMOS then make sure the code dosen't depend on some sort of
preformatting of the CMOS area.  My board fex dosen't have battery
backed up CMOS so anything in there is only good until you power
cycle.

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Re: Does anybody needs LinuxBIOS for VMware virtual machines?

2005-03-07 Thread Richard Smith
  How difficult is it to port Intel 440BX chipset support from
  V1 to V2?
 
 Not terribly hard.  It is more of a time/desire thing.  Does vmware
 accurately simulate what is required to bring memory up or do we

Yep. not to bad.  I've got the beginnings of the port already done.  I
got hung up on getting my dump_spd routine to return somthing else
besides zero.  Its really wierd.  I can actually see the data on the
SMbus happening but I don't ever seem to get a result back.

Like Eric says if you don't have to to the RAM init then it will
probally move really quickly.

I haven't had chance to work on it for a while.  If your are
interested I can whip up a patch vs current cvs and send it to you. 
It's not in the V2 tree.


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Re: Anyone tried LinuxBIOS with freeBSD?

2005-03-04 Thread Richard Smith
  Anyone tried LinuxBIOS with freeBSD?
 
 
 I talked to freebsd guys about it. Freebsd makes BIOS calls, so that would
 need to be fixed.

That or see if it works with ADLO.

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Re: ASUS and linuxbios

2005-03-04 Thread Richard Smith
 ASUS boards in general.  The K8V-X uses the VIA K8T800 chipset, which
 seems to be fairly common.  Is anyone working on this?  Is ASUS amiable to
 linuxbios?  What's the word on the street?

Not really.  A lot of the ASUS boards worked with so far have special
things done to the SMbus and thus the SPD can't be read with knowing
what bits in the northbridge to tweak.

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Re: Anyone tried LinuxBIOS with freeBSD?

2005-03-04 Thread Richard Smith
On Fri, 04 Mar 2005 15:37:31 -0600, Bari Ari [EMAIL PROTECTED] wrote:

 http://wiki.linuxbios.org/ADLO
 

That info is all from my V1 stuff  and ADLO is not in V2 yet.  However
its just a elf payload just like anything else so it will load fine. 
It won't run until you get the shadowing right.

I don't remember what the final result of our V2 shadowing discussion
was.  I seem to remember that we thought we could do an elf location
trick that might make the mainboard specific shadowing in ADLO
unnecessary.

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Re: Fw: Re: Documentation [was: new FSF campaign ..]

2005-03-02 Thread Richard Smith
On Wed, 2 Mar 2005 08:05:06 -0700 (MST), Ronald G. Minnich
rminnich@lanl.gov wrote:
 
 
 On Wed, 2 Mar 2005, Peter Karlsson wrote:
 
  Ok, thanks again for educating me!
 
 so, peter, you want to accumulate the Glossary for us :-)

A tehnical glossary would be nice but  one thing we _really_ need is a
listing of all config options and what they do.  This was (and still
is) one of the largest hurdles for me.  And its one of the things that
Google won't find much on.

I compiled part of a list for V1 and its in my FAQ I put out but V2 is
all new to me.

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Re: Fw: Re: Documentation [was: new FSF campaign ..]

2005-03-02 Thread Richard Smith
  listing of all config options and what they do.  This was (and still
  is) one of the largest hurdles for me.  And its one of the things that
  Google won't find much on.
 
 Should this be generated automatically out of Options.lb? There is a lot
 of description in that file already.

Thats a good idea.  What about adding a description section where
this info is filled out.  Then the config tool would generate some
sort of  text file in the target directory describing all the options
that are set.  You could perhaps add some dependency info in there as
well.

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FAQ question fixup

2005-03-02 Thread Richard Smith
I've been adding selected info from my V1 FAQ up into the wiki.  The
following is some info I compiled up on V1 start up.

If someone(s) would update this for V2 and post it t the wiki I think
it would be very useful.



Help!  I'm a newbie and I'm completely lost in the code.

   There seem to be two main parts to linuxbios. The first is 
   arch/{arch}/config/ctr0.base which does the very low level initialization, 
   like turning on memory, etc. The second is arch/{arch}/lib/c_start.S which 
   does whatever else is necessary to call the C function hardwaremain(). 
   hardwaremain() then does whatever else is necessary to load linux.
 
   c_start.S is linked with linuxbios.a, a library containing generic support 
   routines (those found in the lib directory) and anything specified using the 
   'object'  directive in a Config file (and other stuff). The resultant 
   'executable' is called linuxbios_c. The loader script used to link 
   linuxbios_c is config/linuxbios_c.ld, and is configured to be
loaded relative
   to _RAMBASE.
 
   crt0.base is not linked against anything. Any additional assembly routines 
   you need must be specified using the 'mainboardinit' directive in a Config 
   file. This causes the specified assembly file to be added to 
   crt0_includes.h which is in turn included at the start of crt0.base (or at 
   the end in the case of the ppc version). The loader script used to link 
   crt0.base is in arch/{arch}/config/ldscript.base. The resultant 'executable' 
   is called linuxbios and will be loaded at _ROMBASE. The tricky thing is that 
   this loader script will also load the linuxbios_c 'executable' at a location 
   called _payload in this file. The main task of crt0.base is then to 
   initialize enough hardware so that this payload can be copied from rom into 
   ram (which may also involve uncompressing code). Then control is transferred 
   to _start, which is the first location in linuxbios_c.
 
   To get an idea of how crt0.base works, look at the following files. This is 
   the order of execution specified by the configuration file for sis735.
 
 cpu/i386/entry16.inc
 cpu/i386/entry32.inc
 superio/sis/950/setup_serial.inc
 pc80/serial.inc
 arch/i386/lib/console.inc
 cpu/k7/earlymtrr.inc
 northsouthbridge/sis/735/raminit.inc
 arch/i386/config/crt0.base
 
   Next look at c_start.S which will show you what happens once control is 
   transferred to _start. Finally, look at
arch/{arch}/lib/hardwaremain.c to see
   what other stuff is done to get linux loaded.
 
   Most other files are specific to particular hardware, so it can be pretty 
   confusing to just browse the tree.



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Re: Geode GX1 and IRQ tables

2005-03-01 Thread Richard Smith
  And if that were done, Linux would not need to parse a
  PIRQ table, yes?
 
 LinuxBIOS does not do that, it provides the tables and requires the OS
 to do so.

I've found that Linux up to  2.6.9 (I haven't tested .10)  Dosen't do
this fully.  With my 440bx chipset there are config registers in the
northbridge that control which IRQ line each of the PCI PIRQ lines are
routed to.  Even with a proper PIRQ table these registers are not
setup and I get the same error reported.

I have code in my final_mainboard_fixup() that sets these registers
such that they match my table and then every thing works fine.

I suggest you diff the output of lspci -xxx for the northbridge
between linubios and factory bios and resolve all the differences with
the datasheet.

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Re: new free software foundation crusade: http://www.fsf.org/campaigns/free-bios.html

2005-03-01 Thread Richard Smith
  So would someone who DOES have an account please edit the login page to
  put a mailto link there to allow users to at least know that the UI on
  that page isn't as described in the error you get when you try to create
  an account the way the page says to do so?  It's guaranteed to be an FAQ
  which will bother everyone more than the time it would take to fix it on
  the page.
 

You might also note the the login is case sensitive.

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Re: Build error on the EPIA-M

2005-02-27 Thread Richard Smith
 
 it was my understanding that the reason the pcmcia/cardbus stuff got
 integrated into kernel in the first place was to support booting from such
 devices.

I believe you are correct but I seem to remember that it will only be
posible via early userspace due to the database lookup cardmgr has to
do.

I just did a test with my adapter.  I compiled bot the bridge driver
and the ide-cs into my 2.6.10 kernel, moved cardmgr to cardmgr.norun
and re-booted.  The bridge was found but the ide-cs device was not. 
Running /sbin/cardmgr.norun by hand enabled the ide-cs like normal. 
So looks to me like its still dependent on cardmgr.

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Re: Hi 440lx chipset

2005-02-11 Thread Richard Smith
  I don't know what the difference between the 440LX and BX is Buta
  as long as the ram registers are the same the 440bx stuff should
  work fine.  Unless they have done something messy with the access
  to the SPD on the ram.

I just look on developer.intel.com and fouind the 440LX datasheet.  At
my (really) quick glance it looks very similar to the BX.  You might
just get lucky and have it come up and work.

What's the FSB speed of that board?  Can it do 100Mhz or only 66? 

 I've no idea either, but I'll try and give it a shot.  It'll probably
 be Sunday before I get the chance to do anything, though.

Ok I would suggest that you start with a copy of the bitworks board.
(mainboard/bitworks/ims)  change the superIO and rework the ROM size
to match your board and work from there.

 OK, asking the great Google in the sky: MS-6117 superio resulted in
 a single hit, with the following line.
   Superio: Winbond 977TF rev 0 found at port 3F0h
 (I can probably verify that by eyeball the motherboard at some point)

 Does that sound promising?

Yes.  Theres a few number missing but thats probally a w83977tf. 
Theres a w83977ef in the tree.  I'm sure the differences between the
tf and ef are really minor.  But check your number and google for the
datasheet on the part.

Let me send you my config file.  I't probally won't compile against
the stock V1 tree since I think I've added several config options for
my own use but those should be pretty easy to fix.
 
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Re: Via EPIA-MII ROM speed?

2005-02-11 Thread Richard Smith
On Fri, 11 Feb 2005 08:32:43 -0800, Adam Talbot [EMAIL PROTECTED] wrote:
 How fast is the ROM chip MB/s.  In my case a SST 39SF020A 70-4C-NH.   I was
 trying to figure out what would be faster... Linuxbios calling a 2.6 kernel
 off the hard drive, or loading my 2.6 kernel out of the rom file. I have the
 512k rom chips, so I have room to add my kernel.  If I put my kernel into
 the rom, can I just call it as a payload?
 -Adam

Your challenge won't be loading speed but rather getting a kernel in 512k. 

That said my first guess is that in ROM is going to be much faster on
all but a few special cases  but lets just do some math and see...

For loading from the BIOS chip you are talking ISA cycles.  Which is
approx 1uS per cycle but you are only going to get 8 bits at a time
unless you happend to have a 16-Bit flash.

Lets neglect RAM speed since it should be the same in both cases.

The string copy functions of x86 assembly will let you set up a block
memory move with basiclly no overhead.  So you should be able to load
the entire ROM into a block of RAM in 525 mS.

Reading from IDE will happen over the PCI bus which is much faster.  I
don't really know what the actual cycle time of PCI is sine it varies
but the clock is 4 tims faster so lets assume we can get 4x the cycle
rate or 250 ns per cycle.  Ide devices are 16 bit so we are going to
approx 8x the data rate.  However,  the HD involes a seek for every
512 16 bit words.  I don't think FILO takes advantage of the streaming
commands.   So for every 1kb we are talking 128uS of data time and 10
to 12 ms avg seek.  so 512 x 12.128 mS give you 6.2 seconds.

But thats a worst case number and neglects the cache of a modern HD. 
If the HD is able to cache up the entire 512k so the seek times are 0
then the number would have a low of .128 mS * 512  = 65mS.  That's
negelecting the overhead with issuing the read commands to the IDE
device so in reality its higher than that.

So the only answer is you have to test and see.  Could be faster could
be slower.  Also if you take in account harddisk spinup time from a
cold boot which is always going to be larger than .5s it in ROM will
be faster.  But if you use something like a compact flash you don't
have the hd platter spinup time.  Then its going to depend on the
device.

I'd be intersted in hearing about your results.

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Re: Hi 440lx chipset

2005-02-11 Thread Richard Smith
 there are no stupid questions, this stuff is hard. We would be very
 grateful for your help. I would start with richard smith's 440bx port on
 V2.

Yeah that would be great.. _If_ it worked.   I got stuck getting data
back from the SM controller.  Its really wierd.  I can see data
happening on the SMbus with a scope but I always get zeros back when I
try to dump the SPD values.

I had to back burner it for now... Its really hard to justify spending
the time on moving to V2 when V1 pretty much does what we need.  I'll
get it eventually though.

Paul? How are your hacking skills?  Do you write C code?  I could sure
use the help in the V2 port.  The southbridge between the BX and LX
family is exactly the same chip so anything you did would be 100%
re-useable.

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Re: Hi 440lx chipset

2005-02-11 Thread Richard Smith
 Silly question #1: what is V1 and V2?  Do these map to the two modules
 under sourceforge CVS: freebios and freebios2?  Which tree is better
 to use and more likely to work?

V1 is the only tree that can work.  I haven't even given anybody my V2
patches which don't work yet anyway.  So V1 is currently your only
option.

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Re: Hi 440lx chipset

2005-02-10 Thread Richard Smith
 Quick (cheeky) question:  does LinuxBIOS support the 440LX chipset?
 

I don't know what the difference between the 440LX and BX is Buta as
long as the ram registers are the same the 440bx stuff should work
fine.  Unless they have done something messy with the access to the
SPD on the ram.

 PPS output from lspci:

What superIO is on it?  if your superIO supported then V1 should at
least come up and try to setup the ram.  If not then the differences
might be pretty easy to work out by some northbridge dumps.

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Re: VGABIOS

2005-02-07 Thread Richard Smith
  There has been talk of adding emu86 to the kernel. Where's the source
  for your 32K version? I'd also like to look at your code for setting
  up the environment to run the VBIOS. PPC/IA64 people have been asking
  for us to add emu86 support so that they can reset their cards. With a
  32K emu86 there is no need for us to use vm86 mode.

John, 

The 32k version is still a proof of concept for now.  Paulo Marques
did all the work on reducing the emulator size down.  He felt it was
_possible_ to get it to 32k.

Paulos version is based on the Xfree86 emu from the xfree project.  
There are 2 other trees.  One from SciTech soft and Ollies (linuxbios)
tree.  They all are mostly the same.  Especially for the actual x86
emulation part.  SciTech soft is the Full upstream tree and Xfree
(X.org) would perodically sync up push back/pull from improvements
from SciTech.  I've copied Kendall Bennett
[EMAIL PROTECTED] from scitech as he may have some additional
info for you.

The LB  tree is from a Xfree snapshot of long ago.  Most of the
changes to the LB tree are tweaks for proper VGA and PCI bios
interrupt support.

To my knowledge Paulos version has never been tested.  I'm sending you
the source for Paulos stuff from my Yahoo account in a different mail.

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Re: VGABIOS

2005-02-07 Thread Richard Smith
 The emulator is slightly larger than 32KB. For the Tyan S2885
 mainboard, the difference of the final romimage is 41376 bytes.
 
 Actuall, it is for uncompress romimage. For compressed image,
 it is about 16KB.
 

Wow.  I didn't realize that the Linuxbios verison would compile down
and compress so small.  If you apply Paulos work to all that it might
get a lot smaller.  I remember Paulo saying that there was lots of
code duplication in the x86 instruction emulation that could be
consolidated.

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Re: VGABIOS

2005-02-07 Thread Richard Smith
  get a lot smaller.  I remember Paulo saying that there was lots of
  code duplication in the x86 instruction emulation that could be
  consolidated.
 
 I think Ollie did this already.
 

Ah.  Well that would explain why is so much smaller.   Looking back
through my mail I see where he mentioned that he was going to try it
but I don't see a mention of it after that.

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Re: VGABIOS

2005-02-07 Thread Richard Smith
  code duplication in the x86 instruction emulation that could be
  consolidated.
 
 It is Paulo's work.
 

Ah well there you go.  My knowledge was outdated.  Looks like the
cutting edge of x86emu developement now is the linuxbios emu tree.

Did you also extend Paulo's work?  He mentioned that there were other
areas in the code where application of his work should reduce code
size as well.

If they haven't already submitted thier patches you might want to also
check with Scitech soft on thier version of the in-kernel emu.  Thier
commercial snap drivers use the same stuff and I seem to remember
him telling me they made some tweaks to make the newer Radeon cards
and the like work right.

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Re: NTV-1000 STB

2005-02-07 Thread Richard Smith
 and if so, would LinuxBios support the cipset? I am at work at the moment,
 so I cant give you the chipset part numbers, but if you need them I will
 send them when I get home.

- SMSC FDC37C665GT (SuperIO)
- OPTi 82C802GA (Northbridge?)
- OPTi 82C602A (RTC/companion chip?)
- OPTi 82C931 (Audio)
- Davicom DM9008F (LAN)
- IGS CyberPro 2010 (VGA + TV out)
- Philips SAA 7111A (TV in)

Looks like your pretty much out of luck for Linuxbios.  No support for
the OPTi chipset.

From what I saw from google you might be able to get a boot rom from
ROM-o-matic for the davicom card.  Although one poster said he had to
make mods to the etherboot loader since there is no INT19 support in
the BIOS of the device and the NOINT19 stuff in etherboot didn't work.
 Perhaps thats all fixed now.

Geting it to dhcp a linux kernel and then dumping the northbridge and
sourthbridge settings is probably your only chance unless of course
you can find a datasheet for OPTi somewhere.   You should be able to
get the SMC superIO to work pretty easily.

All in all I would say the ROI on that is very low.  Probably not
worth the effort.

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Re: [BULK] RFC: Generic shadow mechanism useable from a payload

2005-01-31 Thread Richard Smith
 something I have been wondering. Suppose someone starts working on that
 IDE driver to fix it for once in bochs bios. Won't we find out that
 getting it work right is chip-set specific thing?
 
 curently bochs bios is based on intel 440fx chipset or some such.

I don't think so.  FILO does it right.  Is it chipset specific?

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Re: [BULK] RFC: Generic shadow mechanism useable from a payload

2005-01-31 Thread Richard Smith
  I don't think so.  FILO does it right.  Is it chipset specific?
  
 It just uses the generic IDE io interface. No chipset specifics are
 needed for IDE. Booting USB or PCMCIA is a bit trickier though.
 

So there you go.  Bochs shoud be able to be made generic.  I think it
is generic right now but I seem to remember that it did some stuff
with delays rather than checking the busy flag and that was the
difference between the ADLO that worked and the latest stuff.

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Re: [BULK] RFC: Generic shadow mechanism useable from a payload

2005-01-31 Thread Richard Smith
 
 I still remmber an IDE code that would work with Samsung HDD's but not IBM
 hdd's. So it is possible to have disk/chipset specific code.

Thats buggy IDE hardware either the host chipset or the drive.  I've
written lowlevel IDE routines for another project that do direct LBA
sector reads and the interface to that is outlined in a spec and not
in anyway chipset specific.

 now all we need someone to fix the code :-)

Pehaps we could get the bochs people to do it.  Some e-mail to them
with our modified routines from ADLO would at least generate some
feeback on what they thought the most correct setup is.

But is it currently even a problem?  What does the latest bochs bios
do that the ADLO dosen't?

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Re: [BULK] RFC: Generic shadow mechanism useable from a payload

2005-01-31 Thread Richard Smith
 
 Well  seems to me that if the movement toward according to the spec
 is causes a problem then the project as a whole has an issue that
 ought to be worked out.

Actually thinking about this more... I can probally see thier point. 
They don't have hardware so implementation of all the flags and
register correctness is just overhead.

However to even worry about going through this you gotta have a need
first and currently I don't think I need it so someone else will
probally have to do it or show me why I need it.

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Re: dead bios

2005-01-28 Thread Richard Smith
 I just attempted to flash my epia M1 with the official latest bios
 from via (and their stupid awflsomething program) and the mobo is dead.

Is the bios chip mounted on the pcb or socketed?

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Re: dead bios

2005-01-28 Thread Richard Smith
 
  Is the bios chip mounted on the pcb or socketed?
 
 
 it's socketed
 

Find someone with a programer and re-burn the chip or send it to me
and I'll program it for you.

Is there not some sort of recovery jumper?

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Re: Open Source BIOS is not only choice.

2005-01-27 Thread Richard Smith
 Proposal:
 Just use proprietary BIOS. you can buy it from BIOS upgrading company.
 and even I think you MIGHT be able to use a BIOS comes with your PC.

Your proposal dosen't make any sense.

Why on earth would you want to boot LinuxBIOS only to then boot into a
proprietary BIOS?
When you could have just booted the proprietary BIOS in the first place.


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Re: Open Source BIOS is not only choice.

2005-01-27 Thread Richard Smith
 For booting Windows after you installed linuxbios.

You still aren't makeing sense to me.  Booting a COTS bios after you
boot linuxbios to boot windows is a regression not an advancement. 
You aren't getting any extra features.  You are just adding
complexity.  If you are going to boot a COTS bios then just boot the
COTS bios you don't need linuxbios.

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Re: Open Source BIOS is not only choice.

2005-01-27 Thread Richard Smith
 It makes sense if you usually want to boot Linux, but sometimes
 want to boot Windows.

If you have a setup that you are doing dual boot on I don't really see
why you would be a canidate for using Linuxbios.  Not in its current
state anyway.

I guess if nothing else it would be a good technical exercise and
perhapas if you do it they will come.  That would really show off
the flexability side of things.

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Re: Boot Windows Please!

2005-01-26 Thread Richard Smith
 Look at Adam Sulmicki's ADLO work, he did something very similar to this.

I currently use ADLO so I might be able to answer your questions.

I've only sucessfully booted linux via LILO under ADLO.  I mostly use
ADLO to get the video bios up and going.

I've tried to boot a MSDOS compact flash but it seems to hang
somewhere so I didn't progress any further.

I don't see any reason that ADLO sould not be able to boot FreeDOS. 
ADLO is a deriative of the bios from the bochs project so if you can
get bochs to boot FreeDOS or MSDOS then the same should be possible
under ADLO.

At one point I tried to sync up ADLO with the current version of the
bochs bios but it would not boot.  The IDE routines in ADLO seem to be
more correct than the stock stuff in bochs.

ADLO is currently only in V1 but I don't see any reason why it
wouldn't work in V2 as well.  Its just a payload.  One thing about
ADLO is that the loader has to be customized to the chipset.  The
loader has to enable the shadow ram section and copy itself into that
range.  Since there is no mechanism to do this across payloads you
have to do it explicitly in the loader.

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RFC: Generic shadow mechanism useable from a payload

2005-01-26 Thread Richard Smith
Thinking about ADLO and the shadow enable/disable got some wheels turning.

I've been spending lots of time in V2 and I was wondering if the same
type of methodology can't work for ADLO.

In V2 there are specifc .c files that do thing in a chipset specific
way and the auto.c includes them as necesary.  Those get compiled and
then stuck in the startup assembly.

What if we created a shadow.c file that was in the northbridge
directory with a simple API type setup that enabled and disabled the
various shadow ranges.

Then the ADLO build system could just romcc these files and the loader
would include them just like crt0.S does.  That way there are no
callbacks across the payload boundry yet you could setup ADLO or other
payloads so they would work in a chipset agnostic way.

I suppose that that FILO and the emulator render most of ADLO
un-needed but if you are going to try and use FreeDOS or Windoze as an
OS then you will need ADLO.

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Re: [BULK] RFC: Generic shadow mechanism useable from a payload

2005-01-26 Thread Richard Smith
On Wed, 26 Jan 2005 13:12:27 -0600, Richard Smith [EMAIL PROTECTED] wrote:
  But I actually think that is overkill. v2 by default and design
  enables all of the shadow ranges as memory.  So we just need to
  use those ranges.  That should be much easier having to patch
  ADLO each time.  It is fairly unlikely a writable ROM segment is
 
 Ok.. Well when you put it that way yeah dosen't sound like its needed
 at all. It should probally just work.

Wait a minute.  I don't see how this will work.  To do the shadows you
need to read from the bios chip, yet write to the RAM.  Then re-enable
both read and writes to go to RAM.  This requires you to toggle some
bits in the norhtbridge.

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Re: [BULK] RFC: Generic shadow mechanism useable from a payload

2005-01-26 Thread Richard Smith
 But I actually think that is overkill. v2 by default and design
 enables all of the shadow ranges as memory.  So we just need to
 use those ranges.  That should be much easier having to patch
 ADLO each time.  It is fairly unlikely a writable ROM segment is

Ok.. Well when you put it that way yeah dosen't sound like its needed
at all. It should probally just work.

I't will be awhile but I guess I will find out when I get there.  I'm
planning on still trying to use ADLO when I get V2 up and going on our
board.

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Re: Boot Windows Please!

2005-01-26 Thread Richard Smith
 or perhaps to put it other way around; 95% of current problems with BOCHS
 bios is related to the ide driver. Get IDE driver right and it is quite
 possible most of the stuff will work.

I think that I when I remeber looking at the diff between ADLO and the
latest bochs stuff that the ADLO stuff payed attention to some status
bits that the stock bochs stuff didn't.

Plus the ADLO IDE stuff worked where the latest bochs stuff did not.

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Re: [BULK] RFC: Generic shadow mechanism useable from a payload

2005-01-26 Thread Richard Smith
 
 http://cvs.sourceforge.net/viewcvs.py/freebios/freebios/util/ADLO/loader.s?rev=1.1view=auto
 
 it mentions sources as 0x8000 and 0x18000, so I guess they have been
 aready copied out of rom into the the low memory by linuxbios ???
 
 (i think that's part of the ELF header specs to tell LB where to put the
 image).

So you think the ELF loader loads into ram and then loader moves it
into the right position?
I wonder if we could not just set things up where the ELF loader just
loas it into the right spot in the first place.  Perhaps that
overwrites where the ELF code lives?

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Re: [BULK] RFC: Generic shadow mechanism useable from a payload

2005-01-26 Thread Richard Smith
 Yes you can do that with ELF.
 
 The big gotcha is going to be that there are pirq tables current
 stored at 0xf that you are not going to want to stomp.

Actually thats not that much of an issue. It currently stomps it already

ADLO has that table broken out into a single binary file.  All I do is
copy the table binary table generated with linubios into the adlo
build file and it gets stuck in the adlo image.   Loader.s copies it
to a specific location.
So really if you loaded loader and ADLO code after the linuxbios PIRQ
table location and then tweaked loader to not make a PIRQ it should be
fine.

Not haveing to do the PIRQ table copy would be nice but its pretty
trival.  A script to do it automatically would be easy.
 
 The fun question.  Can I make the bochs bios useable on a system
 after the linux kernel has run.  Load it with kexec and then boot windows?
 
 If LinuxBIOS is the native bios this should be no extra challenge.  If the
 native BIOS is something else life gets a little more interesting.

That _is_ a fun quesition..  I don't think you would have too many
problems though.  The ADLO bios is used to running on systems that
already have everything setup.  It does minimal hardware setup.  If
you put everything in the right spot and modified the loader so that
it didn't copy anything  I think it will work.

kexec loads an elf right?  So this would be pretty easy to test.

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Re: Another V2 question

2005-01-24 Thread Richard Smith
  Man the waters just get deeper.  I though auto.c was first.  I just
  looked at failover.c and the fallback does a 'retun bist'  so who
  called failover.c?
 
  Can you list out the boot sequence for me step by step?  Who calls what?
 
 It is the order they are listed in Config.lb.
 Or more simply the order the included files are included into crt0.S
 just like in freebios v1.  There is just an extra step to build the assembly
 code now.

Thanks, I guess I'll just have to go through the code.  What I was
trying to get was a call tree detailed enough that I could document it
in my write up on porting to my chipset.

  Why does that  require them to be after the big block of includes?
  You can't just stick them all up at the beginning of the .c file?
snip 
 So the file that uses them is included after the functions are
 defined.

I don't seem to be getting my question across properly

Whats the difference for romcc between what I see in the code which looks like:

#include header1.h
#include cfile1.c

void func1(void) 
{

}

#include header2.h
#include cfile2.c

void func2(void) 
{

}


#include header3.h
#include cfile3.c

void func3(void) 
{

}

And what I perceive as a normal setup of :

#include header1.h
#include header2.h
#include header3.h

#include cfile1.c
#include cfile2.c
#include cfile3.c

void func1(void) 
{

}

void func2(void) 
{

}


void func3(void) 
{

}


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Re: Another V2 question

2005-01-24 Thread Richard Smith
 Whats the difference for romcc between what I see in the code which looks 
 like:
 

Never mind I _finally_ get it.  auto.c defines functions that are
used the the #include files.  So they have to be included after the
definition in auto.c

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Re: Another V2 question

2005-01-24 Thread Richard Smith
 And since I don't have prototypes (which makes inlining easier) those
 functions must be defined before they are used.
 

Just curious now, how does the lack of prototypes make inlining easier?

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generic_dump_spd memory channel error

2005-01-24 Thread Richard Smith
dump_spd_registers in generic_dump_spd.c isn't really so generic.

It assumes that you have 2 memory channels which fails to build for me.

Is there already some method of indicating how many memory channels
you have our should I just create a #define option that you set when
you need to use this diagnositc.

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Dependency problem

2005-01-24 Thread Richard Smith
Something is messed up with my dependencys.

After I edit auto.c and do a make in my top level config directory.  I
get nothing to be done for 'all' after playing with it more I can go
into the fallback direcory and delete all the .o's and .inc's and lots
of other files but as long as I don't mess with
./fallback/linuxbios.rom it won't rebuild.

I looked through the makefile and my INIT-OBJECTS is blank.  But if
this were really the case I don't see how I would be building a
working image.

Any ideas on what I should look at?
 
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Re: Another V2 question

2005-01-21 Thread Richard Smith
   It should be straight forward to remove all of the tests etc for switching
   from a fallback to a normal image.
 
  Do I really have to remove them?  Ron seemed to suggest that if I just
  turn off the fallback suff then I will end up with only a singel
  fallback image.
 
 I was thinking of the per board test that make the policy decision
 which image you should be in.
 

Ok so now I'm confused again.  Perhaps we should just go through the
gory details and I'll be sure to write it up in something for the next
person.

When HAVE_FALLBACK_BOOT=1 things do the normal fallback, check and
jump to normal.  This won't ever work fully on our board since the
CMOS is not powered.

When I set that to 0 whats going to happen in the resulting build and
image runtime?

I would prefer to stay as close to the framework you have already and
just running fallback seems fine to me if thats all I need to do.

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Re: Another V2 question

2005-01-21 Thread Richard Smith
  Our product is going to go into Gasoline pumps.  You would not believe
  the lengths that some store operators go to so they can cheat the
  consumer slightly per fillup.  So our customer requires a flash update
  to be physical mod.
 
 I want to know more about their tricks. Is there any mod chip I can use
 to lower my fuel expense?

As a consumer I think you are out of luck.  Pump you gas on the
coldest days when the liquid is the most dense..*grin*  Actually I
think all the newer pumps cal for temp as well.

Perhaps I can add a special ollie backdoor.  *grin*  We don't do any
of that software though.  Just the hardware.

Dishonest store ops will hire black hats to actually reverse engineer
the boards and software that are in the dispenser and have them shave
off some percentage of gas for each fill up so you think you pumped
14.9 gallons but you may have only gotten 14.8.

One interesting case was a dispenser that would correctly pump for =5
gallons but skimp on you for larger amounts.  Not coincidently the
inspector that roams around and periodically checks these things used
to use a special 5 gallon jug to test.  So it would pass inspection
but still cheat customers.

This was discovered by accident.  I guess the store changed hands and
the dispenser had a problem and was returned back to the mfg complete
with all the mods.

The inspectors now use several different amounts that are changed frequently.

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auto.c questions

2005-01-21 Thread Richard Smith
What's the functional purpose of auto.c?  Obvously to turn on the ram
but what else?

Are the #includes distributed through the file for a romcc reason?

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Re: Another V2 question

2005-01-20 Thread Richard Smith
  Guess this means that I'll never come out of fallback?  Of course I'm
  stll a long ways off from that now
 
 you can't really use fallback, I guess, unless you stash those bits
 somewhere else.

Unless I wrote them to the flash there's nothing on my board that is
persistent between boots.

How is this handled on non-x86?  Most of those dont have any cmos either.

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Re: V2 questions

2005-01-20 Thread Richard Smith
  Whats the mapping between the various CPU models in the intel directory
  and marketing cpu names as I know them like Pentium III, P3 celeron,
  Pentuim 4, etc.
 
 At this point I believe the marketing names are going away as they are not
 specific enough, so you have to use the full name. That's about it.

I still need to know the mapping.  I don't see any of thie model stuff
in my documentation.  Granted there's a bunch of stuff I probally
haven't looked at.

I have a PIII celeron.  Where do I go loook to find what model that is
so I know what to add into my config?

  I don't completely grok the fallback and normal stuff.  I know the theory 
  but
  not practice.  I know this is a FAQ. Explain it to me and I'll document it 
  for
  the next guy.
 
 fallback always runs the first few instructions, and it makes a decision
 about whether to continue running or jump to normal.

Well I was hoping for a bit more detail.  *grin*   Like how do you
enable and disable it and what do all the options do.

  Why are all the payloads out of tree?  Be nice if there was a payloads
  directory with some known good payloads.
 
 well, I am supposed to put my filo in there RSN, should I do that? My
 mistake ...

Well when I got the build error I was unsure if you _had_ to have a
payload specified and there weren't any.  So I just created a blank
file and tried that.

 I would still prefer to get people to build out of the tree, but ...

Out of tree makes it a bit more difficult for me to keep all my stuff
under one roof when I go to check it into my internal CVS.  Why do you
like out of tree?

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Re: buildtarget error

2005-01-20 Thread Richard Smith
  I'll try adding in a northbridge framework and see what happens.
 
 you need to have at least one 'chip'

I do.

chip cpu/intel/socket_PGA370
end

So you must have to have more than that.

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Re: V2 questions

2005-01-20 Thread Richard Smith
  well, I am supposed to put my filo in there RSN, should I do that? My
  mistake ...
 
 What about fs_stream?

What's fs_stream?

 some questions and compiles. But then again, packing a good
 documentation might help further.

That's why I'm asking all these questions.  I'm documenting as I go. 
I'll feed that back when I'm done.

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Re: V2 questions

2005-01-20 Thread Richard Smith
  I have a PIII celeron.  Where do I go loook to find what model that is
  so I know what to add into my config?
 
 That was a PGA370, right? I am guessing it is not in there, looking at the
 tree.

Right. I created it.  And really all it needs is the right
cpu/intel/model_xxx in the config file.  Currently I'm using model_6xx
which is what the slot_2 used.

 Currently, it's always enabled, but if you build a fallback-only payload,
 then 'normal' won't get run. This is hokey, I know.

So if  I just remove all the normal stuff?  What about all the reset16
and entry16 stuff?  Looks to me like I pretty much have to re-write my
MB config.lb

  Out of tree makes it a bit more difficult for me to keep all my stuff
  under one roof when I go to check it into my internal CVS.  Why do you
  like out of tree?
 
 What I mean is, the .o and other objects out of the tree.

Since you haven't really said specificlly what you don't like about
in-tree builds I say what I do like.  Having everything under one roof
make it much easier for me to just take a snapshot of things.  CVS is
great but there are still loads of time when I'ts just more of a
hassle.  Sweet and simple.  I can't tell you how many times I've had
to go back to a snapshot and snag a binary that I wasn't able to
reproduce due do some wierdness going on.  Or just as a sanity check
when wierdness is going on.

Having things in seperate trees makes that harder.  I do understand
that having them differnt though does offer a lot of advantages in
other areas.

But I would say that what you really want is the ability to do it either way.

My original point was though that it would be nice from a new board
porters view if there was some kind of reference payload for each
known good board and it was included.


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Re: OT, Linuxbios usage...

2005-01-20 Thread Richard Smith
 I was just wondering if it's possible to use linuxbios as a kind of
 virtualisation machine, meaning that I could use linuxbios to snoop
 windows drivers for register hunting (to get real 3D-gfx-support for
 instance)? This means that windows would run as a virtual os.

Not really.  LinuxBIOS is pretty much for booting live hardware.  What
I think you wan't is the bochs project, VMware or Win4lin.

http://bochs.sourceforge.net/

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what cpu models are tested?

2005-01-20 Thread Richard Smith
cpu model_6xx will not build.

microcode_MU16930c.h: No such file or directory.

I'll play with some others.  

Also if you forget to provide enough arguments to romcc you get an
'Invalid tolken' error.  A nice enhancement would be to count
arguments and if they don't match then give a incorrect number of
arguments error.

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Re: buildtarget error

2005-01-20 Thread Richard Smith
Looks like you have to have a pci_domain just adding a northbridge
didn't fix it.

So now I'm at

chip northbridge/intel/440bx
   device pci_domain 0 on
   end
   chip cpu/intel/socket_PGA370
   end
end 
  
I noticed that I also have 4 irq slots specified.  So pci slots with
no pci_domain.  Perhaps thats what was tripping up buildtarget?

Does IRQ_SLOT_COUNT have to match how many actual slots are on the MB
or just the number of pci devices in total?

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Re: OT, Linuxbios usage...

2005-01-20 Thread Richard Smith
 fullfilled (hardware setup  loading of os). A virtualisation machine much
 like vmware or bochs, except that this machine would let the operating run
 on the hardware instead of emulating the hardware (am I making sense?).
 

So you mean some sort of HAL like the VM on a IBM370 does.

Possible but linuxBIOS is a _long_ way from that.  And it's not really
compatible with its overall goal which is to get the hardware up
enough that a linux kernel can take over.  Load a payload into ram and
jump to that.

The qemu is a target in V2 if you start working with that you may be
able to do what you want.


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Re: buildtarget error

2005-01-20 Thread Richard Smith
  Does IRQ_SLOT_COUNT have to match how many actual slots are on the MB
  or just the number of pci devices in total?
 
 Basically one for each device and one for bus1. Otherwise Linux won't
 see the APIC of the 8111.

So the number of devices as counted by lspci? 

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Re: what cpu models are tested?

2005-01-20 Thread Richard Smith
 A typo in the header file include name.  It should
 be microcode_MU16830c.h  I just committed the fix.

ok. Thanks  I'll update and retry.  
 
 Which is roughly cpufamily, cpumodel, stepping as reported by /proc/cpuinfo.
 With various bits ignored as seems appropriate.

Ah.  Good.  That makes it easier.
 
 Patches to romcc are welcome. 

*grin*  I'm not worthy.

 My hunch in this case is that you had an undefined
 macro but without the error message I can't guess.

No. I failed to note that the early_serial function took arguments.  I
was calling it with ().

The epia uses

enable_vt8231_serial()

But my my port of the pc87351 modeled after the pc87360 used 

pc87351_enable_serial(arg ,1 arg 2)

and when I modified the the epia code for my MB I fogot to fill in the
arguments.

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Re: Another V2 question

2005-01-20 Thread Richard Smith
 :)
 Do you have any other non-volatile storage?

Nope.

 A serial eeprom might be another good choice, of a location for variables.
 Anyway I understand the reasons for it and will happily work on brainstorming

By design if you want to change the boot firmware of our device (in
production) you will have to de-solder the flash.

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Re: buildtarget error

2005-01-20 Thread Richard Smith
 You should have one per pci slot, as well.. but those should only be
 there if something is in the pci slot.. We really need dynamic table
 creation for that.
 
 But all in all, 1 per device in lspci is about right

I only have one slot (and only if its loaded)  I have many devices
soldered onto the board.

Eventually perhaps I'll break you guys of this commercial motherboard
only mentality.
*joke*  *grin*  

My question was more along the lines of  a device like the south
bridge has many devices in that so does each device in there count or
just ones that need a PIRQ?

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Re: buildtarget error

2005-01-20 Thread Richard Smith
 
 even simpler, it really is (unless I've gone nuts) just ones you want to
 put in the table. Note that is slightly different from your statements
 above.

Ok  That narrows it down then.  So if you want an IRQ routed to it
then it needs to be counted.

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Re: V2 questions

2005-01-20 Thread Richard Smith
 no, not at all. It's the target/bitworks/richard/Config.lb that determines
 normal/fallback or fallback-only configuration, and that in turn will
 drive how the thing gets built

Ok. I think I see now that I've looked a bit more closely.  

So if I set the HAVE_FALLBACK to 0 then it will only build the
fallback image but include everything that would have been in the
normal image?

 good point. The only reason I like seperate trees is that if things get
 too weird I like to
 rm -rf freebios
 cvs blah blah co freebios
 and not affect any of my targets. That's all.

Thats a good point as well.  I usually find though that when things
get flaky.  I've always been under the hood working on things.  So
blowing away my tree would blow away any changes I've been working on.

Plus I can simulate what you are talking about by just checking out a
clean copy into another directory and building that.

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Re: kudos to the V2 coders

2005-01-20 Thread Richard Smith
  Starting as a complete V2 newbie, in less than 9 hours of work and on
  the _very_ first successful compile, LinuxBIOS V2 produced serial code
  output on our IMS board!
 
 well, you made our day. I'm happy it worked. Uh, FAQ? :-)

In progress.  I'm documenting as I go.  Thats why all the barrage of questions

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Re: Another V2 question

2005-01-20 Thread Richard Smith
 Ok so by design you really only want a single firmware image.
 

Right.. I think Ron has me fixed up.  I was unaware that there was an
overall flag that enabled/disabled the fallback system.

 It should be straight forward to remove all of the tests etc for switching
 from a fallback to a normal image.

Do I really have to remove them?  Ron seemed to suggest that if I just
turn off the fallback suff then I will end up with only a singel
fallback image.
 
 For those of us who have field upgradable systems it makes a bigger 
 difference.

Yeah I would say so...  Since you guys have the power to render 1000
paperweights with a single command.

Our product is going to go into Gasoline pumps.  You would not believe
the lengths that some store operators go to so they can cheat the
consumer slightly per fillup.  So our customer requires a flash update
to be physical mod.

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what cpu model is a PIII?

2005-01-19 Thread Richard Smith
I'm trying to setup my /cpu/intel/socket_PGA370 directory.  What cpu
model should I use?

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buildtarget error

2005-01-19 Thread Richard Smith
Ok so slowly I'm trying to move to V2.

Step 1 was to just try and get some serial action going.  

I added my CPU and superIO and setup my mainboard directory with a
simple config file.

I've got a traceback on buildtarget though.  So aparently I'm not
filling out everything that needs to be filled.

My config is really simple with no northbridges or southbridges. Just
a cpu.  All I want to try to do right now is get the early serial port
up.

Attached is my mainboard config.lb and options.lb and the output from
buildtarget.

Perhaps there are some additional debug flags I can turn on for more info?

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buildtarget_error
Description: Binary data


Config.lb
Description: Binary data


Options.lb
Description: Binary data


V2 questions

2005-01-19 Thread Richard Smith
I'm starting up the learning curve 

Whats the mapping between the various CPU models in the intel directory and
marketing cpu names as I know them like Pentium III, P3 celeron, Pentuim 4, etc.

I don't completely grok the fallback and normal stuff.  I know the theory but
not practice.  I know this is a FAQ. Explain it to me and I'll document it for
the next guy.

Why are all the payloads out of tree?  Be nice if there was a payloads directory
with some known good payloads. 

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Re: v2 testbios compile error

2005-01-18 Thread Richard Smith
  It is used because it is in FC2. I believe it is in recent SuSe too.
  I think it is requred for x86_64.
  
 I changed it to be configurable in the Makefile. Just enter your libpci
 version there and it will compile. Unfortunately there is no simple way

I didn't see that in V2 makefile I was using.  All it had was a
hardcoded path /usr/lib/libpci.a

Both the #include statements in the .c files and the path to the
library had to be changed.

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Re: Overlaping IO resource for AMD K8

2005-01-18 Thread Richard Smith
  It is weird that fuctory bios can still use them.
 
 There's gotta be a hack in fuctory bios, I would guess, something like:
 if (the pci card is a vga  there is an option rom)
 callit();
 
 i.e. I betcha that fuctory bioses will call an option rom on vga even if
 it violates the spec.
 
 I wonder if we really want to do this, the S3 cards are antiques anyway.

Ollie how are you ripping the vbios bios from the S3 card?  Did you
pop the chip and use a programmer?  If not you may be suffering from
the nuke the rom header issue I was talking about earlier.

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Re: v2 testbios compile error

2005-01-18 Thread Richard Smith
 Do cvs update. The path is still hardcoded.
 
  Both the #include statements in the .c files and the path to the
  library had to be changed.
 
 Why did you have to change the #include statements?!?

The include is linux/pci so it will grab my system copy of the
headers.. I can't update the system copy of the headers since it
breaks everything else that uses those headers.

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Re: Overlaping IO resource for AMD K8

2005-01-18 Thread Richard Smith
   i.e. I betcha that fuctory bioses will call an option rom on vga even if
   it violates the spec.

I doubt that.. I've scrubbed the 0xAA55 from several VGA cards so I
could plug them into a factory bios system and not have the VGA
enabled.  None of them ever went ahead and ran the bios.

 I can enable rom load but disable execution in LinuxBIOS. After the
 system is up, I dumped the memory content. Actually, the rom load
 refuse to download it because its header is incorrect. It is not
 the nuke problem, it is simply incorrect header.

Without a correct header I don't see how it could have ever worked in
a factory system.  I have several S3 cards and they don't seem broken
to me.

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