RE: MSR_SPE - being turned off...
Kumar, What about the case of a context switch (i.e.: when things are setup in registers for the SPE, but then a context switch happens before the SPE is executed)? As to load_up_spe give_up_spe, it was pointed out to me tonight by a co-worker to look at how things are saved in those routines, I definitely will look at this again, and see how it is done... This is happening for us on an 8572 SMP. We are trying to get it to happen on 8548 (and single core 8572), but we haven't been able to push this part of the application as hard as it is being pushed on 8572...but we will keep trying thank you for your patience and suggestions on this...and I will keep working it Tom From: Kumar Gala [mailto:ga...@kernel.crashing.org] Sent: Wed 5/6/2009 12:23 AM To: Morrison, Tom Cc: Michael Neuling; linuxppc-dev@ozlabs.org Subject: Re: MSR_SPE - being turned off... On May 5, 2009, at 7:42 PM, Morrison, Tom wrote: The test case we found is under 'extreme' duress (intense loading on an MPC8572)...with many applications using A LOT of SPE instructions... If you look at the context switch code (in latest code entry_32.S), I believe the context switch performs a SAVE_NVGPR() - which in our interpretation (in ppc_asm.h) - only saves the lower 32 bits of the GPR (stw/lwz)... This is only a guess of where the problem lies - based upon the single SPE instruction that seemingly got misinterpreted, and shifts the data By '1 byte' (and this code gets executed successfully MANY more times at lower bandwidths - than failures seen at higher bandwidths)... I am not sure how to proceed...we know how to recreate with our application, but we would love to know how to change (safely) the pt_regs to long long for the GPRs and then safely move all 64bits of each GPR into these doubles... We could then re-test and see if this helps? Tom If you use SPE in an application the full 64-bits are saved and restored it just split into two locations (one for the lower 32-bits and one for the upper 32-bits). Look at load_up_spe and giveup_spe in arch/powerpc/kernel/ head_fsl_booke.S On the 8572 are you running w/SMP? What kernel version are you using if so? Do you see the same issue on the MPC8548? - k ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH] mmc: Fix the wrong accessor to HOSTVER register
Freescale eSDHC controller has the special order for
the HOST version register. that is not same as the other's
registers. The address of HOSTVER in spec is 0xFE, and
we need use the in_be16(0xFE) to access it, not in_be16(0xFC).
Signed-off-by: Dave Liu dave...@freescale.com
---
drivers/mmc/host/sdhci-of.c |8 +++-
1 files changed, 7 insertions(+), 1 deletions(-)
diff --git a/drivers/mmc/host/sdhci-of.c b/drivers/mmc/host/sdhci-of.c
index 3ff4ac3..e167131 100644
--- a/drivers/mmc/host/sdhci-of.c
+++ b/drivers/mmc/host/sdhci-of.c
@@ -55,7 +55,13 @@ static u32 esdhc_readl(struct sdhci_host *host, int reg)
static u16 esdhc_readw(struct sdhci_host *host, int reg)
{
- return in_be16(host-ioaddr + (reg ^ 0x2));
+ u16 ret;
+
+ if (unlikely(reg == SDHCI_HOST_VERSION))
+ ret = in_be16(host-ioaddr + reg);
+ else
+ ret = in_be16(host-ioaddr + (reg ^ 0x2));
+ return ret;
}
static u8 esdhc_readb(struct sdhci_host *host, int reg)
--
1.5.4
___
Linuxppc-dev mailing list
Linuxppc-dev@ozlabs.org
https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: MSR_SPE - being turned off...
On May 6, 2009, at 3:31 AM, Morrison, Tom wrote: Kumar, What about the case of a context switch (i.e.: when things are setup in registers for the SPE, but then a context switch happens before the SPE is executed)? context switches will be fine. What we normally do is keep track of which user app used SPE last and when some other app needs it we clear MSR_SPE for the old app, save its registers. Than we load up the registers for the new app and set MSR_SPE. When the old app context switches in it will get an SPE unavail exception at the point it executes its next SPE insn and we will repeat the process. As to load_up_spe give_up_spe, it was pointed out to me tonight by a co-worker to look at how things are saved in those routines, I definitely will look at this again, and see how it is done... This is happening for us on an 8572 SMP. We are trying to get it to happen on 8548 (and single core 8572), but we haven't been able to push this part of the application as hard as it is being pushed on 8572...but we will keep trying Again, what kernel version for 8572? Its possible old SMP kernels are broken on 8572. - k From: Kumar Gala [mailto:ga...@kernel.crashing.org] Sent: Wed 5/6/2009 12:23 AM To: Morrison, Tom Cc: Michael Neuling; linuxppc-dev@ozlabs.org Subject: Re: MSR_SPE - being turned off... On May 5, 2009, at 7:42 PM, Morrison, Tom wrote: The test case we found is under 'extreme' duress (intense loading on an MPC8572)...with many applications using A LOT of SPE instructions... If you look at the context switch code (in latest code entry_32.S), I believe the context switch performs a SAVE_NVGPR() - which in our interpretation (in ppc_asm.h) - only saves the lower 32 bits of the GPR (stw/lwz)... This is only a guess of where the problem lies - based upon the single SPE instruction that seemingly got misinterpreted, and shifts the data By '1 byte' (and this code gets executed successfully MANY more times at lower bandwidths - than failures seen at higher bandwidths)... I am not sure how to proceed...we know how to recreate with our application, but we would love to know how to change (safely) the pt_regs to long long for the GPRs and then safely move all 64bits of each GPR into these doubles... We could then re-test and see if this helps? Tom If you use SPE in an application the full 64-bits are saved and restored it just split into two locations (one for the lower 32-bits and one for the upper 32-bits). Look at load_up_spe and giveup_spe in arch/powerpc/kernel/ head_fsl_booke.S On the 8572 are you running w/SMP? What kernel version are you using if so? Do you see the same issue on the MPC8548? - k ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
RE: MSR_SPE - being turned off...
I'm sorry I forgot to put that, this issue was found with our currently running kernel 2.6.23.final (what comes with the Freescale LTIB BSP package dated 05/23/2009). I am sorry if I don't understand your statement that the SMP might be broken on this kernel, because I tried to analyze the kernel that came with the latest BSP LTIB [ackage from Freescale (dated 12/18/2009 (where we got the 4.2.171 compiler from)), and the associated 'switch context' code is exactly the same. Unfortunately, I have not started the process of porting my current platform's BSP to this new kernel - otherwise, I would have done the test on that platform (this also requires a new version of u-boot in order to test correctly)).. I may have mis-interpreted something and/or I am sure I don't understand everything about the SMP resource management (and associated SPE management), so thank you for any insight you may have on this front... Tom -Original Message- From: Kumar Gala [mailto:ga...@kernel.crashing.org] Sent: Wednesday, May 06, 2009 8:32 AM To: Morrison, Tom Cc: Michael Neuling; linuxppc-dev@ozlabs.org Subject: Re: MSR_SPE - being turned off... On May 6, 2009, at 3:31 AM, Morrison, Tom wrote: Kumar, What about the case of a context switch (i.e.: when things are setup in registers for the SPE, but then a context switch happens before the SPE is executed)? context switches will be fine. What we normally do is keep track of which user app used SPE last and when some other app needs it we clear MSR_SPE for the old app, save its registers. Than we load up the registers for the new app and set MSR_SPE. When the old app context switches in it will get an SPE unavail exception at the point it executes its next SPE insn and we will repeat the process. As to load_up_spe give_up_spe, it was pointed out to me tonight by a co-worker to look at how things are saved in those routines, I definitely will look at this again, c and see how it is done... This is happening for us on an 8572 SMP. We are trying to get it to happen on 8548 (and single core 8572), but we haven't been able to push this part of the application as hard as it is being pushed on 8572...but we will keep trying Again, what kernel version for 8572? Its possible old SMP kernels are broken on 8572. - k snip previous emails ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: MSR_SPE - being turned off...
Can you describe the # of processes you are running in your test. Is it possible for you to try the tests w/2.6.29 from kernel.org? - k On May 6, 2009, at 7:42 AM, Morrison, Tom wrote: I'm sorry I forgot to put that, this issue was found with our currently running kernel 2.6.23.final (what comes with the Freescale LTIB BSP package dated 05/23/2009). I am sorry if I don't understand your statement that the SMP might be broken on this kernel, because I tried to analyze the kernel that came with the latest BSP LTIB [ackage from Freescale (dated 12/18/2009 (where we got the 4.2.171 compiler from)), and the associated 'switch context' code is exactly the same. Unfortunately, I have not started the process of porting my current platform's BSP to this new kernel - otherwise, I would have done the test on that platform (this also requires a new version of u-boot in order to test correctly)).. I may have mis-interpreted something and/or I am sure I don't understand everything about the SMP resource management (and associated SPE management), so thank you for any insight you may have on this front... Tom -Original Message- From: Kumar Gala [mailto:ga...@kernel.crashing.org] Sent: Wednesday, May 06, 2009 8:32 AM To: Morrison, Tom Cc: Michael Neuling; linuxppc-dev@ozlabs.org Subject: Re: MSR_SPE - being turned off... On May 6, 2009, at 3:31 AM, Morrison, Tom wrote: Kumar, What about the case of a context switch (i.e.: when things are setup in registers for the SPE, but then a context switch happens before the SPE is executed)? context switches will be fine. What we normally do is keep track of which user app used SPE last and when some other app needs it we clear MSR_SPE for the old app, save its registers. Than we load up the registers for the new app and set MSR_SPE. When the old app context switches in it will get an SPE unavail exception at the point it executes its next SPE insn and we will repeat the process. As to load_up_spe give_up_spe, it was pointed out to me tonight by a co-worker to look at how things are saved in those routines, I definitely will look at this again, c and see how it is done... This is happening for us on an 8572 SMP. We are trying to get it to happen on 8548 (and single core 8572), but we haven't been able to push this part of the application as hard as it is being pushed on 8572...but we will keep trying Again, what kernel version for 8572? Its possible old SMP kernels are broken on 8572. - k snip previous emails ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH] powerpc/pci: clean up direct access to sysdata by iseries platform
Hi Kumar, On Tue, 5 May 2009 07:04:55 -0500 Kumar Gala ga...@kernel.crashing.org wrote: We shouldn't directly access sysdata to get the device node. We should be calling pci_device_to_OF_node(). Signed-off-by: Kumar Gala ga...@kernel.crashing.org It looks ok, but all I can say for now is that it doesn not make things worse. During 2.6.28, the iSeries PCI code was broken. I am working on a fix and after that I will be able to properly test this patch. -- Cheers, Stephen Rothwells...@canb.auug.org.au http://www.canb.auug.org.au/~sfr/ pgpR9NurWww0i.pgp Description: PGP signature ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 1/2] Added support for Designware SATA controller driver
Hi Scott: I agree with your statement, however this driver is wrapped with this AHB DMA controller. It would be very hard for it to work on non 460EX platforms. I can expand the depend in the future if it is available on more cores. Thanks Feng Kan Scott Wood wrote: Feng Kan wrote: This adds support for the Designware SATA controller. Signed-off-by: Feng Kan f...@amcc.com Signed-off-by: Mark Miesfeld miesf...@gmail.com --- drivers/ata/Kconfig| 10 + drivers/ata/Makefile |1 + drivers/ata/sata_dwc.c | 2053 3 files changed, 2064 insertions(+), 0 deletions(-) create mode 100644 drivers/ata/sata_dwc.c diff --git a/drivers/ata/Kconfig b/drivers/ata/Kconfig index 0bcf264..c3d0b24 100644 --- a/drivers/ata/Kconfig +++ b/drivers/ata/Kconfig @@ -72,6 +72,16 @@ config SATA_FSL If unsure, say N. +config SATA_DWC +tristate DesignWare Cores SATA support + depends on 460EX That depends looks too specific -- we don't want to grow a list if this controller gets added to other chips. Only depend on what this driver actually needs in order to function. -Scott ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH 3/3 v3] Add 4xx SATA dts node documentation
Signed-off-by: Feng Kan f...@amcc.com
---
Documentation/powerpc/dts-bindings/4xx/sata.txt | 24 +++
1 files changed, 24 insertions(+), 0 deletions(-)
create mode 100644 Documentation/powerpc/dts-bindings/4xx/sata.txt
diff --git a/Documentation/powerpc/dts-bindings/4xx/sata.txt
b/Documentation/powerpc/dts-bindings/4xx/sata.txt
new file mode 100644
index 000..3ce00d0
--- /dev/null
+++ b/Documentation/powerpc/dts-bindings/4xx/sata.txt
@@ -0,0 +1,24 @@
+AMCC SoC SATA Support
+
+This following is only for the 460ex support for Designware SATA core
+
+Required properties:
+- compatible : amcc,sata-460ex.
+- reg : the first set defines SATA controller register, the second set
+is for the AHB DMA controller for SATA.
+- interrupt-parent: UIC3
+- interrupts: one for SATA and one for the DMA
+
+Notes:
+The SATA is only available when the first PCIe port is disabled.
+
+Example:
+
+SATA0: s...@bffd1000 {
+ compatible = amcc,sata-460ex;
+reg = 4 0xbffd1000 0x800 4 0xbffd0800 0x400;
+ interrupt-parent = UIC3;
+ interrupts = 0 4 /* SATA */
+ 5 4; /* AHBDMA */
+};
+
--
1.5.5
___
Linuxppc-dev mailing list
Linuxppc-dev@ozlabs.org
https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH 2/3 v3] Added AMCC 460EX Canyonlands SATA support.
Signed-off-by: Feng Kan f...@amcc.com
---
arch/powerpc/boot/dts/canyonlands.dts |8 ++
arch/powerpc/platforms/44x/Makefile|4 +
arch/powerpc/platforms/44x/amcc-sata.c | 125
3 files changed, 137 insertions(+), 0 deletions(-)
create mode 100644 arch/powerpc/platforms/44x/amcc-sata.c
diff --git a/arch/powerpc/boot/dts/canyonlands.dts
b/arch/powerpc/boot/dts/canyonlands.dts
index 5fd1ad0..b536223 100644
--- a/arch/powerpc/boot/dts/canyonlands.dts
+++ b/arch/powerpc/boot/dts/canyonlands.dts
@@ -163,6 +163,14 @@
interrupts = 0x1e 4;
};
+SATA0: s...@bffd1000 {
+compatible = amcc,sata-460ex;
+ reg = 4 0xbffd1000 0x800 4 0xbffd0800 0x400;
+interrupt-parent = UIC3;
+interrupts = 0 4 /* SATA */
+ 5 4; /* AHBDMA */
+};
+
POB0: opb {
compatible = ibm,opb-460ex, ibm,opb;
#address-cells = 1;
diff --git a/arch/powerpc/platforms/44x/Makefile
b/arch/powerpc/platforms/44x/Makefile
index 01f51da..fa0a999 100644
--- a/arch/powerpc/platforms/44x/Makefile
+++ b/arch/powerpc/platforms/44x/Makefile
@@ -4,3 +4,7 @@ obj-$(CONFIG_EBONY) += ebony.o
obj-$(CONFIG_SAM440EP) += sam440ep.o
obj-$(CONFIG_WARP) += warp.o
obj-$(CONFIG_XILINX_VIRTEX_5_FXT) += virtex.o
+ifeq ($(CONFIG_SATA_DWC),y)
+obj-$(CONFIG_CANYONLANDS) += amcc-sata.o
+endif
+
diff --git a/arch/powerpc/platforms/44x/amcc-sata.c
b/arch/powerpc/platforms/44x/amcc-sata.c
new file mode 100644
index 000..fdda917
--- /dev/null
+++ b/arch/powerpc/platforms/44x/amcc-sata.c
@@ -0,0 +1,125 @@
+/*
+ * AMCC Canyonlands SATA wrapper
+ *
+ * Copyright 2008 DENX Software Engineering, Stefan Roese s...@denx.de
+ *
+ * Extract the resources (MEM IRQ) from the dts file and put them
+ * into the platform-device struct for usage in the platform-device
+ * SATA driver.
+ *
+ */
+
+#include linux/platform_device.h
+#include linux/of_platform.h
+
+/*
+ * Resource template will be filled dynamically with the values
+ * extracted from the dts file
+ */
+static struct resource sata_resources[] = {
+ [0] = {
+ /* 460EX SATA registers */
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ /* 460EX AHBDMA registers */
+ .flags = IORESOURCE_MEM,
+ },
+ [2] = {
+ /* 460EX SATA IRQ */
+ .flags = IORESOURCE_IRQ,
+ },
+ [3] = {
+ /* 460EX AHBDMA IRQ */
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static u64 dma_mask = 0xULL;
+
+static struct platform_device sata_device = {
+ .name = sata-dwc,
+ .id = 0,
+ .num_resources = ARRAY_SIZE(sata_resources),
+ .resource = sata_resources,
+ .dev = {
+ .dma_mask = dma_mask,
+ .coherent_dma_mask = 0xULL,
+ }
+};
+
+static struct platform_device *ppc460ex_devs[] __initdata = {
+ sata_device,
+};
+
+static int __devinit ppc460ex_sata_probe(struct of_device *ofdev,
+const struct of_device_id *match)
+{
+ struct device_node *np = ofdev-node;
+ struct resource res;
+ const char *val;
+
+ /*
+* Check if device is enabled
+*/
+ val = of_get_property(np, status, NULL);
+ if (val !strcmp(val, disabled)) {
+ printk(KERN_INFO SATA port disabled via device-tree\n);
+ return 0;
+ }
+
+ /*
+* Extract register address reange from device tree and put it into
+* the platform device structure
+*/
+ if (of_address_to_resource(np, 0, res)) {
+ printk(KERN_ERR %s: Can't get SATA register address\n,
+ __func__);
+ return -ENOMEM;
+ }
+ sata_resources[0].start = res.start;
+ sata_resources[0].end = res.end;
+
+ if (of_address_to_resource(np, 1, res)) {
+ printk(KERN_ERR %s: Can't get AHBDMA register address\n,
+ __func__);
+ return -ENOMEM;
+ }
+ sata_resources[1].start = res.start;
+ sata_resources[1].end = res.end;
+
+ /*
+* Extract IRQ number(s) from device tree and put them into
+* the platform device structure
+*/
+ sata_resources[2].start = sata_resources[2].end =
+ irq_of_parse_and_map(np, 0);
+ sata_resources[3].start = sata_resources[3].end =
+ irq_of_parse_and_map(np, 1);
+
+ return platform_add_devices(ppc460ex_devs, ARRAY_SIZE(ppc460ex_devs));
+}
+
+static int __devexit ppc460ex_sata_remove(struct of_device *ofdev)
+{
+ /* Nothing to do here */
+ return 0;
+}
+
+static const struct of_device_id
440SPE ADMA driver
Hi Ilya, Are you going to push further in submitting the ADMA driver for 440SPE ? If you are not I am planning to pursue this effort. I also have couple later version of Soc's needed to submit. Thank and Regards, Marri From: linux-raid-ow...@vger.kernel.org [mailto:linux-raid-ow...@vger.kernel.org] On Behalf Of Ilya Yanok Sent: Thursday, November 13, 2008 9:51 AM To: Josh Boyer Cc:; d...@denx.de; w...@denx.de Subject: Re: [PATCH 11/11] ppc440spe-adma: ADMA driver for PPC440SP(e) systems This message has been archived. View the original item http://sdcmailvault.ad.amcc.com/EnterpriseVault/ViewMessage.asp?VaultId =1E9560FDB597EB744B7F046F24F9462D9111sdcmailvault.ad.amcc.comSavese tId=705~20081113175043~2~2007F01CF3764FBC926BAD4B10FE5BC Josh Boyer wrote: On Thu, Nov 13, 2008 at 06:16:04PM +0300, Ilya Yanok wrote: Adds the platform device definitions and the architecture specific support routines for the ppc440spe adma driver. Any board equipped with PPC440SP(e) controller may utilize this driver. Signed-off-by: Yuri Tikhonov y...@emcraft.com Signed-off-by: Ilya Yanok ya...@emcraft.com Before I really dig into reviewing this driver, I'm going to ask you as simple question. This looks like a 1/2 completed port of an arch/ppc driver that uses the device tree (incorrectly) to get the interrupt resources and that's about it. Otherwise, it's just a straight up platform device driver. Is that correct? Yep, that's correct. If that is the case, I think the driver needs more work before it can be merged. It should get the DCR and MMIO resources from the device tree as well. It should be binding on compatible properties and not based on device tree paths. And it should probably be an of_platform device driver. Surely, you're right. I agree with you in that this driver isn't ready for merging. But it works so we'd like to publish it so interested people could use it and test it. Regards, Ilya. -- To unsubscribe from this list: send the line unsubscribe linux-raid in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
RE: MSR_SPE - being turned off...
After sitting with the developer of the application for a while, we may have two separate issues... a) Alignment (aka: alignment exceptions) - Looking at how it handles it And attempts to b) For aligned data - we still contend that if you have enough tasks working -Original Message- From: Kumar Gala [mailto:ga...@kernel.crashing.org] Sent: Wednesday, May 06, 2009 8:44 AM To: Morrison, Tom Cc: Michael Neuling; linuxppc-dev@ozlabs.org Subject: Re: MSR_SPE - being turned off... Can you describe the # of processes you are running in your test. Is it possible for you to try the tests w/2.6.29 from kernel.org? - k On May 6, 2009, at 7:42 AM, Morrison, Tom wrote: I'm sorry I forgot to put that, this issue was found with our currently running kernel 2.6.23.final (what comes with the Freescale LTIB BSP package dated 05/23/2009). I am sorry if I don't understand your statement that the SMP might be broken on this kernel, because I tried to analyze the kernel that came with the latest BSP LTIB [ackage from Freescale (dated 12/18/2009 (where we got the 4.2.171 compiler from)), and the associated 'switch context' code is exactly the same. Unfortunately, I have not started the process of porting my current platform's BSP to this new kernel - otherwise, I would have done the test on that platform (this also requires a new version of u-boot in order to test correctly)).. I may have mis-interpreted something and/or I am sure I don't understand everything about the SMP resource management (and associated SPE management), so thank you for any insight you may have on this front... Tom -Original Message- snip other emails ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
RE: MSR_SPE - being turned off...
Sorry, let me try again... -Original Message- After sitting with the developer of the application for a while, a) Alignment (aka: alignment exceptions) - Looking at how it handles the instruction - it interprets these SPE as common instructions then resets the 'upper' 32bits. I was just made aware that on 9/14/2007 - Kumar submitted a patch that handles these instructions correctly (we don't have that version - I am in the process of trying to port it to my current version of the kernel (to see if part of problem). In general, this is a VERY disturbing thing. We 'turn on SPE' in the compiler (-mspe=yes)(a). We are NOT explicitly using SPE instructions in our application(b), BUT(c), the 4.2.171 compiler (having origins from Code Sourcery (via Freescale)) upon optimizations put SPE instructions in without any regard for alignment (which instead of making the code faster - might actually make the code slower)? It's a little disturbing to me. Stay tuned for more details about my port - and seeing if some of my problems go away.. b) We still contend if you have multiple tasks using a (VERY) high Density of SPE instructions - and the system is taxed heavily (with lots of context switches) - there is the possibility that a task will get unlucky and the registers setup will NOT there after the context switches back (if some other task does something else with the entire 64bits). Tom -Original Message- From: Kumar Gala [mailto:ga...@kernel.crashing.org] Sent: Wednesday, May 06, 2009 8:44 AM To: Morrison, Tom Cc: Michael Neuling; linuxppc-dev@ozlabs.org Subject: Re: MSR_SPE - being turned off... Can you describe the # of processes you are running in your test. Is it possible for you to try the tests w/2.6.29 from kernel.org? - k On May 6, 2009, at 7:42 AM, Morrison, Tom wrote: I'm sorry I forgot to put that, this issue was found with our currently running kernel 2.6.23.final (what comes with the Freescale LTIB BSP package dated 05/23/2009). I am sorry if I don't understand your statement that the SMP might be broken on this kernel, because I tried to analyze the kernel that came with the latest BSP LTIB [ackage from Freescale (dated 12/18/2009 (where we got the 4.2.171 compiler from)), and the associated 'switch context' code is exactly the same. Unfortunately, I have not started the process of porting my current platform's BSP to this new kernel - otherwise, I would have done the test on that platform (this also requires a new version of u-boot in order to test correctly)).. I may have mis-interpreted something and/or I am sure I don't understand everything about the SMP resource management (and associated SPE management), so thank you for any insight you may have on this front... Tom -Original Message- snip other emails ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH 01/12] fs_enet: Use defines to set driver tunables.
From: Piotr Ziecik ko...@semihalf.com Signed-off-by: Piotr Ziecik ko...@semihalf.com Signed-off-by: Wolfgang Denk w...@denx.de Cc: net...@vger.kernel.org Cc: Grant Likely grant.lik...@secretlab.ca Cc: John Rigby jcri...@gmail.com --- drivers/net/fs_enet/fs_enet-main.c | 19 ++- 1 files changed, 14 insertions(+), 5 deletions(-) diff --git a/drivers/net/fs_enet/fs_enet-main.c b/drivers/net/fs_enet/fs_enet-main.c index a9cbc31..f996a1a 100644 --- a/drivers/net/fs_enet/fs_enet-main.c +++ b/drivers/net/fs_enet/fs_enet-main.c @@ -46,6 +46,15 @@ #include fs_enet.h +/* Driver tunables */ + +#define ENET_RX_RING_SIZE 32 +#define ENET_TX_RING_SIZE 32 +#define ENET_RX_COPYBREAK 240 + +#define ENET_USE_NAPI 1 +#define ENET_NAPI_WEIGHT 17 + /*/ MODULE_AUTHOR(Pantelis Antoniou pa...@intracom.gr); @@ -1057,11 +1066,11 @@ static int __devinit fs_enet_probe(struct of_device *ofdev, fpi-cp_command = *data; } - fpi-rx_ring = 32; - fpi-tx_ring = 32; - fpi-rx_copybreak = 240; - fpi-use_napi = 1; - fpi-napi_weight = 17; + fpi-rx_ring = ENET_RX_RING_SIZE; + fpi-tx_ring = ENET_TX_RING_SIZE; + fpi-rx_copybreak = ENET_RX_COPYBREAK; + fpi-use_napi = ENET_USE_NAPI; + fpi-napi_weight = ENET_NAPI_WEIGHT; ret = find_phy(ofdev-node, fpi); if (ret) -- 1.6.0.6 ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH 02/12] fs_enet: Add MPC5121 FEC support.
From: John Rigby jri...@freescale.com
Add support for MPC512x to fs_enet driver
drivers/net/fs_enet/*
Enable fs_enet driver to work 5121 FEC
Enable it with CONFIG_FS_ENET_MPC5121_FEC
Signed-off-by: John Rigby jri...@freescale.com
Signed-off-by: Piotr Ziecik ko...@semihalf.com
Signed-off-by: Wolfgang Denk w...@denx.de
Cc: net...@vger.kernel.org
Cc: Grant Likely grant.lik...@secretlab.ca
Cc: John Rigby jcri...@gmail.com
---
arch/powerpc/include/asm/mpc5121_fec.h | 111
drivers/net/fs_enet/Kconfig| 10 ++-
drivers/net/fs_enet/fs_enet-main.c |7 ++
drivers/net/fs_enet/fs_enet.h |6 ++
drivers/net/fs_enet/mac-fec.c | 30 -
drivers/net/fs_enet/mii-fec.c |7 ++
6 files changed, 166 insertions(+), 5 deletions(-)
create mode 100644 arch/powerpc/include/asm/mpc5121_fec.h
diff --git a/arch/powerpc/include/asm/mpc5121_fec.h
b/arch/powerpc/include/asm/mpc5121_fec.h
new file mode 100644
index 000..6bddf0b
--- /dev/null
+++ b/arch/powerpc/include/asm/mpc5121_fec.h
@@ -0,0 +1,111 @@
+/*
+ * Copyright (C) 2007,2008 Freescale Semiconductor, Inc. All rights reserved.
+ *
+ * Author: John Rigby, jri...@freescale.com
+ *
+ * Modified version of drivers/net/fec.h:
+ *
+ * fec.h -- Fast Ethernet Controller for Motorola ColdFire SoC
+ *processors.
+ *
+ * (C) Copyright 2000-2005, Greg Ungerer (g...@snapgear.com)
+ * (C) Copyright 2000-2001, Lineo (www.lineo.com)
+ *
+ * This is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+#ifndef MPC5121_FEC_H
+#define MPC5121_FEC_H
+
+typedef struct fec {
+ u32 fec_reserved0;
+ u32 fec_ievent; /* Interrupt event reg */
+ u32 fec_imask; /* Interrupt mask reg */
+ u32 fec_reserved1;
+ u32 fec_r_des_active; /* Receive descriptor reg */
+ u32 fec_x_des_active; /* Transmit descriptor reg */
+ u32 fec_reserved2[3];
+ u32 fec_ecntrl; /* Ethernet control reg */
+ u32 fec_reserved3[6];
+ u32 fec_mii_data; /* MII manage frame reg */
+ u32 fec_mii_speed; /* MII speed control reg */
+ u32 fec_reserved4[7];
+ u32 fec_mib_ctrlstat; /* MIB control/status reg */
+ u32 fec_reserved5[7];
+ u32 fec_r_cntrl;/* Receive control reg */
+ u32 fec_reserved6[15];
+ u32 fec_x_cntrl;/* Transmit Control reg */
+ u32 fec_reserved7[7];
+ u32 fec_addr_low; /* Low 32bits MAC address */
+ u32 fec_addr_high; /* High 16bits MAC address */
+ u32 fec_opd;/* Opcode + Pause duration */
+ u32 fec_reserved8[10];
+ u32 fec_hash_table_high;/* High 32bits hash table */
+ u32 fec_hash_table_low; /* Low 32bits hash table */
+ u32 fec_grp_hash_table_high;/* High 32bits hash table */
+ u32 fec_grp_hash_table_low; /* Low 32bits hash table */
+ u32 fec_reserved9[7];
+ u32 fec_x_wmrk; /* FIFO transmit water mark */
+ u32 fec_reserved10;
+ u32 fec_r_bound;/* FIFO receive bound reg */
+ u32 fec_r_fstart; /* FIFO receive start reg */
+ u32 fec_reserved11[11];
+ u32 fec_r_des_start;/* Receive descriptor ring */
+ u32 fec_x_des_start;/* Transmit descriptor ring */
+ u32 fec_r_buff_size;/* Maximum receive buff size */
+ u32 fec_reserved12[26];
+ u32 fec_dma_control;/* DMA Endian and other ctrl */
+} fec_t;
+
+/*
+ * Define the buffer descriptor structure.
+ */
+typedef struct bufdesc {
+ ushort cbd_sc; /* Control and status info */
+ ushort cbd_datlen; /* Data length */
+ uintcbd_bufaddr;/* Buffer address */
+} cbd_t;
+
+/*
+ * The following definitions courtesy of commproc.h, which where
+ * Copyright (c) 1997 Dan Malek (dma...@jlc.net).
+ */
+#define BD_SC_WRAP ((ushort)0x2000)
+
+/*
+ * Buffer descriptor control/status used by Ethernet receive.
+ */
+#define BD_ENET_RX_EMPTY ((ushort)0x8000)
+#define BD_ENET_RX_WRAP((ushort)0x2000)
+#define BD_ENET_RX_INTR((ushort)0x1000)
+#define BD_ENET_RX_LAST((ushort)0x0800)
+#define BD_ENET_RX_FIRST ((ushort)0x0400)
+#define BD_ENET_RX_MISS((ushort)0x0100)
+#define BD_ENET_RX_LG ((ushort)0x0020)
+#define BD_ENET_RX_NO ((ushort)0x0010)
+#define BD_ENET_RX_SH ((ushort)0x0008)
+#define BD_ENET_RX_CR ((ushort)0x0004)
+#define BD_ENET_RX_OV
[PATCH 07/12] mpc5121ads: Clean up and fix NAND description in mpc5121ads DTS.
From: Piotr Ziecik ko...@semihalf.com
- Removed unused properties.
- Corrected NAND flash chip size.
Signed-off-by: Piotr Ziecik ko...@semihalf.com
Signed-off-by: Wolfgang Denk w...@denx.de
Cc: Grant Likely grant.lik...@secretlab.ca
Cc: John Rigby jcri...@gmail.com
---
arch/powerpc/boot/dts/mpc5121ads.dts | 13 -
1 files changed, 4 insertions(+), 9 deletions(-)
diff --git a/arch/powerpc/boot/dts/mpc5121ads.dts
b/arch/powerpc/boot/dts/mpc5121ads.dts
index 1b83a9d..93fe12a 100644
--- a/arch/powerpc/boot/dts/mpc5121ads.dts
+++ b/arch/powerpc/boot/dts/mpc5121ads.dts
@@ -62,17 +62,12 @@
interrupt-parent = ipic ;
#address-cells = 1;
#size-cells = 1;
- bank-width = 1;
// ADS has two Hynix 512MB Nand flash chips in a single
- // stacked package .
+ // stacked package.
chips = 2;
- na...@0 {
- label = nand0;
- reg = 0x 0x0200; // first 32 MB of chip 0
- };
- na...@2000 {
- label = nand1;
- reg = 0x2000 0x0200; // first 32 MB of chip 1
+ n...@0 {
+ label = nand;
+ reg = 0x 0x4000; // 512MB + 512MB
};
};
--
1.6.0.6
___
Linuxppc-dev mailing list
Linuxppc-dev@ozlabs.org
https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH 03/12] fs_enet: Add FEC TX Alignment workaround for MPC5121.
From: John Rigby jri...@freescale.com
The FEC on 5121 has problems with misaligned tx buffers.
The RM says any alignment is ok but empirical results
show that packet buffers ending in 0x1E will sometimes
hang the FEC. Other bad alignment does not hang but will
cause silent TX failures resulting in about a 1% packet
loss as tested by ping -f from a remote host.
This patch is a work around that copies every tx packet
to an aligned skb before sending.
Signed-off-by: John Rigby jri...@freescale.com
Signed-off-by: Piotr Ziecik ko...@semihalf.com
Signed-off-by: Wolfgang Denk w...@denx.de
Cc: net...@vger.kernel.org
Cc: Grant Likely grant.lik...@secretlab.ca
Cc: John Rigby jcri...@gmail.com
---
drivers/net/fs_enet/Kconfig|3 ++
drivers/net/fs_enet/fs_enet-main.c | 41
drivers/net/fs_enet/mac-fec.c |2 +-
3 files changed, 45 insertions(+), 1 deletions(-)
diff --git a/drivers/net/fs_enet/Kconfig b/drivers/net/fs_enet/Kconfig
index fc073b5..79afd07 100644
--- a/drivers/net/fs_enet/Kconfig
+++ b/drivers/net/fs_enet/Kconfig
@@ -8,6 +8,9 @@ config FS_ENET_MPC5121_FEC
def_bool y if (FS_ENET PPC_MPC512x)
select FS_ENET_HAS_FEC
+config FS_ENET_FEC_TX_ALIGN_WORKAROUND
+ def_bool y if FS_ENET_MPC5121_FEC
+
config FS_ENET_HAS_SCC
bool Chip has an SCC usable for ethernet
depends on FS_ENET (CPM1 || CPM2)
diff --git a/drivers/net/fs_enet/fs_enet-main.c
b/drivers/net/fs_enet/fs_enet-main.c
index 4170d33..c83ffc3 100644
--- a/drivers/net/fs_enet/fs_enet-main.c
+++ b/drivers/net/fs_enet/fs_enet-main.c
@@ -594,6 +594,37 @@ void fs_cleanup_bds(struct net_device *dev)
/**/
+#ifdef CONFIG_FS_ENET_FEC_TX_ALIGN_WORKAROUND
+static struct sk_buff *tx_skb_align_workaround(struct net_device *dev,
+ struct sk_buff *skb)
+{
+ struct sk_buff *new_skb;
+
+ /* Alloc new skb */
+ new_skb = dev_alloc_skb(ENET_RX_FRSIZE + 32);
+ if (!new_skb) {
+ printk(KERN_WARNING DRV_MODULE_NAME
+ : %s Memory squeeze, dropping tx packet.\n,
+ dev-name);
+ return NULL;
+ }
+
+ /* Make sure new skb is properly aligned */
+ skb_align(new_skb, 32);
+
+ /* Copy data to new skb ... */
+ skb_copy_from_linear_data(skb, new_skb-data, skb-len);
+ skb_put(new_skb, skb-len);
+
+ /* ... and free an old one */
+ dev_kfree_skb_any(skb);
+
+ return new_skb;
+}
+#else
+#define tx_skb_align_workaround(dev, skb) (skb)
+#endif
+
static int fs_enet_start_xmit(struct sk_buff *skb, struct net_device *dev)
{
struct fs_enet_private *fep = netdev_priv(dev);
@@ -602,6 +633,16 @@ static int fs_enet_start_xmit(struct sk_buff *skb, struct
net_device *dev)
u16 sc;
unsigned long flags;
+ skb = tx_skb_align_workaround(dev, skb);
+ if (!skb) {
+ /*
+* We have lost packet due to memory allocation error in
+* tx_skb_align_workaround(). Hopefully original skb is still
+* valid, so try transmit it later.
+*/
+ return NETDEV_TX_BUSY;
+ }
+
spin_lock_irqsave(fep-tx_lock, flags);
/*
diff --git a/drivers/net/fs_enet/mac-fec.c b/drivers/net/fs_enet/mac-fec.c
index b069088..3e86498 100644
--- a/drivers/net/fs_enet/mac-fec.c
+++ b/drivers/net/fs_enet/mac-fec.c
@@ -311,7 +311,7 @@ static void restart(struct net_device *dev)
* Enable big endian.
*/
#ifndef CONFIG_FS_ENET_MPC5121_FEC
- /* Don't care about SDMA FC. */
+ /* Don't care about SDMA Function Code. */
FW(fecp, fun_code, 0x7800);
#else
FS(fecp, dma_control, 0xC000);
--
1.6.0.6
___
Linuxppc-dev mailing list
Linuxppc-dev@ozlabs.org
https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH 00/16] Add support for MPC512x
The following patch series brings support for the Freescale MPC512x processsors up to date: [PATCH 01/12] fs_enet: Use defines to set driver tunables. Cc: net...@vger.kernel.org [PATCH 02/12] fs_enet: Add MPC5121 FEC support. Cc: net...@vger.kernel.org [PATCH 03/12] fs_enet: Add FEC TX Alignment workaround for MPC5121. Cc: net...@vger.kernel.org [PATCH 04/12] mpc5121: Added reset module registers representation. [PATCH 05/12] mpc5121ads: Added Reset Module node to DTS. [PATCH 06/12] mpc5121: Added NAND Flash Controller driver. Cc: linux-...@lists.infradead.org [PATCH 07/12] mpc5121ads: Clean up and fix NAND description in mpc5121ads DTS. [PATCH 08/12] mpc5121: Added I2C support. Cc: linux-...@vger.kernel.org [PATCH 09/12] mpc5121ads: Added I2C RTC node to mpc5121ads DTS. [PATCH 10/12] mpc5121: Add MPC5121 Real time clock driver. Cc: rtc-li...@googlegroups.com [PATCH 11/12] mpc5121: Added MPC512x DMA driver. [PATCH 12/12] mpc5121: Added default config for MPC5121. The patches are based on v2.6.30-rc4 and cover the following items: - platform, DTS - DMA - FEC Ethernet - UART (without h/w flow control) - I2C - NAND - RTC The code has been tested on the Freescale/STX MPC5121ADS board (board rev. 4) with a MPC5121e Rev. 2. No attempt was made to provide backward compatibility to older silicon revisions or older revisions of the board. The work for this project has been approved as OSADL project by a majority of OSADL members and funded by OSADL membership fees in 2009; for details please see www.osadl.org. Signed-off-by: Wolfgang Denk w...@denx.de Cc: Grant Likely grant.lik...@secretlab.ca Cc: John Rigby jcri...@gmail.com --- Summary statistics: arch/powerpc/boot/dts/aria.dts | 410 ++ arch/powerpc/boot/dts/mpc5121ads.dts | 25 +- arch/powerpc/configs/512x/aria_defconfig | 1789 arch/powerpc/configs/512x/mpc5121ads_defconfig | 1190 arch/powerpc/configs/mpc5121_defconfig | 1158 +++ arch/powerpc/include/asm/mpc5121_fec.h | 111 ++ arch/powerpc/include/asm/mpc5121_nfc.h | 100 ++ arch/powerpc/include/asm/mpc512x.h | 13 + arch/powerpc/platforms/512x/Kconfig|9 + arch/powerpc/platforms/512x/Makefile |1 + arch/powerpc/platforms/512x/aria.c | 73 + arch/powerpc/platforms/512x/mpc5121_ads.c |2 + arch/powerpc/platforms/512x/mpc5121_generic.c |1 + arch/powerpc/platforms/512x/mpc512x.h |1 + arch/powerpc/platforms/512x/mpc512x_shared.c | 26 + drivers/dma/Kconfig|7 + drivers/dma/Makefile |1 + drivers/dma/mpc512x_dma.c | 642 + drivers/dma/mpc512x_dma.h | 192 +++ drivers/i2c/busses/Kconfig |9 +- drivers/mtd/nand/Kconfig |7 + drivers/mtd/nand/Makefile |1 + drivers/mtd/nand/mpc5121_nfc.c | 855 +++ drivers/net/fs_enet/Kconfig| 13 +- drivers/net/fs_enet/fs_enet-main.c | 67 +- drivers/net/fs_enet/fs_enet.h |6 + drivers/net/fs_enet/mac-fec.c | 30 +- drivers/net/fs_enet/mii-fec.c | 13 +- drivers/rtc/Kconfig| 10 + drivers/rtc/Makefile |1 + drivers/rtc/rtc-mpc5121.c | 408 ++ 31 files changed, 7146 insertions(+), 25 deletions(-) ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH 06/12] mpc5121: Added NAND Flash Controller driver.
From: Piotr Ziecik ko...@semihalf.com This patch adds NAND Flash Controller driver for MPC5121 revision 2. All device features, except hardware ECC and power management, are supported. Signed-off-by: Piotr Ziecik ko...@semihalf.com Signed-off-by: Wolfgang Denk w...@denx.de Cc: linux-...@lists.infradead.org Cc: Grant Likely grant.lik...@secretlab.ca Cc: John Rigby jcri...@gmail.com --- arch/powerpc/include/asm/mpc5121_nfc.h | 100 +++ arch/powerpc/platforms/512x/mpc512x_shared.c |1 + drivers/mtd/nand/Kconfig |7 + drivers/mtd/nand/Makefile|1 + drivers/mtd/nand/mpc5121_nfc.c | 855 ++ 5 files changed, 964 insertions(+), 0 deletions(-) create mode 100644 arch/powerpc/include/asm/mpc5121_nfc.h create mode 100644 drivers/mtd/nand/mpc5121_nfc.c diff --git a/arch/powerpc/include/asm/mpc5121_nfc.h b/arch/powerpc/include/asm/mpc5121_nfc.h new file mode 100644 index 000..b96a5b9 --- /dev/null +++ b/arch/powerpc/include/asm/mpc5121_nfc.h @@ -0,0 +1,100 @@ +/* + * Copyright 2004-2008 Freescale Semiconductor, Inc. + * Copyright 2009 Semihalf. + * + * Approved as OSADL project by a majority of OSADL members and funded + * by OSADL membership fees in 2009; for details see www.osadl.org. + * + * Based on original driver from Freescale Semiconductor + * written by John Rigby jri...@freescale.com on basis + * of drivers/mtd/nand/mxc_nand.c. Reworked and extended by + * Piotr Ziecik ko...@semihalf.com. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, + * MA 02110-1301, USA. + */ + +#ifndef MPC5121_NFC_H +#define MPC5121_NFC_H + +/* Addresses for NFC MAIN RAM BUFFER areas */ +#define NFC_MAIN_AREA(n) ((n) * 0x200) + +/* Addresses for NFC SPARE BUFFER areas */ +#define NFC_SPARE_BUFFERS 8 +#define NFC_SPARE_LEN 0x40 +#define NFC_SPARE_AREA(n) (0x1000 + ((n) * NFC_SPARE_LEN)) + +/* MPC5121 NFC registers */ +#define NFC_BUF_ADDR 0x1E04 +#define NFC_FLASH_ADDR 0x1E06 +#define NFC_FLASH_CMD 0x1E08 +#define NFC_CONFIG 0x1E0A +#define NFC_ECC_STATUS10x1E0C +#define NFC_ECC_STATUS20x1E0E +#define NFC_SPAS 0x1E10 +#define NFC_WRPROT 0x1E12 +#define NFC_NF_WRPRST 0x1E18 +#define NFC_CONFIG10x1E1A +#define NFC_CONFIG20x1E1C +#define NFC_UNLOCKSTART_BLK0 0x1E20 +#define NFC_UNLOCKEND_BLK0 0x1E22 +#define NFC_UNLOCKSTART_BLK1 0x1E24 +#define NFC_UNLOCKEND_BLK1 0x1E26 +#define NFC_UNLOCKSTART_BLK2 0x1E28 +#define NFC_UNLOCKEND_BLK2 0x1E2A +#define NFC_UNLOCKSTART_BLK3 0x1E2C +#define NFC_UNLOCKEND_BLK3 0x1E2E + +/* Bit Definitions: NFC_BUF_ADDR */ +#define NFC_RBA_MASK (7 0) +#define NFC_ACTIVE_CS_SHIFT5 +#define NFC_ACTIVE_CS_MASK (3 NFC_ACTIVE_CS_SHIFT) + +/* Bit Definitions: NFC_CONFIG */ +#define NFC_BLS_UNLOCKED (1 1) + +/* Bit Definitions: NFC_CONFIG1 */ +#define NFC_ECC_4BIT (1 0) +#define NFC_FULL_PAGE_DMA (1 1) +#define NFC_SPARE_ONLY (1 2) +#define NFC_ECC_ENABLE (1 3) +#define NFC_INT_MASK (1 4) +#define NFC_BIG_ENDIAN (1 5) +#define NFC_RESET (1 6) +#define NFC_CE (1 7) +#define NFC_ONE_CYCLE (1 8) +#define NFC_PPB_32 (0 9) +#define NFC_PPB_64 (1 9) +#define NFC_PPB_128(2 9) +#define NFC_PPB_256(3 9) +#define NFC_PPB_MASK (3 9) +#define NFC_FULL_PAGE_INT (1 11) + +/* Bit Definitions: NFC_CONFIG2 */ +#define NFC_COMMAND(1 0) +#define NFC_ADDRESS(1 1) +#define NFC_INPUT (1 2) +#define NFC_OUTPUT (1 3) +#define NFC_ID (1 4) +#define NFC_STATUS (1 5) +#define NFC_CMD_FAIL (1 15) +#define NFC_INT(1 15) + +/* Bit Definitions: NFC_WRPROT */ +#define NFC_WPC_LOCK_TIGHT (1 0) +#define NFC_WPC_LOCK (1 1) +#define NFC_WPC_UNLOCK (1 2) + +#endif /* MPC5121_NFC_H */ diff --git a/arch/powerpc/platforms/512x/mpc512x_shared.c b/arch/powerpc/platforms/512x/mpc512x_shared.c index d8cd579..7135d89 100644 --- a/arch/powerpc/platforms/512x/mpc512x_shared.c +++
[PATCH 04/12] mpc5121: Added reset module registers representation.
From: Piotr Ziecik ko...@semihalf.com
Signed-off-by: Piotr Ziecik ko...@semihalf.com
Signed-off-by: Wolfgang Denk w...@denx.de
Cc: Grant Likely grant.lik...@secretlab.ca
Cc: John Rigby jcri...@gmail.com
---
arch/powerpc/include/asm/mpc512x.h | 13 +
1 files changed, 13 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/include/asm/mpc512x.h
b/arch/powerpc/include/asm/mpc512x.h
index c48a165..ea50d8d 100644
--- a/arch/powerpc/include/asm/mpc512x.h
+++ b/arch/powerpc/include/asm/mpc512x.h
@@ -16,6 +16,19 @@
#ifndef __ASM_POWERPC_MPC512x_H__
#define __ASM_POWERPC_MPC512x_H__
+/* MPC512x Reset module registers */
+struct mpc512x_reset_module {
+ u32 rcwlr; /* Reset Configuration Word Low Register */
+ u32 rcwhr; /* Reset Configuration Word High Register */
+ u32 reserved1;
+ u32 reserved2;
+ u32 rsr;/* Reset Status Register */
+ u32 rmr;/* Reset Mode Register */
+ u32 rpr;/* Reset Protection Register */
+ u32 rcr;/* Reset Control Register */
+ u32 rcer; /* Reset Control Enable Register */
+} __attribute__ ((__packed__));
+
extern unsigned long mpc512x_find_ips_freq(struct device_node *node);
#endif /* __ASM_POWERPC_MPC512x_H__ */
--
1.6.0.6
___
Linuxppc-dev mailing list
Linuxppc-dev@ozlabs.org
https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH 12/12] mpc5121: Added default config for MPC5121.
From: Piotr Ziecik ko...@semihalf.com Signed-off-by: Piotr Ziecik ko...@semihalf.com Signed-off-by: Wolfgang Denk w...@denx.de Cc: Grant Likely grant.lik...@secretlab.ca Cc: John Rigby jcri...@gmail.com --- arch/powerpc/configs/mpc5121_defconfig | 1158 1 files changed, 1158 insertions(+), 0 deletions(-) create mode 100644 arch/powerpc/configs/mpc5121_defconfig diff --git a/arch/powerpc/configs/mpc5121_defconfig b/arch/powerpc/configs/mpc5121_defconfig new file mode 100644 index 000..87b5f15 --- /dev/null +++ b/arch/powerpc/configs/mpc5121_defconfig @@ -0,0 +1,1158 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.29-rc5 +# Fri Feb 27 14:08:31 2009 +# +# CONFIG_PPC64 is not set + +# +# Processor support +# +CONFIG_6xx=y +# CONFIG_PPC_85xx is not set +# CONFIG_PPC_8xx is not set +# CONFIG_40x is not set +# CONFIG_44x is not set +# CONFIG_E200 is not set +CONFIG_PPC_FPU=y +# CONFIG_ALTIVEC is not set +CONFIG_PPC_STD_MMU=y +CONFIG_PPC_STD_MMU_32=y +# CONFIG_PPC_MM_SLICES is not set +# CONFIG_SMP is not set +CONFIG_NOT_COHERENT_CACHE=y +CONFIG_PPC32=y +CONFIG_WORD_SIZE=32 +# CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set +CONFIG_MMU=y +CONFIG_GENERIC_CMOS_UPDATE=y +CONFIG_GENERIC_TIME=y +CONFIG_GENERIC_TIME_VSYSCALL=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_GENERIC_HARDIRQS=y +# CONFIG_HAVE_SETUP_PER_CPU_AREA is not set +CONFIG_IRQ_PER_CPU=y +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_HAVE_LATENCYTOP_SUPPORT=y +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_RWSEM_XCHGADD_ALGORITHM=y +CONFIG_ARCH_HAS_ILOG2_U32=y +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_GENERIC_FIND_NEXT_BIT=y +# CONFIG_ARCH_NO_VIRT_TO_BUS is not set +CONFIG_PPC=y +CONFIG_EARLY_PRINTK=y +CONFIG_GENERIC_NVRAM=y +CONFIG_SCHED_OMIT_FRAME_POINTER=y +CONFIG_ARCH_MAY_HAVE_PC_FDC=y +CONFIG_PPC_OF=y +CONFIG_OF=y +# CONFIG_PPC_UDBG_16550 is not set +# CONFIG_GENERIC_TBSYNC is not set +CONFIG_AUDIT_ARCH=y +CONFIG_GENERIC_BUG=y +CONFIG_DEFAULT_UIMAGE=y +# CONFIG_PPC_DCR_NATIVE is not set +# CONFIG_PPC_DCR_MMIO is not set +CONFIG_DEFCONFIG_LIST=/lib/modules/$UNAME_RELEASE/.config + +# +# General setup +# +CONFIG_EXPERIMENTAL=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_INIT_ENV_ARG_LIMIT=32 +CONFIG_LOCALVERSION= +CONFIG_LOCALVERSION_AUTO=y +# CONFIG_SWAP is not set +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +# CONFIG_POSIX_MQUEUE is not set +# CONFIG_BSD_PROCESS_ACCT is not set +# CONFIG_TASKSTATS is not set +# CONFIG_AUDIT is not set + +# +# RCU Subsystem +# +CONFIG_CLASSIC_RCU=y +# CONFIG_TREE_RCU is not set +# CONFIG_PREEMPT_RCU is not set +# CONFIG_TREE_RCU_TRACE is not set +# CONFIG_PREEMPT_RCU_TRACE is not set +# CONFIG_IKCONFIG is not set +CONFIG_LOG_BUF_SHIFT=16 +# CONFIG_GROUP_SCHED is not set +# CONFIG_CGROUPS is not set +CONFIG_SYSFS_DEPRECATED=y +CONFIG_SYSFS_DEPRECATED_V2=y +# CONFIG_RELAY is not set +CONFIG_NAMESPACES=y +# CONFIG_UTS_NS is not set +# CONFIG_IPC_NS is not set +# CONFIG_USER_NS is not set +# CONFIG_PID_NS is not set +# CONFIG_NET_NS is not set +CONFIG_BLK_DEV_INITRD=y +CONFIG_INITRAMFS_SOURCE= +# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set +CONFIG_SYSCTL=y +# CONFIG_EMBEDDED is not set +CONFIG_SYSCTL_SYSCALL=y +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_EXTRA_PASS is not set +CONFIG_HOTPLUG=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +# CONFIG_COMPAT_BRK is not set +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_ANON_INODES=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y +CONFIG_SHMEM=y +CONFIG_AIO=y +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_PCI_QUIRKS=y +CONFIG_SLAB=y +# CONFIG_SLUB is not set +# CONFIG_SLOB is not set +# CONFIG_PROFILING is not set +CONFIG_HAVE_OPROFILE=y +# CONFIG_KPROBES is not set +CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y +CONFIG_HAVE_IOREMAP_PROT=y +CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y +CONFIG_HAVE_ARCH_TRACEHOOK=y +CONFIG_HAVE_CLK=y +# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set +CONFIG_SLABINFO=y +CONFIG_RT_MUTEXES=y +CONFIG_BASE_SMALL=0 +CONFIG_MODULES=y +# CONFIG_MODULE_FORCE_LOAD is not set +CONFIG_MODULE_UNLOAD=y +# CONFIG_MODULE_FORCE_UNLOAD is not set +# CONFIG_MODVERSIONS is not set +# CONFIG_MODULE_SRCVERSION_ALL is not set +CONFIG_BLOCK=y +# CONFIG_LBD is not set +# CONFIG_BLK_DEV_IO_TRACE is not set +# CONFIG_BLK_DEV_BSG is not set +# CONFIG_BLK_DEV_INTEGRITY is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +# CONFIG_IOSCHED_AS is not set +CONFIG_IOSCHED_DEADLINE=y +# CONFIG_IOSCHED_CFQ is not set +# CONFIG_DEFAULT_AS is not set +CONFIG_DEFAULT_DEADLINE=y +# CONFIG_DEFAULT_CFQ is not set +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED=deadline +# CONFIG_FREEZER is not set +CONFIG_PPC_MSI_BITMAP=y + +# +# Platform support +# +CONFIG_PPC_MULTIPLATFORM=y +CONFIG_CLASSIC32=y +# CONFIG_PPC_CHRP is not set +CONFIG_PPC_MPC512x=y +CONFIG_PPC_MPC5121=y +CONFIG_MPC5121_ADS=y +# CONFIG_MPC5121_GENERIC is not set +# CONFIG_PPC_MPC52xx is not set +# CONFIG_PPC_PMAC is not set +# CONFIG_PPC_CELL is
[PATCH 08/12] mpc5121: Added I2C support.
From: Piotr Ziecik ko...@semihalf.com
- Enabled I2C interrupts on MPC5121.
- Updated Kconfig for i2c-mpc driver.
Signed-off-by: Piotr Ziecik ko...@semihalf.com
Signed-off-by: Wolfgang Denk w...@denx.de
Cc: linux-...@vger.kernel.org
Cc: Grant Likely grant.lik...@secretlab.ca
Cc: John Rigby jcri...@gmail.com
---
arch/powerpc/platforms/512x/mpc5121_ads.c|2 ++
arch/powerpc/platforms/512x/mpc512x.h|1 +
arch/powerpc/platforms/512x/mpc512x_shared.c | 24
drivers/i2c/busses/Kconfig |9 +
4 files changed, 32 insertions(+), 4 deletions(-)
diff --git a/arch/powerpc/platforms/512x/mpc5121_ads.c
b/arch/powerpc/platforms/512x/mpc5121_ads.c
index 441abc4..a8976b4 100644
--- a/arch/powerpc/platforms/512x/mpc5121_ads.c
+++ b/arch/powerpc/platforms/512x/mpc5121_ads.c
@@ -42,6 +42,8 @@ static void __init mpc5121_ads_setup_arch(void)
for_each_compatible_node(np, pci, fsl,mpc5121-pci)
mpc83xx_add_bridge(np);
#endif
+
+ mpc512x_init_i2c();
}
static void __init mpc5121_ads_init_IRQ(void)
diff --git a/arch/powerpc/platforms/512x/mpc512x.h
b/arch/powerpc/platforms/512x/mpc512x.h
index 9c03693..f4db8a7 100644
--- a/arch/powerpc/platforms/512x/mpc512x.h
+++ b/arch/powerpc/platforms/512x/mpc512x.h
@@ -13,5 +13,6 @@
#define __MPC512X_H__
extern unsigned long mpc512x_find_ips_freq(struct device_node *node);
extern void __init mpc512x_init_IRQ(void);
+extern void __init mpc512x_init_i2c(void);
void __init mpc512x_declare_of_platform_devices(void);
#endif /* __MPC512X_H__ */
diff --git a/arch/powerpc/platforms/512x/mpc512x_shared.c
b/arch/powerpc/platforms/512x/mpc512x_shared.c
index 7135d89..b776e45 100644
--- a/arch/powerpc/platforms/512x/mpc512x_shared.c
+++ b/arch/powerpc/platforms/512x/mpc512x_shared.c
@@ -65,6 +65,30 @@ void __init mpc512x_init_IRQ(void)
ipic_set_default_priority();
}
+void __init mpc512x_init_i2c(void)
+{
+ struct device_node *np;
+ void __iomem *i2cctl;
+
+ /* Enable I2C interrupts */
+ np = of_find_compatible_node(NULL, NULL, fsl,mpc5121-i2c-ctrl);
+ if (np) {
+ i2cctl = of_iomap(np, 0);
+ if (i2cctl) {
+ /*
+* Set interrupt enable bits:
+* - I2C-0: bit 24,
+* - I2C-1: bit 26,
+* - I2C-2: bit 28.
+*/
+ out_be32(i2cctl, 0x1500);
+ iounmap(i2cctl);
+ }
+
+ of_node_put(np);
+ }
+}
+
/*
* Nodes to do bus probe on, soc and localbus
*/
diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
index a48c8ae..57ed637 100644
--- a/drivers/i2c/busses/Kconfig
+++ b/drivers/i2c/busses/Kconfig
@@ -391,13 +391,14 @@ config I2C_IXP2000
instead.
config I2C_MPC
- tristate MPC107/824x/85xx/52xx/86xx
+ tristate MPC107/824x/85xx/512x/52xx/86xx
depends on PPC32
help
If you say yes to this option, support will be included for the
- built-in I2C interface on the MPC107/Tsi107/MPC8240/MPC8245 and
- MPC85xx/MPC8641 family processors. The driver may also work on 52xx
- family processors, though interrupts are known not to work.
+ built-in I2C interface on the MPC107/Tsi107/MPC8240/MPC8245,
+ MPC85xx/MPC8641 and MPC512x family processors. The driver may
+ also work on 52xx family processors, though interrupts are known
+ not to work.
This driver can also be built as a module. If so, the module
will be called i2c-mpc.
--
1.6.0.6
___
Linuxppc-dev mailing list
Linuxppc-dev@ozlabs.org
https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH 05/12] mpc5121ads: Added Reset Module node to DTS.
From: Piotr Ziecik ko...@semihalf.com
Signed-off-by: Piotr Ziecik ko...@semihalf.com
Signed-off-by: Wolfgang Denk w...@denx.de
Cc: Grant Likely grant.lik...@secretlab.ca
Cc: John Rigby jcri...@gmail.com
---
arch/powerpc/boot/dts/mpc5121ads.dts |5 +
1 files changed, 5 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/boot/dts/mpc5121ads.dts
b/arch/powerpc/boot/dts/mpc5121ads.dts
index c2b8dbf..1b83a9d 100644
--- a/arch/powerpc/boot/dts/mpc5121ads.dts
+++ b/arch/powerpc/boot/dts/mpc5121ads.dts
@@ -166,6 +166,11 @@
interrupt-parent = ipic ;
};
+ re...@e00 { // Reset module
+ compatible = fsl,mpc5121-reset;
+ reg = 0xe00 0x100;
+ };
+
cl...@f00 { // Clock control
compatible = fsl,mpc5121-clock;
reg = 0xf00 0x100;
--
1.6.0.6
___
Linuxppc-dev mailing list
Linuxppc-dev@ozlabs.org
https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH 10/12] mpc5121: Add MPC5121 Real time clock driver.
From: John Rigby jri...@freescale.com
Based on Domen Puncer's rtc driver for 5200 posted to
the ppclinux mailing list:
http://patchwork.ozlabs.org/linuxppc-embedded/patch?id=11675
but never commited anywhere.
Changes to Domen's original:
Changed filenames/routine names from mpc5200* to mpc5121*
Changed match to only care about compatible and use fsl,
convention for compatible.
Make alarms more sane by dealing with lack of second alarm resolution.
Deal with the fact that most of the 5121 rtc registers are not persistent
across a reset even with a battery attached:
Use actual_time register for time keeping
and target_time register as an offset to linux time
The target_time register would normally be used for hibernation
but hibernation does not work on current silicon
Signed-off-by: John Rigby jri...@freescale.com
Signed-off-by: Piotr Ziecik ko...@semihalf.com
Signed-off-by: Wolfgang Denk w...@denx.de
Cc: rtc-li...@googlegroups.com
Cc: Grant Likely grant.lik...@secretlab.ca
Cc: John Rigby jcri...@gmail.com
---
drivers/rtc/Kconfig | 10 +
drivers/rtc/Makefile |1 +
drivers/rtc/rtc-mpc5121.c | 408 +
3 files changed, 419 insertions(+), 0 deletions(-)
create mode 100644 drivers/rtc/rtc-mpc5121.c
diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig
index 4e9851f..900d5b8 100644
--- a/drivers/rtc/Kconfig
+++ b/drivers/rtc/Kconfig
@@ -750,4 +750,14 @@ config RTC_DRV_PS3
This driver can also be built as a module. If so, the module
will be called rtc-ps3.
+config RTC_DRV_MPC5121
+ tristate Freescale MPC5121 built-in RTC
+ depends on RTC_CLASS
+ help
+ If you say yes here you will get support for the
+ built-in RTC MPC5121.
+
+ This driver can also be built as a module. If so, the module
+ will be called rtc-mpc5121.
+
endif # RTC_CLASS
diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile
index 6c0639a..8c6d6a7 100644
--- a/drivers/rtc/Makefile
+++ b/drivers/rtc/Makefile
@@ -51,6 +51,7 @@ obj-$(CONFIG_RTC_DRV_STARFIRE)+= rtc-starfire.o
obj-$(CONFIG_RTC_DRV_MAX6900) += rtc-max6900.o
obj-$(CONFIG_RTC_DRV_MAX6902) += rtc-max6902.o
obj-$(CONFIG_RTC_DRV_MV) += rtc-mv.o
+obj-$(CONFIG_RTC_DRV_MPC5121) += rtc-mpc5121.o
obj-$(CONFIG_RTC_DRV_OMAP) += rtc-omap.o
obj-$(CONFIG_RTC_DRV_PCF8563) += rtc-pcf8563.o
obj-$(CONFIG_RTC_DRV_PCF8583) += rtc-pcf8583.o
diff --git a/drivers/rtc/rtc-mpc5121.c b/drivers/rtc/rtc-mpc5121.c
new file mode 100644
index 000..63460cb
--- /dev/null
+++ b/drivers/rtc/rtc-mpc5121.c
@@ -0,0 +1,408 @@
+/*
+ * Real-time clock driver for MPC5121
+ *
+ * Copyright 2007, Domen Puncer domen.pun...@telargo.com
+ * Copyright 2008, Freescale Semiconductor, Inc. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/*
+ * History:
+ *
+ * Based on mpc5200_rtc.c written by Domen Puncer domen.pun...@telargo.com
+ * posted to linuxppc-embedded mailing list:
+ * http://patchwork.ozlabs.org/linuxppc-embedded/patch?id=11675
+ * but never committed to any public tree.
+ *
+ * Author: John Rigby jri...@freescale.com
+ * Converted to 5121 rtc driver.
+ *
+ * Make alarms more sane by dealing with lack of second alarm resolution.
+ *
+ * Use actual_time time register for time keeping since it is persistent
+ * and the normal rtc registers are not. Use target_time register as an
+ * offset to linux time.
+ *
+ */
+
+#include linux/module.h
+#include linux/rtc.h
+#include linux/of_device.h
+#include linux/of_platform.h
+#include linux/io.h
+
+struct mpc5121_rtc_regs {
+ u8 set_time;/* RTC + 0x00 */
+ u8 hour_set;/* RTC + 0x01 */
+ u8 minute_set; /* RTC + 0x02 */
+ u8 second_set; /* RTC + 0x03 */
+
+ u8 set_date;/* RTC + 0x04 */
+ u8 month_set; /* RTC + 0x05 */
+ u8 weekday_set; /* RTC + 0x06 */
+ u8 date_set;/* RTC + 0x07 */
+
+ u8 write_sw;/* RTC + 0x08 */
+ u8 sw_set; /* RTC + 0x09 */
+ u16 year_set; /* RTC + 0x0a */
+
+ u8 alm_enable; /* RTC + 0x0c */
+ u8 alm_hour_set;/* RTC + 0x0d */
+ u8 alm_min_set; /* RTC + 0x0e */
+ u8 int_enable; /* RTC + 0x0f */
+
+ u8 reserved1;
+ u8 hour;/* RTC + 0x11 */
+ u8 minute; /* RTC + 0x12 */
+ u8 second; /* RTC + 0x13 */
+
+ u8 month; /* RTC + 0x14 */
+ u8 wday_mday; /* RTC + 0x15 */
+ u16 year; /* RTC + 0x16 */
+
+ u8 int_alm; /* RTC + 0x18 */
+ u8 int_sw; /* RTC +
[PATCH 02/04] ARIA: add device tree source file
ARIA is a MPC5121 based COM Express module by Dave/DENX.
Signed-off-by: Andrea Scian andrea.sc...@dave.eu
Signed-off-by: Wolfgang Denk w...@denx.de
Cc: Grant Likely grant.lik...@secretlab.ca
Cc: John Rigby jcri...@gmail.com
---
arch/powerpc/boot/dts/aria.dts | 410
1 files changed, 410 insertions(+), 0 deletions(-)
create mode 100644 arch/powerpc/boot/dts/aria.dts
diff --git a/arch/powerpc/boot/dts/aria.dts b/arch/powerpc/boot/dts/aria.dts
new file mode 100644
index 000..6c6b5e4
--- /dev/null
+++ b/arch/powerpc/boot/dts/aria.dts
@@ -0,0 +1,407 @@
+/*
+ * Aria Device Tree Source
+ *
+ * Copyright 2009 Dave Srl www.dave.eu
+ * Copyright 2009 Wolfgang Denk w...@denx.de
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+/dts-v1/;
+
+/ {
+ model = aria;
+ compatible = davedenx,aria;
+ #address-cells = 1;
+ #size-cells = 1;
+
+ aliases {
+ ethernet0 = enet;
+
+ serial0 = serial0;
+ serial1 = serial1;
+
+ pci = pci;
+ };
+
+ cpus {
+ #address-cells = 1;
+ #size-cells = 0;
+
+ PowerPC,5...@0 {
+ device_type = cpu;
+ reg = 0;
+ d-cache-line-size = 0x20; // 32 bytes
+ i-cache-line-size = 0x20; // 32 bytes
+ d-cache-size = 0x8000;// L1, 32K
+ i-cache-size = 0x8000;// L1, 32K
+ timebase-frequency = 4950;// 49.5 MHz (csb/4)
+ //bus-frequency = 19800; // 198 MHz csb bus
+ //clock-frequency = 39600;// 396 MHz ppc
core
+ bus-frequency = 15800;
+ clock-frequency = 31600;
+ };
+ };
+
+ memory {
+ device_type = memory;
+ reg = 0x 0x1000; // 256MB at 0
+ };
+
+ m...@2000 {
+ device_type = mbx;
+ compatible = fsl,mpc5121-mbx;
+ reg = 0x2000 0x4000;
+ interrupts = 66 0x8;
+ interrupt-parent = ipic ;
+ };
+
+ s...@3000 {
+ compatible = fsl,mpc5121-sram;
+ reg = 0x3000 0x2; // 128K at 0x3000
+ };
+
+ n...@4000 {
+ //compatible = fsl,mpc5121rev2-nfc;
+ compatible = fsl,mpc5121-nfc;
+ reg = 0x4000 0x10;// 1M at 0x4000
+ interrupts = 6 8;
+ interrupt-parent = ipic ;
+ #address-cells = 1;
+ #size-cells = 1;
+ write-size = 2048;
+ spare-size = 64;
+ chips = 1;
+ n...@0 {
+ label = nand;
+ reg = 0x 0x0800; // 128 MB
+ };
+ };
+
+ local...@8020 {
+ compatible = fsl,mpc5121-localbus;
+ #address-cells = 2;
+ #size-cells = 1;
+ reg = 0x8020 0x40;
+
+ ranges = 0x0 0x0 0xF800 0x0800;
+
+ fl...@0,0 {
+ compatible = cfi-flash;
+ reg = 0 0x0 0x800;
+ #address-cells = 1;
+ #size-cells = 1;
+ bank-width = 2;
+ device-width = 2;
+ partit...@0 {
+ label = user;
+ reg = 0x 0x0700; // 112 MiB for
user data
+ };
+ partit...@0700 {
+ label = rootfs;
+ reg = 0x0700 0x00c0; // 12 MiB for
root file system
+ };
+ partit...@07c0 {
+ label = kernel;
+ reg = 0x07c0 0x0030; // 3 MiB for
kernel
+ };
+ partit...@07f0 {
+ label = u-boot;
+ reg = 0x07f0 0x000c; // 768 KiB for
u-boot w/ env
+ read-only;
+ };
+ partit...@07fc {
+ label = device-tree;
+ reg = 0x07fc 0x0004; // 256 KiB for
device tree
+ };
+ };
+ };
+
+ s...@8000 {
+ compatible = fsl,mpc5121-immr;
+ device_type = soc;
+
[PATCH 03/04] mpc5121: add support for ARIA board
ARIA is a MPC5121E based COM Express module by Dave/DENX.
Signed-off-by: Wolfgang Denk w...@denx.de
Cc: Grant Likely grant.lik...@secretlab.ca
Cc: John Rigby jcri...@gmail.com
---
arch/powerpc/platforms/512x/Kconfig |9 +++
arch/powerpc/platforms/512x/Makefile |1 +
arch/powerpc/platforms/512x/aria.c| 73 +
arch/powerpc/platforms/512x/mpc5121_generic.c |1 +
4 files changed, 84 insertions(+), 0 deletions(-)
create mode 100644 arch/powerpc/platforms/512x/aria.c
diff --git a/arch/powerpc/platforms/512x/Kconfig
b/arch/powerpc/platforms/512x/Kconfig
index 4dac9b0..faef03e 100644
--- a/arch/powerpc/platforms/512x/Kconfig
+++ b/arch/powerpc/platforms/512x/Kconfig
@@ -10,6 +10,15 @@ config PPC_MPC5121
bool
select PPC_MPC512x
+config ARIA
+ bool Dave/DENX ARIA COM Express module
+ depends on 6xx
+ select DEFAULT_UIMAGE
+ select PPC_MPC5121
+ help
+ This option enables support for the ARIA board,
+ a MPC5121E based COM Express module by Dave/DENX.
+
config MPC5121_ADS
bool Freescale MPC5121E ADS
depends on 6xx
diff --git a/arch/powerpc/platforms/512x/Makefile
b/arch/powerpc/platforms/512x/Makefile
--- a/arch/powerpc/platforms/512x/Makefile
+++ b/arch/powerpc/platforms/512x/Makefile
@@ -2,5 +2,6 @@
# Makefile for the Freescale PowerPC 512x linux kernel.
#
obj-y += clock.o mpc512x_shared.o
+obj-$(CONFIG_ARIA) += aria.o
obj-$(CONFIG_MPC5121_ADS) += mpc5121_ads.o mpc5121_ads_cpld.o
obj-$(CONFIG_MPC5121_GENERIC) += mpc5121_generic.o
diff --git a/arch/powerpc/platforms/512x/aria.c
b/arch/powerpc/platforms/512x/aria.c
new file mode 100644
--- /dev/null
+++ b/arch/powerpc/platforms/512x/aria.c
@@ -0,0 +1,70 @@
+/*
+ * Copyright (C) 2009 Wolfgang Denk w...@denx.de
+ *
+ * based on mpc5121_ads.c:
+ *
+ * Copyright (C) 2007, 2008 Freescale Semiconductor, Inc. All rights reserved.
+ * Author: John Rigby, jri...@freescale.com, Thur Mar 29 2007
+ *
+ * Description:
+ * ARIA board setup
+ *
+ * This is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ */
+
+#include linux/kernel.h
+#include linux/io.h
+#include linux/of_platform.h
+
+#include asm/machdep.h
+#include asm/ipic.h
+#include asm/prom.h
+#include asm/time.h
+
+#include sysdev/fsl_pci.h
+
+#include mpc512x.h
+
+static void __init aria_setup_arch(void)
+{
+#ifdef CONFIG_PCI
+ struct device_node *np;
+#endif
+ printk(KERN_INFO ARIA board from Dave/DENX\n);
+
+#ifdef CONFIG_PCI
+ for_each_compatible_node(np, pci, fsl,mpc5121-pci)
+ mpc83xx_add_bridge(np);
+#endif
+
+ mpc512x_init_i2c();
+}
+
+static void __init aria_init_IRQ(void)
+{
+ mpc512x_init_IRQ();
+}
+
+/*
+ * Called very early, MMU is off, device-tree isn't unflattened
+ */
+static int __init aria_probe(void)
+{
+ unsigned long root = of_get_flat_dt_root();
+
+ return of_flat_dt_is_compatible(root, davedenx,aria);
+}
+
+define_machine(aria) {
+ .name = ARIA,
+ .probe = aria_probe,
+ .setup_arch = aria_setup_arch,
+ .init = mpc512x_declare_of_platform_devices,
+ .init_IRQ = aria_init_IRQ,
+ .get_irq= ipic_get_irq,
+ .calibrate_decr = generic_calibrate_decr,
+};
diff --git a/arch/powerpc/platforms/512x/mpc5121_generic.c
b/arch/powerpc/platforms/512x/mpc5121_generic.c
index 2479de9..228d9a2 100644
--- a/arch/powerpc/platforms/512x/mpc5121_generic.c
+++ b/arch/powerpc/platforms/512x/mpc5121_generic.c
@@ -27,6 +27,7 @@
* list of supported boards
*/
static char *board[] __initdata = {
+ davedenx,aria,
prt,prtlvt,
NULL
};
--
1.6.0.6
___
Linuxppc-dev mailing list
Linuxppc-dev@ozlabs.org
https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH 00/04] Add support for ARIA board
The following patch series adds support for the ARIA board. ARIA is a MPC5121e based COM Express board by Dave/DENX. [PATCH 01/04] mpc5121: prepare support for additional boards [PATCH 02/04] ARIA: add device tree source file [PATCH 03/04] mpc5121: add support for ARIA board [PATCH 04/04] ARIA: add default config file [PATCH 05/04] *** NOT FOR RELEASE *** HACK *** Work around MII clock issue *** [This is actually not a patch for inclusion but a call for help.] The patches are based on v2.6.30-rc4 and cover the following items: - platform, DTS - DMA - FEC Ethernet - UART (without h/w flow control) - NAND Signed-off-by: Wolfgang Denk w...@denx.de Cc: Grant Likely grant.lik...@secretlab.ca Cc: John Rigby jcri...@gmail.com --- Summary statistics: arch/powerpc/boot/dts/aria.dts | 407 ++ arch/powerpc/configs/512x/aria_defconfig | 1789 arch/powerpc/configs/512x/mpc5121ads_defconfig | 1190 arch/powerpc/platforms/512x/Kconfig|9 + arch/powerpc/platforms/512x/Makefile |1 + arch/powerpc/platforms/512x/aria.c | 70 + arch/powerpc/platforms/512x/mpc5121_generic.c |1 + drivers/net/fs_enet/mii-fec.c |6 +- [by patch 05] 8 files changed, 3472 insertions(+), 1 deletions(-) ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH 05/04] *** NOT FOR RELEASE *** HACK *** Work around MII clock issue ***
Signed-off-by: Wolfgang Denk w...@denx.de Cc: Grant Likely grant.lik...@secretlab.ca Cc: John Rigby jcri...@gmail.com --- This patch is NOT intended for inclusion into mainline, but rather a request for help. For some reason which I don't understand yet, the Ethernet interface on the ARIA board does not work in the default configuration, because MII probing fails. What I'm seeing is this; the problem is with this part of code in drivers/net/fs_enet/mii-fec.c: 156 fec-mii_speed = ((ppc_proc_freq + 499) / 500) 1; ... 163 out_be32(fec-fecp-fec_mii_speed, fec-mii_speed); I added some debug messages, and this is what I see: On the ADS5121, we have the CPU clocked at 400 MHz. I get: ... ## ppc_proc_freq = 39996, fec-mii_speed = 160 FEC MII Bus: probed ... It works fine. According to the Ref. Man.: A value of 0 in this field turns off the MDC and leaves it in a low-voltage state. Any non-zero value results in the MDC frequency of 1/(mii_speed*2) of the system clock frequency. that means we have a MDC frequency of 400 MHz / (2 * 160) = 1.25 MHz which is obviously within the 2.5 MHz limit. Now ARIA is currently running at 316.8 MHz, and this is what I get: ... ## ppc_proc_freq = 31680, fec-mii_speed = 128 fsl-fec-mdio: probe of 80002800.mdio failed with error -5 ... It fails. MDC frequency is 316.8 MHz / (2 * 128) = 1.24 MHz which should be fine. However, If I change the code to fec-mii_speed = (((ppc_proc_freq / 100) / 30) + 1) 1; then I get: ... ## ppc_proc_freq = 31680, fec-mii_speed = 22 FEC MII Bus: probed ... and it's working!!! However, I compute MDC frequency as 316.8 MHz / (2 * 22) = 7.2 MHz which is far above the maximum allowed clock of 2.5 MHz ??? Has anybody any idea what might be going on here? drivers/net/fs_enet/mii-fec.c |6 +- 1 files changed, 5 insertions(+), 1 deletions(-) diff --git a/drivers/net/fs_enet/mii-fec.c b/drivers/net/fs_enet/mii-fec.c index 9d8bd97..a51dd83 100644 --- a/drivers/net/fs_enet/mii-fec.c +++ b/drivers/net/fs_enet/mii-fec.c @@ -153,8 +153,12 @@ static int __devinit fs_enet_mdio_probe(struct of_device *ofdev, if (!fec-fecp) goto out_fec; +#if 0 fec-mii_speed = ((ppc_proc_freq + 499) / 500) 1; - +#else + fec-mii_speed = (((ppc_proc_freq / 100) / 30) + 1) 1; + printk(## ppc_proc_freq = %d, fec-mii_speed = %d\n, ppc_proc_freq, fec-mii_speed); +#endif setbits32(fec-fecp-fec_r_cntrl, FEC_RCNTRL_MII_MODE); setbits32(fec-fecp-fec_ecntrl, FEC_ECNTRL_PINMUX | FEC_ECNTRL_ETHER_EN); -- 1.6.0.6 ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH 01/04] mpc5121: prepare support for additional boards
As more MPC512x based boards will be coming soon, a new directory arch/powerpc/configs/512x/ for board specific config files is created, following the example of other processor families. In a first step, we just copy (and update) the existing defconfig file for the mpc5121ads board. When new boards get added, the old arch/powerpc/configs/mpc5121_defconfig file will get adjusted to allow for a generic kernel image for MPC512x based boards. Signed-off-by: Wolfgang Denk w...@denx.de Cc: Grant Likely grant.lik...@secretlab.ca Cc: John Rigby jcri...@gmail.com --- arch/powerpc/configs/512x/mpc5121ads_defconfig | 1190 1 files changed, 1190 insertions(+), 0 deletions(-) create mode 100644 arch/powerpc/configs/512x/mpc5121ads_defconfig diff --git a/arch/powerpc/configs/512x/mpc5121ads_defconfig b/arch/powerpc/configs/512x/mpc5121ads_defconfig new file mode 100644 index 000..ac6c18f --- /dev/null +++ b/arch/powerpc/configs/512x/mpc5121ads_defconfig @@ -0,0 +1,1190 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.30-rc4 +# Wed May 6 20:48:17 2009 +# +# CONFIG_PPC64 is not set + +# +# Processor support +# +CONFIG_6xx=y +# CONFIG_PPC_85xx is not set +# CONFIG_PPC_8xx is not set +# CONFIG_40x is not set +# CONFIG_44x is not set +# CONFIG_E200 is not set +CONFIG_PPC_BOOK3S=y +CONFIG_PPC_FPU=y +# CONFIG_ALTIVEC is not set +CONFIG_PPC_STD_MMU=y +CONFIG_PPC_STD_MMU_32=y +# CONFIG_PPC_MM_SLICES is not set +# CONFIG_SMP is not set +CONFIG_NOT_COHERENT_CACHE=y +CONFIG_PPC32=y +CONFIG_WORD_SIZE=32 +# CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set +CONFIG_MMU=y +CONFIG_GENERIC_CMOS_UPDATE=y +CONFIG_GENERIC_TIME=y +CONFIG_GENERIC_TIME_VSYSCALL=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_GENERIC_HARDIRQS=y +# CONFIG_HAVE_SETUP_PER_CPU_AREA is not set +CONFIG_IRQ_PER_CPU=y +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_HAVE_LATENCYTOP_SUPPORT=y +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_RWSEM_XCHGADD_ALGORITHM=y +CONFIG_ARCH_HAS_ILOG2_U32=y +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_GENERIC_FIND_NEXT_BIT=y +# CONFIG_ARCH_NO_VIRT_TO_BUS is not set +CONFIG_PPC=y +CONFIG_EARLY_PRINTK=y +CONFIG_GENERIC_NVRAM=y +CONFIG_SCHED_OMIT_FRAME_POINTER=y +CONFIG_ARCH_MAY_HAVE_PC_FDC=y +CONFIG_PPC_OF=y +CONFIG_OF=y +# CONFIG_PPC_UDBG_16550 is not set +# CONFIG_GENERIC_TBSYNC is not set +CONFIG_AUDIT_ARCH=y +CONFIG_GENERIC_BUG=y +CONFIG_DEFAULT_UIMAGE=y +# CONFIG_PPC_DCR_NATIVE is not set +# CONFIG_PPC_DCR_MMIO is not set +CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y +CONFIG_DEFCONFIG_LIST=/lib/modules/$UNAME_RELEASE/.config + +# +# General setup +# +CONFIG_EXPERIMENTAL=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_INIT_ENV_ARG_LIMIT=32 +CONFIG_LOCALVERSION= +CONFIG_LOCALVERSION_AUTO=y +# CONFIG_SWAP is not set +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +# CONFIG_POSIX_MQUEUE is not set +# CONFIG_BSD_PROCESS_ACCT is not set +# CONFIG_TASKSTATS is not set +# CONFIG_AUDIT is not set + +# +# RCU Subsystem +# +CONFIG_CLASSIC_RCU=y +# CONFIG_TREE_RCU is not set +# CONFIG_PREEMPT_RCU is not set +# CONFIG_TREE_RCU_TRACE is not set +# CONFIG_PREEMPT_RCU_TRACE is not set +# CONFIG_IKCONFIG is not set +CONFIG_LOG_BUF_SHIFT=16 +# CONFIG_GROUP_SCHED is not set +# CONFIG_CGROUPS is not set +CONFIG_SYSFS_DEPRECATED=y +CONFIG_SYSFS_DEPRECATED_V2=y +# CONFIG_RELAY is not set +CONFIG_NAMESPACES=y +# CONFIG_UTS_NS is not set +# CONFIG_IPC_NS is not set +# CONFIG_USER_NS is not set +# CONFIG_PID_NS is not set +# CONFIG_NET_NS is not set +CONFIG_BLK_DEV_INITRD=y +CONFIG_INITRAMFS_SOURCE= +CONFIG_RD_GZIP=y +CONFIG_RD_BZIP2=y +CONFIG_RD_LZMA=y +# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set +CONFIG_SYSCTL=y +CONFIG_ANON_INODES=y +# CONFIG_EMBEDDED is not set +CONFIG_SYSCTL_SYSCALL=y +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_EXTRA_PASS is not set +# CONFIG_STRIP_ASM_SYMS is not set +CONFIG_HOTPLUG=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y +CONFIG_SHMEM=y +CONFIG_AIO=y +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_PCI_QUIRKS=y +# CONFIG_COMPAT_BRK is not set +CONFIG_SLAB=y +# CONFIG_SLUB is not set +# CONFIG_SLOB is not set +# CONFIG_PROFILING is not set +# CONFIG_MARKERS is not set +CONFIG_HAVE_OPROFILE=y +# CONFIG_KPROBES is not set +CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y +CONFIG_HAVE_IOREMAP_PROT=y +CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y +CONFIG_HAVE_ARCH_TRACEHOOK=y +CONFIG_HAVE_CLK=y +# CONFIG_SLOW_WORK is not set +# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set +CONFIG_SLABINFO=y +CONFIG_RT_MUTEXES=y +CONFIG_BASE_SMALL=0 +CONFIG_MODULES=y +# CONFIG_MODULE_FORCE_LOAD is not set +CONFIG_MODULE_UNLOAD=y +# CONFIG_MODULE_FORCE_UNLOAD is not set +# CONFIG_MODVERSIONS is not set +# CONFIG_MODULE_SRCVERSION_ALL is not set +CONFIG_BLOCK=y +# CONFIG_LBD is not set +# CONFIG_BLK_DEV_BSG is not set +# CONFIG_BLK_DEV_INTEGRITY is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +# CONFIG_IOSCHED_AS is not set
[PATCH 04/04] ARIA: add default config file
Default config file for the ARIA board, a MPC5121 based COM Express module by Dave/DENX. Signed-off-by: Wolfgang Denk w...@denx.de Cc: Grant Likely grant.lik...@secretlab.ca Cc: John Rigby jcri...@gmail.com --- arch/powerpc/configs/512x/aria_defconfig | 1789 ++ 1 files changed, 1789 insertions(+), 0 deletions(-) create mode 100644 arch/powerpc/configs/512x/aria_defconfig diff --git a/arch/powerpc/configs/512x/aria_defconfig b/arch/powerpc/configs/512x/aria_defconfig new file mode 100644 index 000..ee01bcd --- /dev/null +++ b/arch/powerpc/configs/512x/aria_defconfig @@ -0,0 +1,1789 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.30-rc3 +# Thu Apr 30 00:27:08 2009 +# +# CONFIG_PPC64 is not set + +# +# Processor support +# +CONFIG_6xx=y +# CONFIG_PPC_85xx is not set +# CONFIG_PPC_8xx is not set +# CONFIG_40x is not set +# CONFIG_44x is not set +# CONFIG_E200 is not set +CONFIG_PPC_BOOK3S=y +CONFIG_PPC_FPU=y +# CONFIG_ALTIVEC is not set +CONFIG_PPC_STD_MMU=y +CONFIG_PPC_STD_MMU_32=y +# CONFIG_PPC_MM_SLICES is not set +# CONFIG_SMP is not set +CONFIG_NOT_COHERENT_CACHE=y +CONFIG_PPC32=y +CONFIG_WORD_SIZE=32 +# CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set +CONFIG_MMU=y +CONFIG_GENERIC_CMOS_UPDATE=y +CONFIG_GENERIC_TIME=y +CONFIG_GENERIC_TIME_VSYSCALL=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_GENERIC_HARDIRQS=y +# CONFIG_HAVE_SETUP_PER_CPU_AREA is not set +CONFIG_IRQ_PER_CPU=y +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_HAVE_LATENCYTOP_SUPPORT=y +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_RWSEM_XCHGADD_ALGORITHM=y +CONFIG_ARCH_HAS_ILOG2_U32=y +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_GENERIC_FIND_NEXT_BIT=y +# CONFIG_ARCH_NO_VIRT_TO_BUS is not set +CONFIG_PPC=y +CONFIG_EARLY_PRINTK=y +CONFIG_GENERIC_NVRAM=y +CONFIG_SCHED_OMIT_FRAME_POINTER=y +CONFIG_ARCH_MAY_HAVE_PC_FDC=y +CONFIG_PPC_OF=y +CONFIG_OF=y +# CONFIG_PPC_UDBG_16550 is not set +# CONFIG_GENERIC_TBSYNC is not set +CONFIG_AUDIT_ARCH=y +CONFIG_GENERIC_BUG=y +CONFIG_DEFAULT_UIMAGE=y +# CONFIG_PPC_DCR_NATIVE is not set +# CONFIG_PPC_DCR_MMIO is not set +CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y +CONFIG_DEFCONFIG_LIST=/lib/modules/$UNAME_RELEASE/.config + +# +# General setup +# +CONFIG_EXPERIMENTAL=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_INIT_ENV_ARG_LIMIT=32 +CONFIG_LOCALVERSION= +CONFIG_LOCALVERSION_AUTO=y +# CONFIG_SWAP is not set +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +# CONFIG_POSIX_MQUEUE is not set +# CONFIG_BSD_PROCESS_ACCT is not set +# CONFIG_TASKSTATS is not set +# CONFIG_AUDIT is not set + +# +# RCU Subsystem +# +CONFIG_CLASSIC_RCU=y +# CONFIG_TREE_RCU is not set +# CONFIG_PREEMPT_RCU is not set +# CONFIG_TREE_RCU_TRACE is not set +# CONFIG_PREEMPT_RCU_TRACE is not set +# CONFIG_IKCONFIG is not set +CONFIG_LOG_BUF_SHIFT=16 +# CONFIG_GROUP_SCHED is not set +# CONFIG_CGROUPS is not set +CONFIG_SYSFS_DEPRECATED=y +CONFIG_SYSFS_DEPRECATED_V2=y +# CONFIG_RELAY is not set +# CONFIG_NAMESPACES is not set +CONFIG_BLK_DEV_INITRD=y +CONFIG_INITRAMFS_SOURCE= +CONFIG_RD_GZIP=y +# CONFIG_RD_BZIP2 is not set +# CONFIG_RD_LZMA is not set +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_SYSCTL=y +CONFIG_ANON_INODES=y +CONFIG_EMBEDDED=y +CONFIG_SYSCTL_SYSCALL=y +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_ALL is not set +# CONFIG_KALLSYMS_EXTRA_PASS is not set +# CONFIG_STRIP_ASM_SYMS is not set +CONFIG_HOTPLUG=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y +CONFIG_SHMEM=y +CONFIG_AIO=y +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_PCI_QUIRKS=y +# CONFIG_SLUB_DEBUG is not set +CONFIG_COMPAT_BRK=y +# CONFIG_SLAB is not set +CONFIG_SLUB=y +# CONFIG_SLOB is not set +# CONFIG_PROFILING is not set +# CONFIG_MARKERS is not set +CONFIG_HAVE_OPROFILE=y +# CONFIG_KPROBES is not set +CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y +CONFIG_HAVE_IOREMAP_PROT=y +CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y +CONFIG_HAVE_ARCH_TRACEHOOK=y +CONFIG_HAVE_CLK=y +# CONFIG_SLOW_WORK is not set +# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set +CONFIG_RT_MUTEXES=y +CONFIG_BASE_SMALL=0 +CONFIG_MODULES=y +# CONFIG_MODULE_FORCE_LOAD is not set +CONFIG_MODULE_UNLOAD=y +# CONFIG_MODULE_FORCE_UNLOAD is not set +# CONFIG_MODVERSIONS is not set +# CONFIG_MODULE_SRCVERSION_ALL is not set +CONFIG_BLOCK=y +# CONFIG_LBD is not set +# CONFIG_BLK_DEV_BSG is not set +# CONFIG_BLK_DEV_INTEGRITY is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_AS=y +CONFIG_IOSCHED_DEADLINE=y +CONFIG_IOSCHED_CFQ=y +CONFIG_DEFAULT_AS=y +# CONFIG_DEFAULT_DEADLINE is not set +# CONFIG_DEFAULT_CFQ is not set +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED=anticipatory +# CONFIG_FREEZER is not set + +# +# Platform support +# +# CONFIG_PPC_CHRP is not set +CONFIG_PPC_MPC512x=y +CONFIG_PPC_MPC5121=y +CONFIG_ARIA=y +# CONFIG_MPC5121_ADS is not set +# CONFIG_MPC5121_GENERIC is not set +# CONFIG_PPC_MPC52xx is not set +# CONFIG_PPC_PMAC is not
[PATCH 09/12] mpc5121ads: Added I2C RTC node to mpc5121ads DTS.
From: Piotr Ziecik ko...@semihalf.com
Signed-off-by: Piotr Ziecik ko...@semihalf.com
Signed-off-by: Wolfgang Denk w...@denx.de
Cc: Grant Likely grant.lik...@secretlab.ca
Cc: John Rigby jcri...@gmail.com
---
arch/powerpc/boot/dts/mpc5121ads.dts |5 +
1 files changed, 5 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/boot/dts/mpc5121ads.dts
b/arch/powerpc/boot/dts/mpc5121ads.dts
index 93fe12a..c2d9de9 100644
--- a/arch/powerpc/boot/dts/mpc5121ads.dts
+++ b/arch/powerpc/boot/dts/mpc5121ads.dts
@@ -210,6 +210,11 @@
interrupts = 9 0x8;
interrupt-parent = ipic ;
fsl5200-clocking;
+
+ r...@68 {
+ compatible = stm,m41t80;
+ reg = 0x68;
+ };
};
i...@1720 {
--
1.6.0.6
___
Linuxppc-dev mailing list
Linuxppc-dev@ozlabs.org
https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH] powerpc: Fix oprofile sampling of marked events on POWER7
From Maynard Johnson mayna...@us.ibm.com
Description
---
Change ppc64 oprofile kernel driver to use the SLOT bits (MMCRA[37:39]only on
older processors where those bits are defined.
Background
--
The performance monitor unit of the 64-bit POWER processor family has the
ability to collect accurate instruction-level samples when profiling on marked
events (i.e., PM_MRK_event-name). In processors prior to POWER6, the MMCRA
register contained slot information that the oprofile kernel driver used to
adjust the value latched in the SIAR at the time of a PMU interrupt. But as of
POWER6, these slot bits in MMCRA are no longer necessary for oprofile to use,
since the SIAR itself holds the accurate sampled instruction address. With
POWER6, these MMCRA slot bits were zero'ed out by hardware so oprofile's use of
these slot bits was, in effect, a NOP. But with POWER7, these bits are no
longer zero'ed out; however, they serve some other purpose rather than slot
information. Thus, using these bits on POWER7 to adjust the SIAR value results
in samples being attributed to the wrong instructions. The attached patch
changes the oprofile kernel driver to ignore these slot bits on all newer
processors starting with POWER6.
Signed-off-by: Michael Wolf m...@linux.vnet.ibm.com
---
diff -paur linux/arch/powerpc/oprofile/op_model_power4.c
linux-p7-oprofile-patch//arch/powerpc/oprofile/op_model_power4.c
--- linux/arch/powerpc/oprofile/op_model_power4.c 2009-05-01
08:20:21.0 -0500
+++ linux-p7-oprofile-patch//arch/powerpc/oprofile/op_model_power4.c
2009-05-01 08:20:05.0 -0500
@@ -26,6 +26,7 @@
static unsigned long reset_value[OP_MAX_COUNTER];
static int oprofile_running;
+static int use_slot_nums;
/* mmcr values are set in power4_reg_setup, used in power4_cpu_setup */
static u32 mmcr0_val;
@@ -61,6 +62,12 @@ static int power4_reg_setup(struct op_co
else
mmcr0_val |= MMCR0_PROBLEM_DISABLE;
+ if (__is_processor(PV_POWER4) || __is_processor(PV_POWER4p) ||
+ __is_processor(PV_970) || __is_processor(PV_970FX) ||
+ __is_processor(PV_970MP) || __is_processor(PV_970GX) ||
+ __is_processor(PV_POWER5) || __is_processor(PV_POWER5p))
+ use_slot_nums = 1;
+
return 0;
}
@@ -206,7 +213,7 @@ static unsigned long get_pc(struct pt_re
mmcra = mfspr(SPRN_MMCRA);
- if (mmcra MMCRA_SAMPLE_ENABLE) {
+ if (use_slot_nums (mmcra MMCRA_SAMPLE_ENABLE)) {
slot = ((mmcra MMCRA_SLOT) MMCRA_SLOT_SHIFT);
if (slot 1)
pc += 4 * (slot - 1);
___
Linuxppc-dev mailing list
Linuxppc-dev@ozlabs.org
https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 04/12] mpc5121: Added reset module registers representation.
Wolfgang Denk wrote:
From: Piotr Ziecik ko...@semihalf.com
Signed-off-by: Piotr Ziecik ko...@semihalf.com
Signed-off-by: Wolfgang Denk w...@denx.de
Cc: Grant Likely grant.lik...@secretlab.ca
Cc: John Rigby jcri...@gmail.com
---
arch/powerpc/include/asm/mpc512x.h | 13 +
1 files changed, 13 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/include/asm/mpc512x.h
b/arch/powerpc/include/asm/mpc512x.h
index c48a165..ea50d8d 100644
--- a/arch/powerpc/include/asm/mpc512x.h
+++ b/arch/powerpc/include/asm/mpc512x.h
@@ -16,6 +16,19 @@
#ifndef __ASM_POWERPC_MPC512x_H__
#define __ASM_POWERPC_MPC512x_H__
+/* MPC512x Reset module registers */
+struct mpc512x_reset_module {
+ u32 rcwlr; /* Reset Configuration Word Low Register */
+ u32 rcwhr; /* Reset Configuration Word High Register */
+ u32 reserved1;
+ u32 reserved2;
+ u32 rsr;/* Reset Status Register */
+ u32 rmr;/* Reset Mode Register */
+ u32 rpr;/* Reset Protection Register */
+ u32 rcr;/* Reset Control Register */
+ u32 rcer; /* Reset Control Enable Register */
+} __attribute__ ((__packed__));
+
83xx has the same registers; we should define it in a non-512x-specific
header.
-Scott
___
Linuxppc-dev mailing list
Linuxppc-dev@ozlabs.org
https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 01/04] mpc5121: prepare support for additional boards
On Wed, May 6, 2009 at 2:20 PM, Wolfgang Denk w...@denx.de wrote: As more MPC512x based boards will be coming soon, a new directory arch/powerpc/configs/512x/ for board specific config files is created, following the example of other processor families. In a first step, we just copy (and update) the existing defconfig file for the mpc5121ads board. When new boards get added, the old arch/powerpc/configs/mpc5121_defconfig file will get adjusted to allow for a generic kernel image for MPC512x based boards. Signed-off-by: Wolfgang Denk w...@denx.de Cc: Grant Likely grant.lik...@secretlab.ca Cc: John Rigby jcri...@gmail.com I'll ignore this one for the time being. After stuff is actually merged and at about -rc2 time is the time to muck around with defconfigs. g. --- arch/powerpc/configs/512x/mpc5121ads_defconfig | 1190 1 files changed, 1190 insertions(+), 0 deletions(-) create mode 100644 arch/powerpc/configs/512x/mpc5121ads_defconfig diff --git a/arch/powerpc/configs/512x/mpc5121ads_defconfig b/arch/powerpc/configs/512x/mpc5121ads_defconfig new file mode 100644 index 000..ac6c18f --- /dev/null +++ b/arch/powerpc/configs/512x/mpc5121ads_defconfig @@ -0,0 +1,1190 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.30-rc4 +# Wed May 6 20:48:17 2009 +# +# CONFIG_PPC64 is not set + +# +# Processor support +# +CONFIG_6xx=y +# CONFIG_PPC_85xx is not set +# CONFIG_PPC_8xx is not set +# CONFIG_40x is not set +# CONFIG_44x is not set +# CONFIG_E200 is not set +CONFIG_PPC_BOOK3S=y +CONFIG_PPC_FPU=y +# CONFIG_ALTIVEC is not set +CONFIG_PPC_STD_MMU=y +CONFIG_PPC_STD_MMU_32=y +# CONFIG_PPC_MM_SLICES is not set +# CONFIG_SMP is not set +CONFIG_NOT_COHERENT_CACHE=y +CONFIG_PPC32=y +CONFIG_WORD_SIZE=32 +# CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set +CONFIG_MMU=y +CONFIG_GENERIC_CMOS_UPDATE=y +CONFIG_GENERIC_TIME=y +CONFIG_GENERIC_TIME_VSYSCALL=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_GENERIC_HARDIRQS=y +# CONFIG_HAVE_SETUP_PER_CPU_AREA is not set +CONFIG_IRQ_PER_CPU=y +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_HAVE_LATENCYTOP_SUPPORT=y +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_RWSEM_XCHGADD_ALGORITHM=y +CONFIG_ARCH_HAS_ILOG2_U32=y +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_GENERIC_FIND_NEXT_BIT=y +# CONFIG_ARCH_NO_VIRT_TO_BUS is not set +CONFIG_PPC=y +CONFIG_EARLY_PRINTK=y +CONFIG_GENERIC_NVRAM=y +CONFIG_SCHED_OMIT_FRAME_POINTER=y +CONFIG_ARCH_MAY_HAVE_PC_FDC=y +CONFIG_PPC_OF=y +CONFIG_OF=y +# CONFIG_PPC_UDBG_16550 is not set +# CONFIG_GENERIC_TBSYNC is not set +CONFIG_AUDIT_ARCH=y +CONFIG_GENERIC_BUG=y +CONFIG_DEFAULT_UIMAGE=y +# CONFIG_PPC_DCR_NATIVE is not set +# CONFIG_PPC_DCR_MMIO is not set +CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y +CONFIG_DEFCONFIG_LIST=/lib/modules/$UNAME_RELEASE/.config + +# +# General setup +# +CONFIG_EXPERIMENTAL=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_INIT_ENV_ARG_LIMIT=32 +CONFIG_LOCALVERSION= +CONFIG_LOCALVERSION_AUTO=y +# CONFIG_SWAP is not set +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +# CONFIG_POSIX_MQUEUE is not set +# CONFIG_BSD_PROCESS_ACCT is not set +# CONFIG_TASKSTATS is not set +# CONFIG_AUDIT is not set + +# +# RCU Subsystem +# +CONFIG_CLASSIC_RCU=y +# CONFIG_TREE_RCU is not set +# CONFIG_PREEMPT_RCU is not set +# CONFIG_TREE_RCU_TRACE is not set +# CONFIG_PREEMPT_RCU_TRACE is not set +# CONFIG_IKCONFIG is not set +CONFIG_LOG_BUF_SHIFT=16 +# CONFIG_GROUP_SCHED is not set +# CONFIG_CGROUPS is not set +CONFIG_SYSFS_DEPRECATED=y +CONFIG_SYSFS_DEPRECATED_V2=y +# CONFIG_RELAY is not set +CONFIG_NAMESPACES=y +# CONFIG_UTS_NS is not set +# CONFIG_IPC_NS is not set +# CONFIG_USER_NS is not set +# CONFIG_PID_NS is not set +# CONFIG_NET_NS is not set +CONFIG_BLK_DEV_INITRD=y +CONFIG_INITRAMFS_SOURCE= +CONFIG_RD_GZIP=y +CONFIG_RD_BZIP2=y +CONFIG_RD_LZMA=y +# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set +CONFIG_SYSCTL=y +CONFIG_ANON_INODES=y +# CONFIG_EMBEDDED is not set +CONFIG_SYSCTL_SYSCALL=y +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_EXTRA_PASS is not set +# CONFIG_STRIP_ASM_SYMS is not set +CONFIG_HOTPLUG=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y +CONFIG_SHMEM=y +CONFIG_AIO=y +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_PCI_QUIRKS=y +# CONFIG_COMPAT_BRK is not set +CONFIG_SLAB=y +# CONFIG_SLUB is not set +# CONFIG_SLOB is not set +# CONFIG_PROFILING is not set +# CONFIG_MARKERS is not set +CONFIG_HAVE_OPROFILE=y +# CONFIG_KPROBES is not set +CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y +CONFIG_HAVE_IOREMAP_PROT=y +CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y +CONFIG_HAVE_ARCH_TRACEHOOK=y +CONFIG_HAVE_CLK=y +# CONFIG_SLOW_WORK is not set +# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set +CONFIG_SLABINFO=y +CONFIG_RT_MUTEXES=y +CONFIG_BASE_SMALL=0
Re: [PATCH 02/12] fs_enet: Add MPC5121 FEC support.
On Wed, May 6, 2009 at 2:15 PM, Wolfgang Denk w...@denx.de wrote:
From: John Rigby jri...@freescale.com
Add support for MPC512x to fs_enet driver
drivers/net/fs_enet/*
Enable fs_enet driver to work 5121 FEC
Enable it with CONFIG_FS_ENET_MPC5121_FEC
Signed-off-by: John Rigby jri...@freescale.com
Signed-off-by: Piotr Ziecik ko...@semihalf.com
Signed-off-by: Wolfgang Denk w...@denx.de
Cc: net...@vger.kernel.org
Cc: Grant Likely grant.lik...@secretlab.ca
Cc: John Rigby jcri...@gmail.com
---
arch/powerpc/include/asm/mpc5121_fec.h | 111
drivers/net/fs_enet/Kconfig | 10 ++-
drivers/net/fs_enet/fs_enet-main.c | 7 ++
drivers/net/fs_enet/fs_enet.h | 6 ++
drivers/net/fs_enet/mac-fec.c | 30 -
drivers/net/fs_enet/mii-fec.c | 7 ++
6 files changed, 166 insertions(+), 5 deletions(-)
create mode 100644 arch/powerpc/include/asm/mpc5121_fec.h
diff --git a/arch/powerpc/include/asm/mpc5121_fec.h
b/arch/powerpc/include/asm/mpc5121_fec.h
new file mode 100644
index 000..6bddf0b
--- /dev/null
+++ b/arch/powerpc/include/asm/mpc5121_fec.h
@@ -0,0 +1,111 @@
+/*
+ * Copyright (C) 2007,2008 Freescale Semiconductor, Inc. All rights reserved.
+ *
+ * Author: John Rigby, jri...@freescale.com
+ *
+ * Modified version of drivers/net/fec.h:
+ *
+ * fec.h -- Fast Ethernet Controller for Motorola ColdFire SoC
+ * processors.
+ *
+ * (C) Copyright 2000-2005, Greg Ungerer (g...@snapgear.com)
+ * (C) Copyright 2000-2001, Lineo (www.lineo.com)
+ *
+ * This is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+#ifndef MPC5121_FEC_H
+#define MPC5121_FEC_H
+
+typedef struct fec {
+ u32 fec_reserved0;
+ u32 fec_ievent; /* Interrupt event reg */
+ u32 fec_imask; /* Interrupt mask reg */
+ u32 fec_reserved1;
+ u32 fec_r_des_active; /* Receive descriptor reg */
+ u32 fec_x_des_active; /* Transmit descriptor reg */
+ u32 fec_reserved2[3];
+ u32 fec_ecntrl; /* Ethernet control reg */
+ u32 fec_reserved3[6];
+ u32 fec_mii_data; /* MII manage frame reg */
+ u32 fec_mii_speed; /* MII speed control reg */
+ u32 fec_reserved4[7];
+ u32 fec_mib_ctrlstat; /* MIB control/status reg */
+ u32 fec_reserved5[7];
+ u32 fec_r_cntrl; /* Receive control reg */
+ u32 fec_reserved6[15];
+ u32 fec_x_cntrl; /* Transmit Control reg */
+ u32 fec_reserved7[7];
+ u32 fec_addr_low; /* Low 32bits MAC address */
+ u32 fec_addr_high; /* High 16bits MAC address */
+ u32 fec_opd; /* Opcode + Pause duration */
+ u32 fec_reserved8[10];
+ u32 fec_hash_table_high; /* High 32bits hash table */
+ u32 fec_hash_table_low; /* Low 32bits hash table */
+ u32 fec_grp_hash_table_high; /* High 32bits hash table */
+ u32 fec_grp_hash_table_low; /* Low 32bits hash table */
+ u32 fec_reserved9[7];
+ u32 fec_x_wmrk; /* FIFO transmit water mark */
+ u32 fec_reserved10;
+ u32 fec_r_bound; /* FIFO receive bound reg */
+ u32 fec_r_fstart; /* FIFO receive start reg */
+ u32 fec_reserved11[11];
+ u32 fec_r_des_start; /* Receive descriptor ring */
+ u32 fec_x_des_start; /* Transmit descriptor ring */
+ u32 fec_r_buff_size; /* Maximum receive buff size */
+ u32 fec_reserved12[26];
+ u32 fec_dma_control; /* DMA Endian and other ctrl */
+} fec_t;
+
+/*
+ * Define the buffer descriptor structure.
+ */
+typedef struct bufdesc {
+ ushort cbd_sc; /* Control and status info */
+ ushort cbd_datlen; /* Data length */
+ uint cbd_bufaddr; /* Buffer address */
+} cbd_t;
+
+/*
+ * The following definitions courtesy of commproc.h, which where
+ * Copyright (c) 1997 Dan Malek (dma...@jlc.net).
+ */
+#define BD_SC_WRAP ((ushort)0x2000)
+
+/*
+ * Buffer descriptor control/status used by Ethernet receive.
+ */
+#define BD_ENET_RX_EMPTY ((ushort)0x8000)
+#define BD_ENET_RX_WRAP ((ushort)0x2000)
+#define BD_ENET_RX_INTR ((ushort)0x1000)
+#define BD_ENET_RX_LAST ((ushort)0x0800)
+#define BD_ENET_RX_FIRST ((ushort)0x0400)
+#define BD_ENET_RX_MISS ((ushort)0x0100)
+#define BD_ENET_RX_LG ((ushort)0x0020)
Re: [PATCH 01/12] fs_enet: Use defines to set driver tunables.
On Wed, May 6, 2009 at 2:15 PM, Wolfgang Denk w...@denx.de wrote: From: Piotr Ziecik ko...@semihalf.com Signed-off-by: Piotr Ziecik ko...@semihalf.com Signed-off-by: Wolfgang Denk w...@denx.de Cc: net...@vger.kernel.org Cc: Grant Likely grant.lik...@secretlab.ca Cc: John Rigby jcri...@gmail.com Not seeing much benefit to this patch, and the (non-existant) patch description doesn't really help me here either. g. -- Grant Likely, B.Sc., P.Eng. Secret Lab Technologies Ltd. ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 03/12] fs_enet: Add FEC TX Alignment workaround for MPC5121.
On Wed, May 6, 2009 at 2:15 PM, Wolfgang Denk w...@denx.de wrote:
From: John Rigby jri...@freescale.com
The FEC on 5121 has problems with misaligned tx buffers.
The RM says any alignment is ok but empirical results
show that packet buffers ending in 0x1E will sometimes
hang the FEC. Other bad alignment does not hang but will
cause silent TX failures resulting in about a 1% packet
loss as tested by ping -f from a remote host.
This patch is a work around that copies every tx packet
to an aligned skb before sending.
OUCH!
diff --git a/drivers/net/fs_enet/fs_enet-main.c
b/drivers/net/fs_enet/fs_enet-main.c
index 4170d33..c83ffc3 100644
--- a/drivers/net/fs_enet/fs_enet-main.c
+++ b/drivers/net/fs_enet/fs_enet-main.c
@@ -594,6 +594,37 @@ void fs_cleanup_bds(struct net_device *dev)
/**/
+#ifdef CONFIG_FS_ENET_FEC_TX_ALIGN_WORKAROUND
+static struct sk_buff *tx_skb_align_workaround(struct net_device *dev,
+ struct sk_buff *skb)
+{
+ struct sk_buff *new_skb;
+
+ /* Alloc new skb */
+ new_skb = dev_alloc_skb(ENET_RX_FRSIZE + 32);
+ if (!new_skb) {
+ printk(KERN_WARNING DRV_MODULE_NAME
+ : %s Memory squeeze, dropping tx packet.\n,
+ dev-name);
+ return NULL;
+ }
+
+ /* Make sure new skb is properly aligned */
+ skb_align(new_skb, 32);
+
+ /* Copy data to new skb ... */
+ skb_copy_from_linear_data(skb, new_skb-data, skb-len);
+ skb_put(new_skb, skb-len);
+
+ /* ... and free an old one */
+ dev_kfree_skb_any(skb);
+
+ return new_skb;
+}
+#else
+#define tx_skb_align_workaround(dev, skb) (skb)
+#endif
Another use of #ifdef blocks. What is the multiplatform impact?
g.
--
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
___
Linuxppc-dev mailing list
Linuxppc-dev@ozlabs.org
https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 04/12] mpc5121: Added reset module registers representation.
On Wed, May 6, 2009 at 2:15 PM, Wolfgang Denk w...@denx.de wrote:
From: Piotr Ziecik ko...@semihalf.com
Signed-off-by: Piotr Ziecik ko...@semihalf.com
Signed-off-by: Wolfgang Denk w...@denx.de
Cc: Grant Likely grant.lik...@secretlab.ca
Cc: John Rigby jcri...@gmail.com
No patch description. I would also like to see this patch merged with
the actual user of it since it is so small.
---
arch/powerpc/include/asm/mpc512x.h | 13 +
1 files changed, 13 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/include/asm/mpc512x.h
b/arch/powerpc/include/asm/mpc512x.h
index c48a165..ea50d8d 100644
--- a/arch/powerpc/include/asm/mpc512x.h
+++ b/arch/powerpc/include/asm/mpc512x.h
@@ -16,6 +16,19 @@
#ifndef __ASM_POWERPC_MPC512x_H__
#define __ASM_POWERPC_MPC512x_H__
+/* MPC512x Reset module registers */
+struct mpc512x_reset_module {
+ u32 rcwlr; /* Reset Configuration Word Low Register */
+ u32 rcwhr; /* Reset Configuration Word High Register */
+ u32 reserved1;
+ u32 reserved2;
+ u32 rsr; /* Reset Status Register */
+ u32 rmr; /* Reset Mode Register */
+ u32 rpr; /* Reset Protection Register */
+ u32 rcr; /* Reset Control Register */
+ u32 rcer; /* Reset Control Enable Register */
+} __attribute__ ((__packed__));
__attribute__((__packed__)); is unnecessary.
g.
--
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
___
Linuxppc-dev mailing list
Linuxppc-dev@ozlabs.org
https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 01/04] mpc5121: prepare support for additional boards
Dear Grant, In message fa686aa40905061329m352cfbah1afa2d07fe593...@mail.gmail.com you wrote: I'll ignore this one for the time being. After stuff is actually merged and at about -rc2 time is the time to muck around with defconfigs. Did you receive the first patch series as well: [PATCH 00/16] Add support for MPC512x etc. ? It seems it takes ages before linuxppc-dev delivers the messages? Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de It is easier to change the specification to fit the program than vice versa. ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 02/12] fs_enet: Add MPC5121 FEC support.
Would you be offended if I tell you that this is a horrible patch submission? Your introductory email indicates 16 patches, yet the series indicates there were 12, and that intro email is only posted to the linuxppc-dev list for people to read. Nobody on netdev nor other interested parties that get CC:'d along the line are able to read what this patch series is about. Since only some patches are CC:'d to netdev I have no idea if I should apply these or they are dependent on some other patches in the series that you didn't send here to netdev. What a mess... how can any maintainer figure out what patch is what, and what tree you expect these patches to even get applied to? I'm definitely sending all of the copies I have received to /dev/null, you need to submit this work properly. ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 05/12] mpc5121ads: Added Reset Module node to DTS.
On Wed, May 6, 2009 at 2:15 PM, Wolfgang Denk w...@denx.de wrote:
From: Piotr Ziecik ko...@semihalf.com
Signed-off-by: Piotr Ziecik ko...@semihalf.com
Signed-off-by: Wolfgang Denk w...@denx.de
Cc: Grant Likely grant.lik...@secretlab.ca
Cc: John Rigby jcri...@gmail.com
Missing patch description. Otherwise looks okay.
g.
---
arch/powerpc/boot/dts/mpc5121ads.dts | 5 +
1 files changed, 5 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/boot/dts/mpc5121ads.dts
b/arch/powerpc/boot/dts/mpc5121ads.dts
index c2b8dbf..1b83a9d 100644
--- a/arch/powerpc/boot/dts/mpc5121ads.dts
+++ b/arch/powerpc/boot/dts/mpc5121ads.dts
@@ -166,6 +166,11 @@
interrupt-parent = ipic ;
};
+ re...@e00 { // Reset module
+ compatible = fsl,mpc5121-reset;
+ reg = 0xe00 0x100;
+ };
+
cl...@f00 { // Clock control
compatible = fsl,mpc5121-clock;
reg = 0xf00 0x100;
--
1.6.0.6
--
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
___
Linuxppc-dev mailing list
Linuxppc-dev@ozlabs.org
https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 02/12] fs_enet: Add MPC5121 FEC support.
Wolfgang Denk wrote:
+/*
+ * Define the buffer descriptor structure.
+ */
+typedef struct bufdesc {
+ ushort cbd_sc; /* Control and status info */
+ ushort cbd_datlen; /* Data length */
+ uintcbd_bufaddr;/* Buffer address */
+} cbd_t;
+
+/*
+ * The following definitions courtesy of commproc.h, which where
+ * Copyright (c) 1997 Dan Malek (dma...@jlc.net).
+ */
+#define BD_SC_WRAP ((ushort)0x2000)
+
+/*
+ * Buffer descriptor control/status used by Ethernet receive.
+ */
+#define BD_ENET_RX_EMPTY ((ushort)0x8000)
+#define BD_ENET_RX_WRAP((ushort)0x2000)
+#define BD_ENET_RX_INTR((ushort)0x1000)
+#define BD_ENET_RX_LAST((ushort)0x0800)
+#define BD_ENET_RX_FIRST ((ushort)0x0400)
+#define BD_ENET_RX_MISS((ushort)0x0100)
+#define BD_ENET_RX_LG ((ushort)0x0020)
+#define BD_ENET_RX_NO ((ushort)0x0010)
+#define BD_ENET_RX_SH ((ushort)0x0008)
+#define BD_ENET_RX_CR ((ushort)0x0004)
+#define BD_ENET_RX_OV ((ushort)0x0002)
+#define BD_ENET_RX_CL ((ushort)0x0001)
+#define BD_ENET_RX_STATS ((ushort)0x013f)/* All status bits */
+
+/*
+ * Buffer descriptor control/status used by Ethernet transmit.
+ */
+#define BD_ENET_TX_READY ((ushort)0x8000)
+#define BD_ENET_TX_PAD ((ushort)0x4000)
+#define BD_ENET_TX_WRAP((ushort)0x2000)
+#define BD_ENET_TX_INTR((ushort)0x1000)
+#define BD_ENET_TX_LAST((ushort)0x0800)
+#define BD_ENET_TX_TC ((ushort)0x0400)
+#define BD_ENET_TX_DEF ((ushort)0x0200)
+#define BD_ENET_TX_HB ((ushort)0x0100)
+#define BD_ENET_TX_LC ((ushort)0x0080)
+#define BD_ENET_TX_RL ((ushort)0x0040)
+#define BD_ENET_TX_UN ((ushort)0x0002)
+#define BD_ENET_TX_CSL ((ushort)0x0001)
+#define BD_ENET_TX_STATS ((ushort)0x03ff)/* All status bits */
All of the above is duplicative (with even the same names) of stuff in
asm/cpm.h. Beyond just the duplication, what happens if both CPM2 and
512x are enabled in the same kernel?
-Scott
___
Linuxppc-dev mailing list
Linuxppc-dev@ozlabs.org
https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 06/12] mpc5121: Added NAND Flash Controller driver.
On Wed, May 6, 2009 at 2:15 PM, Wolfgang Denk w...@denx.de wrote:
From: Piotr Ziecik ko...@semihalf.com
This patch adds NAND Flash Controller driver for MPC5121
revision 2. All device features, except hardware ECC and
power management, are supported.
Signed-off-by: Piotr Ziecik ko...@semihalf.com
Signed-off-by: Wolfgang Denk w...@denx.de
Cc: linux-...@lists.infradead.org
Cc: Grant Likely grant.lik...@secretlab.ca
Cc: John Rigby jcri...@gmail.com
---
arch/powerpc/include/asm/mpc5121_nfc.h | 100 +++
arch/powerpc/platforms/512x/mpc512x_shared.c | 1 +
drivers/mtd/nand/Kconfig | 7 +
drivers/mtd/nand/Makefile | 1 +
drivers/mtd/nand/mpc5121_nfc.c | 855
++
5 files changed, 964 insertions(+), 0 deletions(-)
create mode 100644 arch/powerpc/include/asm/mpc5121_nfc.h
create mode 100644 drivers/mtd/nand/mpc5121_nfc.c
diff --git a/arch/powerpc/include/asm/mpc5121_nfc.h
b/arch/powerpc/include/asm/mpc5121_nfc.h
new file mode 100644
index 000..b96a5b9
--- /dev/null
+++ b/arch/powerpc/include/asm/mpc5121_nfc.h
[... bunch of #defines trimmed]
There is only one user of this. It should be moved into the driver .c
file. Otherwise okay.
diff --git a/arch/powerpc/platforms/512x/mpc512x_shared.c
b/arch/powerpc/platforms/512x/mpc512x_shared.c
index d8cd579..7135d89 100644
--- a/arch/powerpc/platforms/512x/mpc512x_shared.c
+++ b/arch/powerpc/platforms/512x/mpc512x_shared.c
@@ -71,6 +71,7 @@ void __init mpc512x_init_IRQ(void)
static struct of_device_id __initdata of_bus_ids[] = {
{ .compatible = fsl,mpc5121-immr, },
{ .compatible = fsl,mpc5121-localbus, },
+ { .compatible = fsl,mpc5121-nfc, },
This doesn't look right. Shouldn't the NAND controller be hanging of
the IMMR node?
{},
};
diff --git a/drivers/mtd/nand/mpc5121_nfc.c b/drivers/mtd/nand/mpc5121_nfc.c
new file mode 100644
index 000..a8da4db
--- /dev/null
+++ b/drivers/mtd/nand/mpc5121_nfc.c
@@ -0,0 +1,855 @@
+/*
+ * Copyright 2004-2008 Freescale Semiconductor, Inc.
+ * Copyright 2009 Semihalf.
+ *
+ * Based on original driver from Freescale Semiconductor
+ * written by John Rigby jri...@freescale.com on basis
+ * of drivers/mtd/nand/mxc_nand.c. Reworked and extended
+ * Piotr Ziecik ko...@semihalf.com.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301, USA.
+ */
+
+#include linux/module.h
+#include linux/clk.h
+#include linux/delay.h
+#include linux/init.h
+#include linux/interrupt.h
+#include linux/io.h
+#include linux/mtd/mtd.h
+#include linux/mtd/nand.h
+#include linux/mtd/partitions.h
+#include linux/of_device.h
+#include linux/of_platform.h
+
+#include asm/mpc512x.h
+#include asm/mpc5121_nfc.h
+
+#define DRV_NAME mpc5121_nfc
+#define DRV_VERSION 0.5
Is this really necessary (especially the DRV_VERSION thing)?
+/* Wait for operation complete */
+static void mpc5121_nfc_done(struct mtd_info *mtd)
+{
+ struct nand_chip *chip = mtd-priv;
+ struct mpc5121_nfc_prv *prv = chip-priv;
+ int rv;
+
+ if ((nfc_read(mtd, NFC_CONFIG2) NFC_INT) == 0) {
+ nfc_clear(mtd, NFC_CONFIG1, NFC_INT_MASK);
+ rv = wait_event_timeout(prv-irq_waitq,
+ (nfc_read(mtd, NFC_CONFIG2) NFC_INT), NFC_TIMEOUT);
+
+ if (!rv)
+ printk(KERN_WARNING DRV_NAME
Throughout this driver printk() calls should really be dev_*() calls.
+/*
+ * Read NFC configuration from Reset Config Word
+ *
+ * NFC is configured during reset in basis of information stored
+ * in Reset Config Word. There is no other way to set NAND block
+ * size, spare size and bus width.
+ */
+static int mpc5121_nfc_read_hw_config(struct mtd_info *mtd)
+{
+ struct nand_chip *chip = mtd-priv;
+ struct mpc512x_reset_module *rm;
+ struct device_node *rmnode;
+ uint rcw_pagesize = 0;
+ uint rcw_sparesize = 0;
+ uint rcw_width;
+ uint rcwh;
+ uint romloc, ps;
+
+ rmnode = of_find_compatible_node(NULL, NULL, fsl,mpc5121-reset);
+ if (!rmnode) {
+ printk(KERN_ERR DRV_NAME : Missing
Re: [PATCH 07/12] mpc5121ads: Clean up and fix NAND description in mpc5121ads DTS.
On Wed, May 6, 2009 at 2:15 PM, Wolfgang Denk w...@denx.de wrote:
From: Piotr Ziecik ko...@semihalf.com
- Removed unused properties.
- Corrected NAND flash chip size.
Signed-off-by: Piotr Ziecik ko...@semihalf.com
Signed-off-by: Wolfgang Denk w...@denx.de
Cc: Grant Likely grant.lik...@secretlab.ca
Cc: John Rigby jcri...@gmail.com
Looks okay to me.
g.
---
arch/powerpc/boot/dts/mpc5121ads.dts | 13 -
1 files changed, 4 insertions(+), 9 deletions(-)
diff --git a/arch/powerpc/boot/dts/mpc5121ads.dts
b/arch/powerpc/boot/dts/mpc5121ads.dts
index 1b83a9d..93fe12a 100644
--- a/arch/powerpc/boot/dts/mpc5121ads.dts
+++ b/arch/powerpc/boot/dts/mpc5121ads.dts
@@ -62,17 +62,12 @@
interrupt-parent = ipic ;
#address-cells = 1;
#size-cells = 1;
- bank-width = 1;
// ADS has two Hynix 512MB Nand flash chips in a single
- // stacked package .
+ // stacked package.
chips = 2;
- na...@0 {
- label = nand0;
- reg = 0x 0x0200; // first 32 MB of
chip 0
- };
- na...@2000 {
- label = nand1;
- reg = 0x2000 0x0200; // first 32 MB of
chip 1
+ n...@0 {
+ label = nand;
+ reg = 0x 0x4000; // 512MB + 512MB
};
};
--
1.6.0.6
--
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
___
Linuxppc-dev mailing list
Linuxppc-dev@ozlabs.org
https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 08/12] mpc5121: Added I2C support.
On Wed, May 6, 2009 at 2:15 PM, Wolfgang Denk w...@denx.de wrote:
From: Piotr Ziecik ko...@semihalf.com
- Enabled I2C interrupts on MPC5121.
- Updated Kconfig for i2c-mpc driver.
I think this workaround belongs in the driver itself.
g.
Signed-off-by: Piotr Ziecik ko...@semihalf.com
Signed-off-by: Wolfgang Denk w...@denx.de
Cc: linux-...@vger.kernel.org
Cc: Grant Likely grant.lik...@secretlab.ca
Cc: John Rigby jcri...@gmail.com
---
arch/powerpc/platforms/512x/mpc5121_ads.c | 2 ++
arch/powerpc/platforms/512x/mpc512x.h | 1 +
arch/powerpc/platforms/512x/mpc512x_shared.c | 24
drivers/i2c/busses/Kconfig | 9 +
4 files changed, 32 insertions(+), 4 deletions(-)
diff --git a/arch/powerpc/platforms/512x/mpc5121_ads.c
b/arch/powerpc/platforms/512x/mpc5121_ads.c
index 441abc4..a8976b4 100644
--- a/arch/powerpc/platforms/512x/mpc5121_ads.c
+++ b/arch/powerpc/platforms/512x/mpc5121_ads.c
@@ -42,6 +42,8 @@ static void __init mpc5121_ads_setup_arch(void)
for_each_compatible_node(np, pci, fsl,mpc5121-pci)
mpc83xx_add_bridge(np);
#endif
+
+ mpc512x_init_i2c();
}
static void __init mpc5121_ads_init_IRQ(void)
diff --git a/arch/powerpc/platforms/512x/mpc512x.h
b/arch/powerpc/platforms/512x/mpc512x.h
index 9c03693..f4db8a7 100644
--- a/arch/powerpc/platforms/512x/mpc512x.h
+++ b/arch/powerpc/platforms/512x/mpc512x.h
@@ -13,5 +13,6 @@
#define __MPC512X_H__
extern unsigned long mpc512x_find_ips_freq(struct device_node *node);
extern void __init mpc512x_init_IRQ(void);
+extern void __init mpc512x_init_i2c(void);
void __init mpc512x_declare_of_platform_devices(void);
#endif /* __MPC512X_H__ */
diff --git a/arch/powerpc/platforms/512x/mpc512x_shared.c
b/arch/powerpc/platforms/512x/mpc512x_shared.c
index 7135d89..b776e45 100644
--- a/arch/powerpc/platforms/512x/mpc512x_shared.c
+++ b/arch/powerpc/platforms/512x/mpc512x_shared.c
@@ -65,6 +65,30 @@ void __init mpc512x_init_IRQ(void)
ipic_set_default_priority();
}
+void __init mpc512x_init_i2c(void)
+{
+ struct device_node *np;
+ void __iomem *i2cctl;
+
+ /* Enable I2C interrupts */
+ np = of_find_compatible_node(NULL, NULL, fsl,mpc5121-i2c-ctrl);
+ if (np) {
+ i2cctl = of_iomap(np, 0);
+ if (i2cctl) {
+ /*
+ * Set interrupt enable bits:
+ * - I2C-0: bit 24,
+ * - I2C-1: bit 26,
+ * - I2C-2: bit 28.
+ */
+ out_be32(i2cctl, 0x1500);
+ iounmap(i2cctl);
+ }
+
+ of_node_put(np);
+ }
+}
+
/*
* Nodes to do bus probe on, soc and localbus
*/
diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
index a48c8ae..57ed637 100644
--- a/drivers/i2c/busses/Kconfig
+++ b/drivers/i2c/busses/Kconfig
@@ -391,13 +391,14 @@ config I2C_IXP2000
instead.
config I2C_MPC
- tristate MPC107/824x/85xx/52xx/86xx
+ tristate MPC107/824x/85xx/512x/52xx/86xx
depends on PPC32
help
If you say yes to this option, support will be included for the
- built-in I2C interface on the MPC107/Tsi107/MPC8240/MPC8245 and
- MPC85xx/MPC8641 family processors. The driver may also work on 52xx
- family processors, though interrupts are known not to work.
+ built-in I2C interface on the MPC107/Tsi107/MPC8240/MPC8245,
+ MPC85xx/MPC8641 and MPC512x family processors. The driver may
+ also work on 52xx family processors, though interrupts are known
+ not to work.
This driver can also be built as a module. If so, the module
will be called i2c-mpc.
--
1.6.0.6
--
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
___
Linuxppc-dev mailing list
Linuxppc-dev@ozlabs.org
https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 09/12] mpc5121ads: Added I2C RTC node to mpc5121ads DTS.
On Wed, May 6, 2009 at 2:15 PM, Wolfgang Denk w...@denx.de wrote:
From: Piotr Ziecik ko...@semihalf.com
Signed-off-by: Piotr Ziecik ko...@semihalf.com
Signed-off-by: Wolfgang Denk w...@denx.de
Cc: Grant Likely grant.lik...@secretlab.ca
Acked-by: Grant Likely grant.lik...@secretlab.ca
Cc: John Rigby jcri...@gmail.com
---
arch/powerpc/boot/dts/mpc5121ads.dts | 5 +
1 files changed, 5 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/boot/dts/mpc5121ads.dts
b/arch/powerpc/boot/dts/mpc5121ads.dts
index 93fe12a..c2d9de9 100644
--- a/arch/powerpc/boot/dts/mpc5121ads.dts
+++ b/arch/powerpc/boot/dts/mpc5121ads.dts
@@ -210,6 +210,11 @@
interrupts = 9 0x8;
interrupt-parent = ipic ;
fsl5200-clocking;
+
+ r...@68 {
+ compatible = stm,m41t80;
+ reg = 0x68;
+ };
};
...@1720 {
--
1.6.0.6
--
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
___
Linuxppc-dev mailing list
Linuxppc-dev@ozlabs.org
https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 10/12] mpc5121: Add MPC5121 Real time clock driver.
On Wed, May 6, 2009 at 2:15 PM, Wolfgang Denk w...@denx.de wrote:
From: John Rigby jri...@freescale.com
Based on Domen Puncer's rtc driver for 5200 posted to
the ppclinux mailing list:
http://patchwork.ozlabs.org/linuxppc-embedded/patch?id=11675
but never commited anywhere.
Changes to Domen's original:
Changed filenames/routine names from mpc5200* to mpc5121*
Changed match to only care about compatible and use fsl,
convention for compatible.
Make alarms more sane by dealing with lack of second alarm resolution.
Deal with the fact that most of the 5121 rtc registers are not persistent
across a reset even with a battery attached:
Use actual_time register for time keeping
and target_time register as an offset to linux time
The target_time register would normally be used for hibernation
but hibernation does not work on current silicon
Signed-off-by: John Rigby jri...@freescale.com
Signed-off-by: Piotr Ziecik ko...@semihalf.com
Signed-off-by: Wolfgang Denk w...@denx.de
Cc: rtc-li...@googlegroups.com
Cc: Grant Likely grant.lik...@secretlab.ca
Cc: John Rigby jcri...@gmail.com
On a *very* cursory review, I don't see anything here I object to.
And it does not look dangerous.
Acked-by: Grant Likely grant.lik...@secretlab.ca
---
drivers/rtc/Kconfig | 10 +
drivers/rtc/Makefile | 1 +
drivers/rtc/rtc-mpc5121.c | 408
+
3 files changed, 419 insertions(+), 0 deletions(-)
create mode 100644 drivers/rtc/rtc-mpc5121.c
diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig
index 4e9851f..900d5b8 100644
--- a/drivers/rtc/Kconfig
+++ b/drivers/rtc/Kconfig
@@ -750,4 +750,14 @@ config RTC_DRV_PS3
This driver can also be built as a module. If so, the module
will be called rtc-ps3.
+config RTC_DRV_MPC5121
+ tristate Freescale MPC5121 built-in RTC
+ depends on RTC_CLASS
+ help
+ If you say yes here you will get support for the
+ built-in RTC MPC5121.
+
+ This driver can also be built as a module. If so, the module
+ will be called rtc-mpc5121.
+
endif # RTC_CLASS
diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile
index 6c0639a..8c6d6a7 100644
--- a/drivers/rtc/Makefile
+++ b/drivers/rtc/Makefile
@@ -51,6 +51,7 @@ obj-$(CONFIG_RTC_DRV_STARFIRE) += rtc-starfire.o
obj-$(CONFIG_RTC_DRV_MAX6900) += rtc-max6900.o
obj-$(CONFIG_RTC_DRV_MAX6902) += rtc-max6902.o
obj-$(CONFIG_RTC_DRV_MV) += rtc-mv.o
+obj-$(CONFIG_RTC_DRV_MPC5121) += rtc-mpc5121.o
obj-$(CONFIG_RTC_DRV_OMAP) += rtc-omap.o
obj-$(CONFIG_RTC_DRV_PCF8563) += rtc-pcf8563.o
obj-$(CONFIG_RTC_DRV_PCF8583) += rtc-pcf8583.o
diff --git a/drivers/rtc/rtc-mpc5121.c b/drivers/rtc/rtc-mpc5121.c
new file mode 100644
index 000..63460cb
--- /dev/null
+++ b/drivers/rtc/rtc-mpc5121.c
@@ -0,0 +1,408 @@
+/*
+ * Real-time clock driver for MPC5121
+ *
+ * Copyright 2007, Domen Puncer domen.pun...@telargo.com
+ * Copyright 2008, Freescale Semiconductor, Inc. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/*
+ * History:
+ *
+ * Based on mpc5200_rtc.c written by Domen Puncer domen.pun...@telargo.com
+ * posted to linuxppc-embedded mailing list:
+ * http://patchwork.ozlabs.org/linuxppc-embedded/patch?id=11675
+ * but never committed to any public tree.
+ *
+ * Author: John Rigby jri...@freescale.com
+ * Converted to 5121 rtc driver.
+ *
+ * Make alarms more sane by dealing with lack of second alarm resolution.
+ *
+ * Use actual_time time register for time keeping since it is persistent
+ * and the normal rtc registers are not. Use target_time register as an
+ * offset to linux time.
+ *
+ */
+
+#include linux/module.h
+#include linux/rtc.h
+#include linux/of_device.h
+#include linux/of_platform.h
+#include linux/io.h
+
+struct mpc5121_rtc_regs {
+ u8 set_time; /* RTC + 0x00 */
+ u8 hour_set; /* RTC + 0x01 */
+ u8 minute_set; /* RTC + 0x02 */
+ u8 second_set; /* RTC + 0x03 */
+
+ u8 set_date; /* RTC + 0x04 */
+ u8 month_set; /* RTC + 0x05 */
+ u8 weekday_set; /* RTC + 0x06 */
+ u8 date_set; /* RTC + 0x07 */
+
+ u8 write_sw; /* RTC + 0x08 */
+ u8 sw_set; /* RTC + 0x09 */
+ u16 year_set; /* RTC + 0x0a */
+
+ u8 alm_enable; /* RTC + 0x0c */
+ u8 alm_hour_set; /* RTC + 0x0d */
+ u8 alm_min_set; /* RTC + 0x0e */
+ u8 int_enable; /* RTC + 0x0f */
+
+ u8 reserved1;
+ u8 hour; /* RTC + 0x11 */
+ u8
Re: [PATCH 10/12] mpc5121: Add MPC5121 Real time clock driver.
On Wed, May 06, 2009 at 10:15:17PM +0200, Wolfgang Denk wrote: From: John Rigby jri...@freescale.com Based on Domen Puncer's rtc driver for 5200 posted to the ppclinux mailing list: http://patchwork.ozlabs.org/linuxppc-embedded/patch?id=11675 but never commited anywhere. Changes to Domen's original: Changed filenames/routine names from mpc5200* to mpc5121* Why not changing it to mpc5xxx? From a glimpse, it should still work on MPC5200, too. Regards, Wolfram -- Pengutronix e.K. | Wolfram Sang| Industrial Linux Solutions | http://www.pengutronix.de/ | signature.asc Description: Digital signature ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 11/12] mpc5121: Added MPC512x DMA driver.
On Wed, May 6, 2009 at 2:15 PM, Wolfgang Denk w...@denx.de wrote:
From: Piotr Ziecik ko...@semihalf.com
This patch adds initial version of MPC512x DMA driver.
Only memory to memory transfers are currenly supported.
Signed-off-by: Piotr Ziecik ko...@semihalf.com
Signed-off-by: Wolfgang Denk w...@denx.de
Cc: Grant Likely grant.lik...@secretlab.ca
Cc: John Rigby jcri...@gmail.com
Don't have time to review this in detail right now, but three quick comments:
drivers/dma/mpc512x_dma.c | 642
++
drivers/dma/mpc512x_dma.h | 192
It looks to me like these two files should be merged.
diff --git a/arch/powerpc/boot/dts/mpc5121ads.dts
b/arch/powerpc/boot/dts/mpc5121ads.dts
index c2d9de9..e7f0e09 100644
--- a/arch/powerpc/boot/dts/mpc5121ads.dts
+++ b/arch/powerpc/boot/dts/mpc5121ads.dts
@@ -373,7 +373,7 @@
};
...@14000 {
- compatible = fsl,mpc5121-dma2;
+ compatible = fsl,mpc512x-dma;
Nack. Compatible values should not use wildcards. Be specific. And
be specific about what it is compatible to if another part implements
the same device.
reg = 0x14000 0x1800;
interrupts = 65 0x8;
interrupt-parent = ipic ;
diff --git a/arch/powerpc/platforms/512x/mpc512x_shared.c
b/arch/powerpc/platforms/512x/mpc512x_shared.c
index b776e45..135fd6b 100644
--- a/arch/powerpc/platforms/512x/mpc512x_shared.c
+++ b/arch/powerpc/platforms/512x/mpc512x_shared.c
@@ -95,6 +95,7 @@ void __init mpc512x_init_i2c(void)
static struct of_device_id __initdata of_bus_ids[] = {
{ .compatible = fsl,mpc5121-immr, },
{ .compatible = fsl,mpc5121-localbus, },
+ { .compatible = fsl,mpc5121-dma, },
This doesn't look right either. Shouldn't the dma device hang off the
IMMR node?
g.
--
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
___
Linuxppc-dev mailing list
Linuxppc-dev@ozlabs.org
https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 02/12] fs_enet: Add MPC5121 FEC support.
Grant Likely wrote:
#ifdef CONFIG_FS_ENET_HAS_FEC
+#ifdef CONFIG_FS_ENET_MPC5121_FEC
+ {
+ .compatible = fsl,mpc5121-fec,
+ .data = (void *)fs_fec_ops,
+ },
+#else
{
.compatible = fsl,pq1-fec-enet,
.data = (void *)fs_fec_ops,
},
#endif
+#endif
Hmmm. A lot of these #ifdefs in here. Does this have a multiplatform
impact? Not to mention the fact that it's just plain ugly. :-)
Multiplatform between 512x and 8xx is currently impossible for other
reasons (512x and CPM2 is another matter). That said, less ifdefs would
be nice.
-Scott
___
Linuxppc-dev mailing list
Linuxppc-dev@ozlabs.org
https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 12/12] mpc5121: Added default config for MPC5121.
On Wed, May 6, 2009 at 2:15 PM, Wolfgang Denk w...@denx.de wrote: From: Piotr Ziecik ko...@semihalf.com Signed-off-by: Piotr Ziecik ko...@semihalf.com Signed-off-by: Wolfgang Denk w...@denx.de Cc: Grant Likely grant.lik...@secretlab.ca Cc: John Rigby jcri...@gmail.com Wait till about -rc2 time to do defconfig patches. g. ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 01/04] mpc5121: prepare support for additional boards
On Wed, May 6, 2009 at 2:40 PM, Wolfgang Denk w...@denx.de wrote: Dear Grant, In message fa686aa40905061329m352cfbah1afa2d07fe593...@mail.gmail.com you wrote: I'll ignore this one for the time being. After stuff is actually merged and at about -rc2 time is the time to muck around with defconfigs. Did you receive the first patch series as well: [PATCH 00/16] Add support for MPC512x etc. ? It seems it takes ages before linuxppc-dev delivers the messages? Yup. Just started replying at the wrong point. :-) g. -- Grant Likely, B.Sc., P.Eng. Secret Lab Technologies Ltd. ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: MSR_SPE - being turned off...
Since you are mentioning alignment it looks my patch for SPE alignment went in after 2.6.23: commit 26caeb2ee1924d564e8d8190aa783a569532f81a Author: Kumar Gala ga...@kernel.crashing.org Date: Fri Aug 24 16:42:53 2007 -0500 [POWERPC] Handle alignment faults on SPE load/store instructions This adds code to handle alignment traps generated by the following SPE (signal processing engine) load/store instructions, by emulating the instruction in the kernel (as is done for other instructions that generate alignment traps): You may want to try and see if you can apply that patch to your kernel tree and see what happens. - k On May 6, 2009, at 3:15 PM, Morrison, Tom wrote: Sorry, let me try again... -Original Message- After sitting with the developer of the application for a while, a) Alignment (aka: alignment exceptions) - Looking at how it handles the instruction - it interprets these SPE as common instructions then resets the 'upper' 32bits. I was just made aware that on 9/14/2007 - Kumar submitted a patch that handles these instructions correctly (we don't have that version - I am in the process of trying to port it to my current version of the kernel (to see if part of problem). In general, this is a VERY disturbing thing. We 'turn on SPE' in the compiler (-mspe=yes)(a). We are NOT explicitly using SPE instructions in our application(b), BUT(c), the 4.2.171 compiler (having origins from Code Sourcery (via Freescale)) upon optimizations put SPE instructions in without any regard for alignment (which instead of making the code faster - might actually make the code slower)? It's a little disturbing to me. Stay tuned for more details about my port - and seeing if some of my problems go away.. b) We still contend if you have multiple tasks using a (VERY) high Density of SPE instructions - and the system is taxed heavily (with lots of context switches) - there is the possibility that a task will get unlucky and the registers setup will NOT there after the context switches back (if some other task does something else with the entire 64bits). Tom -Original Message- From: Kumar Gala [mailto:ga...@kernel.crashing.org] Sent: Wednesday, May 06, 2009 8:44 AM To: Morrison, Tom Cc: Michael Neuling; linuxppc-dev@ozlabs.org Subject: Re: MSR_SPE - being turned off... Can you describe the # of processes you are running in your test. Is it possible for you to try the tests w/2.6.29 from kernel.org? - k On May 6, 2009, at 7:42 AM, Morrison, Tom wrote: I'm sorry I forgot to put that, this issue was found with our currently running kernel 2.6.23.final (what comes with the Freescale LTIB BSP package dated 05/23/2009). I am sorry if I don't understand your statement that the SMP might be broken on this kernel, because I tried to analyze the kernel that came with the latest BSP LTIB [ackage from Freescale (dated 12/18/2009 (where we got the 4.2.171 compiler from)), and the associated 'switch context' code is exactly the same. Unfortunately, I have not started the process of porting my current platform's BSP to this new kernel - otherwise, I would have done the test on that platform (this also requires a new version of u-boot in order to test correctly)).. I may have mis-interpreted something and/or I am sure I don't understand everything about the SMP resource management (and associated SPE management), so thank you for any insight you may have on this front... Tom -Original Message- snip other emails ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 2/2] x86-64: seccomp: fix 32/64 syscall hole
* Markus Gutschke (顧孟勤) mar...@google.com wrote: On Wed, May 6, 2009 at 14:29, Ingo Molnar mi...@elte.hu wrote: That's a pretty interesting usage. What would be fallback mode you are using if the kernel doesnt have seccomp built in? Completely non-sandboxed? Or a ptrace/PTRACE_SYSCALL based sandbox? Ptrace has performance and/or reliability problems when used to sandbox threaded applications due to potential race conditions when inspecting system call arguments. We hope that we can avoid this problem with seccomp. It is very attractive that kernel automatically terminates any application that violates the very well-defined constraints of the sandbox. In general, we are currently exploring different options based on general availability, functionality, and complexity of implementation. Seccomp is a good middle ground that we expect to be able to use in the medium term to provide an acceptable solution for a large segment of Linux users. Although the restriction to just four unfiltered system calls is painful. Which other system calls would you like to use? Futexes might be one, for fast synchronization primitives? Ingo ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 04/12] mpc5121: Added reset module registers representation.
Dear Scott, in message 4a01f33b.2090...@freescale.com you wrote: --- a/arch/powerpc/include/asm/mpc512x.h +++ b/arch/powerpc/include/asm/mpc512x.h ... 83xx has the same registers; we should define it in a non-512x-specific header. Agreed. Any suggestion where? Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de I know engineers. They love to change things. - Dr. McCoy ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 01/12] fs_enet: Use defines to set driver tunables.
Dear Grant, In message fa686aa40905061335q3a3c4cc7r33d77df655100...@mail.gmail.com you wrote: On Wed, May 6, 2009 at 2:15 PM, Wolfgang Denk w...@denx.de wrote: From: Piotr Ziecik ko...@semihalf.com Signed-off-by: Piotr Ziecik ko...@semihalf.com Signed-off-by: Wolfgang Denk w...@denx.de Cc: net...@vger.kernel.org Cc: Grant Likely grant.lik...@secretlab.ca Cc: John Rigby jcri...@gmail.com Not seeing much benefit to this patch, and the (non-existant) patch description doesn't really help me here either. Please see next patch which then uses the ability to change the defaults. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Program maintenance is an entropy-increasing process, and even its most skilfull execution only delays the subsidence of the system into unfixable obsolescence. - Fred Brooks, The Mythical Man Month ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 02/12] fs_enet: Add MPC5121 FEC support.
Dear David, In message 20090506.134003.261424694.da...@davemloft.net you wrote: Would you be offended if I tell you that this is a horrible patch submission? Your introductory email indicates 16 patches, yet the series indicates there were 12, and that intro email is only posted to the linuxppc-dev list for people to read. Nobody on netdev nor other interested parties that get CC:'d along the line are able to read what this patch series is about. Of course I am not offended, as you are absolutely right with your comment. I'm angry with myself, as I actually intended to do exactly what you find missing, but then forgot to write the file in the editor :-( I'm definitely sending all of the copies I have received to /dev/null, you need to submit this work properly. OK. What exactly should I do? Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de If I have seen further it is by standing on the shoulders of giants. - Isaac Newton, Letter to Robert Hooke, 5 February 1676 ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 02/12] fs_enet: Add MPC5121 FEC support.
Dear Scott, in message 4a01f602.2010...@freescale.com you wrote: All of the above is duplicative (with even the same names) of stuff in asm/cpm.h. Beyond just the duplication, what happens if both CPM2 and OK, I can try to reuse the definitions from that file. 512x are enabled in the same kernel? Hm... both architectures look sufficiently different to me that I don't see sense in trying such a thing. Do you think that needs to be supported? Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de You ain't experienced... Well, nor are you. That's true. But the point is ... the point is ... the point is we've been not experienced for a lot longer than you. We've got a lot of experience of not having any experience. - Terry Pratchett, _Witches Abroad_ ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 02/12] fs_enet: Add MPC5121 FEC support.
Dear Grant,
in message fa686aa40905061333q29c263c8p24856c048e30f...@mail.gmail.com you
wrote:
...
#ifdef CONFIG_FS_ENET_HAS_FEC
+#ifdef CONFIG_FS_ENET_MPC5121_FEC
+{
+.compatible = fsl,mpc5121-fec,
+.data = (void *)fs_fec_ops,
+},
+#else
{
.compatible = fsl,pq1-fec-enet,
.data = (void *)fs_fec_ops,
},
#endif
+#endif
Hmmm. A lot of these #ifdefs in here. Does this have a multiplatform
impact? Not to mention the fact that it's just plain ugly. :-)
Agreed that it's ugly, but duplicatio9ng the code would have been even
worse. I don't think that it has multiplatform - at least not as long
as you don't ask for one image that runs on 83xx and on 512x.
Best regards,
Wolfgang Denk
--
DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
Our business is run on trust. We trust you will pay in advance.
___
Linuxppc-dev mailing list
Linuxppc-dev@ozlabs.org
https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 03/12] fs_enet: Add FEC TX Alignment workaround for MPC5121.
Dear Grant Likely, In message fa686aa40905061337w6aa82f5aj787618ba108e5...@mail.gmail.com you wrote: The FEC on 5121 has problems with misaligned tx buffers. The RM says any alignment is ok but empirical results show that packet buffers ending in 0x1E will sometimes hang the FEC. Other bad alignment does not hang but will cause silent TX failures resulting in about a 1% packet loss as tested by ping -f from a remote host. This patch is a work around that copies every tx packet to an aligned skb before sending. OUCH! Yes :-( +#else +#define tx_skb_align_workaround(dev, skb) (skb) +#endif Another use of #ifdef blocks. What is the multiplatform impact? Hm... Can you recommend a better way to solve the problem? Suggestions are welcome. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de You don't have to worry about me. I might have been born yesterday... but I stayed up all night. ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 2/2] x86-64: seccomp: fix 32/64 syscall hole
On Sat, Feb 28, 2009 at 10:23, Linus Torvalds torva...@linux-foundation.org wrote: And I guess the seccomp interaction means that this is potentially a 2.6.29 thing. Not that I know whether anybody actually _uses_ seccomp. It does seem to be enabled in at least Fedora kernels, but it might not be used anywhere. In the Linux version of Google Chrome, we are currently working on code that will use seccomp for parts of our sandboxing solution. Markus ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 2/2] x86-64: seccomp: fix 32/64 syscall hole
On Sat, Feb 28, 2009 at 10:23, Linus Torvalds torva...@linux-foundation.org wrote: And I guess the seccomp interaction means that this is potentially a 2.6.29 thing. Not that I know whether anybody actually _uses_ seccomp. It does seem to be enabled in at least Fedora kernels, but it might not be used anywhere. In the Linux version of Google Chrome, we are currently working on code that will use seccomp for parts of our sandboxing solution. Markus ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 2/2] x86-64: seccomp: fix 32/64 syscall hole
On Wed, May 6, 2009 at 14:29, Ingo Molnar mi...@elte.hu wrote: That's a pretty interesting usage. What would be fallback mode you are using if the kernel doesnt have seccomp built in? Completely non-sandboxed? Or a ptrace/PTRACE_SYSCALL based sandbox? Ptrace has performance and/or reliability problems when used to sandbox threaded applications due to potential race conditions when inspecting system call arguments. We hope that we can avoid this problem with seccomp. It is very attractive that kernel automatically terminates any application that violates the very well-defined constraints of the sandbox. In general, we are currently exploring different options based on general availability, functionality, and complexity of implementation. Seccomp is a good middle ground that we expect to be able to use in the medium term to provide an acceptable solution for a large segment of Linux users. Although the restriction to just four unfiltered system calls is painful. We are still discussing what fallback options we have, and they are likely on different schedules. For instance, on platforms that have AppArmor or SELinux, we might be able to use them as part of our sandboxing solution. Although we are still investigating whether they meet all of our needs. Markus ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Unable to boot 2.6.29 (and tot kernel) with 256k page size on katmai.
Hi I am unable to boot the 2.6.29-rc8 denx kernel (and 2.6.30-rc4 tot kernel) when I enable the 256k page size. My config file is attached. The *same* config works fine with 64k page size. I have 2GB memory on this board. Following are the steps that I took to enable 256k page size support. make menuconfig Platform Support --Disable Using standard binutils settings General setup --Configure standard kernel features(for small systems) -- Disable Use full shmem filesystem Kernel Options --- Page Size --- 256K It gets stuck at the point shown below. - = tftp 100 uImage-2.6.29-denx Waiting for PHY auto negotiation to complete.. done ENET Speed is 100 Mbps - FULL duplex connection (EMAC0) Using ppc_4xx_eth0 device TFTP from server 10.192.165.106; our IP address is 10.192.164.166 Filename 'uImage-2.6.29-denx'. Load address: 0x100 Loading: # # done Bytes transferred = 2138837 (20a2d5 hex) = tftp 400 katmai.dts.256k Using ppc_4xx_eth0 device TFTP from server 10.192.165.106; our IP address is 10.192.164.166 Filename 'katmai.dts.256k'. Load address: 0x300 Loading: ## done Bytes transferred = 16384 (4000 hex) = bootm 100 - 400 ## Booting image at 0100 ... Image Name: Linux-2.6.29-rc8-01447-g3bf8ce5- Created: 2009-05-05 0:31:36 UTC Image Type: PowerPC Linux Kernel Image (gzip compressed) Data Size:2138773 Bytes = 2 MB Load Address: Entry Point: Verifying Checksum ... OK Uncompressing Kernel Image ... OK Booting using the fdt at 0x400 Loading Device Tree to 007fb000, end 007fefff ... OK - Am I missing any uboot env variable or kernel command line parameter? This same config file seems to be working for our customer. Please let me know if any more information is required. Thanks in advance Shubhada config-256k-page-katmai.2.6.29 Description: config-256k-page-katmai.2.6.29 ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 2/2] x86-64: seccomp: fix 32/64 syscall hole
On Wed, May 6, 2009 at 14:54, Ingo Molnar mi...@elte.hu wrote: Which other system calls would you like to use? Futexes might be one, for fast synchronization primitives? There are a large number of system calls that normal C/C++ code uses quite frequently, and that are not security sensitive. A typical example would be gettimeofday(). But there are other system calls, where the sandbox would not really need to inspect arguments as the call does not expose any exploitable interface. It is currently awkward that in order to use seccomp we have to intercept all system calls and provide alternative implementations for them; whereas we really only care about a comparatively small number of security critical operations that we need to restrict. Also, any redirected system call ends up incurring at least two context switches, which is needlessly expensive for the large number of trivial system calls. We are quite happy that read() and write(), which are quite important to us, do not incur this penalty. Markus ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 2/2] x86-64: seccomp: fix 32/64 syscall hole
* Markus Gutschke (顧孟勤) mar...@google.com wrote: On Wed, May 6, 2009 at 14:54, Ingo Molnar mi...@elte.hu wrote: Which other system calls would you like to use? Futexes might be one, for fast synchronization primitives? There are a large number of system calls that normal C/C++ code uses quite frequently, and that are not security sensitive. A typical example would be gettimeofday(). But there are other system calls, where the sandbox would not really need to inspect arguments as the call does not expose any exploitable interface. It is currently awkward that in order to use seccomp we have to intercept all system calls and provide alternative implementations for them; whereas we really only care about a comparatively small number of security critical operations that we need to restrict. Also, any redirected system call ends up incurring at least two context switches, which is needlessly expensive for the large number of trivial system calls. We are quite happy that read() and write(), which are quite important to us, do not incur this penalty. doing a (per arch) bitmap of harmless syscalls and replacing the mode1_syscalls[] check with that in kernel/seccomp.c would be a pretty reasonable extension. (.config controllable perhaps, for old-style-seccomp) It would probably be faster than the current loop over mode1_syscalls[] as well. Ingo ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 04/12] mpc5121: Added reset module registers representation.
Dear Grant Likely, In message fa686aa40905061339u171559b8va45c210b3e63c...@mail.gmail.com you wrote: No patch description. I would also like to see this patch merged with the actual user of it since it is so small. Will do. As for description - the Subject says it all. +} __attribute__ ((__packed__)); __attribute__((__packed__)); is unnecessary. OK. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Applying computer technology is simply finding the right wrench to pound in the correct screw. ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 05/12] mpc5121ads: Added Reset Module node to DTS.
Dear Grant Likely, In message fa686aa40905061340s212385b1r8be4e2f7505bd...@mail.gmail.com you wrote: On Wed, May 6, 2009 at 2:15 PM, Wolfgang Denk w...@denx.de wrote: From: Piotr Ziecik ko...@semihalf.com Signed-off-by: Piotr Ziecik ko...@semihalf.com Signed-off-by: Wolfgang Denk w...@denx.de Cc: Grant Likely grant.lik...@secretlab.ca Cc: John Rigby jcri...@gmail.com Missing patch description. Otherwise looks okay. This is a repeating complaint. Do I really need an extra description for a trivial patch that does exactly what the Subject: says? What is recommended practice in such a case? Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de The software required `Windows 95 or better', so I installed Linux. ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 08/12] mpc5121: Added I2C support.
Dear Grant Likely, In message fa686aa40905061401k319313c5q89fd3e245c308...@mail.gmail.com you wrote: On Wed, May 6, 2009 at 2:15 PM, Wolfgang Denk w...@denx.de wrote: From: Piotr Ziecik ko...@semihalf.com - Enabled I2C interrupts on MPC5121. - Updated Kconfig for i2c-mpc driver. I think this workaround belongs in the driver itself. Sorry, I don't get it. Which workaround? What exactly should I change? Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Time is an illusion perpetrated by the manufacturers of space. ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 2/2] x86-64: seccomp: fix 32/64 syscall hole
On Wed, May 6, 2009 at 15:13, Ingo Molnar mi...@elte.hu wrote: doing a (per arch) bitmap of harmless syscalls and replacing the mode1_syscalls[] check with that in kernel/seccomp.c would be a pretty reasonable extension. (.config controllable perhaps, for old-style-seccomp) It would probably be faster than the current loop over mode1_syscalls[] as well. This would be a great option to improve performance of our sandbox. I can detect the availability of the new kernel API dynamically, and then not intercept the bulk of the system calls. This would allow the sandbox to work both with existing and with newer kernels. We'll post a kernel patch for discussion in the next few days, Markus ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 12/12] mpc5121: Added default config for MPC5121.
Dear Grant Likely, In message fa686aa40905061408s3360b774y756262e3e15d1...@mail.gmail.com you wrote: Wait till about -rc2 time to do defconfig patches. Would it offend you if I continue to include these (and you have to ignore them)? Posting a complete patch set that includs a defconfig allows users much easier testing... Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de WARNING: This Product Attracts Every Other Piece of Matter in the Universe, Including the Products of Other Manufacturers, with a Force Proportional to the Product of the Masses and Inversely Proportional to the Distance Between Them. ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 02/12] fs_enet: Add MPC5121 FEC support.
On Wed, May 6, 2009 at 4:01 PM, Wolfgang Denk w...@denx.de wrote:
Dear Grant,
in message fa686aa40905061333q29c263c8p24856c048e30f...@mail.gmail.com you
wrote:
...
#ifdef CONFIG_FS_ENET_HAS_FEC
+#ifdef CONFIG_FS_ENET_MPC5121_FEC
+ {
+ .compatible = fsl,mpc5121-fec,
+ .data = (void *)fs_fec_ops,
+ },
+#else
{
.compatible = fsl,pq1-fec-enet,
.data = (void *)fs_fec_ops,
},
#endif
+#endif
Hmmm. A lot of these #ifdefs in here. Does this have a multiplatform
impact? Not to mention the fact that it's just plain ugly. :-)
Agreed that it's ugly, but duplicatio9ng the code would have been even
worse. I don't think that it has multiplatform - at least not as long
as you don't ask for one image that runs on 83xx and on 512x.
Actually, I *am* asking for one image that runs on 83xx, 52xx and
521x. I already can and do build and test a single image which boots
on all my 52xx boards, on my 8349 board, and on my G4 Mac.
g.
--
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
___
Linuxppc-dev mailing list
Linuxppc-dev@ozlabs.org
https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: Unable to boot 2.6.29 (and tot kernel) with 256k page size on katmai.
Dear Shubhada, In message 8a71b368a89016469f72cd08050ad33402d57...@maui.asicdesigners.com you wrote: I am unable to boot the 2.6.29-rc8 denx kernel (and 2.6.30-rc4 tot kernel) when I enable the 256k page size. My config file is attached. The *same* config works fine with 64k page size. I have 2GB memory on this board. Which root file system are you using? ## Booting image at 0100 ... Image Name: Linux-2.6.29-rc8-01447-g3bf8ce5- Created: 2009-05-05 0:31:36 UTC Image Type: PowerPC Linux Kernel Image (gzip compressed) Data Size:2138773 Bytes = 2 MB Load Address: Entry Point: Verifying Checksum ... OK Uncompressing Kernel Image ... OK Booting using the fdt at 0x400 Loading Device Tree to 007fb000, end 007fefff ... OK Is this all you get? Nothing else? Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Nobody will ever need more than 640k RAM! -- Bill Gates, 1981 Windows 95 needs at least 8 MB RAM. -- Bill Gates, 1996 Nobody will ever need Windows 95. -- logical conclusion ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 2/2] x86-64: seccomp: fix 32/64 syscall hole
* Markus Gutschke (顧孟勤) mar...@google.com wrote: On Sat, Feb 28, 2009 at 10:23, Linus Torvalds torva...@linux-foundation.org wrote: And I guess the seccomp interaction means that this is potentially a 2.6.29 thing. Not that I know whether anybody actually _uses_ seccomp. It does seem to be enabled in at least Fedora kernels, but it might not be used anywhere. In the Linux version of Google Chrome, we are currently working on code that will use seccomp for parts of our sandboxing solution. That's a pretty interesting usage. What would be fallback mode you are using if the kernel doesnt have seccomp built in? Completely non-sandboxed? Or a ptrace/PTRACE_SYSCALL based sandbox? Ingo ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 02/12] fs_enet: Add MPC5121 FEC support.
On Wed, May 6, 2009 at 4:09 PM, Wolfgang Denk w...@denx.de wrote: Dear Scott, in message 4a01f602.2010...@freescale.com you wrote: All of the above is duplicative (with even the same names) of stuff in asm/cpm.h. Beyond just the duplication, what happens if both CPM2 and OK, I can try to reuse the definitions from that file. 512x are enabled in the same kernel? Hm... both architectures look sufficiently different to me that I don't see sense in trying such a thing. Do you think that needs to be supported? Yes! :-) It's not hard to do and it keeps the driver cleaner (IMNSHO). I don't think it is quite possible at the moment due to cache coherency issues, but with Becky's recently merged dma ops changes it should be fixable. Cheers, g. -- Grant Likely, B.Sc., P.Eng. Secret Lab Technologies Ltd. ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 10/12] mpc5121: Add MPC5121 Real time clock driver.
On Wed, May 6, 2009 at 3:06 PM, Wolfram Sang w.s...@pengutronix.de wrote: On Wed, May 06, 2009 at 10:15:17PM +0200, Wolfgang Denk wrote: From: John Rigby jri...@freescale.com Based on Domen Puncer's rtc driver for 5200 posted to the ppclinux mailing list: http://patchwork.ozlabs.org/linuxppc-embedded/patch?id=11675 but never commited anywhere. Changes to Domen's original: Changed filenames/routine names from mpc5200* to mpc5121* Why not changing it to mpc5xxx? From a glimpse, it should still work on MPC5200, too. If this is true, the I heartily agree with Wolfram. :-) g. -- Grant Likely, B.Sc., P.Eng. Secret Lab Technologies Ltd. ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 02/12] fs_enet: Add MPC5121 FEC support.
Dear Grant, In message fa686aa40905061529u11b231afle3b5bb10a2334...@mail.gmail.com you wrote: Agreed that it's ugly, but duplicatio9ng the code would have been even worse. I don't think that it has multiplatform - at least not as long as you don't ask for one image that runs on 83xx and on 512x. Actually, I *am* asking for one image that runs on 83xx, 52xx and 521x. I already can and do build and test a single image which boots on all my 52xx boards, on my 8349 board, and on my G4 Mac. He. I was afraid you'd say that ;-) In this case I need a helping hand as I can't figure out how to make this work. Any suggestions? Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Here's a fish hangs in the net like a poor man's right in the law. 'Twill hardly come out. - Shakespeare, Pericles, Act II, Scene 1 ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 01/12] fs_enet: Use defines to set driver tunables.
On Wed, May 6, 2009 at 4:02 PM, Wolfgang Denk w...@denx.de wrote: Dear Grant, In message fa686aa40905061335q3a3c4cc7r33d77df655100...@mail.gmail.com you wrote: On Wed, May 6, 2009 at 2:15 PM, Wolfgang Denk w...@denx.de wrote: From: Piotr Ziecik ko...@semihalf.com Signed-off-by: Piotr Ziecik ko...@semihalf.com Signed-off-by: Wolfgang Denk w...@denx.de Cc: net...@vger.kernel.org Cc: Grant Likely grant.lik...@secretlab.ca Cc: John Rigby jcri...@gmail.com Not seeing much benefit to this patch, and the (non-existant) patch description doesn't really help me here either. Please see next patch which then uses the ability to change the defaults. Please state that in the patch description when you repost it. :-P g. -- Grant Likely, B.Sc., P.Eng. Secret Lab Technologies Ltd. ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 03/12] fs_enet: Add FEC TX Alignment workaround for MPC5121.
On Wed, May 6, 2009 at 4:12 PM, Wolfgang Denk w...@denx.de wrote: Dear Grant Likely, In message fa686aa40905061337w6aa82f5aj787618ba108e5...@mail.gmail.com you wrote: The FEC on 5121 has problems with misaligned tx buffers. The RM says any alignment is ok but empirical results show that packet buffers ending in 0x1E will sometimes hang the FEC. Other bad alignment does not hang but will cause silent TX failures resulting in about a 1% packet loss as tested by ping -f from a remote host. This patch is a work around that copies every tx packet to an aligned skb before sending. OUCH! Yes :-( +#else +#define tx_skb_align_workaround(dev, skb) (skb) +#endif Another use of #ifdef blocks. What is the multiplatform impact? Hm... Can you recommend a better way to solve the problem? Suggestions are welcome. I'd rather see a runtime selectable workaround. ie. enable it based on the compatible property. g. -- Grant Likely, B.Sc., P.Eng. Secret Lab Technologies Ltd. ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 05/12] mpc5121ads: Added Reset Module node to DTS.
On Wed, May 6, 2009 at 4:16 PM, Wolfgang Denk w...@denx.de wrote: Dear Grant Likely, In message fa686aa40905061340s212385b1r8be4e2f7505bd...@mail.gmail.com you wrote: On Wed, May 6, 2009 at 2:15 PM, Wolfgang Denk w...@denx.de wrote: From: Piotr Ziecik ko...@semihalf.com Signed-off-by: Piotr Ziecik ko...@semihalf.com Signed-off-by: Wolfgang Denk w...@denx.de Cc: Grant Likely grant.lik...@secretlab.ca Cc: John Rigby jcri...@gmail.com Missing patch description. Otherwise looks okay. This is a repeating complaint. Do I really need an extra description for a trivial patch that does exactly what the Subject: says? Fair enough. I was going through your series pretty quickly and this one doesn't really need it. However, in this particular case, I think I would rather see both .dts rework patches put into the same patch so it can be reviewed all at once. g. -- Grant Likely, B.Sc., P.Eng. Secret Lab Technologies Ltd. ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 12/12] mpc5121: Added default config for MPC5121.
On Wed, May 6, 2009 at 4:23 PM, Wolfgang Denk w...@denx.de wrote: Dear Grant Likely, In message fa686aa40905061408s3360b774y756262e3e15d1...@mail.gmail.com you wrote: Wait till about -rc2 time to do defconfig patches. Would it offend you if I continue to include these (and you have to ignore them)? Posting a complete patch set that includs a defconfig allows users much easier testing... Yes, that's fine. My preference is if they appear at the end of the series. g. -- Grant Likely, B.Sc., P.Eng. Secret Lab Technologies Ltd. ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 08/12] mpc5121: Added I2C support.
On Wed, May 6, 2009 at 4:19 PM, Wolfgang Denk w...@denx.de wrote: Dear Grant Likely, In message fa686aa40905061401k319313c5q89fd3e245c308...@mail.gmail.com you wrote: On Wed, May 6, 2009 at 2:15 PM, Wolfgang Denk w...@denx.de wrote: From: Piotr Ziecik ko...@semihalf.com - Enabled I2C interrupts on MPC5121. - Updated Kconfig for i2c-mpc driver. I think this workaround belongs in the driver itself. Sorry, I don't get it. Which workaround? What exactly should I change? Sorry, I misread the patch. Never mind. g. -- Grant Likely, B.Sc., P.Eng. Secret Lab Technologies Ltd. ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
RE: Unable to boot 2.6.29 (and tot kernel) with 256k page size on katmai.
I am using ELDK4.2 that came with the katmai board. Yes that is all I get. If I use 64k page size then I get following log if that helps determine anything. = tftp 100 uImage-2.6.29-denx Waiting for PHY auto negotiation to complete.. done ENET Speed is 100 Mbps - FULL duplex connection (EMAC0) Using ppc_4xx_eth0 device TFTP from server 10.192.165.106; our IP address is 10.192.164.166 Filename 'uImage-2.6.29-denx'. Load address: 0x100 Loading: # done Bytes transferred = 1822193 (1bcdf1 hex) = tftp 400 katmai.dts.256k Using ppc_4xx_eth0 device TFTP from server 10.192.165.106; our IP address is 10.192.164.166 Filename 'katmai.dts.256k'. Load address: 0x400 Loading: ## done Bytes transferred = 16384 (4000 hex) = bootm 100 - 400 ## Booting image at 0100 ... Image Name: Linux-2.6.29-rc8-01447-g3bf8ce5- Created: 2009-05-06 0:34:46 UTC Image Type: PowerPC Linux Kernel Image (gzip compressed) Data Size:1822129 Bytes = 1.7 MB Load Address: Entry Point: Verifying Checksum ... OK Uncompressing Kernel Image ... OK Booting using the fdt at 0x400 Loading Device Tree to 007fb000, end 007fefff ... OK Using PowerPC 44x Platform machine description Linux version 2.6.29-rc8-01447-g3bf8ce5-dirty (r...@california) (gcc version 4.2.2) #2 Tue May 5 17:34:41 PDT 2009 console [udbg0] enabled setup_arch: bootmem arch: exit Zone PFN ranges: DMA 0x - 0x3000 Normal 0x3000 - 0x3000 HighMem 0x3000 - 0x8000 Movable zone start PFN for each node early_node_map[1] active PFN ranges 0: 0x - 0x8000 MMU: Allocated 1088 bytes of context maps for 255 contexts Built 1 zonelists in Zone order, mobility grouping on. Total pages: 32752 Kernel command line: UIC0 (32 IRQ sources) at DCR 0xc0 UIC1 (32 IRQ sources) at DCR 0xd0 UIC2 (32 IRQ sources) at DCR 0xe0 UIC3 (32 IRQ sources) at DCR 0xf0 PID hash table entries: 4096 (order: 12, 16384 bytes) clocksource: timebase mult[50] shift[22] registered Dentry cache hash table entries: 131072 (order: 3, 524288 bytes) Inode-cache hash table entries: 65536 (order: 2, 262144 bytes) Memory: 2089472k/2097152k available (3776k kernel code, 7040k reserved, 192k data, 736k bss, 384k init) SLUB: Genslabs=14, HWalign=32, Order=0-3, MinObjects=0, CPUs=1, Nodes=1 Calibrating delay loop... 1597.44 BogoMIPS (lpj=3194880) Mount-cache hash table entries: 8192 net_namespace: 296 bytes xor: measuring software checksum speed 8regs : 112.000 MB/sec 8regs_prefetch: 144.000 MB/sec 32regs: 112.000 MB/sec 32regs_prefetch: 144.000 MB/sec xor: using function: 32regs_prefetch (144.000 MB/sec) NET: Registered protocol family 16 PCIE0: Checking link... PCIE0: Device detected, waiting for link... PCIE0: link is up ! PCI host bridge /plb/pc...@d (primary) ranges: MEM 0x000e..0x000e7fff - 0x8000 IO 0x000f8000..0x000f8000 - 0x 4xx PCI DMA offset set to 0x PCIE0: successfully set as root-complex PCIE1: Checking link... PCIE1: Device detected, waiting for link... PCIE1: link is up ! PCI host bridge /plb/pc...@d2000 (primary) ranges: MEM 0x000e8000..0x000e - 0x8000 IO 0x000f8001..0x000f8001 - 0x 4xx PCI DMA offset set to 0x PCIE1: successfully set as root-complex PCIE2: Checking link... PCIE2: Device detected, waiting for link... PCIE2: link is up ! PCI host bridge /plb/pc...@d4000 (primary) ranges: MEM 0x000f..0x000f7fff - 0x8000 IO 0x000f8002..0x000f8002 - 0x 4xx PCI DMA offset set to 0x PCIE2: successfully set as root-complex PCI host bridge /plb/p...@c0ec0 (primary) ranges: MEM 0x000d8000..0x000d - 0x8000 IO 0x000c0800..0x000c0800 - 0x 4xx PCI DMA offset set to 0x PCI: Probing PCI hardware PCI: Hiding 4xx host bridge resources :10:00.0 pci :11:00.0: PME# supported from D0 D3hot pci :11:00.0: PME# disabled PCI: Hiding 4xx host bridge resources 0001:20:00.0 PCI: Hiding 4xx host bridge resources 0002:30:00.0 pci :10:00.0: PCI bridge, secondary bus :11 pci :10:00.0: IO window: disabled pci :10:00.0: MEM window: 0x8000-0x80bf pci :10:00.0: PREFETCH window: 0x0080c0-0x0080cf pci 0001:20:00.0: PCI bridge, secondary bus 0001:21 pci 0001:20:00.0: IO window: 0x1000-0x1fff pci 0001:20:00.0: MEM window: 0x8020-0x802f pci 0001:20:00.0: PREFETCH window: 0x008000-0x00801f pci 0002:30:00.0: PCI bridge, secondary bus 0002:31 pci 0002:30:00.0: IO window: 0x1000-0x1fff pci 0002:30:00.0: MEM window: 0x8020-0x802f pci
[PATCH] powerpc/iseries; fix pci breakage
Commit 4fc665b88a79a45bae8bbf3a05563c27c7337c3d powerpc: Merge 32 and
64-bit dma code made changes to the PCI initialisation code that added
an assignment to archdata.dma_data but only for 32 bit code. Commit
7eef440a545c7f812ed10b49d4a10a351df9cad6 powerpc/pci: Cosmetic cleanups
of pci-common.c removed the conditional compilation. Unfortunately,
the iSeries code setup the archdata.dma_data before that assignment was
done - effectively overwriting the dma_data with NULL.
Fix this up by moving the iSeries setup of dma_data into a
pci_dma_dev_setup callback.
Signed-off-by: Stephen Rothwell s...@canb.auug.org.au
---
arch/powerpc/include/asm/iseries/iommu.h |4
arch/powerpc/platforms/iseries/iommu.c |6 +-
arch/powerpc/platforms/iseries/pci.c |1 -
3 files changed, 5 insertions(+), 6 deletions(-)
Built and booted iseries_defconfig with and without CONFIG_PCI.
This is a regression in v2.6.29 from v2.6.28, so I guess we need to send this
to the stable team (backported if necessary) after it is upstream.
diff --git a/arch/powerpc/include/asm/iseries/iommu.h
b/arch/powerpc/include/asm/iseries/iommu.h
index c59ee7e..1b9692c 100644
--- a/arch/powerpc/include/asm/iseries/iommu.h
+++ b/arch/powerpc/include/asm/iseries/iommu.h
@@ -26,10 +26,6 @@ struct vio_dev;
struct device_node;
struct iommu_table;
-/* Creates table for an individual device node */
-extern void iommu_devnode_init_iSeries(struct pci_dev *pdev,
- struct device_node *dn);
-
/* Get table parameters from HV */
extern void iommu_table_getparms_iSeries(unsigned long busno,
unsigned char slotno, unsigned char virtbus,
diff --git a/arch/powerpc/platforms/iseries/iommu.c
b/arch/powerpc/platforms/iseries/iommu.c
index ff43f1f..4021982 100644
--- a/arch/powerpc/platforms/iseries/iommu.c
+++ b/arch/powerpc/platforms/iseries/iommu.c
@@ -174,9 +174,10 @@ static struct iommu_table *iommu_table_find(struct
iommu_table * tbl)
}
-void iommu_devnode_init_iSeries(struct pci_dev *pdev, struct device_node *dn)
+static void pci_dma_dev_setup_iseries(struct pci_dev *pdev)
{
struct iommu_table *tbl;
+ struct device_node *dn = pdev-sysdata;
struct pci_dn *pdn = PCI_DN(dn);
const u32 *lsn = of_get_property(dn, linux,logical-slot-number, NULL);
@@ -194,6 +195,8 @@ void iommu_devnode_init_iSeries(struct pci_dev *pdev,
struct device_node *dn)
kfree(tbl);
pdev-dev.archdata.dma_data = pdn-iommu_table;
}
+#else
+#define pci_dma_dev_setup_iseries NULL
#endif
static struct iommu_table veth_iommu_table;
@@ -251,5 +254,6 @@ void iommu_init_early_iSeries(void)
ppc_md.tce_build = tce_build_iSeries;
ppc_md.tce_free = tce_free_iSeries;
+ ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_iseries;
set_pci_dma_ops(dma_iommu_ops);
}
diff --git a/arch/powerpc/platforms/iseries/pci.c
b/arch/powerpc/platforms/iseries/pci.c
index 02a634f..21cddc3 100644
--- a/arch/powerpc/platforms/iseries/pci.c
+++ b/arch/powerpc/platforms/iseries/pci.c
@@ -444,7 +444,6 @@ void __init iSeries_pcibios_fixup_resources(struct pci_dev
*pdev)
pdev-sysdata = node;
allocate_device_bars(pdev);
iseries_device_information(pdev, bus, *sub_bus);
- iommu_devnode_init_iSeries(pdev, node);
}
/*
--
1.6.2.4
--
Cheers,
Stephen Rothwells...@canb.auug.org.au
http://www.canb.auug.org.au/~sfr/
___
Linuxppc-dev mailing list
Linuxppc-dev@ozlabs.org
https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH] powerpc/pci: clean up direct access to sysdata by iseries platform
Hi Kumar, On Wed, 6 May 2009 23:13:38 +1000 Stephen Rothwell s...@canb.auug.org.au wrote: On Tue, 5 May 2009 07:04:55 -0500 Kumar Gala ga...@kernel.crashing.org wrote: We shouldn't directly access sysdata to get the device node. We should be calling pci_device_to_OF_node(). Signed-off-by: Kumar Gala ga...@kernel.crashing.org It looks ok, but all I can say for now is that it doesn not make things worse. During 2.6.28, the iSeries PCI code was broken. I am working on a fix and after that I will be able to properly test this patch. With my fix for the old PCI breakage, I have tested your pci tree for iseries_defconfig. Built and booted with and without CONFIG_PCI. Tested-by: Stephen Rothwell s...@canb.auug.og.au Acked-by: Stephen Rothwell s...@canb.auug.og.au My patch, however, will probably need your attention once Ben takes it. :-) -- Cheers, Stephen Rothwells...@canb.auug.org.au http://www.canb.auug.org.au/~sfr/ pgpi6WADDx1d1.pgp Description: PGP signature ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: MPC8349E's DMA controller like ISA controller but with more feature?
lhthanh wrote: Thanks for your explaination! So if I want to transfer a buffer of data from a single I/O port, will not DMA framework also be able ? No. Have I to write aother driver? Yes. Actually, I don't want write all because there are serveral DMA code at hand. I only want to use a framework instead of re-writing. There is no framework for what you want to do. There is only one other driver that does what you want (sound/soc/fsl/fsl_dma.c), and that is a complicated driver that does many things besides transferring data to an I/O port. And I afraid that I can not write code which assure sharing DMA channels. Look at arch/powerpc/boot/dts/mpc8610_hpcd.dts. The DMA channels that are needed by the 8610 audio driver have a different 'compatible' property. This is how you prevent the generic DMA driver from using a channel that you want. I'm afraid that you're going to have to study the DMA programming model, and my device driver, and write a brand new driver from scratch. Thank Scott and Timur very much! I will study more DMA driver and come back later. :) Regard! ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 08/12] mpc5121: Added I2C support.
On Wed, May 6, 2009 at 4:51 PM, Grant Likely grant.lik...@secretlab.ca wrote: On Wed, May 6, 2009 at 4:19 PM, Wolfgang Denk w...@denx.de wrote: Dear Grant Likely, In message fa686aa40905061401k319313c5q89fd3e245c308...@mail.gmail.com you wrote: On Wed, May 6, 2009 at 2:15 PM, Wolfgang Denk w...@denx.de wrote: From: Piotr Ziecik ko...@semihalf.com - Enabled I2C interrupts on MPC5121. - Updated Kconfig for i2c-mpc driver. I think this workaround belongs in the driver itself. Sorry, I don't get it. Which workaround? What exactly should I change? Sorry, I misread the patch. Never mind. Actually, on 3rd reading, I think my first impression was correct (even if I was wrong about it being a workaround). This code in mpc512x_init_i2c() is only relevant for i2c busses (it isn't shared with any other drivers). Therefore, it belongs with the i2c bus itself. It does not belong in platform code. Cheers, g. -- Grant Likely, B.Sc., P.Eng. Secret Lab Technologies Ltd. ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Trouble using with Kegel cross tool chain
Hi, I'm getting a bit desperate trying to build a gcc / glibc cross-toolchainfor use on a Freescale MPC8313 but am having problems. I follow the Quick Start instructions at http://www.kegel.com/crosstool/crosstool-0.43/doc/crosstool-howto.html and run demo-powerpc-603.sh (is that the correct script for the MPC8313?) I check the /opt/crosstool directory and there is nothing there. Below are the results of running the above script: = linux-66oa:~/work/crosstool-0.43 # sh demo-powerpc-603.sh + TARBALLS_DIR=/root/downloads + RESULT_TOP=/opt/crosstool + export TARBALLS_DIR RESULT_TOP + GCC_LANGUAGES=c,c++ + export GCC_LANGUAGES + mkdir -p /opt/crosstool ++ cat powerpc-603.dat gcc-4.1.0-glibc-2.3.6-tls.dat + eval TARGET=powerpc-603-linux-gnu 'TARGET_CFLAGS=-O' '-mcpu=603' 'GCC_EXTRA_CONFIG=--with-cpu=603' '--enable-cxx-flags=-mcpu=603' BINUTILS_DIR=binutils-2.16.1 GCC_CORE_DIR=gcc-3.3.6 GCC_DIR=gcc-4.1.0 GLIBC_DIR=glibc-2.3.6 LINUX_DIR=linux-2.6.15.4 LINUX_SANITIZED_HEADER_DIR=linux-libc-headers-2.6.12.0 GLIBCTHREADS_FILENAME=glibc-linuxthreads-2.3.6 GDB_DIR=gdb-6.5 'GLIBC_EXTRA_CONFIG=$GLIBC_EXTRA_CONFIG' --with-tls --with-__thread '--enable-kernel=2.4.18' sh all.sh --notest ++ TARGET=powerpc-603-linux-gnu ++ TARGET_CFLAGS='-O -mcpu=603' ++ GCC_EXTRA_CONFIG='--with-cpu=603 --enable-cxx-flags=-mcpu=603' ++ BINUTILS_DIR=binutils-2.16.1 ++ GCC_CORE_DIR=gcc-3.3.6 ++ GCC_DIR=gcc-4.1.0 ++ GLIBC_DIR=glibc-2.3.6 ++ LINUX_DIR=linux-2.6.15.4 ++ LINUX_SANITIZED_HEADER_DIR=linux-libc-headers-2.6.12.0 ++ GLIBCTHREADS_FILENAME=glibc-linuxthreads-2.3.6 ++ GDB_DIR=gdb-6.5 ++ GLIBC_EXTRA_CONFIG=' --with-tls --with-__thread --enable-kernel=2.4.18' ++ sh all.sh --notest You set both LINUX_DIR and LINUX_SANITIZED_HEADER_DIR - ignoring LINUX_DIR for the build DEJAGNU not set, so not running any regression tests GLIBC_ADDON_OPTIONS not set, so building all glibc add-on's KERNELCONFIG not set, so not configuring linux kernel + TOOLCOMBO=gcc-4.1.0-glibc-2.3.6 ++ pwd + BUILD_DIR=/root/work/crosstool-0.43/build/powerpc-603-linux-gnu/gcc-4.1.0-glibc-2.3.6 ++ pwd + TOP_DIR=/root/work/crosstool-0.43 + test -z '' + SRC_DIR=/root/work/crosstool-0.43/build/powerpc-603-linux-gnu/gcc-4.1.0-glibc-2.3.6 + echo 'SRC_DIR not set, so source tarballs will be unpacked in the build directory' SRC_DIR not set, so source tarballs will be unpacked in the build directory + case x$PREFIX in + case x$USER in + abort 'Don'\''t run all.sh or crosstool.sh as root, it'\''s dangerous' + echo 'Don'\''t' run all.sh or crosstool.sh as root, 'it'\''s' dangerous Don't run all.sh or crosstool.sh as root, it's dangerous + exec false = The point of this exercise is to build a compiler to build Mono so that I can run .NET programs on the MPC8313. I would really appreciate any help. Thanks, Chris Plasun ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 2/2] x86-64: seccomp: fix 32/64 syscall hole
On Wed, 2009-05-06 at 15:21 -0700, Markus Gutschke (顧孟勤) wrote: On Wed, May 6, 2009 at 15:13, Ingo Molnar mi...@elte.hu wrote: doing a (per arch) bitmap of harmless syscalls and replacing the mode1_syscalls[] check with that in kernel/seccomp.c would be a pretty reasonable extension. (.config controllable perhaps, for old-style-seccomp) It would probably be faster than the current loop over mode1_syscalls[] as well. This would be a great option to improve performance of our sandbox. I can detect the availability of the new kernel API dynamically, and then not intercept the bulk of the system calls. This would allow the sandbox to work both with existing and with newer kernels. We'll post a kernel patch for discussion in the next few days, I suspect the correct thing to do would be to leave seccomp mode 1 alone and introduce a mode 2 with a less restricted set of system calls -- the interface was designed to be extended in this way, after all. -- Nicholas Miell nmi...@comcast.net ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: Trouble using with Kegel cross tool chain
In message 407093.53240...@web58102.mail.re3.yahoo.com you wrote: Hi, I'm getting a bit desperate trying to build a gcc / glibc cross-toolchainfor use on a Freescale MPC8313 but am having problems. I follow the Quick Start instructions at http://www.kegel.com/crosstool/crosstool-0.43/doc/crosstool-howto.html and run demo-powerpc-603.sh (is that the correct script for the MPC8313?) I check the /opt/crosstool directory and there is nothing there. Below are the results of running the above script: = linux-66oa:~/work/crosstool-0.43 # sh demo-powerpc-603.sh + TARBALLS_DIR=/root/downloads + RESULT_TOP=/opt/crosstool + export TARBALLS_DIR RESULT_TOP + GCC_LANGUAGES=c,c++ + export GCC_LANGUAGES + mkdir -p /opt/crosstool ++ cat powerpc-603.dat gcc-4.1.0-glibc-2.3.6-tls.dat + eval TARGET=powerpc-603-linux-gnu 'TARGET_CFLAGS=-O' '-mcpu=603' 'GCC_EXTRA_CONFIG=--with-cpu=603' '--enable-cxx-flags=-mcpu=603' BINUTILS_DIR=binutils-2.16.1 GCC_CORE_DIR=gcc-3.3.6 GCC_DIR=gcc-4.1.0 GLIBC_DIR=glibc-2.3.6 LINUX_DIR=linux-2.6.15.4 LINUX_SANITIZED_HEADER_DIR=lin ux-libc-headers-2.6.12.0 GLIBCTHREADS_FILENAME=glibc-linuxthreads-2.3.6 GDB_DIR=gdb-6.5 'GLIBC_EXTRA_CONFIG=$GLIBC_EXTRA_CONFIG' --with-tls --with-__thread '--enable-kernel=2.4.18' sh all.sh --notest ++ TARGET=powerpc-603-linux-gnu ++ TARGET_CFLAGS='-O -mcpu=603' ++ GCC_EXTRA_CONFIG='--with-cpu=603 --enable-cxx-flags=-mcpu=603' ++ BINUTILS_DIR=binutils-2.16.1 ++ GCC_CORE_DIR=gcc-3.3.6 ++ GCC_DIR=gcc-4.1.0 ++ GLIBC_DIR=glibc-2.3.6 ++ LINUX_DIR=linux-2.6.15.4 ++ LINUX_SANITIZED_HEADER_DIR=linux-libc-headers-2.6.12.0 ++ GLIBCTHREADS_FILENAME=glibc-linuxthreads-2.3.6 ++ GDB_DIR=gdb-6.5 ++ GLIBC_EXTRA_CONFIG=' --with-tls --with-__thread --enable-kernel=2.4.18' ++ sh all.sh --notest You set both LINUX_DIR and LINUX_SANITIZED_HEADER_DIR - ignoring LINUX_DIR fo r the build DEJAGNU not set, so not running any regression tests GLIBC_ADDON_OPTIONS not set, so building all glibc add-on's KERNELCONFIG not set, so not configuring linux kernel + TOOLCOMBO=gcc-4.1.0-glibc-2.3.6 ++ pwd + BUILD_DIR=/root/work/crosstool-0.43/build/powerpc-603-linux-gnu/gcc-4.1.0-g libc-2.3.6 ++ pwd + TOP_DIR=/root/work/crosstool-0.43 + test -z '' + SRC_DIR=/root/work/crosstool-0.43/build/powerpc-603-linux-gnu/gcc-4.1.0-gli bc-2.3.6 + echo 'SRC_DIR not set, so source tarballs will be unpacked in the build dir ectory' SRC_DIR not set, so source tarballs will be unpacked in the build directory + case x$PREFIX in + case x$USER in + abort 'Don'\''t run all.sh or crosstool.sh as root, it'\''s dangerous' + echo 'Don'\''t' run all.sh or crosstool.sh as root, 'it'\''s' dangerous Don't run all.sh or crosstool.sh as root, it's dangerous + exec false Are you running as root? If so, don't. Mikey = The point of this exercise is to build a compiler to build Mono so that I can run .NET programs on the MPC8313. I would really appreciate any help. Thanks, Chris Plasun ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: Trouble using with Kegel cross tool chain
Dear Chris, In message 407093.53240...@web58102.mail.re3.yahoo.com you wrote: I'm getting a bit desperate trying to build a gcc / glibc cross-toolchainfor use on a Freescale MPC8313 but am having problems. Try using ELDK (see http://www.denx.de/wiki/view/DULG/ELDK resp. ftp://ftp.denx.de/pub/eldk/4.2/); it's based on crosstool but has these issues already solved for you. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de There are bugs and then there are bugs. And then there are bugs. - Karl Lehenbauer ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
