Re: [PEDA] Paired Mechanical layers (ex Inversion ...)

2002-02-28 Thread Douglas McDonald

>There are problems with doing X and Y flips - they don't swap layers and 
>they leave components in upside-down. The L-Flip (layer flip) with 
>selections is also fraught.

What purpose does X & Y flip serve with respect to the components themselves 
apart from sorting out assembly layer issues for components on the bottom 
layer ie. allowing you to move the mechanical bits to another layer and 
mirroring them when necessary. Put another way, wouldn't it be better, even 
now, to define a set of properly paired layers and (harking back to my 
original point) to make sure that ALL future layers are paired.

_
Chat with friends online, try MSN Messenger: http://messenger.msn.com

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Re: [PEDA] Paired Mechanical layers (ex Inversion ...)

2002-02-28 Thread Ian Wilson

At 10:40 PM 27/02/02 -1100, you wrote:
>>There are problems with doing X and Y flips - they don't swap layers and 
>>they leave components in upside-down. The L-Flip (layer flip) with 
>>selections is also fraught.
>
>What purpose does X & Y flip serve with respect to the components themselves

X and Y flip of components is supported to ensure there is a steady flow of 
new users with very difficult to mount components.

>apart from sorting out assembly layer issues for components on the bottom 
>layer ie. allowing you to move the mechanical bits to another layer and 
>mirroring them when necessary. Put another way, wouldn't it be better, 
>even now, to define a set of properly paired layers and (harking back to 
>my original point) to make sure that ALL future layers are paired.

I really do not want forced pairing of all layers.  When doing some 
documentation I want to be able to refer to a specific layer and know that 
the details I am referring to are indeed on that layer.  Forced pairing 
would limit flexibility.

*But*...there is a possible source of new confusion that will arise when a 
design has its layer pairs modified mid stream.  This could progressively 
cause items to become scattered around on multiple different layers - there 
is something to be said for the safety of fixed layer pairings.  (Also, if 
layer pairings can be set in the PCBLib, what happens when a component is 
brought into a design with different pairings?).

How are issues like this handled in other packages?

bye for now,
Ian Wilson


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Re: [PEDA] Operations on no-net features?

2002-02-28 Thread Steve Wiseman


On Wed, 27 Feb 2002, Abd ul-Rahman Lomax wrote:

> Here is what Mr. Reagan was talking about. Double-click on a no-net track
> that is, say, on the top layer. If you don't have a no-net, just put a
> piece of top layer track down, it will automatically be no-net unless it
> touches a real net.

Yep - loads of no-net stuff lying around, after deleting all the
components in a functional block - which left behind the tracks that I'm
trying to kill.

> Press the Global button. Under Attributes to Match By, select "same." Under
> layer, you might want to select "same" as well. Click on the Selection box,
> then click on okay. All top layer no-net track will be selected.

Nope. Really, no. It doesn't. It selects the connected copper, _not_ all
no-net tracks. (or it might be remembering a net-name from ages ago, or
almost anything. What it doesn't do is what it should...).
I wonder if features which were originally on a net but have had their
connectivity removed, behave differently to brand new no-net features...
(just checked - this would appear to be the case. Features which used to
be on nets, but which now aren't, as a result of deleting the parts they
were attached to, and updating the PCB with "assign net to connected
copper" ticked, don't fall properly back to no-net, and therefore don't
get globaled properly. I now think this is a bug, rather than my
confusion.

> You could leave out the "top layer" match, but then all no-net track,
> including track on mechanical layers, etc., will be selected. If you object
> was to delete no-net track, you would not want that, so you would need to
> unselect it. Instead, selecting track one layer at a time is reasonably easy.

What you say is true, except that selecting on "no net" doesn't select all
no-net tracks / features.

Steve


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[PEDA] 3D warning

2002-02-28 Thread Tim Fifield

When I try to view my pcb in the 3D viewer I get the following message and
then it just sits there, stares at me and won't let me press the ok button.

"Board boundary is incomplete - calculated boundary will be used. Check that
the boundary on the Keep Out layer is closed, with their track ends touching
at their centers."

The tracks appear to be touching, when I grab each end of them.
FYI.. The pcb outline was am import from AutoCAD and has lots or arcs in it.

Anybody had this message before?

Tim

  gains in quality come from meticulous attention to detail and every step
in the manufacturing process must be done as carefully as possible, not as
quickly as possible  

-David Packard, The HP Way


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[PEDA] Assembly drawing problem

2002-02-28 Thread Mark E Witherite




Re: [PEDA] Assembly drawing problem

2002-02-28 Thread Tim Fifield

Mark,

The print preview has a little box that you can check to mirror the layer. I
just create a silkscreen layer with a mech outline and the silk screen you I
to see for my assy. dwgs. and have that box ticked for that printout. You
can do this for any other layer that you want.

Tim

-Original Message-
From: Mark E Witherite [mailto:[EMAIL PROTECTED]]
Sent: Thursday, February 28, 2002 12:00 PM
To: Protel EDA Forum
Subject: [PEDA] Assembly drawing problem



Hi Everyone,
 I'm either experiencing a brain dead Thursday or a bug with the
print preview assembly drawing.Here's what I tried to do.  I need to
mirror my PCB.  Rather than having to move all the parts around, I decided
to move all the components to the opposite side.   I then used print
preview to do the assembly drawing.  The bottom drawing did not mirror my
components. Any one know what I am doing wrong?
Also can I get the link to the bug list?
Thanks
Mark
Mark Witherite  C.I.D.
Assistant Research Engineer
Astronomy & Astrophysics
Penn State University
2565 Park Center Blvd
Suite 200
State College, PA.  16801
email [EMAIL PROTECTED]
telephone 814 865 9839
fax   814 865 9100



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Re: [PEDA] 3D warning

2002-02-28 Thread HxEngr




[PEDA] Software for Isolation Milling

2002-02-28 Thread Florian Finsterbusch

We are considering to build some prototype PCBs by isolation milling.
Has anybody got experience which software is suitable to generate HPGL- or DXF-Files 
for the drilling machine from our Protel 99 SE
Gerber-Files?
Is there some free or cheap software available?

Thank you for all of your help!

Florian Finsterbusch

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Re: [PEDA] Software for Isolation Milling

2002-02-28 Thread lloyd . good

Hi Florian,
I have used the Isolator software from T-Tech out of the US. It imports
gerber files and drill files directly then generates its own isolation route
files. It is very effective and easy to use, but not very fast. It's great
for single sided test PCBs but I found it a bit of a pain for complex double
sided. It seems to me that you can't beat the proto-1 service at AP
Circuits. Just my opinion!
www.apcircuits.com
Cheers,




   GE Energy Services
__

Lloyd Good
Development Digitization

Substation Automation Solutions
GE Harris Energy Control Systems Canada, Inc.
2728 Hopewell Place N.E., Calgary, Alberta T1Y 7J7  CANADA
Tel: 403.214.4777,  Dialcomm: 8.498.4777,  Fax: 403.287.7946
Website: www.gepower.com/geharrisenergy/

NOTICE: The information contained in this e-mail is privileged, confidential
and intended solely for the use of the addressee named above. If the reader
of this e-mail is not the intended recipient, you are hereby notified that
any dissemination, distribution or copying of this e-mail is strictly
prohibited. If you have received this e-mail in error, please notify me
immediately by telephone (collect) at (1) 403.214.4400 and destroy this
e-mail as well as any copy. Thank you.



-Original Message-
From: Florian Finsterbusch [mailto:[EMAIL PROTECTED]]
Sent: Thursday, February 28, 2002 8:45 AM
To: Protel EDA Forum
Subject: [PEDA] Software for Isolation Milling


We are considering to build some prototype PCBs by isolation milling.
Has anybody got experience which software is suitable to generate HPGL- or
DXF-Files for the drilling machine from our Protel 99 SE
Gerber-Files?
Is there some free or cheap software available?

Thank you for all of your help!

Florian Finsterbusch

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Re: [PEDA] Software for Isolation Milling

2002-02-28 Thread Brian Guralnick

What type of driller?

Are you talking about just drilling the pads & holes?
Or, are you talking about a board milling machine?

Usually, board milling machines will take the Gerber & process it specifically for
the milling machine.  As for a hole drilling machine, the 1 of the generated drill
files might already be in a suitable format for the machine.  Remember, Protel
generates (if I remember correctly) a .drl, a .drr & a .txt which all contain the
drill data.  The .txt file should be somewhere close to HPGL & Gerber.  It's
basically a set of  x&y coordinates.

Brian Guralnick
-
---
Comedy clips:
ftp://ftp.point-lab.com/quartus/Public/MP3/Simpsons-FatFingers.mp3  -53K
ftp://ftp.point-lab.com/quartus/Public/MP3/Simpsons-Moe-LieDetector.mp3 -166K

RedDwarf fans only - Year 8 - Shrink Kryten interview...
ftp://ftp.point-lab.com/quartus/Public/MP3/Shrink-Kryten-16kbit.mp3  -450K
ftp://ftp.point-lab.com/quartus/Public/MP3/Shrink-Kryten-48kbit.mp3  -1.4M
-
---


- Original Message -
From: "Florian Finsterbusch" <[EMAIL PROTECTED]>
To: "Protel EDA Forum" <[EMAIL PROTECTED]>
Sent: Thursday, February 28, 2002 10:45 AM
Subject: [PEDA] Software for Isolation Milling


| We are considering to build some prototype PCBs by isolation milling.
| Has anybody got experience which software is suitable to generate HPGL- or
DXF-Files for the drilling machine from our Protel 99 SE
| Gerber-Files?
| Is there some free or cheap software available?
|
| Thank you for all of your help!
|
| Florian Finsterbusch
|
|

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[PEDA] Initial Zoom on Library part creation, was: [no subject]

2002-02-28 Thread Abd ul-Rahman Lomax

Hey, guys, think of future generations, put something appropriate in the 
subject header!

The two posts to the topic so far did not mention the command that makes 
initial library origin irrelevant.

When opening a new footprint window, after cancelling the wizard, place a 
pad, doesn't matter where you place it. Then Edit/Set Reference/Center will 
place the origin at pad center. If the beginning view window is too large 
or way too small, Z-A will set the pad to fill the screen and Z-O a few 
times will give a typically usable scale.

(Center in the Set Reference command refers to the extent of all copper in 
the footprint; the resulting reference will be the midpoint of the 
extremes. For most footprints, I prefer to use center reference, it allows 
rotation without movement of the component center. For example, if I have 
polarized capacitors with pin names 1 and 2 and it turns out that these 
need to be rotated because of a bad library footprint or symbol, they can 
be rotated with global edits and pads remain in the same places, only the 
pad names and component rotation values are changed, plus any asymmetrical 
non-copper primitives. If I have a QFP, I can rotate it in place. Pin 1 
center, with SMT components, does not have a fixed relationship to the 
physical part, so I'd think that assemblers for autoinsertion would want 
centroid plus rotation, another reason for using center reference.)

The Footprint Wizard should not be default, unless possibly the Wizard is 
so much improved that it becomes useful for the majority of parts. Right 
now it just adds keystrokes. We have elsewhere discussed possible 
improvements to the Wizard.
[EMAIL PROTECTED]
Abdulrahman Lomax
Easthampton, Massachusetts USA

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Re: [PEDA] Software for Isolation Milling

2002-02-28 Thread lloyd . good

Brian,
Actually, when we used the Isolation S/W, it was for a New Hermes Vangard
7000 plotter/miller. It is usually used for sign making, but because it has
the variable speed armature in Z axis and accepts HPGL input, that's what we
used to iso-route PCBs. T-Tech has their own miller/plotter with a
proprietary file exchange, but the S/W exports the isolation routing path
into both DXF and HPGL. We also had some conversion S/W with our plotter to
go from DXF or HPGL to their own file system, but we never used it.
Regards,




   GE Energy Services
__

Lloyd Good
Development Digitization

Substation Automation Solutions
General Electric Canada, Inc.
2728 Hopewell Place N.E., Calgary, Alberta T1Y 7J7  CANADA
Tel: 403.214.4777,  Dialcomm: 8.498.4777,  Fax: 403.287.7946
Website: www.gepower.com/geharrisenergy/

NOTICE: The information contained in this e-mail is privileged, confidential
and intended solely for the use of the addressee named above. If the reader
of this e-mail is not the intended recipient, you are hereby notified that
any dissemination, distribution or copying of this e-mail is strictly
prohibited. If you have received this e-mail in error, please notify me
immediately by telephone (collect) at (1) 403.214.4400 and destroy this
e-mail as well as any copy. Thank you.



-Original Message-
From: Brian Guralnick [mailto:[EMAIL PROTECTED]]
Sent: Thursday, February 28, 2002 9:05 AM
To: Protel EDA Forum
Subject: Re: [PEDA] Software for Isolation Milling


What type of driller?

Are you talking about just drilling the pads & holes?
Or, are you talking about a board milling machine?

Usually, board milling machines will take the Gerber & process it
specifically for
the milling machine.  As for a hole drilling machine, the 1 of the generated
drill
files might already be in a suitable format for the machine.  Remember,
Protel
generates (if I remember correctly) a .drl, a .drr & a .txt which all
contain the
drill data.  The .txt file should be somewhere close to HPGL & Gerber.  It's
basically a set of  x&y coordinates.

Brian Guralnick

-
---
Comedy clips:
ftp://ftp.point-lab.com/quartus/Public/MP3/Simpsons-FatFingers.mp3  -53K
ftp://ftp.point-lab.com/quartus/Public/MP3/Simpsons-Moe-LieDetector.mp3
-166K

RedDwarf fans only - Year 8 - Shrink Kryten interview...
ftp://ftp.point-lab.com/quartus/Public/MP3/Shrink-Kryten-16kbit.mp3  -450K
ftp://ftp.point-lab.com/quartus/Public/MP3/Shrink-Kryten-48kbit.mp3  -1.4M

-
---


- Original Message -
From: "Florian Finsterbusch" <[EMAIL PROTECTED]>
To: "Protel EDA Forum" <[EMAIL PROTECTED]>
Sent: Thursday, February 28, 2002 10:45 AM
Subject: [PEDA] Software for Isolation Milling


| We are considering to build some prototype PCBs by isolation milling.
| Has anybody got experience which software is suitable to generate HPGL- or
DXF-Files for the drilling machine from our Protel 99 SE
| Gerber-Files?
| Is there some free or cheap software available?
|
| Thank you for all of your help!
|
| Florian Finsterbusch
|
|

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Re: [PEDA] Operations on no-net features?

2002-02-28 Thread Brad Velander

Steve,
what you have described below sounds like it may be closely related
to the bug that I discovered with pads and keepouts not correctly reverting
to "no net" after they have been named some other net. In the case that I
discovered it involved polygons pouring right over items which were "no
net". These items had previously been assigned to the same net as the
polygon but after changing to "no Net" the polygon pours still poured over
them ignoring the fact they were now "no net".

Sincerely,
Brad Velander.

Lead PCB Designer
Norsat International Inc.
Microwave Products
Tel   (604) 292-9089 (direct line)
Fax  (604) 292-9010
email: [EMAIL PROTECTED]
http://www.norsat.com

See us at Booth 323 at Satellite 2002 in Washington, DC March 6-8.



-Original Message-
From: Steve Wiseman [mailto:[EMAIL PROTECTED]]
Sent: Thursday, February 28, 2002 6:10 AM
To: Protel EDA Forum
Subject: Re: [PEDA] Operations on no-net features?





Nope. Really, no. It doesn't. It selects the connected copper, _not_ all
no-net tracks. (or it might be remembering a net-name from ages ago, or
almost anything. What it doesn't do is what it should...).
I wonder if features which were originally on a net but have had their
connectivity removed, behave differently to brand new no-net features...
(just checked - this would appear to be the case. Features which used to
be on nets, but which now aren't, as a result of deleting the parts they
were attached to, and updating the PCB with "assign net to connected
copper" ticked, don't fall properly back to no-net, and therefore don't
get globaled properly. I now think this is a bug, rather than my
confusion.



Steve

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Re: [PEDA] Software for Isolation Milling

2002-02-28 Thread Florian Finsterbusch

Hi Brian,

we want to mill the whole PCB (drills + traces).

Our mechanics uses an ISEL milling machine for mechanic prototypes.
We want to use this machine also to manufacture our prototype PCBs.

Therefore we need a converter-software from Gerber- to HPGL- or DXF-Files.
(It has to convert the traces and pads to outlines for the milling-machine)

Florian


> -Original Message-
> From: Brian Guralnick [mailto:[EMAIL PROTECTED]]
> Sent: Thursday, February 28, 2002 5:05 PM
> To: Protel EDA Forum
> Subject: Re: [PEDA] Software for Isolation Milling
> 
> 
> What type of driller?
> 
> Are you talking about just drilling the pads & holes?
> Or, are you talking about a board milling machine?
> 
> Usually, board milling machines will take the Gerber & process it specifically for
> the milling machine.  As for a hole drilling machine, the 1 of the generated drill
> files might already be in a suitable format for the machine.  Remember, Protel
> generates (if I remember correctly) a .drl, a .drr & a .txt which all contain the
> drill data.  The .txt file should be somewhere close to HPGL & Gerber.  It's
> basically a set of  x&y coordinates.
> 
> Brian Guralnick
> -
> ---
> Comedy clips:
> ftp://ftp.point-lab.com/quartus/Public/MP3/Simpsons-FatFingers.mp3  -53K
> ftp://ftp.point-lab.com/quartus/Public/MP3/Simpsons-Moe-LieDetector.mp3 -166K
> 
> RedDwarf fans only - Year 8 - Shrink Kryten interview...
> ftp://ftp.point-lab.com/quartus/Public/MP3/Shrink-Kryten-16kbit.mp3  -450K
> ftp://ftp.point-lab.com/quartus/Public/MP3/Shrink-Kryten-48kbit.mp3  -1.4M
> -
> ---
> 
> 
> - Original Message -
> From: "Florian Finsterbusch" <[EMAIL PROTECTED]>
> To: "Protel EDA Forum" <[EMAIL PROTECTED]>
> Sent: Thursday, February 28, 2002 10:45 AM
> Subject: [PEDA] Software for Isolation Milling
> 
> 
> | We are considering to build some prototype PCBs by isolation milling.
> | Has anybody got experience which software is suitable to generate HPGL- or
> DXF-Files for the drilling machine from our Protel 99 SE
> | Gerber-Files?
> | Is there some free or cheap software available?
> |
> | Thank you for all of your help!
> |
> | Florian Finsterbusch
> |
> |
> 
> 

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Re: [PEDA] Flipped on panel Paired Mechanical layers (ex Inversio n ...)

2002-02-28 Thread Dennis Saputelli

just curious, what means of separating the finished panels do you use?
tabs with little mouse bit holes? 
.1" route slots between?
how do you clean up the rough parts?

Dennis Saputelli


Brad Velander wrote:
> 
> Dennis,
> the main benefit is for SMD designs with components on both sides.
> If the panel is laid out correctly (i.e. symmetrically as flipped), the
> assembly process can use one set-up and run the boards through the one line
> twice. During the first pass board A has it's top side components placed at
> the same time as board B has it's bottom side components placed. At the end
> of the line after reflow, the board is flipped and sent back through the
> same line. During this pass board A has it's bottom side components placed
> and Board B has it's top side components placed. One set-up, one line, one
> program, two reflow cycles. This is very significant to assembly costs
> because so much time is spent (read wasted) setting up lines and tying up
> lines for a production run. In an example like this, they tie up only one
> line, program it only once, load the parts once, but reflow twice. Got the
> idea?
> 
> There is a second benefit to this panelization as well, it comes
> into play with high frequency RF designs (solid plane bottom side, all
> circuits top side) like we do where absolute finest control of feature
> dimensions are required (i.e. IPC class 3 at +/-20% is a mile off to us).
> During fabrication, plating and etching can be grossly unequal from one side
> of the board to the other due to density of plating or copper to be etched
> away. Flipping each alternate board evens the distribution of copper thus
> equalizing the plating and etching characteristics of the board over the
> whole panel allowing for finer fabrication tolerances.
> 
> Sincerely,
> Brad Velander.
> 
> Lead PCB Designer
> Norsat International Inc.
> Microwave Products
> Tel   (604) 292-9089 (direct line)
> Fax  (604) 292-9010
> email: [EMAIL PROTECTED]
> http://www.norsat.com
> 

-- 
___
www.integratedcontrolsinc.comIntegrated Controls, Inc.
   tel: 415-647-04802851 21st Street  
  fax: 415-647-3003San Francisco, CA 94110

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Re: [PEDA] SMTH was- Software for Isolation Milling

2002-02-28 Thread Dennis Saputelli

yes you can beat AP
SMTH circuits
full spec - dbl sided, sldr mask, legend, fast, about $100
Clem Tang <[EMAIL PROTECTED]>
http://www.1pcb.com/
(also in Canada)

Dennis Saputelli


[EMAIL PROTECTED] wrote:
> 
> Hi Florian,
> I have used the Isolator software from T-Tech out of the US. It imports
> gerber files and drill files directly then generates its own isolation route
> files. It is very effective and easy to use, but not very fast. It's great
> for single sided test PCBs but I found it a bit of a pain for complex double
> sided. It seems to me that you can't beat the proto-1 service at AP
> Circuits. Just my opinion!
> www.apcircuits.com
> Cheers,
> 
> 
>GE Energy Services
> __
> 
> Lloyd Good
> Development Digitization
> 
> Substation Automation Solutions
> GE Harris Energy Control Systems Canada, Inc.
> 2728 Hopewell Place N.E., Calgary, Alberta T1Y 7J7  CANADA
> Tel: 403.214.4777,  Dialcomm: 8.498.4777,  Fax: 403.287.7946
> Website: www.gepower.com/geharrisenergy/
> 
> NOTICE: The information contained in this e-mail is privileged, confidential
> and intended solely for the use of the addressee named above. If the reader
> of this e-mail is not the intended recipient, you are hereby notified that
> any dissemination, distribution or copying of this e-mail is strictly
> prohibited. If you have received this e-mail in error, please notify me
> immediately by telephone (collect) at (1) 403.214.4400 and destroy this
> e-mail as well as any copy. Thank you.
> 
> -Original Message-
> From: Florian Finsterbusch [mailto:[EMAIL PROTECTED]]
> Sent: Thursday, February 28, 2002 8:45 AM
> To: Protel EDA Forum
> Subject: [PEDA] Software for Isolation Milling
> 

-- 
___
www.integratedcontrolsinc.comIntegrated Controls, Inc.
   tel: 415-647-04802851 21st Street  
  fax: 415-647-3003San Francisco, CA 94110

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Re: [PEDA] Software for Isolation Milling

2002-02-28 Thread Mike Ingle

A secoond reply,  with the cost of double sided plated through boards so
loww, I wouldn't mess w/ the milling machine. Unless of coarse you are doing
an iterative RF design.

Mike

-Original Message-
From: Florian Finsterbusch [mailto:[EMAIL PROTECTED]]
Sent: Thursday, February 28, 2002 8:36 AM
To: Protel EDA Forum
Subject: Re: [PEDA] Software for Isolation Milling


Hi Brian,

we want to mill the whole PCB (drills + traces).

Our mechanics uses an ISEL milling machine for mechanic prototypes.
We want to use this machine also to manufacture our prototype PCBs.

Therefore we need a converter-software from Gerber- to HPGL- or DXF-Files.
(It has to convert the traces and pads to outlines for the milling-machine)

Florian


> -Original Message-
> From: Brian Guralnick [mailto:[EMAIL PROTECTED]]
> Sent: Thursday, February 28, 2002 5:05 PM
> To: Protel EDA Forum
> Subject: Re: [PEDA] Software for Isolation Milling
>
>
> What type of driller?
>
> Are you talking about just drilling the pads & holes?
> Or, are you talking about a board milling machine?
>
> Usually, board milling machines will take the Gerber & process it
specifically for
> the milling machine.  As for a hole drilling machine, the 1 of the
generated drill
> files might already be in a suitable format for the machine.  Remember,
Protel
> generates (if I remember correctly) a .drl, a .drr & a .txt which all
contain the
> drill data.  The .txt file should be somewhere close to HPGL & Gerber.
It's
> basically a set of  x&y coordinates.
> 
> Brian Guralnick
> --
---
> ---
> Comedy clips:
> ftp://ftp.point-lab.com/quartus/Public/MP3/Simpsons-FatFingers.mp3  -53K
>
ftp://ftp.point-lab.com/quartus/Public/MP3/Simpsons-Moe-LieDetector.mp3 -166
K
>
> RedDwarf fans only - Year 8 - Shrink Kryten interview...
> ftp://ftp.point-lab.com/quartus/Public/MP3/Shrink-Kryten-16kbit.mp3  -450K
> ftp://ftp.point-lab.com/quartus/Public/MP3/Shrink-Kryten-48kbit.mp3  -1.4M
> --
---
> ---
>
>
> - Original Message -
> From: "Florian Finsterbusch" <[EMAIL PROTECTED]>
> To: "Protel EDA Forum" <[EMAIL PROTECTED]>
> Sent: Thursday, February 28, 2002 10:45 AM
> Subject: [PEDA] Software for Isolation Milling
>
>
> | We are considering to build some prototype PCBs by isolation milling.
> | Has anybody got experience which software is suitable to generate HPGL-
or
> DXF-Files for the drilling machine from our Protel 99 SE
> | Gerber-Files?
> | Is there some free or cheap software available?
> |
> | Thank you for all of your help!
> |
> | Florian Finsterbusch
> |
> |
>
>

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Re: [PEDA] Software for Isolation Milling

2002-02-28 Thread Brian Guralnick

Oddly enough, you might be able to use a third party's converter software to work out
the milling.  Sometimes, way in the past, these guys have semi functional demo
versions of their software which would output HPGL.

Take a look here:
http://www.lpkf.de/
http://www.t-tech.com/

http://www.hobbycnc.com/downloadslinks.htm  -> check out the software converter links
here...
http://www.geocities.com/siliconvalley/lab/3685/plotter/plotter.htm


Brian Guralnick

Comedy clips:
ftp://ftp.point-lab.com/quartus/Public/MP3/Simpsons-FatFingers.mp3  -53K
ftp://ftp.point-lab.com/quartus/Public/MP3/Simpsons-Moe-LieDetector.mp3 -166K
ftp://ftp.point-lab.com/quartus/Public/MP3/Simpsons-StoneCutters.mp3 -222K

RedDwarf fans only - Year 8 - Shrink Kryten interview...
ftp://ftp.point-lab.com/quartus/Public/MP3/Shrink-Kryten-16kbit.mp3  -450K
ftp://ftp.point-lab.com/quartus/Public/MP3/Shrink-Kryten-48kbit.mp3  -1.4M



- Original Message -
From: "Florian Finsterbusch" <[EMAIL PROTECTED]>
To: "Protel EDA Forum" <[EMAIL PROTECTED]>
Sent: Thursday, February 28, 2002 11:36 AM
Subject: Re: [PEDA] Software for Isolation Milling


| Hi Brian,
|
| we want to mill the whole PCB (drills + traces).
|
| Our mechanics uses an ISEL milling machine for mechanic prototypes.
| We want to use this machine also to manufacture our prototype PCBs.
|
| Therefore we need a converter-software from Gerber- to HPGL- or DXF-Files.
| (It has to convert the traces and pads to outlines for the milling-machine)
|
| Florian
|
|
| > -Original Message-
| > From: Brian Guralnick [mailto:[EMAIL PROTECTED]]
| > Sent: Thursday, February 28, 2002 5:05 PM
| > To: Protel EDA Forum
| > Subject: Re: [PEDA] Software for Isolation Milling
| >
| >
| > What type of driller?
| >
| > Are you talking about just drilling the pads & holes?
| > Or, are you talking about a board milling machine?
| >
| > Usually, board milling machines will take the Gerber & process it specifically
for
| > the milling machine.  As for a hole drilling machine, the 1 of the generated
drill
| > files might already be in a suitable format for the machine.  Remember, Protel
| > generates (if I remember correctly) a .drl, a .drr & a .txt which all contain the
| > drill data.  The .txt file should be somewhere close to HPGL & Gerber.  It's
| > basically a set of  x&y coordinates.
| > 
| > Brian Guralnick
|
> ---
--
| > ---
| > Comedy clips:
| > ftp://ftp.point-lab.com/quartus/Public/MP3/Simpsons-FatFingers.mp3  -53K
| > ftp://ftp.point-lab.com/quartus/Public/MP3/Simpsons-Moe-LieDetector.mp3 -166K
| >
| > RedDwarf fans only - Year 8 - Shrink Kryten interview...
| > ftp://ftp.point-lab.com/quartus/Public/MP3/Shrink-Kryten-16kbit.mp3  -450K
| > ftp://ftp.point-lab.com/quartus/Public/MP3/Shrink-Kryten-48kbit.mp3  -1.4M
|
> ---
--
| > ---
| >
| >
| > - Original Message -
| > From: "Florian Finsterbusch" <[EMAIL PROTECTED]>
| > To: "Protel EDA Forum" <[EMAIL PROTECTED]>
| > Sent: Thursday, February 28, 2002 10:45 AM
| > Subject: [PEDA] Software for Isolation Milling
| >
| >
| > | We are considering to build some prototype PCBs by isolation milling.
| > | Has anybody got experience which software is suitable to generate HPGL- or
| > DXF-Files for the drilling machine from our Protel 99 SE
| > | Gerber-Files?
| > | Is there some free or cheap software available?
| > |
| > | Thank you for all of your help!
| > |
| > | Florian Finsterbusch
| > |
| > |
| >
| >
|
|

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Re: [PEDA] Operations on no-net features?

2002-02-28 Thread Abd ul-Rahman Lomax

At 02:10 PM 2/28/2002 +, Steve Wiseman wrote:

>On Wed, 27 Feb 2002, Abd ul-Rahman Lomax wrote:
>ress the Global button. Under Attributes to Match By, select "same." Under
> > layer, you might want to select "same" as well. Click on the Selection box,
> > then click on okay. All top layer no-net track will be selected.
>
>Nope. Really, no. It doesn't. It selects the connected copper, _not_ all
>no-net tracks. (or it might be remembering a net-name from ages ago, or
>almost anything. What it doesn't do is what it should...).

I tested what I wrote before mailing it. I can only think of these 
possibilities: (1) Mr. Wiseman does not understand what was written and is 
therefore referring to some other command sequence, (2) his memory is 
simply faulty and he has not verified what he is claiming, (3) there is a 
bug which is not understood, or (4) his installation of Protel is damaged.

>I wonder if features which were originally on a net but have had their
>connectivity removed, behave differently to brand new no-net features...
>(just checked - this would appear to be the case. Features which used to
>be on nets, but which now aren't, as a result of deleting the parts they
>were attached to, and updating the PCB with "assign net to connected
>copper" ticked, don't fall properly back to no-net, and therefore don't
>get globaled properly. I now think this is a bug, rather than my
>confusion.

I did not test the processes by which copper may become "No-Net." Rather, I 
tested the behavior of global edit in selecting all no-net copper based on 
an edit of a single piece of it. It worked.

Does Update Free Primitives from Component Pads remove nets from free 
unconnected primitives? I tested it with vias and track and they became 
no-net upon running the command.

I took an old test pcb which had an 0805 footprint on it with both pads 
assigned to GND. I placed track to connect the pads, then I moved the part 
away so that the track was floating. Running Update left the track No-Net.

Thinking that perhaps there would be a different if the PCB has been saved 
and reloaded, I tried that. No change in behavior. I deleted the part 
instead of moving it. The track still became No-Net upon Update.

At this point, I'd ask Mr. Wiseman to describe more exactly the behavior he 
thinks is a bug, because I could not reproduce it based on the partial 
description he has given.

> > You could leave out the "top layer" match, but then all no-net track,
> > including track on mechanical layers, etc., will be selected. If you object
> > was to delete no-net track, you would not want that, so you would need to
> > unselect it. Instead, selecting track one layer at a time is reasonably 
> easy.
>
>What you say is true, except that selecting on "no net" doesn't select all
>no-net tracks / features.

What it selects depends on other match characteristics, but what Mr. 
Wiseman reports here does not match my experience. However, I have not 
tested all varieties of primitives, only track and vias.


[EMAIL PROTECTED]
Abdulrahman Lomax
Easthampton, Massachusetts USA

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Re: [PEDA] SMTH was- Software for Isolation Milling

2002-02-28 Thread lloyd . good

Thanks Dennis,
I didn't even know these guys existed. Good pricing. I've always used APC
because I live in the same city, but the savings might be worth the shipping
time. Not to mention our useless Canadian dollar goes a little farther when
staying in-country.
Regards,




   GE Energy Services
__

Lloyd Good
Development Digitization

Substation Automation Solutions
General Electric Canada, Inc.
2728 Hopewell Place N.E., Calgary, Alberta T1Y 7J7  CANADA
Tel: 403.214.4777,  Dialcomm: 8.498.4777,  Fax: 403.287.7946
Website: www.gepower.com/geharrisenergy/

NOTICE: The information contained in this e-mail is privileged, confidential
and intended solely for the use of the addressee named above. If the reader
of this e-mail is not the intended recipient, you are hereby notified that
any dissemination, distribution or copying of this e-mail is strictly
prohibited. If you have received this e-mail in error, please notify me
immediately by telephone (collect) at (1) 403.214.4400 and destroy this
e-mail as well as any copy. Thank you.



-Original Message-
From: Dennis Saputelli [mailto:[EMAIL PROTECTED]]
Sent: Thursday, February 28, 2002 10:27 AM
To: Protel EDA Forum
Subject: Re: [PEDA] SMTH was- Software for Isolation Milling


yes you can beat AP
SMTH circuits
full spec - dbl sided, sldr mask, legend, fast, about $100
Clem Tang <[EMAIL PROTECTED]>
http://www.1pcb.com/
(also in Canada)

Dennis Saputelli


[EMAIL PROTECTED] wrote:
> 
> Hi Florian,
> I have used the Isolator software from T-Tech out of the US. It imports
> gerber files and drill files directly then generates its own isolation
route
> files. It is very effective and easy to use, but not very fast. It's great
> for single sided test PCBs but I found it a bit of a pain for complex
double
> sided. It seems to me that you can't beat the proto-1 service at AP
> Circuits. Just my opinion!
> www.apcircuits.com
> Cheers,
> 
> 
>GE Energy Services
> __
> 
> Lloyd Good
> Development Digitization
> 
> Substation Automation Solutions
> GE Harris Energy Control Systems Canada, Inc.
> 2728 Hopewell Place N.E., Calgary, Alberta T1Y 7J7  CANADA
> Tel: 403.214.4777,  Dialcomm: 8.498.4777,  Fax: 403.287.7946
> Website: www.gepower.com/geharrisenergy/
> 
> NOTICE: The information contained in this e-mail is privileged,
confidential
> and intended solely for the use of the addressee named above. If the
reader
> of this e-mail is not the intended recipient, you are hereby notified that
> any dissemination, distribution or copying of this e-mail is strictly
> prohibited. If you have received this e-mail in error, please notify me
> immediately by telephone (collect) at (1) 403.214.4400 and destroy this
> e-mail as well as any copy. Thank you.
> 
> -Original Message-
> From: Florian Finsterbusch [mailto:[EMAIL PROTECTED]]
> Sent: Thursday, February 28, 2002 8:45 AM
> To: Protel EDA Forum
> Subject: [PEDA] Software for Isolation Milling
> 

-- 
___
www.integratedcontrolsinc.comIntegrated Controls, Inc.
   tel: 415-647-04802851 21st Street  
  fax: 415-647-3003San Francisco, CA 94110

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Re: [PEDA] 3D warning

2002-02-28 Thread Abd ul-Rahman Lomax

At 10:46 AM 2/28/2002 -0500, [EMAIL PROTECTED] wrote:
>Arcs are known to be fatal to a board outline. Protel apparently doesn't
>handle them correctly.

The autorouter does not presently handle them correctly. The 3-D viewer was 
more recently written, however, so it is surprising that it does not handle 
arcs, if that is the source of the problem. It's not *too* surprising, 
however, the calculational problems of working with arcs are much more 
severe than with track, where the endpoints are defined in the primitive 
itself. Arcs are not like that.

Apparently the 3-D viewer is looking for coincident endpoints to validate 
that the outline is patent, and it is not going to find them, perhaps, if 
arcs are involved. Instead it uses, according to the error message that was 
reported (I have not verified this) a "calculated" boundary. I'd expect 
that calculated boundary to be just fine in most cases.

So what do we do with arcs in an outline? A fairly simple solution is to 
reduce them to line segments. One way to do this is to photoplot the 
outline using absolute coordinates, delete it, and import it back from the 
gerber. This will produce results which are indistinguishable, I'd expect, 
from keeping the original arcs, except that the outlines in the PCB file 
will now match exactly the outlines on the final plots, and the autorouter 
should be happy, and likewise, I'd think, the 3-D viewer. But with the 3-D 
viewer it is not so important, I expect.

[EMAIL PROTECTED]
Abdulrahman Lomax
Easthampton, Massachusetts USA

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Re: [PEDA] Software for Isolation Milling

2002-02-28 Thread Mike Ingle

There is a company which makes low cost routing machines ($3000 range)  It
has been many years since I looked so I don't remember their name.  Try
searching for them, and call and see if you can buy just the software.

Mike

-Original Message-
From: Florian Finsterbusch [mailto:[EMAIL PROTECTED]]
Sent: Thursday, February 28, 2002 8:36 AM
To: Protel EDA Forum
Subject: Re: [PEDA] Software for Isolation Milling


Hi Brian,

we want to mill the whole PCB (drills + traces).

Our mechanics uses an ISEL milling machine for mechanic prototypes.
We want to use this machine also to manufacture our prototype PCBs.

Therefore we need a converter-software from Gerber- to HPGL- or DXF-Files.
(It has to convert the traces and pads to outlines for the milling-machine)

Florian


> -Original Message-
> From: Brian Guralnick [mailto:[EMAIL PROTECTED]]
> Sent: Thursday, February 28, 2002 5:05 PM
> To: Protel EDA Forum
> Subject: Re: [PEDA] Software for Isolation Milling
>
>
> What type of driller?
>
> Are you talking about just drilling the pads & holes?
> Or, are you talking about a board milling machine?
>
> Usually, board milling machines will take the Gerber & process it
specifically for
> the milling machine.  As for a hole drilling machine, the 1 of the
generated drill
> files might already be in a suitable format for the machine.  Remember,
Protel
> generates (if I remember correctly) a .drl, a .drr & a .txt which all
contain the
> drill data.  The .txt file should be somewhere close to HPGL & Gerber.
It's
> basically a set of  x&y coordinates.
> 
> Brian Guralnick
> --
---
> ---
> Comedy clips:
> ftp://ftp.point-lab.com/quartus/Public/MP3/Simpsons-FatFingers.mp3  -53K
>
ftp://ftp.point-lab.com/quartus/Public/MP3/Simpsons-Moe-LieDetector.mp3 -166
K
>
> RedDwarf fans only - Year 8 - Shrink Kryten interview...
> ftp://ftp.point-lab.com/quartus/Public/MP3/Shrink-Kryten-16kbit.mp3  -450K
> ftp://ftp.point-lab.com/quartus/Public/MP3/Shrink-Kryten-48kbit.mp3  -1.4M
> --
---
> ---
>
>
> - Original Message -
> From: "Florian Finsterbusch" <[EMAIL PROTECTED]>
> To: "Protel EDA Forum" <[EMAIL PROTECTED]>
> Sent: Thursday, February 28, 2002 10:45 AM
> Subject: [PEDA] Software for Isolation Milling
>
>
> | We are considering to build some prototype PCBs by isolation milling.
> | Has anybody got experience which software is suitable to generate HPGL-
or
> DXF-Files for the drilling machine from our Protel 99 SE
> | Gerber-Files?
> | Is there some free or cheap software available?
> |
> | Thank you for all of your help!
> |
> | Florian Finsterbusch
> |
> |
>
>

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Re: [PEDA] 3D warning

2002-02-28 Thread Brian Sherer

Tim, in my experience DXF problems with splines and arcs seem 
to be import round-off errors.

I've had some luck in regenerating the complex curve by manually re-entering 
the arcs by opening the original file in Autocad while the imported file is
open 
in Protel, then editing the arcs one by one in Protel to match the exact
Center,
Radius, Start Angle and End Angle of each arc in the original ACAD boundary. 

Entering the exact numbers reported by ACAD for each arc seems to give 
Protel enough data to "connect the dots" with sufficient accuracy to force a 
continuous curve or spline. 

Pretty tedious, but it's worked in all the instances I've tried it on.

Brian

At 10:32 AM 2/28/02 -0400, you wrote:
>When I try to view my pcb in the 3D viewer I get the following message and
>then it just sits there, stares at me and won't let me press the ok button.
>
>"Board boundary is incomplete - calculated boundary will be used. Check that
>the boundary on the Keep Out layer is closed, with their track ends touching
>at their centers."
>
>The tracks appear to be touching, when I grab each end of them.
>FYI.. The pcb outline was am import from AutoCAD and has lots or arcs in it.
>
>Anybody had this message before?
>

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Re: [PEDA] Bug list, was Assembly drawing problem

2002-02-28 Thread Abd ul-Rahman Lomax

At 09:59 AM 2/28/2002 -0600, Mark E Witherite wrote:
>Also can I get the link to the bug list?

go to http://groups.yahoo.com/group/protel-users/database
and click on Bug List.

You will need to be a member of [EMAIL PROTECTED], and logged in 
to yahoogroups so it can recognize you as such.

(Mr. Witherite is already a member, but yahoogroups periodically insists on 
actual login, even if one has not deleted the cookie)

[EMAIL PROTECTED]
Abdulrahman Lomax
Easthampton, Massachusetts USA


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Re: [PEDA] Software for Isolation Milling

2002-02-28 Thread Christopher Brand



Florian Finsterbusch wrote:

>Hi Brian,
>
>we want to mill the whole PCB (drills + traces).
>
>Our mechanics uses an ISEL milling machine for mechanic prototypes.
>We want to use this machine also to manufacture our prototype PCBs.
>
>Therefore we need a converter-software from Gerber- to HPGL- or DXF-Files.
>(It has to convert the traces and pads to outlines for the milling-machine)
>
>Florian
>
Florian,

I have done something similar in protel. A year or so ago we looked at getting one of 
those t-tech machines. After looking at demo of the isolation software and the 
machine, I thought we could do this in protel with minimal effort.  The prototypes we 
did were not perfect, but were usable, and may depend on the complexity of the board. 
We used an excellon xl-5 driller/router which has some limitations (see below). 

What I used were two polygons with "no hatching" to get the isolation path for the top 
and bottom. Make the track width on the polygons about the same width as your router 
bit. I used 10mils for this. The bit we used has a "V" shape and varying the routing 
depth, you can vary the  isolation path width. These polygons were assigned to two 
nets that I created called "iso-top" and "iso-bottom". I created a net class called 
"isolation", and then a clearance rule of 1mil between this netclass and the board. 
You will also have to adjust the setting for the polygons to make sure you have a good 
isolation path.

After I got the isolation paths polygons, I copied these to another blank pcb (being 
careful to not rebuild them). All I had to do after that was make the gerbers from the 
polygons. we are using an xl-5 driller/router to make these protos, so i wrote a small 
program to convert the gerber files into a excellon route program.  

Some things from my setup that are different from yours is that the controller for our 
driller/router can't do arcs unless they are in 90 degree increments, so I had to use 
polygons with hexagons instead of arcs.

If you need a dxf file you can load the gerbers up into camtastic and export them out. 
I am not sure about getting an hpgl file.  When generating the gerbers for the 
isolation paths, it may help to check "sorted" in the cam manager gerber setup, this 
will help with optimizing the paths for the milling machine.

You will also need to mirror the bottom isolation polygon, so that when you flip the 
panel over to route the bottom, it lines up with the other side. It took me a few trys 
to get that sorted out :)

Its been a while since I did that, so I may have missed some steps.

Hope this gives you some ideas.

-- 

Christopher Brand
Ludlum Measurements, Inc.
PO Box 810
501 Oak Street
Sweetwater, TX 79556 USA
(915) 235-4947 phone
(915) 235-4672 fax
[EMAIL PROTECTED]
www.ludlums.com





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Re: [PEDA] Bug list - maybe - ratsnest

2002-02-28 Thread Dennis Saputelli

i can't believe i never noticed this or at least that it never bothered
me before:

the ratsnests disappear in single layer mode (shift S)
what a shame, it should at least be an option i think to show them

Dennis Saputelli

-- 
___
www.integratedcontrolsinc.comIntegrated Controls, Inc.
   tel: 415-647-04802851 21st Street  
  fax: 415-647-3003San Francisco, CA 94110

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Re: [PEDA] Bug list, was Assembly drawing problem

2002-02-28 Thread Mark E Witherite




Re: [PEDA] Operations on no-net features?

2002-02-28 Thread Dwight

Steve is right.  There's definitely a problem with tracks that had a net,
and then had all attached pads removed, and updated via "Update Free
Primitives from Component Pads".  As you run the cursor over them, the
status bar still shows the old net.  And even though the Properties dialog
shows "No Net", a global select based on matching net of "No Net" will NOT
select them.

> -Original Message-
> From: Abd ul-Rahman Lomax [mailto:[EMAIL PROTECTED]]
> Sent: Thursday, February 28, 2002 9:38 AM
>
> At 02:10 PM 2/28/2002 +, Steve Wiseman wrote:
>
> >I wonder if features which were originally on a net but have had their
> >connectivity removed, behave differently to brand new no-net features...
> >(just checked - this would appear to be the case. Features which used to
> >be on nets, but which now aren't, as a result of deleting the parts they
> >were attached to, and updating the PCB with "assign net to connected
> >copper" ticked, don't fall properly back to no-net, and therefore don't
> >get globaled properly. I now think this is a bug, rather than my
> >confusion.
>
> I did not test the processes by which copper may become "No-Net." Rather,
I
> tested the behavior of global edit in selecting all no-net copper based on
> an edit of a single piece of it. It worked.
>
> Does Update Free Primitives from Component Pads remove nets from free
> unconnected primitives? I tested it with vias and track and they became
> no-net upon running the command.
>

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Re: [PEDA] Bug list - maybe - ratsnest

2002-02-28 Thread Abd ul-Rahman Lomax

At 10:37 AM 2/28/2002 -0800, Dennis Saputelli wrote:
>i can't believe i never noticed this or at least that it never bothered
>me before:
>
>the ratsnests disappear in single layer mode (shift S)
>what a shame, it should at least be an option i think to show them

Yes, this is very irritating. One of the main uses for single layer mode is 
judging routability on a single layer, and doing such routing. That the 
connection lines do not display in single layer mode is apparently the 
result of a bad choice on the programmer's part. They knew to allow us to 
include mech layers, but rat's nest lines would be just as important.

[EMAIL PROTECTED]
Abdulrahman Lomax
Easthampton, Massachusetts USA

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Re: [PEDA] Flipped on panel Paired Mechanical layers (ex Inversio n ...)

2002-02-28 Thread Brad Velander

Dennis,
this answer is colored by the fact that we don't actually do
assembly here.

First we typically use thin laminates 0.008" - 0.0031" with a
majority in the 0.020 - 0.025" range. Our tabs are just solid tabs, no
drills to allow easier breaks. Our tab width is typically about 0.200"
material in the tab at the centers. Because we are using such thin laminates
they are usually just cut off with an exacto knife.

Probably not a lot of help to you, but that is our use.

Sincerely,
Brad Velander.

Lead PCB Designer
Norsat International Inc.
Microwave Products
Tel   (604) 292-9089 (direct line)
Fax  (604) 292-9010
email: [EMAIL PROTECTED]
http://www.norsat.com

See us at Booth 323 at Satellite 2002 in Washington, DC March 6-8.



-Original Message-
From: Dennis Saputelli [mailto:[EMAIL PROTECTED]]
Sent: Thursday, February 28, 2002 9:12 AM
To: Protel EDA Forum
Subject: Re: [PEDA] Flipped on panel Paired Mechanical layers (ex
Inversio n ...)


just curious, what means of separating the finished panels do you use?
tabs with little mouse bit holes? 
.1" route slots between?
how do you clean up the rough parts?

Dennis Saputelli

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Re: [PEDA] Software for Isolation Milling

2002-02-28 Thread Jon Elson

Brian Guralnick wrote:

> What type of driller?
>
> Are you talking about just drilling the pads & holes?
> Or, are you talking about a board milling machine?
>
> Usually, board milling machines will take the Gerber & process it specifically for
> the milling machine.  As for a hole drilling machine, the 1 of the generated drill
> files might already be in a suitable format for the machine.  Remember, Protel
> generates (if I remember correctly) a .drl, a .drr & a .txt which all contain the
> drill data.  The .txt file should be somewhere close to HPGL & Gerber.  It's
> basically a set of  x&y coordinates.

No, the .drr is a drill report, it only tells how many holes of what sizes are
used.

.drl is an EIA format RS-274D file for the drilling machine.  EIA is a paper-tape
format that predates ASCII.

The .txt file is ASCII RS-274D, commonly called an Excellon drill file.  It is nothing
like HPGL at all, which is an HP pen plotter format.  It is related to a Gerber file,
but has major differences (ie. it uses suppressed leading zeroes instead of trailing
zeroes).  Yes, it is mostly X and Y coords, that is true.

Jon

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Re: [PEDA] Operations on no-net features?

2002-02-28 Thread Ian Wilson

On 11:33 AM 28/02/02 -0800, Dwight said:
>Steve is right.  There's definitely a problem with tracks that had a net,
>and then had all attached pads removed, and updated via "Update Free
>Primitives from Component Pads".  As you run the cursor over them, the
>status bar still shows the old net.  And even though the Properties dialog
>shows "No Net", a global select based on matching net of "No Net" will NOT
>select them.

I have updated the Bug List to include this problem as an update to that 
reported by Brad V. (Polygons pouring over entities that once had a 
net).  It would seem to be the same problem.

Question is: does the workaround given for that problem also fix this 
one.  That is, does the problem persist through a Save-Close-Reopen?  Are 
all No-Net entities globally editable as No-Net, and the status bar 
indicator correct when hovering, after saving, closing and then re-opening 
the design?

Ian Wilson


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Re: [PEDA] Operations on no-net features?

2002-02-28 Thread Abd ul-Rahman Lomax

At 11:33 AM 2/28/2002 -0800, Dwight wrote:
>Steve is right.  There's definitely a problem with tracks that had a net,
>and then had all attached pads removed, and updated via "Update Free
>Primitives from Component Pads".  As you run the cursor over them, the
>status bar still shows the old net.  And even though the Properties dialog
>shows "No Net", a global select based on matching net of "No Net" will NOT
>select them.

Yes, I can confirm this behavior, and can report a little more. I had some 
track with net VCC. I moved the component that gave the track its net and 
ran Update. The track now shows "No Net" in the edit dialog. But it shows 
VCC in the status bar. Editing another No Net track to select such tracks 
globally did not select the track. However, a global edit through another 
VCC track *did* pick up the track.

The right hand does not know what the left hand is doing. This is 
definitely a bug.

However, the workaround is simple. The anomaly, as might have been 
expected, did not survive a file save. I saved the file, closed it, and 
then reloaded it. The track now behaved normally.

[EMAIL PROTECTED]
Abdulrahman Lomax
Easthampton, Massachusetts USA

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Re: [PEDA] Paired Mechanical layers (ex Inversion ...)

2002-02-28 Thread Geoff Harland

> >>There are problems with doing X and Y flips - they don't swap layers and
> >>they leave components in upside-down. The L-Flip (layer flip) with
> >>selections is also fraught.
> >
> >What purpose does X & Y flip serve with respect to the components
themselves
>
> X and Y flip of components is supported to ensure there is a steady flow
of
> new users with very difficult to mount components.

Toggling the mirrored status of components (with the X and Y keys) is an
aspect of Protel going as far back as the DOS versions (of both the
schematic and PCB applications). (With hindsight, perhaps the X and Y keys
should always have "inverted" (PCB) components instead of reflecting these,
but in the days of the earliest DOS versions, through-hole components were
still the norm, and while it eventually became possible to "invert" such
components (along with SM components), reflecting (PCB) components following
the use of the X and Y keys had (instead) become the norm by then.)

There are pros and cons to being able to mirror components. It is not
totally out of the question that users will continue to be warned (in
Phoenix) whenever they are about to toggle the mirrored status of one or
more components, but another two alternative scenarios are that mirroring of
components will no longer be supported, or else (I hope) that Component
objects (like String objects) will incorporate a (Boolean) Mirrored field.

No longer supporting mirroring of components could have disagreeable
ramifications when it comes to reflecting selected objects; consider what
currently happens when the L key is pressed. (Not exactly the same, to be
sure, but still indicative of what could come about.) OTOH, the provision of
a Mirrored field for Component objects would permit users to determine, as
required, whether any components in the PCB are currently mirrored, and
users could be warned of the presence of any such components whenever they
initiated any generation of Gerber files, NC Drill files, etc. (They would
either have the option of aborting the generation of those files at that
time, or else continuing, not dissimilar to the present situation whenever
an attempt is made to reflect one or more components.)

> >apart from sorting out assembly layer issues for components on the bottom
> >layer ie. allowing you to move the mechanical bits to another layer and
> >mirroring them when necessary. Put another way, wouldn't it be better,
> >even now, to define a set of properly paired layers and (harking back to
> >my original point) to make sure that ALL future layers are paired.
>
> I really do not want forced pairing of all layers.  When doing some
> documentation I want to be able to refer to a specific layer and know that
> the details I am referring to are indeed on that layer.  Forced pairing
> would limit flexibility.

I fully agree. That is why I have always suggested that any pairing of Mech
layers should be user-configurable.

> *But*...there is a possible source of new confusion that will arise when a
> design has its layer pairs modified mid stream.  This could progressively
> cause items to become scattered around on multiple different layers -
there
> is something to be said for the safety of fixed layer pairings.  (Also, if
> layer pairings can be set in the PCBLib, what happens when a component is
> brought into a design with different pairings?).

Such considerations have also occurred to me in recent times, which is why I
have more recently suggested that perhaps entirely new layers should be
provided instead, and with the pairing of these being of a fixed nature.

> How are issues like this handled in other packages?
>
> bye for now,
> Ian Wilson

My recollections of PCAD AD2.0 (an earlier DOS version) are that there were
a considerable number of pre-defined layers, along with pre-definined
pairing of many (but not all) of those, and PCB Library files provided by
the then-existing PCAD incorporated (primitive) objects using the same
layers and layer pairings. Users could create their own PCB Library files,
and with their own layers and layer pairings, but in the absense of
compelling reasons to the contrary, it made good sense to use the default
layers and layer pairings, and to avoid the use of yet other layers (or at
least within PCB *Library* files).

I can not comment on other CAD packages, other than to say that P-CAD 2001
does not permit users to pair user-defined layers to one another (and as
such, that is a loss of functionality compared with at least some previous
versions of PCAD). (There are five pairs of pre-defined layers, of which
eight are similar to the paired layers currently provided in Protel, with
the other pair being Assembly layers. The only other pre-defined layer, the
Board layer, is of an unpaired nature.)

I am not sufficiently familiar with current versions of Autocad to comment
on whether layers can be paired to one another in any way, and I don't
remember or know whether the earlier versions sup

Re: [PEDA] Software for Isolation Milling

2002-02-28 Thread Andrew Jenkins




Re: [PEDA] Paired Mechanical layers (ex Inversion ...)

2002-02-28 Thread Clive . Broome



Paired top and bottom silkscreens would be another idea worth considering.
specially when Protel does such a lousy job of handling designator and part
numbering. If you use the current system like designator = part  number = OA5,
and use the designator mirrored and set to bottom silkscreen and part number set
to top. Once you start to use pasted arrays and step/repeated sections, you get
rubbish like connector names going from OA5  ->  OA5_1c. Looks like c**p on a
board.







"Geoff Harland" <[EMAIL PROTECTED]> on 03/01/2002 09:21:50 AM

Please respond to "Protel EDA Forum" <[EMAIL PROTECTED]>

To:   "Protel EDA Forum" <[EMAIL PROTECTED]>
cc:(bcc: Clive Broome/sdc)

Subject:  Re: [PEDA] Paired Mechanical layers (ex Inversion ...)



> >>There are problems with doing X and Y flips - they don't swap layers and
> >>they leave components in upside-down. The L-Flip (layer flip) with
> >>selections is also fraught.
> >
> >What purpose does X & Y flip serve with respect to the components
themselves
>
> X and Y flip of components is supported to ensure there is a steady flow
of
> new users with very difficult to mount components.

Toggling the mirrored status of components (with the X and Y keys) is an
aspect of Protel going as far back as the DOS versions (of both the
schematic and PCB applications). (With hindsight, perhaps the X and Y keys
should always have "inverted" (PCB) components instead of reflecting these,
but in the days of the earliest DOS versions, through-hole components were
still the norm, and while it eventually became possible to "invert" such
components (along with SM components), reflecting (PCB) components following
the use of the X and Y keys had (instead) become the norm by then.)

There are pros and cons to being able to mirror components. It is not
totally out of the question that users will continue to be warned (in
Phoenix) whenever they are about to toggle the mirrored status of one or
more components, but another two alternative scenarios are that mirroring of
components will no longer be supported, or else (I hope) that Component
objects (like String objects) will incorporate a (Boolean) Mirrored field.

No longer supporting mirroring of components could have disagreeable
ramifications when it comes to reflecting selected objects; consider what
currently happens when the L key is pressed. (Not exactly the same, to be
sure, but still indicative of what could come about.) OTOH, the provision of
a Mirrored field for Component objects would permit users to determine, as
required, whether any components in the PCB are currently mirrored, and
users could be warned of the presence of any such components whenever they
initiated any generation of Gerber files, NC Drill files, etc. (They would
either have the option of aborting the generation of those files at that
time, or else continuing, not dissimilar to the present situation whenever
an attempt is made to reflect one or more components.)

> >apart from sorting out assembly layer issues for components on the bottom
> >layer ie. allowing you to move the mechanical bits to another layer and
> >mirroring them when necessary. Put another way, wouldn't it be better,
> >even now, to define a set of properly paired layers and (harking back to
> >my original point) to make sure that ALL future layers are paired.
>
> I really do not want forced pairing of all layers.  When doing some
> documentation I want to be able to refer to a specific layer and know that
> the details I am referring to are indeed on that layer.  Forced pairing
> would limit flexibility.

I fully agree. That is why I have always suggested that any pairing of Mech
layers should be user-configurable.

> *But*...there is a possible source of new confusion that will arise when a
> design has its layer pairs modified mid stream.  This could progressively
> cause items to become scattered around on multiple different layers -
there
> is something to be said for the safety of fixed layer pairings.  (Also, if
> layer pairings can be set in the PCBLib, what happens when a component is
> brought into a design with different pairings?).

Such considerations have also occurred to me in recent times, which is why I
have more recently suggested that perhaps entirely new layers should be
provided instead, and with the pairing of these being of a fixed nature.

> How are issues like this handled in other packages?
>
> bye for now,
> Ian Wilson

My recollections of PCAD AD2.0 (an earlier DOS version) are that there were
a considerable number of pre-defined layers, along with pre-definined
pairing of many (but not all) of those, and PCB Library files provided by
the then-existing PCAD incorporated (primitive) objects using the same
layers and layer pairings. Users could create their own PCB Library files,
and with their own layers and layer pairings, but in the absense of
compelling reasons to the contrary, it made good sense to use the default
layers and layer pairings, and to avoi

Re: [PEDA] Software for Isolation Milling

2002-02-28 Thread Andrew Jenkins




Re: [PEDA] Paired Mechanical layers (ex Inversion ...)

2002-02-28 Thread Geoff Harland

> Doesn't any unpaired layer (mechanical or otherwise) preclude the
> implementation of a true flip board function in the future? The main
> concerns about flip board have been what to do with layers especially
those
> that don't have a logical flipped layer, so doesn't adding more layers
which
> have no pairing add to the confusion. Perhaps this is just my limited use
of
> mechanical layers for assembly purposes ... what else are they used for
that
> wouldn't deserve pairing ?
>
> Douglas McDonald

I saw this posting at the time, intended to answer it, and am doing so now.

Objects which reside on unpaired layers would remain on the same layers
following an inversion (or partial inversion) of a PCB file, but like *all*
items undergoing inversion, they would effectively be mirrored compared with
previously (e.g. the mirrored state of all Strings toggle, and an arc whose
start and end angles were previously (say) 0 deg and 90 deg (respectively)
would change to 90 deg and 180 deg (respectively, and assuming a vertical
inverting axis)).

In some cases it would be preferable for some text items (on such layers) to
remain in an unmirrored state, and if those items had been amongst those
inverted, it would indeed then be necessary to follow the inverting
procedure with other procedures which restored such items (and perhaps other
objects on the same layers) into a desirable state. Exactly what following
procedures should be undertaken at the time would depend upon the
circumstances, but a typical scenario would involve deselecting everything,
selecting all items on *some* of the layers of an unpaired nature (but not,
for instance, selecting items on the KeepOut layer, or whichever Mechanical
layer has been assigned to define the PCB's border), mirroring all selected
items, moving those items to an appropriate location, then de-selecting
everything yet again.

Having to undergo such additional procedures could be regarded as a drawback
of using an inverting procedure. That said, inversion would still be a
useful capability to have provided, and an appropriate level of diligence
would minimise the associated drawbacks; one example could be to "cut"
various objects from a PCB file, then invert everything that is remaining,
then to "paste" the previously "cut" objects back into the PCB file again.
In other cases, when only *some* items in a PCB file are to be inverted (and
assuming that such partial inversion was actually possible), the user could
arrange to ensure that only those items which are desired to be inverted are
in a selected state when invoking the inverting procedure.

When I suggested (relatively recently) the provision of yet more layers, I
envisaged that these would *all* be of a paired nature, and with those
pairing relationships being of a *fixed* nature; I suggested that as an
*alternative* to my longer-standing suggestion of providing an
user-configurable pairing feature for the *existing* Mechanical layers,
because it occurred to me (over an extended period of time) that having what
in effect would be a variable type of pairing for those layers had the
potential to cause problems (which Ian Wilson has since commented on as
well).

I did also suggest as yet another (and *distinct*) alternative the
possibility of Protel emulating Autocad and PCAD in regard of users being
able to define their layers as required, along with being able to pair such
layers to one another. If that was implemented, and if users so wanted, they
could define new layers that were solely of a paired nature. However, I
still think that if such a feature was to be provided, then users should
also be able to define layers of an *unpaired* nature, because users would
typically want some items to *not* change layers following the inversion of
a PCB file, even though followup action would often still be required
following an inversion procedure (to restore such text items to an
unmirrored state, for instance).

Using a Mechanical layer to define the PCB's border is one example of a
layer that users would not want to pair. (While it is not unheard of to use
the KeepOut layer for that purpose, the true purpose of the KeepOut layer is
to restrain where copper tracks can be placed, so while the border of the
PCB falls in that category, there can also be *other* areas within a PCB
where, for whatever reason, tracks should not be placed; in such cases, the
KeepOut layer is not *just* defining the PCB's border. And in any event, the
KeepOut layer, as implemented, is another example of a layer of an
inherently unpaired nature.) Another example is using a Mechanical layer to
hold text to document various aspects of a PCB, and/or to contain a
'.Layer_Name' Special String, for the purpose of identifying different
Gerber files and/or printouts. (If an entire PCB file was inverted, the
contents of the KeepOut layer and the Mechanical layer used to define the
PCB's border would typically *not* be touched afterwards, but other unpaired
Mechani

Re: [PEDA] Paired Mechanical layers (ex Inversion ...)

2002-02-28 Thread Abd ul-Rahman Lomax

At 10:53 AM 3/1/2002 +1000, [EMAIL PROTECTED] wrote:

>Paired top and bottom silkscreens would be another idea worth considering.

Within the meaning of "paired" as we have been discussing the issue, top 
and bottom overlays (legend, silkscreen) are already paired.

>specially when Protel does such a lousy job of handling designator and part
>numbering. If you use the current system like designator = part  number = OA5,
>and use the designator mirrored and set to bottom silkscreen and part 
>number set
>to top. Once you start to use pasted arrays and step/repeated sections, 
>you get
>rubbish like connector names going from OA5  ->  OA5_1c. Looks like c**p on a
>board.

Near as I can tell, this has nothing to do with pairing. But I'm not 
exactly sure what Mr. Broome is talking about.

The way that Protel handles repeated section designators could be improved 
(I'd like a dialog box or configuration file or something other way to 
control the process), to be sure, but that is another topic.

[EMAIL PROTECTED]
Abdulrahman Lomax
Easthampton, Massachusetts USA

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Re: [PEDA] Paired Mechanical layers (ex Inversion ...)

2002-02-28 Thread Geoff Harland

> Paired top and bottom silkscreens would be another idea worth
considering.
> specially when Protel does such a lousy job of handling designator and
part
> numbering. If you use the current system like designator = part  number =
OA5,
> and use the designator mirrored and set to bottom silkscreen and part
number set
> to top. Once you start to use pasted arrays and step/repeated sections,
you get
> rubbish like connector names going from OA5  ->  OA5_1c. Looks like c**p
on a
> board.
>
> Clive Broome

If you want to paste components while retaining the *original* designators,
invoke the 'Edit/Paste Special...' command, and in the resulting 'Paste
Special' dialog box, check the 'Duplicate designator' checkbox. (You will
probably have to uncheck the 'Remove Duplicates' checkbox, within the
'Options' Tab of the 'Preferences' dialog box, before doing that though.)

(Having duplicated components like that is best done only in panellised
PCBs, and only after you are fully confident that the initial PCB fully
"passes muster". And when I panellise PCBs, I always retain separate files
for the original PCB and for the panellised form of that.)

If either additional paired layers or optional pairing of the existing
Mechanical layers were to be provided though, I could still imagine some
users wanting to use such layers as supplementary Silkscreen layers in some
circumstances (say for Acrobat file/paper documentation of components over
and above what was silkscreened onto the real PCBs themselves). And others
have already commented on the merits of having a pair of Assembly layers...

Regards,
Geoff Harland.
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Re: [PEDA] Paired Mechanical layers (ex Inversion ...)

2002-02-28 Thread Clive . Broome



Sure but doing this removes components unique identifier and the ability to do
DRC against the schematic. For particular types of boards basically large
numbers of repeating sections ( 'widebus' logic test boards) using connectors
mounted from the bottom side and a number of sites, its basically a mix of
Protel generated arrays (with ' _1'  type of renumbering from PCB) and
copy/pasted sections with user defined renumbering (added suffix)  Then this
gets tied back in with schematic designators and becomes basically a mess.

PCB builds and renumbers arrays by adding a suffix ie_1, _2, _3

SCH builds and renumbers arrays by incrementing the final number ie R1 -> R2

Copy and pasting renumbered arrays in PCB gives you bizarre results like R1_1_1
which is hard to tie back to the schematic to maintain DRC ability.

It really doesnt seem like a hard thing to get right.







"Geoff Harland" <[EMAIL PROTECTED]> on 03/01/2002 11:11:30 AM

Please respond to "Protel EDA Forum" <[EMAIL PROTECTED]>

To:   "Protel EDA Forum" <[EMAIL PROTECTED]>
cc:(bcc: Clive Broome/sdc)

Subject:  Re: [PEDA] Paired Mechanical layers (ex Inversion ...)



> Paired top and bottom silkscreens would be another idea worth
considering.
> specially when Protel does such a lousy job of handling designator and
part
> numbering. If you use the current system like designator = part  number =
OA5,
> and use the designator mirrored and set to bottom silkscreen and part
number set
> to top. Once you start to use pasted arrays and step/repeated sections,
you get
> rubbish like connector names going from OA5  ->  OA5_1c. Looks like c**p
on a
> board.
>
> Clive Broome

If you want to paste components while retaining the *original* designators,
invoke the 'Edit/Paste Special...' command, and in the resulting 'Paste
Special' dialog box, check the 'Duplicate designator' checkbox. (You will
probably have to uncheck the 'Remove Duplicates' checkbox, within the
'Options' Tab of the 'Preferences' dialog box, before doing that though.)

(Having duplicated components like that is best done only in panellised
PCBs, and only after you are fully confident that the initial PCB fully
"passes muster". And when I panellise PCBs, I always retain separate files
for the original PCB and for the panellised form of that.)

If either additional paired layers or optional pairing of the existing
Mechanical layers were to be provided though, I could still imagine some
users wanting to use such layers as supplementary Silkscreen layers in some
circumstances (say for Acrobat file/paper documentation of components over
and above what was silkscreened onto the real PCBs themselves). And others
have already commented on the merits of having a pair of Assembly layers...

Regards,
Geoff Harland.
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Re: [PEDA] Flipped on panel Paired Mechanical layers (ex Inversio n ...)

2002-02-28 Thread Mike Reagan

Y' all havent heard my response yet because e Im trying to visualize if
using one paste screen for alternating top and bottom panels will work.  (
it was the best expanation I heard yet why anyone would want to mirror a
design) It sounds good but Im still trying to visualize it in my limited
scope. I need to cut some cardboard  up and try it.   I dont want anyone
getting any bright ideas we are just now straighting out backward designs
from the past.Im chomping on it still.  And yes I have a backward board
sitting my desk

Mike Reagan


- Original Message -
From: Brad Velander <[EMAIL PROTECTED]>
To: 'Protel EDA Forum' <[EMAIL PROTECTED]>
Sent: Thursday, February 28, 2002 3:04 PM
Subject: Re: [PEDA] Flipped on panel Paired Mechanical layers (ex Inversio n
...)


> Dennis,
> this answer is colored by the fact that we don't actually do
> assembly here.
>
> First we typically use thin laminates 0.008" - 0.0031" with a
> majority in the 0.020 - 0.025" range. Our tabs are just solid tabs, no
> drills to allow easier breaks. Our tab width is typically about 0.200"
> material in the tab at the centers. Because we are using such thin
laminates
> they are usually just cut off with an exacto knife.
>
> Probably not a lot of help to you, but that is our use.
>
> Sincerely,
> Brad Velander.
>
> Lead PCB Designer
> Norsat International Inc.
> Microwave Products
> Tel   (604) 292-9089 (direct line)
> Fax  (604) 292-9010
> email: [EMAIL PROTECTED]
> http://www.norsat.com
>
> See us at Booth 323 at Satellite 2002 in Washington, DC March 6-8.
>
>
>
> -Original Message-
> From: Dennis Saputelli [mailto:[EMAIL PROTECTED]]
> Sent: Thursday, February 28, 2002 9:12 AM
> To: Protel EDA Forum
> Subject: Re: [PEDA] Flipped on panel Paired Mechanical layers (ex
> Inversio n ...)
>
>
> just curious, what means of separating the finished panels do you use?
> tabs with little mouse bit holes?
> .1" route slots between?
> how do you clean up the rough parts?
>
> Dennis Saputelli
>

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Re: [PEDA] Flipped on panel Paired Mechanical layers (ex Inversio n ...)

2002-02-28 Thread Thomas

I used some of my old business cards as a visual aid. It does work

> -Original Message-
> From: Mike Reagan [mailto:[EMAIL PROTECTED]]
> Sent: Friday, 1 March 2002 1:52 PM
> To: Protel EDA Forum
> Subject: Re: [PEDA] Flipped on panel Paired Mechanical layers (ex
> Inversio n ...)
> 
> 
> Y' all havent heard my response yet because e Im trying to 
> visualize if
> using one paste screen for alternating top and bottom panels 
> will work.  (
> it was the best expanation I heard yet why anyone would want 
> to mirror a
> design) It sounds good but Im still trying to visualize 
> it in my limited
> scope. I need to cut some cardboard  up and try it.   I 
> dont want anyone
> getting any bright ideas we are just now straighting out 
> backward designs
> from the past.Im chomping on it still.  And yes I have a 
> backward board
> sitting my desk
> 
> Mike Reagan

> 

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Re: [PEDA] Flipped on panel Paired Mechanical layers (ex Inversio n ...)

2002-02-28 Thread Geoff Harland

> Y' all havent heard my response yet because e Im trying to visualize if
> using one paste screen for alternating top and bottom panels will work.  (
> it was the best expanation I heard yet why anyone would want to mirror a
> design) It sounds good but Im still trying to visualize it in my
limited
> scope. I need to cut some cardboard  up and try it.   I dont want
anyone
> getting any bright ideas we are just now straighting out backward designs
> from the past.Im chomping on it still.  And yes I have a backward
board
> sitting my desk
>
> Mike Reagan

Tsk Tsk. :-)

In a "print and turn" type of panel, every second unit PCB in the array is
INVERTED, not MIRRORED. Components can't be inserted on a mirrored PCB!!!

(Inverting a PCB is a different procedure to mirroring it. Components can be
placed on an inverted PCB, but *not* on a mirrored PCB.)

Regards,
Geoff Harland.
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Re: [PEDA] Paired Mechanical layers (ex Inversion ...)

2002-02-28 Thread Geoff Harland

> Sure but doing this removes components unique identifier and the ability
to do
> DRC against the schematic. For particular types of boards basically large
> numbers of repeating sections ( 'widebus' logic test boards) using
connectors
> mounted from the bottom side and a number of sites, its basically a mix of
> Protel generated arrays (with ' _1'  type of renumbering from PCB) and
> copy/pasted sections with user defined renumbering (added suffix)  Then
this
> gets tied back in with schematic designators and becomes basically a mess.
>
> PCB builds and renumbers arrays by adding a suffix ie_1, _2, _3
>
> SCH builds and renumbers arrays by incrementing the final number ie R1 ->
R2
>
> Copy and pasting renumbered arrays in PCB gives you bizarre results like
R1_1_1
> which is hard to tie back to the schematic to maintain DRC ability.
>
> It really doesnt seem like a hard thing to get right.
>
> Clive Broome

OK, I previously misunderstood what you were trying to achieve (but it does
represent a change in topic from inverting PCBs or providing the ability to
have more layers of a paired nature than the existing four pairs).

I have an idea that someone has released an addon server which supports
pasting components with designators to match user-designated specifications.
But apart from that, it would be nice if Altium could improve upon what is
currently provided on a "built in nature" in this regard. (A Paste Array
command that not only satisfactorily designated ("free") *pads* for two
dimensional arrays, but also designated pasted components according to the
'Text Increment' setting (or still better, an additional and newly provided
'Designator Increment' setting) within the 'Setup Paste Array' dialog box,
would be a start.)

Regards,
Geoff Harland.
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[PEDA] Bug report?

2002-02-28 Thread Thomas

Ian, not sure if you have this one (or if you conceder it a bug), as I
haven't had time to look through the database yet.
It's very annoying as I work in metric most of the time.

Summary:

99SESP6 PCB

While manual routing in 'line' mode, the line constraints dialogue (TAB to
open), line width field always shows imperial units.


Workaround:

Include metric units string in the field entry box if metric units are
required, i.e. 0.3mm


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Re: [PEDA] Flipped on panel Paired Mechanical layers (ex Inversio n ...)

2002-02-28 Thread Ian Wilson

On 09:52 PM 28/02/2002 -0500, Mike Reagan said:
>Y' all havent heard my response yet because e Im trying to visualize if
>using one paste screen for alternating top and bottom panels will work.  (
>it was the best expanation I heard yet why anyone would want to mirror a
>design) It sounds good but Im still trying to visualize it in my limited
>scope.


It does not stop at the paste mask - also consider the 
manufacturing  process (as mentioned by another) where both sides of the 
board can be run through the P&P machine with the same setup.  So either, 
only one line is occupied, and the boards are just looped through, or two 
lines are used but with the same set-up.

The bottom line is - some of us have legit reasons for desiring reliable 
inversion of designs or sections of designs (Invert-Selection) which obeyed 
all the layer pairings, kept everything in the correct relative locations 
and did not leave components mirrored.

Ian Wilson


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[PEDA] Difference between DRC-report and PCB Information

2002-02-28 Thread Juha Pajunen

Hi,

Protel99SE + SP6 and W2K. DRC-report says that I have 12 violations
in my design and Reports->Board Information says that I have 15 DRC
Violations,
how that can be possible? I have manually checked all violations that have
marked
as green and there is 12 of them.(Short Circuit between Area Fill and Pad)
Can anyone tell me should I worry about this and why there is difference
between
those two reports?

*investigation*

"I figured out" how Reports->Board Information counts it's value, it counts
all
green "primitives" together, sum = 15, when I count those green "areas" I
can
get only 14??? Am I missing something or what...?

Sincerely,
Juha Pajunen, Hw Engineer
Bitboys Oy
E-mail: [EMAIL PROTECTED]

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