CVS commit: src/sys/arch/arm/cortex

2022-11-19 Thread Nick Hudson
Module Name:src
Committed By:   skrll
Date:   Sat Nov 19 12:12:26 UTC 2022

Modified Files:
src/sys/arch/arm/cortex: gtmr_var.h

Log Message:
G/C gtmr_init function declaration


To generate a diff of this commit:
cvs rdiff -u -r1.15 -r1.16 src/sys/arch/arm/cortex/gtmr_var.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/cortex/gtmr_var.h
diff -u src/sys/arch/arm/cortex/gtmr_var.h:1.15 src/sys/arch/arm/cortex/gtmr_var.h:1.16
--- src/sys/arch/arm/cortex/gtmr_var.h:1.15	Fri Nov 12 21:59:04 2021
+++ src/sys/arch/arm/cortex/gtmr_var.h	Sat Nov 19 12:12:25 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: gtmr_var.h,v 1.15 2021/11/12 21:59:04 jmcneill Exp $ */
+/* $NetBSD: gtmr_var.h,v 1.16 2022/11/19 12:12:25 skrll Exp $ */
 /*-
  * Copyright (c) 2013 The NetBSD Foundation, Inc.
  * All rights reserved.
@@ -51,7 +51,6 @@ struct gtmr_softc {
 #ifdef _KERNEL
 #include "opt_arm_timer.h"
 struct cpu_info;
-void	gtmr_init(device_t);
 int	gtmr_intr(void *);
 void	gtmr_init_cpu_clock(struct cpu_info *);
 void	gtmr_delay(unsigned int n);



CVS commit: src/sys/arch/arm/cortex

2022-11-19 Thread Nick Hudson
Module Name:src
Committed By:   skrll
Date:   Sat Nov 19 12:12:26 UTC 2022

Modified Files:
src/sys/arch/arm/cortex: gtmr_var.h

Log Message:
G/C gtmr_init function declaration


To generate a diff of this commit:
cvs rdiff -u -r1.15 -r1.16 src/sys/arch/arm/cortex/gtmr_var.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/arm/broadcom

2022-11-19 Thread YAMAMOTO Takashi
Module Name:src
Committed By:   yamt
Date:   Sat Nov 19 09:29:26 UTC 2022

Modified Files:
src/sys/arch/arm/broadcom: bcm2835_intr.c

Log Message:
bcm2835_intr.c: fix !MULTIPROCESSOR

Tested on Raspberry PI 3 model A+.


To generate a diff of this commit:
cvs rdiff -u -r1.43 -r1.44 src/sys/arch/arm/broadcom/bcm2835_intr.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/broadcom/bcm2835_intr.c
diff -u src/sys/arch/arm/broadcom/bcm2835_intr.c:1.43 src/sys/arch/arm/broadcom/bcm2835_intr.c:1.44
--- src/sys/arch/arm/broadcom/bcm2835_intr.c:1.43	Sat Jun 25 12:41:55 2022
+++ src/sys/arch/arm/broadcom/bcm2835_intr.c	Sat Nov 19 09:29:26 2022
@@ -1,4 +1,4 @@
-/*	$NetBSD: bcm2835_intr.c,v 1.43 2022/06/25 12:41:55 jmcneill Exp $	*/
+/*	$NetBSD: bcm2835_intr.c,v 1.44 2022/11/19 09:29:26 yamt Exp $	*/
 
 /*-
  * Copyright (c) 2012, 2015, 2019 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: bcm2835_intr.c,v 1.43 2022/06/25 12:41:55 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: bcm2835_intr.c,v 1.44 2022/11/19 09:29:26 yamt Exp $");
 
 #define _INTR_PRIVATE
 
@@ -99,7 +99,12 @@ static int  bcm2835_icu_match(device_t, 
 static void bcm2835_icu_attach(device_t, device_t, void *);
 
 static int bcm2835_int_base;
-static int bcm2836mp_int_base[BCM2836_NCPUS];
+#if defined(MULTIPROCESSOR)
+#define _BCM2836_NCPUS BCM2836_NCPUS
+#else
+#define _BCM2836_NCPUS 1
+#endif
+static int bcm2836mp_int_base[_BCM2836_NCPUS];
 
 #define	BCM2835_INT_BASE		bcm2835_int_base
 #define	BCM2836_INT_BASECPUN(n)		bcm2836mp_int_base[(n)]
@@ -180,8 +185,8 @@ static struct pic_ops bcm2836mp_picops =
 #endif
 };
 
-static struct pic_softc bcm2836mp_pic[BCM2836_NCPUS] = {
-	[0 ... BCM2836_NCPUS - 1] = {
+static struct pic_softc bcm2836mp_pic[_BCM2836_NCPUS] = {
+	[0 ... _BCM2836_NCPUS - 1] = {
 		.pic_ops = &bcm2836mp_picops,
 		.pic_maxsources = BCM2836_NIRQPERCPU,
 		.pic_name = "bcm2836 pic",
@@ -208,7 +213,7 @@ struct bcm2836mp_interrupt {
 	int bi_flags;
 	int (*bi_func)(void *);
 	void *bi_arg;
-	void *bi_ihs[BCM2836_NCPUS];
+	void *bi_ihs[_BCM2836_NCPUS];
 };
 
 static TAILQ_HEAD(, bcm2836mp_interrupt) bcm2836mp_interrupts =
@@ -360,7 +365,6 @@ bcm2835_icu_attach(device_t parent, devi
 
 		ifuncs = &bcm2836mpicu_fdt_funcs;
 
-#if defined(MULTIPROCESSOR)
 		/*
 		 * Register all PICs here in order to avoid pic_add() from
 		 * cpu_hatch().  This is the only approved method.
@@ -371,8 +375,8 @@ bcm2835_icu_attach(device_t parent, devi
 			const cpuid_t cpuid = ci->ci_core_id;
 			struct pic_softc * const pic = &bcm2836mp_pic[cpuid];
 
-			KASSERT(cpuid < BCM2836_NCPUS);
-
+			KASSERT(cpuid < _BCM2836_NCPUS);
+#if defined(MULTIPROCESSOR)
 			pic->pic_cpus = ci->ci_kcpuset;
 			/*
 			 * Append "#n" to avoid duplication of .pic_name[]
@@ -381,12 +385,13 @@ bcm2835_icu_attach(device_t parent, devi
 			char suffix[sizeof("#0")];
 			snprintf(suffix, sizeof(suffix), "#%lu", cpuid);
 			strlcat(pic->pic_name, suffix, sizeof(pic->pic_name));
-
+#endif
 			bcm2836mp_int_base[cpuid] =
 			pic_add(pic, PIC_IRQBASE_ALLOC);
+#if defined(MULTIPROCESSOR)
 			bcm2836mp_intr_init(ci);
-		}
 #endif
+		}
 	} else {
 		if (bcml1icu_sc == NULL)
 			arm_fdt_irq_set_handler(bcm2835_irq_handler);
@@ -414,7 +419,7 @@ bcm2835_irq_handler(void *frame)
 	const uint32_t oldipl_mask = __BIT(oldipl);
 	int ipl_mask = 0;
 
-	KASSERT(cpuid < BCM2836_NCPUS);
+	KASSERT(cpuid < _BCM2836_NCPUS);
 
 	ci->ci_data.cpu_nintr++;
 
@@ -692,7 +697,7 @@ bcm2836mp_pic_unblock_irqs(struct pic_so
 	const bus_space_handle_t ioh = bcml1icu_sc->sc_ioh;
 	const cpuid_t cpuid = pic - &bcm2836mp_pic[0];
 
-	KASSERT(cpuid < BCM2836_NCPUS);
+	KASSERT(cpuid < _BCM2836_NCPUS);
 	KASSERT(irqbase == 0);
 
 	if (irq_mask & BCM2836MP_TIMER_IRQS) {
@@ -739,7 +744,7 @@ bcm2836mp_pic_block_irqs(struct pic_soft
 	const bus_space_handle_t ioh = bcml1icu_sc->sc_ioh;
 	const cpuid_t cpuid = pic - &bcm2836mp_pic[0];
 
-	KASSERT(cpuid < BCM2836_NCPUS);
+	KASSERT(cpuid < _BCM2836_NCPUS);
 	KASSERT(irqbase == 0);
 
 	if (irq_mask & BCM2836MP_TIMER_IRQS) {
@@ -777,7 +782,7 @@ bcm2836mp_pic_find_pending_irqs(struct p
 	uint32_t lpending;
 	int ipl = 0;
 
-	KASSERT(cpuid < BCM2836_NCPUS);
+	KASSERT(cpuid < _BCM2836_NCPUS);
 	KASSERT(pic == &bcm2836mp_pic[cpuid]);
 
 	bcm2835_barrier();
@@ -816,7 +821,7 @@ static void bcm2836mp_cpu_init(struct pi
 {
 	const cpuid_t cpuid = ci->ci_core_id;
 
-	KASSERT(cpuid < BCM2836_NCPUS);
+	KASSERT(cpuid < _BCM2836_NCPUS);
 
 	/* Enable IRQ and not FIQ */
 	bus_space_write_4(bcml1icu_sc->sc_iot, bcml1icu_sc->sc_ioh,
@@ -831,7 +836,7 @@ bcm2836mp_send_ipi(struct pic_softc *pic
 	KASSERT(pic->pic_cpus != NULL);
 
 	const cpuid_t cpuid = pic - &bcm2836mp_pic[0];
-	KASSERT(cpuid < BCM2836_NCPUS);
+	KASSERT(cpuid < _BCM2836_NCPUS);
 
 	bus_space_write_4(bcml1icu_sc->sc_iot, bcml1icu_sc->sc_ioh,
 	BCM2836_LOCAL_M

CVS commit: src/sys/arch/arm/broadcom

2022-11-19 Thread YAMAMOTO Takashi
Module Name:src
Committed By:   yamt
Date:   Sat Nov 19 09:29:26 UTC 2022

Modified Files:
src/sys/arch/arm/broadcom: bcm2835_intr.c

Log Message:
bcm2835_intr.c: fix !MULTIPROCESSOR

Tested on Raspberry PI 3 model A+.


To generate a diff of this commit:
cvs rdiff -u -r1.43 -r1.44 src/sys/arch/arm/broadcom/bcm2835_intr.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/arm/rockchip

2022-11-19 Thread YAMAMOTO Takashi
Module Name:src
Committed By:   yamt
Date:   Sat Nov 19 09:17:57 UTC 2022

Modified Files:
src/sys/arch/arm/rockchip: files.rockchip

Log Message:
arm/rockchip: fix build w/o MULTIPROCESSOR


To generate a diff of this commit:
cvs rdiff -u -r1.28 -r1.29 src/sys/arch/arm/rockchip/files.rockchip

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/rockchip/files.rockchip
diff -u src/sys/arch/arm/rockchip/files.rockchip:1.28 src/sys/arch/arm/rockchip/files.rockchip:1.29
--- src/sys/arch/arm/rockchip/files.rockchip:1.28	Tue Aug 23 05:40:46 2022
+++ src/sys/arch/arm/rockchip/files.rockchip	Sat Nov 19 09:17:57 2022
@@ -1,4 +1,4 @@
-#	$NetBSD: files.rockchip,v 1.28 2022/08/23 05:40:46 ryo Exp $
+#	$NetBSD: files.rockchip,v 1.29 2022/11/19 09:17:57 yamt Exp $
 #
 # Configuration info for Rockchip family SoCs
 #
@@ -6,7 +6,7 @@
 
 file	arch/arm/rockchip/rk_platform.c		soc_rockchip
 
-file	arch/arm/rockchip/rk3066_smp.c		soc_rk3288
+file	arch/arm/rockchip/rk3066_smp.c		soc_rk3288 & multiprocessor
 
 # Clock and reset unit (CRU)
 device	rkcru: rk_cru



CVS commit: src/sys/arch/arm/rockchip

2022-11-19 Thread YAMAMOTO Takashi
Module Name:src
Committed By:   yamt
Date:   Sat Nov 19 09:17:57 UTC 2022

Modified Files:
src/sys/arch/arm/rockchip: files.rockchip

Log Message:
arm/rockchip: fix build w/o MULTIPROCESSOR


To generate a diff of this commit:
cvs rdiff -u -r1.28 -r1.29 src/sys/arch/arm/rockchip/files.rockchip

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/arm/sunxi

2022-11-19 Thread YAMAMOTO Takashi
Module Name:src
Committed By:   yamt
Date:   Sat Nov 19 09:05:42 UTC 2022

Modified Files:
src/sys/arch/arm/sunxi: sunxi_can.c

Log Message:
sunxi_can.c: fix build with MBUFTRACE


To generate a diff of this commit:
cvs rdiff -u -r1.12 -r1.13 src/sys/arch/arm/sunxi/sunxi_can.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/sunxi/sunxi_can.c
diff -u src/sys/arch/arm/sunxi/sunxi_can.c:1.12 src/sys/arch/arm/sunxi/sunxi_can.c:1.13
--- src/sys/arch/arm/sunxi/sunxi_can.c:1.12	Tue Sep 27 06:14:13 2022
+++ src/sys/arch/arm/sunxi/sunxi_can.c	Sat Nov 19 09:05:42 2022
@@ -1,4 +1,4 @@
-/*	$NetBSD: sunxi_can.c,v 1.12 2022/09/27 06:14:13 skrll Exp $	*/
+/*	$NetBSD: sunxi_can.c,v 1.13 2022/11/19 09:05:42 yamt Exp $	*/
 
 /*-
  * Copyright (c) 2017,2018 The NetBSD Foundation, Inc.
@@ -36,13 +36,14 @@
 
 #include 
 
-__KERNEL_RCSID(1, "$NetBSD: sunxi_can.c,v 1.12 2022/09/27 06:14:13 skrll Exp $");
+__KERNEL_RCSID(1, "$NetBSD: sunxi_can.c,v 1.13 2022/11/19 09:05:42 yamt Exp $");
 
 #include 
 #include 
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 



CVS commit: src/sys/arch/arm/sunxi

2022-11-19 Thread YAMAMOTO Takashi
Module Name:src
Committed By:   yamt
Date:   Sat Nov 19 09:05:42 UTC 2022

Modified Files:
src/sys/arch/arm/sunxi: sunxi_can.c

Log Message:
sunxi_can.c: fix build with MBUFTRACE


To generate a diff of this commit:
cvs rdiff -u -r1.12 -r1.13 src/sys/arch/arm/sunxi/sunxi_can.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/arm/acpi

2022-11-16 Thread Nick Hudson
Module Name:src
Committed By:   skrll
Date:   Wed Nov 16 11:54:26 UTC 2022

Modified Files:
src/sys/arch/arm/acpi: acpi_platform.c

Log Message:
typo in comment


To generate a diff of this commit:
cvs rdiff -u -r1.33 -r1.34 src/sys/arch/arm/acpi/acpi_platform.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/arm/acpi

2022-11-16 Thread Nick Hudson
Module Name:src
Committed By:   skrll
Date:   Wed Nov 16 11:54:26 UTC 2022

Modified Files:
src/sys/arch/arm/acpi: acpi_platform.c

Log Message:
typo in comment


To generate a diff of this commit:
cvs rdiff -u -r1.33 -r1.34 src/sys/arch/arm/acpi/acpi_platform.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/acpi/acpi_platform.c
diff -u src/sys/arch/arm/acpi/acpi_platform.c:1.33 src/sys/arch/arm/acpi/acpi_platform.c:1.34
--- src/sys/arch/arm/acpi/acpi_platform.c:1.33	Tue Sep  6 11:55:51 2022
+++ src/sys/arch/arm/acpi/acpi_platform.c	Wed Nov 16 11:54:26 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: acpi_platform.c,v 1.33 2022/09/06 11:55:51 skrll Exp $ */
+/* $NetBSD: acpi_platform.c,v 1.34 2022/11/16 11:54:26 skrll Exp $ */
 
 /*-
  * Copyright (c) 2018 The NetBSD Foundation, Inc.
@@ -35,7 +35,7 @@
 #include "opt_multiprocessor.h"
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: acpi_platform.c,v 1.33 2022/09/06 11:55:51 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: acpi_platform.c,v 1.34 2022/11/16 11:54:26 skrll Exp $");
 
 #include 
 #include 
@@ -250,7 +250,7 @@ acpi_platform_attach_uart(ACPI_TABLE_SPC
 	/*
 	 * UEFI firmware may leave the console in an undesireable state (wrong
 	 * foreground/background colour, etc). Reset the terminal and clear
-	 * text from the cursor to the end of the screne.
+	 * text from the cursor to the end of the screen.
 	 */
 printf_flags(TOCONS|NOTSTAMP, "\033[0m");
 printf_flags(TOCONS|NOTSTAMP, "\033[0J");



CVS commit: src/sys/arch/arm/xilinx

2022-11-11 Thread Jared D. McNeill
Module Name:src
Committed By:   jmcneill
Date:   Fri Nov 11 20:29:47 UTC 2022

Modified Files:
src/sys/arch/arm/xilinx: zynq7000_clkc.c

Log Message:
Support PCAL clock control


To generate a diff of this commit:
cvs rdiff -u -r1.4 -r1.5 src/sys/arch/arm/xilinx/zynq7000_clkc.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/xilinx/zynq7000_clkc.c
diff -u src/sys/arch/arm/xilinx/zynq7000_clkc.c:1.4 src/sys/arch/arm/xilinx/zynq7000_clkc.c:1.5
--- src/sys/arch/arm/xilinx/zynq7000_clkc.c:1.4	Sat Nov  5 17:28:55 2022
+++ src/sys/arch/arm/xilinx/zynq7000_clkc.c	Fri Nov 11 20:29:47 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: zynq7000_clkc.c,v 1.4 2022/11/05 17:28:55 jmcneill Exp $ */
+/* $NetBSD: zynq7000_clkc.c,v 1.5 2022/11/11 20:29:47 jmcneill Exp $ */
 
 /*-
  * Copyright (c) 2022 Jared McNeill 
@@ -28,7 +28,7 @@
 
 #include 
 
-__KERNEL_RCSID(0, "$NetBSD: zynq7000_clkc.c,v 1.4 2022/11/05 17:28:55 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: zynq7000_clkc.c,v 1.5 2022/11/11 20:29:47 jmcneill Exp $");
 
 #include 
 #include 
@@ -62,6 +62,7 @@ __KERNEL_RCSID(0, "$NetBSD: zynq7000_clk
 #define	 SDI0_CPU_1XCLKACT	__BIT(10)
 #define	SDIO_CLK_CTRL	0x150
 #define	UART_CLK_CTRL	0x154
+#define	PCAP_CLK_CTRL	0x168
 #define	 CLK_CTRL_DIVISOR	__BITS(13,8)
 #define	 CLK_CTRL_SRCSEL	__BITS(5,4)
 #define	 CLK_CTRL_CLKACT1	__BIT(1)
@@ -247,6 +248,8 @@ zynq7000_clkc_clk_get_rate(void *priv, s
 	} else if (clk == &sc->sc_clk[clkid_uart0] ||
 		   clk == &sc->sc_clk[clkid_uart1]) {
 		return zynq7000_clkc_get_rate_iop(sc, UART_CLK_CTRL);
+	} else if (clk == &sc->sc_clk[clkid_pcap]) {
+		return zynq7000_clkc_get_rate_iop(sc, PCAP_CLK_CTRL);
 	} else if (clk == &sc->sc_clk[clkid_uart0_aper] ||
 		   clk == &sc->sc_clk[clkid_uart1_aper] ||
 		   clk == &sc->sc_clk[clkid_i2c0_aper] ||
@@ -290,6 +293,9 @@ zynq7000_clkc_clk_enable(void *priv, str
 	} else if (clk == &sc->sc_clk[clkid_uart1]) {
 		reg = UART_CLK_CTRL;
 		mask = CLK_CTRL_CLKACT1;
+	} else if (clk == &sc->sc_clk[clkid_pcap]) {
+		reg = PCAP_CLK_CTRL;
+		mask = CLK_CTRL_CLKACT0;
 	} else if (clk == &sc->sc_clk[clkid_sdio0_aper]) {
 		reg = APER_CLK_CTRL;
 		mask = SDI0_CPU_1XCLKACT;



CVS commit: src/sys/arch/arm/xilinx

2022-11-11 Thread Jared D. McNeill
Module Name:src
Committed By:   jmcneill
Date:   Fri Nov 11 20:29:47 UTC 2022

Modified Files:
src/sys/arch/arm/xilinx: zynq7000_clkc.c

Log Message:
Support PCAL clock control


To generate a diff of this commit:
cvs rdiff -u -r1.4 -r1.5 src/sys/arch/arm/xilinx/zynq7000_clkc.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/arm/fdt

2022-11-09 Thread Ryo Shimizu
Module Name:src
Committed By:   ryo
Date:   Wed Nov  9 19:03:38 UTC 2022

Modified Files:
src/sys/arch/arm/fdt: pmu_fdt.c

Log Message:
fdt/pmu was not working. do return only if there is an error.


To generate a diff of this commit:
cvs rdiff -u -r1.10 -r1.11 src/sys/arch/arm/fdt/pmu_fdt.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/fdt/pmu_fdt.c
diff -u src/sys/arch/arm/fdt/pmu_fdt.c:1.10 src/sys/arch/arm/fdt/pmu_fdt.c:1.11
--- src/sys/arch/arm/fdt/pmu_fdt.c:1.10	Thu Nov 25 09:36:20 2021
+++ src/sys/arch/arm/fdt/pmu_fdt.c	Wed Nov  9 19:03:38 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: pmu_fdt.c,v 1.10 2021/11/25 09:36:20 skrll Exp $ */
+/* $NetBSD: pmu_fdt.c,v 1.11 2022/11/09 19:03:38 ryo Exp $ */
 
 /*-
  * Copyright (c) 2018 Jared McNeill 
@@ -27,7 +27,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: pmu_fdt.c,v 1.10 2021/11/25 09:36:20 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pmu_fdt.c,v 1.11 2022/11/09 19:03:38 ryo Exp $");
 
 #include 
 #include 
@@ -137,8 +137,8 @@ pmu_fdt_init(device_t self)
 		if (error) {
 			aprint_error_dev(self,
 			"couldn't initialise PMU event counter");
+			return;
 		}
-		return;
 	}
 
 	ih = kmem_zalloc(sizeof(void *) * ncpu, KM_SLEEP);



CVS commit: src/sys/arch/arm/fdt

2022-11-09 Thread Ryo Shimizu
Module Name:src
Committed By:   ryo
Date:   Wed Nov  9 19:03:38 UTC 2022

Modified Files:
src/sys/arch/arm/fdt: pmu_fdt.c

Log Message:
fdt/pmu was not working. do return only if there is an error.


To generate a diff of this commit:
cvs rdiff -u -r1.10 -r1.11 src/sys/arch/arm/fdt/pmu_fdt.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/arm/cortex

2022-11-05 Thread Jared D. McNeill
Module Name:src
Committed By:   jmcneill
Date:   Sat Nov  5 17:30:20 UTC 2022

Modified Files:
src/sys/arch/arm/cortex: a9ptmr.c a9ptmr_var.h

Log Message:
Handle speed change events


To generate a diff of this commit:
cvs rdiff -u -r1.2 -r1.3 src/sys/arch/arm/cortex/a9ptmr.c
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/arm/cortex/a9ptmr_var.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/cortex/a9ptmr.c
diff -u src/sys/arch/arm/cortex/a9ptmr.c:1.2 src/sys/arch/arm/cortex/a9ptmr.c:1.3
--- src/sys/arch/arm/cortex/a9ptmr.c:1.2	Wed Aug 14 09:20:00 2019
+++ src/sys/arch/arm/cortex/a9ptmr.c	Sat Nov  5 17:30:20 2022
@@ -1,4 +1,4 @@
-/*	$NetBSD: a9ptmr.c,v 1.2 2019/08/14 09:20:00 skrll Exp $	*/
+/*	$NetBSD: a9ptmr.c,v 1.3 2022/11/05 17:30:20 jmcneill Exp $	*/
 
 /*-
  * Copyright (c) 2019 The NetBSD Foundation, Inc.
@@ -30,13 +30,14 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: a9ptmr.c,v 1.2 2019/08/14 09:20:00 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: a9ptmr.c,v 1.3 2022/11/05 17:30:20 jmcneill Exp $");
 
 #include 
 #include 
 #include 
 #include 
 #include 
+#include 
 
 #include 
 
@@ -265,3 +266,25 @@ a9ptmr_intr(void *arg)
 
 	return 1;
 }
+
+static void
+a9ptmr_update_freq_cb(void *arg1, void *arg2)
+{
+	a9ptmr_init_cpu_clock(curcpu());
+}
+
+void
+a9ptmr_update_freq(uint32_t freq)
+{
+	struct a9ptmr_softc * const sc = a9ptmr_sc;
+	uint64_t xc;
+
+	KASSERT(sc->sc_dev != NULL);
+	KASSERT(freq != 0);
+
+	sc->sc_freq = freq;
+	sc->sc_load = (sc->sc_freq / hz) - 1;
+
+	xc = xc_broadcast(0, a9ptmr_update_freq_cb, NULL, NULL);
+	xc_wait(xc);
+}

Index: src/sys/arch/arm/cortex/a9ptmr_var.h
diff -u src/sys/arch/arm/cortex/a9ptmr_var.h:1.1 src/sys/arch/arm/cortex/a9ptmr_var.h:1.2
--- src/sys/arch/arm/cortex/a9ptmr_var.h:1.1	Sat Aug 10 17:03:59 2019
+++ src/sys/arch/arm/cortex/a9ptmr_var.h	Sat Nov  5 17:30:20 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: a9ptmr_var.h,v 1.1 2019/08/10 17:03:59 skrll Exp $ */
+/* $NetBSD: a9ptmr_var.h,v 1.2 2022/11/05 17:30:20 jmcneill Exp $ */
 /*-
  * Copyright (c) 2012 The NetBSD Foundation, Inc.
  * All rights reserved.
@@ -39,6 +39,7 @@ struct cpu_info;
 void	a9ptmr_init_cpu_clock(struct cpu_info *);
 
 int	a9ptmr_intr(void *);
+void	a9ptmr_update_freq(uint32_t);
 void	a9ptmr_delay(unsigned int n);
 #endif
 



CVS commit: src/sys/arch/arm/cortex

2022-11-05 Thread Jared D. McNeill
Module Name:src
Committed By:   jmcneill
Date:   Sat Nov  5 17:30:20 UTC 2022

Modified Files:
src/sys/arch/arm/cortex: a9ptmr.c a9ptmr_var.h

Log Message:
Handle speed change events


To generate a diff of this commit:
cvs rdiff -u -r1.2 -r1.3 src/sys/arch/arm/cortex/a9ptmr.c
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/arm/cortex/a9ptmr_var.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/arm/fdt

2022-11-05 Thread Jared D. McNeill
Module Name:src
Committed By:   jmcneill
Date:   Sat Nov  5 17:30:07 UTC 2022

Modified Files:
src/sys/arch/arm/fdt: a9ptmr_fdt.c

Log Message:
Handle speed change events


To generate a diff of this commit:
cvs rdiff -u -r1.6 -r1.7 src/sys/arch/arm/fdt/a9ptmr_fdt.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/arm/fdt

2022-11-05 Thread Jared D. McNeill
Module Name:src
Committed By:   jmcneill
Date:   Sat Nov  5 17:30:07 UTC 2022

Modified Files:
src/sys/arch/arm/fdt: a9ptmr_fdt.c

Log Message:
Handle speed change events


To generate a diff of this commit:
cvs rdiff -u -r1.6 -r1.7 src/sys/arch/arm/fdt/a9ptmr_fdt.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/fdt/a9ptmr_fdt.c
diff -u src/sys/arch/arm/fdt/a9ptmr_fdt.c:1.6 src/sys/arch/arm/fdt/a9ptmr_fdt.c:1.7
--- src/sys/arch/arm/fdt/a9ptmr_fdt.c:1.6	Tue Nov  1 11:05:18 2022
+++ src/sys/arch/arm/fdt/a9ptmr_fdt.c	Sat Nov  5 17:30:06 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: a9ptmr_fdt.c,v 1.6 2022/11/01 11:05:18 jmcneill Exp $ */
+/* $NetBSD: a9ptmr_fdt.c,v 1.7 2022/11/05 17:30:06 jmcneill Exp $ */
 
 /*-
  * Copyright (c) 2019 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: a9ptmr_fdt.c,v 1.6 2022/11/01 11:05:18 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: a9ptmr_fdt.c,v 1.7 2022/11/05 17:30:06 jmcneill Exp $");
 
 #include 
 #include 
@@ -50,6 +50,7 @@ static int	a9ptmr_fdt_match(device_t, cf
 static void	a9ptmr_fdt_attach(device_t, device_t, void *);
 
 static void	a9ptmr_fdt_cpu_hatch(void *, struct cpu_info *);
+static void	a9ptmr_fdt_speed_changed(device_t);
 
 struct a9ptmr_fdt_softc {
 	device_t	sc_dev;
@@ -144,6 +145,8 @@ a9ptmr_fdt_attach(device_t parent, devic
 		arm_fdt_cpu_hatch_register(self, a9ptmr_fdt_cpu_hatch);
 		arm_fdt_timer_register(a9ptmr_cpu_initclocks);
 	}
+
+	pmf_event_register(self, PMFE_SPEED_CHANGED, a9ptmr_fdt_speed_changed, true);
 }
 
 static void
@@ -151,3 +154,16 @@ a9ptmr_fdt_cpu_hatch(void *priv, struct 
 {
 	a9ptmr_init_cpu_clock(ci);
 }
+
+static void
+a9ptmr_fdt_speed_changed(device_t dev)
+{
+	struct a9ptmr_fdt_softc * const sc = device_private(dev);
+	prop_dictionary_t dict = device_properties(dev);
+	uint32_t rate;
+
+	rate = clk_get_rate(sc->sc_clk);
+	prop_dictionary_set_uint32(dict, "frequency", rate);
+
+	a9ptmr_update_freq(rate);
+}



CVS commit: src/sys/arch/arm/xilinx

2022-11-05 Thread Jared D. McNeill
Module Name:src
Committed By:   jmcneill
Date:   Sat Nov  5 17:28:55 UTC 2022

Modified Files:
src/sys/arch/arm/xilinx: zynq7000_clkc.c

Log Message:
Add I2C clocks


To generate a diff of this commit:
cvs rdiff -u -r1.3 -r1.4 src/sys/arch/arm/xilinx/zynq7000_clkc.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/xilinx/zynq7000_clkc.c
diff -u src/sys/arch/arm/xilinx/zynq7000_clkc.c:1.3 src/sys/arch/arm/xilinx/zynq7000_clkc.c:1.4
--- src/sys/arch/arm/xilinx/zynq7000_clkc.c:1.3	Wed Oct 26 22:14:22 2022
+++ src/sys/arch/arm/xilinx/zynq7000_clkc.c	Sat Nov  5 17:28:55 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: zynq7000_clkc.c,v 1.3 2022/10/26 22:14:22 jmcneill Exp $ */
+/* $NetBSD: zynq7000_clkc.c,v 1.4 2022/11/05 17:28:55 jmcneill Exp $ */
 
 /*-
  * Copyright (c) 2022 Jared McNeill 
@@ -28,7 +28,7 @@
 
 #include 
 
-__KERNEL_RCSID(0, "$NetBSD: zynq7000_clkc.c,v 1.3 2022/10/26 22:14:22 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: zynq7000_clkc.c,v 1.4 2022/11/05 17:28:55 jmcneill Exp $");
 
 #include 
 #include 
@@ -56,6 +56,8 @@ __KERNEL_RCSID(0, "$NetBSD: zynq7000_clk
 #define	APER_CLK_CTRL	0x12c
 #define	 UART1_CPU_1XCLKACT	__BIT(21)
 #define	 UART0_CPU_1XCLKACT	__BIT(20)
+#define	 I2C1_CPU_1XCLKACT	__BIT(19)
+#define	 I2C0_CPU_1XCLKACT	__BIT(18)
 #define	 SDI1_CPU_1XCLKACT	__BIT(11)
 #define	 SDI0_CPU_1XCLKACT	__BIT(10)
 #define	SDIO_CLK_CTRL	0x150
@@ -246,7 +248,9 @@ zynq7000_clkc_clk_get_rate(void *priv, s
 		   clk == &sc->sc_clk[clkid_uart1]) {
 		return zynq7000_clkc_get_rate_iop(sc, UART_CLK_CTRL);
 	} else if (clk == &sc->sc_clk[clkid_uart0_aper] ||
-		   clk == &sc->sc_clk[clkid_uart1_aper]) {
+		   clk == &sc->sc_clk[clkid_uart1_aper] ||
+		   clk == &sc->sc_clk[clkid_i2c0_aper] ||
+		   clk == &sc->sc_clk[clkid_i2c1_aper]) {
 		return zynq7000_clkc_clk_get_rate(sc,
 		&sc->sc_clk[clkid_cpu_1x]);
 	} else {
@@ -298,6 +302,12 @@ zynq7000_clkc_clk_enable(void *priv, str
 	} else if (clk == &sc->sc_clk[clkid_uart1_aper]) {
 		reg = APER_CLK_CTRL;
 		mask = UART1_CPU_1XCLKACT;
+	} else if (clk == &sc->sc_clk[clkid_i2c0_aper]) {
+		reg = APER_CLK_CTRL;
+		mask = I2C0_CPU_1XCLKACT;
+	} else if (clk == &sc->sc_clk[clkid_i2c1_aper]) {
+		reg = APER_CLK_CTRL;
+		mask = I2C1_CPU_1XCLKACT;
 	} else {
 		return ENXIO;
 	}



CVS commit: src/sys/arch/arm/xilinx

2022-11-05 Thread Jared D. McNeill
Module Name:src
Committed By:   jmcneill
Date:   Sat Nov  5 17:28:55 UTC 2022

Modified Files:
src/sys/arch/arm/xilinx: zynq7000_clkc.c

Log Message:
Add I2C clocks


To generate a diff of this commit:
cvs rdiff -u -r1.3 -r1.4 src/sys/arch/arm/xilinx/zynq7000_clkc.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/arm/fdt

2022-11-01 Thread Jared D. McNeill
Module Name:src
Committed By:   jmcneill
Date:   Tue Nov  1 11:05:18 UTC 2022

Modified Files:
src/sys/arch/arm/fdt: a9ptmr_fdt.c a9tmr_fdt.c

Log Message:
On a system with both global and private timers, we cannot drive hardclock
from both or else time will move too fast.

Check MPIDR and install the global timer interrupt handler on uniprocessor
configs, and the private timer interrupt handler on MPCore configs.


To generate a diff of this commit:
cvs rdiff -u -r1.5 -r1.6 src/sys/arch/arm/fdt/a9ptmr_fdt.c
cvs rdiff -u -r1.7 -r1.8 src/sys/arch/arm/fdt/a9tmr_fdt.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/fdt/a9ptmr_fdt.c
diff -u src/sys/arch/arm/fdt/a9ptmr_fdt.c:1.5 src/sys/arch/arm/fdt/a9ptmr_fdt.c:1.6
--- src/sys/arch/arm/fdt/a9ptmr_fdt.c:1.5	Sat Aug  7 16:18:43 2021
+++ src/sys/arch/arm/fdt/a9ptmr_fdt.c	Tue Nov  1 11:05:18 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: a9ptmr_fdt.c,v 1.5 2021/08/07 16:18:43 thorpej Exp $ */
+/* $NetBSD: a9ptmr_fdt.c,v 1.6 2022/11/01 11:05:18 jmcneill Exp $ */
 
 /*-
  * Copyright (c) 2019 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: a9ptmr_fdt.c,v 1.5 2021/08/07 16:18:43 thorpej Exp $");
+__KERNEL_RCSID(0, "$NetBSD: a9ptmr_fdt.c,v 1.6 2022/11/01 11:05:18 jmcneill Exp $");
 
 #include 
 #include 
@@ -41,6 +41,8 @@ __KERNEL_RCSID(0, "$NetBSD: a9ptmr_fdt.c
 #include 
 #include 
 
+#include 
+
 #include 
 #include 
 
@@ -78,6 +80,8 @@ a9ptmr_fdt_attach(device_t parent, devic
 	struct fdt_attach_args * const faa = aux;
 	const int phandle = faa->faa_phandle;
 	bus_space_handle_t bsh;
+	uint32_t mpidr;
+	bool is_hardclock;
 
 	sc->sc_dev = self;
 	sc->sc_clk = fdtbus_clock_get_index(phandle, 0);
@@ -103,13 +107,18 @@ a9ptmr_fdt_attach(device_t parent, devic
 	aprint_naive("\n");
 	aprint_normal("\n");
 
-	void *ih = fdtbus_intr_establish_xname(phandle, 0, IPL_CLOCK,
-	FDT_INTR_MPSAFE, a9ptmr_intr, NULL, device_xname(self));
-	if (ih == NULL) {
-		aprint_error_dev(self, "couldn't install interrupt handler\n");
-		return;
+	mpidr = armreg_mpidr_read();
+	is_hardclock = (mpidr & MPIDR_U) == 0;	/* Use private timer for SMP */
+
+	if (is_hardclock) {
+		void *ih = fdtbus_intr_establish_xname(phandle, 0, IPL_CLOCK,
+		FDT_INTR_MPSAFE, a9ptmr_intr, NULL, device_xname(self));
+		if (ih == NULL) {
+			aprint_error_dev(self, "couldn't install interrupt handler\n");
+			return;
+		}
+		aprint_normal_dev(self, "interrupting on %s\n", intrstr);
 	}
-	aprint_normal_dev(self, "interrupting on %s\n", intrstr);
 
 	bus_addr_t addr;
 	bus_size_t size;
@@ -131,8 +140,10 @@ a9ptmr_fdt_attach(device_t parent, devic
 
 	config_found(self, &mpcaa, NULL, CFARGS_NONE);
 
-	arm_fdt_cpu_hatch_register(self, a9ptmr_fdt_cpu_hatch);
-	arm_fdt_timer_register(a9ptmr_cpu_initclocks);
+	if (is_hardclock) {
+		arm_fdt_cpu_hatch_register(self, a9ptmr_fdt_cpu_hatch);
+		arm_fdt_timer_register(a9ptmr_cpu_initclocks);
+	}
 }
 
 static void

Index: src/sys/arch/arm/fdt/a9tmr_fdt.c
diff -u src/sys/arch/arm/fdt/a9tmr_fdt.c:1.7 src/sys/arch/arm/fdt/a9tmr_fdt.c:1.8
--- src/sys/arch/arm/fdt/a9tmr_fdt.c:1.7	Sat Aug  7 16:18:43 2021
+++ src/sys/arch/arm/fdt/a9tmr_fdt.c	Tue Nov  1 11:05:18 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: a9tmr_fdt.c,v 1.7 2021/08/07 16:18:43 thorpej Exp $ */
+/* $NetBSD: a9tmr_fdt.c,v 1.8 2022/11/01 11:05:18 jmcneill Exp $ */
 
 /*-
  * Copyright (c) 2017 Jared McNeill 
@@ -27,7 +27,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: a9tmr_fdt.c,v 1.7 2021/08/07 16:18:43 thorpej Exp $");
+__KERNEL_RCSID(0, "$NetBSD: a9tmr_fdt.c,v 1.8 2022/11/01 11:05:18 jmcneill Exp $");
 
 #include 
 #include 
@@ -41,6 +41,8 @@ __KERNEL_RCSID(0, "$NetBSD: a9tmr_fdt.c,
 #include 
 #include 
 
+#include 
+
 #include 
 #include 
 
@@ -79,6 +81,8 @@ a9tmr_fdt_attach(device_t parent, device
 	struct fdt_attach_args * const faa = aux;
 	const int phandle = faa->faa_phandle;
 	bus_space_handle_t bsh;
+	uint32_t mpidr;
+	bool is_hardclock;
 
 	sc->sc_dev = self;
 	sc->sc_clk = fdtbus_clock_get_index(phandle, 0);
@@ -104,13 +108,18 @@ a9tmr_fdt_attach(device_t parent, device
 	aprint_naive("\n");
 	aprint_normal("\n");
 
-	void *ih = fdtbus_intr_establish_xname(phandle, 0, IPL_CLOCK,
-	FDT_INTR_MPSAFE, a9tmr_intr, NULL, device_xname(self));
-	if (ih == NULL) {
-		aprint_error_dev(self, "couldn't install interrupt handler\n");
-		return;
+	mpidr = armreg_mpidr_read();
+	is_hardclock = (mpidr & MPIDR_U) != 0;	/* Global timer for UP */
+
+	if (is_hardclock) {
+		void *ih = fdtbus_intr_establish_xname(phandle, 0, IPL_CLOCK,
+		FDT_INTR_MPSAFE, a9tmr_intr, NULL, device_xname(self));
+		if (ih == NULL) {
+			aprint_error_dev(self, "couldn't install interrupt handler\n");
+			return;
+		}
+		aprint_normal_dev(self, "interrupting on %s\n", intrstr);
 	}
-	aprint_normal_dev(self, "interrupting on %s\n", intrstr);
 
 	bus_addr_t addr;
 	bus_size_t size;
@@ 

CVS commit: src/sys/arch/arm/fdt

2022-11-01 Thread Jared D. McNeill
Module Name:src
Committed By:   jmcneill
Date:   Tue Nov  1 11:05:18 UTC 2022

Modified Files:
src/sys/arch/arm/fdt: a9ptmr_fdt.c a9tmr_fdt.c

Log Message:
On a system with both global and private timers, we cannot drive hardclock
from both or else time will move too fast.

Check MPIDR and install the global timer interrupt handler on uniprocessor
configs, and the private timer interrupt handler on MPCore configs.


To generate a diff of this commit:
cvs rdiff -u -r1.5 -r1.6 src/sys/arch/arm/fdt/a9ptmr_fdt.c
cvs rdiff -u -r1.7 -r1.8 src/sys/arch/arm/fdt/a9tmr_fdt.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/arm/xilinx

2022-10-31 Thread Jared D. McNeill
Module Name:src
Committed By:   jmcneill
Date:   Mon Oct 31 23:04:50 UTC 2022

Modified Files:
src/sys/arch/arm/xilinx: zynq_gpio.c

Log Message:
Fix MASK_DATA logic in previous commit -- the upper 16-bits are a mask
of pin states to preserve, not to set.


To generate a diff of this commit:
cvs rdiff -u -r1.3 -r1.4 src/sys/arch/arm/xilinx/zynq_gpio.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/arm/xilinx

2022-10-31 Thread Jared D. McNeill
Module Name:src
Committed By:   jmcneill
Date:   Mon Oct 31 23:04:50 UTC 2022

Modified Files:
src/sys/arch/arm/xilinx: zynq_gpio.c

Log Message:
Fix MASK_DATA logic in previous commit -- the upper 16-bits are a mask
of pin states to preserve, not to set.


To generate a diff of this commit:
cvs rdiff -u -r1.3 -r1.4 src/sys/arch/arm/xilinx/zynq_gpio.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/xilinx/zynq_gpio.c
diff -u src/sys/arch/arm/xilinx/zynq_gpio.c:1.3 src/sys/arch/arm/xilinx/zynq_gpio.c:1.4
--- src/sys/arch/arm/xilinx/zynq_gpio.c:1.3	Sat Oct 29 01:19:36 2022
+++ src/sys/arch/arm/xilinx/zynq_gpio.c	Mon Oct 31 23:04:50 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: zynq_gpio.c,v 1.3 2022/10/29 01:19:36 jmcneill Exp $ */
+/* $NetBSD: zynq_gpio.c,v 1.4 2022/10/31 23:04:50 jmcneill Exp $ */
 
 /*-
  * Copyright (c) 2022 Jared McNeill 
@@ -27,7 +27,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: zynq_gpio.c,v 1.3 2022/10/29 01:19:36 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: zynq_gpio.c,v 1.4 2022/10/31 23:04:50 jmcneill Exp $");
 
 #include 
 #include 
@@ -46,8 +46,6 @@ __KERNEL_RCSID(0, "$NetBSD: zynq_gpio.c,
 #define	ZYNQ_GPIO_NPINS		(4 * 32)
 
 #define	MASK_DATA_REG(pin)	(0x000 + 0x4 * ((pin) / 16))
-#define	MASK_DATA_SET(pin, val)	\
-	((1 << (((pin) % 16) + 16)) | ((val) << ((pin) % 16)))
 #define	DATA_RO_REG(pin)	(0x060 + 0x4 * ((pin) / 32))
 #define	DATA_RO_BIT(pin)	__BIT((pin) % 32)
 #define	DIRM_REG(pin)		(0x204 + 0x40 * ((pin) / 32))
@@ -94,17 +92,21 @@ CFATTACH_DECL_NEW(zynqgpio, sizeof(struc
 static int
 zynq_gpio_ctl(struct zynq_gpio_softc *sc, u_int pin, int flags)
 {
-	uint32_t val;
+	uint32_t dirm, oen;
 
 	KASSERT(mutex_owned(&sc->sc_lock));
 
-	val = RD4(sc, OEN_REG(pin));
+	dirm = RD4(sc, DIRM_REG(pin));
+	oen = RD4(sc, OEN_REG(pin));
 	if ((flags & GPIO_PIN_INPUT) != 0) {
-		val &= ~OEN_BIT(pin);
+		dirm &= ~DIRM_BIT(pin);
+		oen &= ~OEN_BIT(pin);
 	} else if ((flags & GPIO_PIN_OUTPUT) != 0) {
-		val |= OEN_BIT(pin);
+		dirm |= DIRM_BIT(pin);
+		oen |= OEN_BIT(pin);
 	}
-	WR4(sc, OEN_REG(pin), val);
+	WR4(sc, OEN_REG(pin), oen);
+	WR4(sc, DIRM_REG(pin), dirm);
 
 	return 0;
 }
@@ -211,10 +213,15 @@ static void
 zynq_gpio_pin_write(void *priv, int pin, int val)
 {
 	struct zynq_gpio_softc * const sc = priv;
+	uint32_t mask_data;
 
 	KASSERT(pin < __arraycount(sc->sc_pins));
 
-	WR4(sc, MASK_DATA_REG(pin), MASK_DATA_SET(pin, val));
+	mask_data = (0x & ~__BIT(pin % 16)) << 16;
+	if (val) {
+		mask_data |= __BIT(pin % 16);
+	}
+	WR4(sc, MASK_DATA_REG(pin), mask_data);
 }
 
 static void



CVS commit: src/sys/arch/arm/xilinx

2022-10-31 Thread Jared D. McNeill
Module Name:src
Committed By:   jmcneill
Date:   Mon Oct 31 22:23:39 UTC 2022

Modified Files:
src/sys/arch/arm/xilinx: zynq_platform.c

Log Message:
Implement zynq_platform_reset()


To generate a diff of this commit:
cvs rdiff -u -r1.9 -r1.10 src/sys/arch/arm/xilinx/zynq_platform.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/xilinx/zynq_platform.c
diff -u src/sys/arch/arm/xilinx/zynq_platform.c:1.9 src/sys/arch/arm/xilinx/zynq_platform.c:1.10
--- src/sys/arch/arm/xilinx/zynq_platform.c:1.9	Fri Oct 28 20:37:03 2022
+++ src/sys/arch/arm/xilinx/zynq_platform.c	Mon Oct 31 22:23:38 2022
@@ -1,4 +1,4 @@
-/*	$NetBSD: zynq_platform.c,v 1.9 2022/10/28 20:37:03 jmcneill Exp $	*/
+/*	$NetBSD: zynq_platform.c,v 1.10 2022/10/31 22:23:38 jmcneill Exp $	*/
 
 /*-
  * Copyright (c) 2019 The NetBSD Foundation, Inc.
@@ -35,7 +35,7 @@
 #include "arml2cc.h"
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: zynq_platform.c,v 1.9 2022/10/28 20:37:03 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: zynq_platform.c,v 1.10 2022/10/31 22:23:38 jmcneill Exp $");
 
 #include 
 #include 
@@ -69,7 +69,11 @@ __KERNEL_RCSID(0, "$NetBSD: zynq_platfor
 #define	ZYNQ_IOREG_PBASE	0xe000
 #define ZYNQ_IOREG_SIZE		0x0020
 
-#define ZYNQ_GPV_VBASE		(ZYNQ_IOREG_VBASE + ZYNQ_IOREG_SIZE)
+#define	ZYNQ_SLCR_VBASE		(ZYNQ_IOREG_VBASE + ZYNQ_IOREG_SIZE)
+#define	ZYNQ_SLCR_PBASE		0xf800
+#define	ZYNQ_SLCR_SIZE		0x0010
+
+#define ZYNQ_GPV_VBASE		(ZYNQ_SLCR_VBASE + ZYNQ_SLCR_SIZE)
 #define ZYNQ_GPV_PBASE		0xf890
 #define ZYNQ_GPV_SIZE		0x0010
 
@@ -87,6 +91,12 @@ __KERNEL_RCSID(0, "$NetBSD: zynq_platfor
 #define	ZYNQ7000_CPU1_ENTRY	0xfff0
 #define	ZYNQ7000_CPU1_ENTRY_SZ	4
 
+/* SLCR registers */
+#define	SLCR_UNLOCK		0x008
+#define	 UNLOCK_KEY		0xdf0d
+#define	PSS_RST_CTRL		0x200
+#define	 SOFT_RST		__BIT(0)
+
 extern struct bus_space arm_generic_bs_tag;
 extern struct arm32_bus_dma_tag arm_generic_dma_tag;
 
@@ -99,6 +109,9 @@ zynq_platform_devmap(void)
 		DEVMAP_ENTRY(ZYNQ_IOREG_VBASE,
 			 ZYNQ_IOREG_PBASE,
 			 ZYNQ_IOREG_SIZE),
+		DEVMAP_ENTRY(ZYNQ_SLCR_VBASE,
+			 ZYNQ_SLCR_PBASE,
+			 ZYNQ_SLCR_SIZE),
 		DEVMAP_ENTRY(ZYNQ_GPV_VBASE,
 			 ZYNQ_GPV_PBASE,
 			 ZYNQ_GPV_SIZE),
@@ -232,7 +245,11 @@ zynq_platform_bootstrap(void)
 static void
 zynq_platform_reset(void)
 {
+	bus_space_tag_t bst = &arm_generic_bs_tag;
+	bus_space_handle_t bsh = ZYNQ_SLCR_VBASE;
 
+	bus_space_write_4(bst, bsh, SLCR_UNLOCK, UNLOCK_KEY);
+	bus_space_write_4(bst, bsh, PSS_RST_CTRL, SOFT_RST);
 }
 
 static const struct arm_platform zynq_platform = {



CVS commit: src/sys/arch/arm/xilinx

2022-10-31 Thread Jared D. McNeill
Module Name:src
Committed By:   jmcneill
Date:   Mon Oct 31 22:23:39 UTC 2022

Modified Files:
src/sys/arch/arm/xilinx: zynq_platform.c

Log Message:
Implement zynq_platform_reset()


To generate a diff of this commit:
cvs rdiff -u -r1.9 -r1.10 src/sys/arch/arm/xilinx/zynq_platform.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/arm/rockchip

2022-10-30 Thread Jared D. McNeill
Module Name:src
Committed By:   jmcneill
Date:   Sun Oct 30 23:10:43 UTC 2022

Modified Files:
src/sys/arch/arm/rockchip: rk_drm.c

Log Message:
Remove dirty fb IOCTL callback introduced in latest drm update.

Not sure how this got here, but the rkdrm driver does not need to do
damage tracking as it uses Normal-NC (uncached) mappings.

PR# port-arm/56596


To generate a diff of this commit:
cvs rdiff -u -r1.20 -r1.21 src/sys/arch/arm/rockchip/rk_drm.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/rockchip/rk_drm.c
diff -u src/sys/arch/arm/rockchip/rk_drm.c:1.20 src/sys/arch/arm/rockchip/rk_drm.c:1.21
--- src/sys/arch/arm/rockchip/rk_drm.c:1.20	Sun Sep 25 07:50:15 2022
+++ src/sys/arch/arm/rockchip/rk_drm.c	Sun Oct 30 23:10:43 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: rk_drm.c,v 1.20 2022/09/25 07:50:15 riastradh Exp $ */
+/* $NetBSD: rk_drm.c,v 1.21 2022/10/30 23:10:43 jmcneill Exp $ */
 
 /*-
  * Copyright (c) 2019 Jared D. McNeill 
@@ -27,7 +27,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: rk_drm.c,v 1.20 2022/09/25 07:50:15 riastradh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: rk_drm.c,v 1.21 2022/10/30 23:10:43 jmcneill Exp $");
 
 #include 
 #include 
@@ -255,7 +255,6 @@ rk_drm_fb_destroy(struct drm_framebuffer
 static const struct drm_framebuffer_funcs rk_drm_framebuffer_funcs = {
 	.create_handle = rk_drm_fb_create_handle,
 	.destroy = rk_drm_fb_destroy,
-	.dirty = drm_atomic_helper_dirtyfb,
 };
 
 static struct drm_framebuffer *



CVS commit: src/sys/arch/arm/rockchip

2022-10-30 Thread Jared D. McNeill
Module Name:src
Committed By:   jmcneill
Date:   Sun Oct 30 23:10:43 UTC 2022

Modified Files:
src/sys/arch/arm/rockchip: rk_drm.c

Log Message:
Remove dirty fb IOCTL callback introduced in latest drm update.

Not sure how this got here, but the rkdrm driver does not need to do
damage tracking as it uses Normal-NC (uncached) mappings.

PR# port-arm/56596


To generate a diff of this commit:
cvs rdiff -u -r1.20 -r1.21 src/sys/arch/arm/rockchip/rk_drm.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/arm/pic

2022-10-30 Thread Taylor R Campbell
Module Name:src
Committed By:   riastradh
Date:   Sun Oct 30 10:20:46 UTC 2022

Modified Files:
src/sys/arch/arm/pic: pic.c

Log Message:
arm/pic: Sprinkle dtrace probes on interrupt handlers like x86.


To generate a diff of this commit:
cvs rdiff -u -r1.84 -r1.85 src/sys/arch/arm/pic/pic.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/pic/pic.c
diff -u src/sys/arch/arm/pic/pic.c:1.84 src/sys/arch/arm/pic/pic.c:1.85
--- src/sys/arch/arm/pic/pic.c:1.84	Sat Oct 29 15:13:27 2022
+++ src/sys/arch/arm/pic/pic.c	Sun Oct 30 10:20:45 2022
@@ -1,4 +1,4 @@
-/*	$NetBSD: pic.c,v 1.84 2022/10/29 15:13:27 riastradh Exp $	*/
+/*	$NetBSD: pic.c,v 1.85 2022/10/30 10:20:45 riastradh Exp $	*/
 
 /*-
  * Copyright (c) 2008 The NetBSD Foundation, Inc.
@@ -34,7 +34,7 @@
 #include "opt_multiprocessor.h"
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: pic.c,v 1.84 2022/10/29 15:13:27 riastradh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pic.c,v 1.85 2022/10/30 10:20:45 riastradh Exp $");
 
 #include 
 #include 
@@ -47,6 +47,7 @@ __KERNEL_RCSID(0, "$NetBSD: pic.c,v 1.84
 #include 
 #include 
 #include 
+#include 
 #include 
 
 #include 
@@ -94,6 +95,16 @@ EVCNT_ATTACH_STATIC(pic_deferral_ev);
 
 static int pic_init(void);
 
+SDT_PROBE_DEFINE3(sdt, kernel, intr, entry,
+"void (*)(void *)"/*func*/,
+"void *"/*arg*/,
+"struct intrsource *"/*is*/);
+SDT_PROBE_DEFINE4(sdt, kernel, intr, return,
+"void (*)(void *)"/*func*/,
+"void *"/*arg*/,
+"struct intrsource *"/*is*/,
+"int"/*handled*/);
+
 #ifdef __HAVE_PIC_SET_PRIORITY
 void
 pic_set_priority(struct cpu_info *ci, int newipl)
@@ -333,7 +344,7 @@ pic_dispatch(struct intrsource *is, void
 {
 	int (*func)(void *) = is->is_func;
 	void *arg = is->is_arg;
-	int ocpl, ncpl;
+	int ocpl, ncpl, handled __unused;
 
 	if (__predict_false(arg == NULL)) {
 		if (__predict_false(frame == NULL)) {
@@ -353,12 +364,16 @@ pic_dispatch(struct intrsource *is, void
 		KERNEL_LOCK(1, NULL);
 		const u_int ci_blcnt __diagused = curcpu()->ci_biglock_count;
 		const u_int l_blcnt __diagused = curlwp->l_blcnt;
-		(void)(*func)(arg);
+		SDT_PROBE3(sdt, kernel, intr, entry,  func, arg, is);
+		handled = (*func)(arg);
+		SDT_PROBE4(sdt, kernel, intr, return,  func, arg, is, handled);
 		KASSERT(ci_blcnt == curcpu()->ci_biglock_count);
 		KASSERT(l_blcnt == curlwp->l_blcnt);
 		KERNEL_UNLOCK_ONE(NULL);
 	} else {
-		(void)(*func)(arg);
+		SDT_PROBE3(sdt, kernel, intr, entry,  func, arg, is);
+		handled = (*func)(arg);
+		SDT_PROBE4(sdt, kernel, intr, return,  func, arg, is, handled);
 	}
 	ncpl = curcpu()->ci_cpl;
 	KASSERTMSG(ocpl <= ncpl, "pic %s irq %u intrsource %s:"



CVS commit: src/sys/arch/arm/pic

2022-10-30 Thread Taylor R Campbell
Module Name:src
Committed By:   riastradh
Date:   Sun Oct 30 10:20:46 UTC 2022

Modified Files:
src/sys/arch/arm/pic: pic.c

Log Message:
arm/pic: Sprinkle dtrace probes on interrupt handlers like x86.


To generate a diff of this commit:
cvs rdiff -u -r1.84 -r1.85 src/sys/arch/arm/pic/pic.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/arm/sunxi

2022-10-29 Thread Jared D. McNeill
Module Name:src
Committed By:   jmcneill
Date:   Sat Oct 29 19:07:39 UTC 2022

Modified Files:
src/sys/arch/arm/sunxi: sun8i_codec.c

Log Message:
sun8icodec: Update for binding spec changes.

The allwinner,sun8i-a33-codec binding spec has changed[1] to allow for
#sound-dai-cells to be either 0 or 1, to allow exporting multiple DAIs
from the codec.

This change updates the driver to allow #sound-dai-cells of either 0 or 1
while still only supporting AIF1 for the time being.

[1] 
https://github.com/torvalds/linux/commit/880e007f15a31f446b9e1713720c6ae5a539f3f4


To generate a diff of this commit:
cvs rdiff -u -r1.9 -r1.10 src/sys/arch/arm/sunxi/sun8i_codec.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/sunxi/sun8i_codec.c
diff -u src/sys/arch/arm/sunxi/sun8i_codec.c:1.9 src/sys/arch/arm/sunxi/sun8i_codec.c:1.10
--- src/sys/arch/arm/sunxi/sun8i_codec.c:1.9	Wed Jan 27 03:10:20 2021
+++ src/sys/arch/arm/sunxi/sun8i_codec.c	Sat Oct 29 19:07:39 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: sun8i_codec.c,v 1.9 2021/01/27 03:10:20 thorpej Exp $ */
+/* $NetBSD: sun8i_codec.c,v 1.10 2022/10/29 19:07:39 jmcneill Exp $ */
 
 /*-
  * Copyright (c) 2018 Jared McNeill 
@@ -27,7 +27,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: sun8i_codec.c,v 1.9 2021/01/27 03:10:20 thorpej Exp $");
+__KERNEL_RCSID(0, "$NetBSD: sun8i_codec.c,v 1.10 2022/10/29 19:07:39 jmcneill Exp $");
 
 #include 
 #include 
@@ -174,11 +174,31 @@ static audio_dai_tag_t
 sun8i_codec_dai_get_tag(device_t dev, const void *data, size_t len)
 {
 	struct sun8i_codec_softc * const sc = device_private(dev);
+	const u_int sound_dai_cells = len / 4;
 
-	if (len != 4)
-		return NULL;
+	KASSERT(sound_dai_cells > 0);
 
-	return &sc->sc_dai;
+	/*
+	 * This driver only supports AIF1 with CPU DAI at the moment.
+	 * When #sound-dai-cells is 0, return this tag. When #sound-dai-cells
+	 * is 1, return this tag only when the second cell contains the
+	 * value 0.
+	 *
+	 * Update this when support for multiple interfaces is added to
+	 * this driver.
+	 */
+	if (sound_dai_cells == 1) {
+		return &sc->sc_dai;
+	}
+
+	if (sound_dai_cells == 2) {
+		const u_int iface = be32dec((const u_int *)data + 1);
+		if (iface == 0) {
+			return &sc->sc_dai;
+		}
+	}
+
+	return NULL;
 }
 
 static struct fdtbus_dai_controller_func sun8i_codec_dai_funcs = {



CVS commit: src/sys/arch/arm/sunxi

2022-10-29 Thread Jared D. McNeill
Module Name:src
Committed By:   jmcneill
Date:   Sat Oct 29 19:07:39 UTC 2022

Modified Files:
src/sys/arch/arm/sunxi: sun8i_codec.c

Log Message:
sun8icodec: Update for binding spec changes.

The allwinner,sun8i-a33-codec binding spec has changed[1] to allow for
#sound-dai-cells to be either 0 or 1, to allow exporting multiple DAIs
from the codec.

This change updates the driver to allow #sound-dai-cells of either 0 or 1
while still only supporting AIF1 for the time being.

[1] 
https://github.com/torvalds/linux/commit/880e007f15a31f446b9e1713720c6ae5a539f3f4


To generate a diff of this commit:
cvs rdiff -u -r1.9 -r1.10 src/sys/arch/arm/sunxi/sun8i_codec.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/arm/pic

2022-10-29 Thread Taylor R Campbell
Module Name:src
Committed By:   riastradh
Date:   Sat Oct 29 15:13:28 UTC 2022

Modified Files:
src/sys/arch/arm/pic: pic.c

Log Message:
arm/pic: Use a local variable to reduce #ifdef scope.

Avoids straddling a conditional this way.


To generate a diff of this commit:
cvs rdiff -u -r1.83 -r1.84 src/sys/arch/arm/pic/pic.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/arm/pic

2022-10-29 Thread Taylor R Campbell
Module Name:src
Committed By:   riastradh
Date:   Sat Oct 29 15:13:28 UTC 2022

Modified Files:
src/sys/arch/arm/pic: pic.c

Log Message:
arm/pic: Use a local variable to reduce #ifdef scope.

Avoids straddling a conditional this way.


To generate a diff of this commit:
cvs rdiff -u -r1.83 -r1.84 src/sys/arch/arm/pic/pic.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/pic/pic.c
diff -u src/sys/arch/arm/pic/pic.c:1.83 src/sys/arch/arm/pic/pic.c:1.84
--- src/sys/arch/arm/pic/pic.c:1.83	Thu Jul 28 10:26:26 2022
+++ src/sys/arch/arm/pic/pic.c	Sat Oct 29 15:13:27 2022
@@ -1,4 +1,4 @@
-/*	$NetBSD: pic.c,v 1.83 2022/07/28 10:26:26 riastradh Exp $	*/
+/*	$NetBSD: pic.c,v 1.84 2022/10/29 15:13:27 riastradh Exp $	*/
 
 /*-
  * Copyright (c) 2008 The NetBSD Foundation, Inc.
@@ -34,7 +34,7 @@
 #include "opt_multiprocessor.h"
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: pic.c,v 1.83 2022/07/28 10:26:26 riastradh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pic.c,v 1.84 2022/10/29 15:13:27 riastradh Exp $");
 
 #include 
 #include 
@@ -345,7 +345,11 @@ pic_dispatch(struct intrsource *is, void
 
 	ocpl = curcpu()->ci_cpl;
 #ifdef MULTIPROCESSOR
-	if (!is->is_mpsafe) {
+	const bool mpsafe = is->is_mpsafe;
+#else
+	const bool mpsafe = true;
+#endif
+	if (!mpsafe) {
 		KERNEL_LOCK(1, NULL);
 		const u_int ci_blcnt __diagused = curcpu()->ci_biglock_count;
 		const u_int l_blcnt __diagused = curlwp->l_blcnt;
@@ -353,9 +357,9 @@ pic_dispatch(struct intrsource *is, void
 		KASSERT(ci_blcnt == curcpu()->ci_biglock_count);
 		KASSERT(l_blcnt == curlwp->l_blcnt);
 		KERNEL_UNLOCK_ONE(NULL);
-	} else
-#endif
+	} else {
 		(void)(*func)(arg);
+	}
 	ncpl = curcpu()->ci_cpl;
 	KASSERTMSG(ocpl <= ncpl, "pic %s irq %u intrsource %s:"
 	" cpl slipped %d -> %d",



CVS commit: src/sys/arch/arm

2022-10-29 Thread Jared D. McNeill
Module Name:src
Committed By:   jmcneill
Date:   Sat Oct 29 13:37:59 UTC 2022

Modified Files:
src/sys/arch/arm: Makefile.inc
Removed Files:
src/sys/arch/arm/omap: am335x_cm_padconf.c am335x_dmtimer.c
am335x_gpio.c am335x_prcm.c am335x_prcm.h am335x_trng.c
am335x_trngreg.h files.omap files.omap2 files.omapl1x if_cpsw.c
if_cpswreg.h obio_com.c obio_mputmr.c obio_ohci.c obio_wdt.c
omap2430_intr.c omap2430_intr.h omap2_gpio.c omap2_gpio.h
omap2_gpmc.c omap2_gpmcreg.h omap2_gpmcvar.h omap2_icu.c
omap2_intr.h omap2_l3i.c omap2_mputmr.c omap2_mputmrreg.h
omap2_mputmrvar.h omap2_nand.c omap2_obio.c omap2_obioreg.h
omap2_obiovar.h omap2_prcm.c omap2_prcm.h omap2_reg.h omap3_ehci.c
omap3_i2c.c omap3_i2creg.h omap3_scm.c omap3_sdhc.c omap3_sdma.c
omap3_sdmareg.h omap3_sdmavar.h omap3_sdmmcreg.h omap3_uhhreg.h
omap3_usbtllreg.h omap4430_intr.h omap5430_intr.h omap5912_intr.c
omap5912_intr.h omap5_ahcisata.c omap_a2x_space.c omap_a4x_space.c
omap_com.c omap_com.h omap_dma.c omap_dmtimer.c omap_dmtimerreg.h
omap_dmtimervar.h omap_edma.c omap_edma.h omap_emifs.c omap_emifs.h
omap_gpio.c omap_gpio.h omap_gpioreg.h omap_gptmrreg.h omap_intr.c
omap_intr.h omap_mputmr.c omap_nobyteacc_io.S
omap_nobyteacc_space.c omap_ocp.c omap_ocp.h omap_reg.h omap_rtc.c
omap_space.c omap_start.S omap_tipb.c omap_tipb.h omap_var.h
omap_wdt.c omap_wdtreg.h omap_wdtvar.h omapfb.c omapfbreg.h
omapl1x_aintc.c omapl1x_bus_dma.c omapl1x_com.c omapl1x_emac.c
omapl1x_intr.h omapl1x_misc.h omapl1x_ohci.c omapl1x_psc.c
omapl1x_reg.h omapl1x_timer.c omapl1x_tipb.c sitara_cm.c
sitara_cm.h sitara_cmreg.h ti_iic.c ti_iicreg.h tifb.c tifbreg.h
tifbvar.h tiotg.c tiotgreg.h

Log Message:
Remove old OMAP port.

This code was a mess and full of unmaintainable SoC and board specific
ifdefs. A modern devicetree port for OMAP3530 and AM335x based boards
now lives in arch/arm/ti. If someone is interested in bringing back
support for any boards lost in this transition, feel free, but please
do so using the new devicetree based model.


To generate a diff of this commit:
cvs rdiff -u -r1.2 -r1.3 src/sys/arch/arm/Makefile.inc
cvs rdiff -u -r1.3 -r0 src/sys/arch/arm/omap/am335x_cm_padconf.c \
src/sys/arch/arm/omap/omap2_gpmcvar.h \
src/sys/arch/arm/omap/omap2_mputmrvar.h \
src/sys/arch/arm/omap/omap2_prcm.h src/sys/arch/arm/omap/omap3_sdma.c \
src/sys/arch/arm/omap/omap3_sdmavar.h \
src/sys/arch/arm/omap/omap5_ahcisata.c \
src/sys/arch/arm/omap/omap_nobyteacc_io.S \
src/sys/arch/arm/omap/sitara_cm.c src/sys/arch/arm/omap/sitara_cmreg.h
cvs rdiff -u -r1.1 -r0 src/sys/arch/arm/omap/am335x_dmtimer.c \
src/sys/arch/arm/omap/am335x_trngreg.h src/sys/arch/arm/omap/omap2_gpio.h \
src/sys/arch/arm/omap/omap3_i2creg.h \
src/sys/arch/arm/omap/omap5912_intr.h src/sys/arch/arm/omap/omap_com.h \
src/sys/arch/arm/omap/omap_dmtimerreg.h \
src/sys/arch/arm/omap/omap_dmtimervar.h src/sys/arch/arm/omap/omap_edma.h \
src/sys/arch/arm/omap/omap_emifs.h src/sys/arch/arm/omap/omap_ocp.h \
src/sys/arch/arm/omap/omap_reg.h src/sys/arch/arm/omap/omap_tipb.h \
src/sys/arch/arm/omap/omapl1x_bus_dma.c \
src/sys/arch/arm/omap/omapl1x_intr.h src/sys/arch/arm/omap/omapl1x_misc.h \
src/sys/arch/arm/omap/omapl1x_reg.h src/sys/arch/arm/omap/tifbvar.h \
src/sys/arch/arm/omap/tiotgreg.h
cvs rdiff -u -r1.4 -r0 src/sys/arch/arm/omap/am335x_gpio.c \
src/sys/arch/arm/omap/omap3_uhhreg.h \
src/sys/arch/arm/omap/omap4430_intr.h \
src/sys/arch/arm/omap/omap5430_intr.h \
src/sys/arch/arm/omap/omap_a2x_space.c \
src/sys/arch/arm/omap/omap_a4x_space.c \
src/sys/arch/arm/omap/omap_nobyteacc_space.c \
src/sys/arch/arm/omap/omap_var.h src/sys/arch/arm/omap/omap_wdtvar.h \
src/sys/arch/arm/omap/omapl1x_tipb.c
cvs rdiff -u -r1.11 -r0 src/sys/arch/arm/omap/am335x_prcm.c \
src/sys/arch/arm/omap/omap2_intr.h src/sys/arch/arm/omap/tifb.c
cvs rdiff -u -r1.10 -r0 src/sys/arch/arm/omap/am335x_prcm.h \
src/sys/arch/arm/omap/omap2_gpmcreg.h \
src/sys/arch/arm/omap/omap3_sdmmcreg.h src/sys/arch/arm/omap/omap_gpio.c \
src/sys/arch/arm/omap/omap_intr.h
cvs rdiff -u -r1.6 -r0 src/sys/arch/arm/omap/am335x_trng.c \
src/sys/arch/arm/omap/omap2_nand.c src/sys/arch/arm/omap/omap2_prcm.c \
src/sys/arch/arm/omap/omap3_i2c.c src/sys/arch/arm/omap/omap3_scm.c \
src/sys/arch/arm/omap/omap3_sdmareg.h \
src/sys/arch/arm/omap/omap5912_intr.c src/sys/arch/arm/omap/omap_rtc.c
cvs rdiff -u -r1.7 -r0 src/sys/arch/arm/omap/files.omap \
src/sys/arch/arm/omap/omap2430_intr.c src/sys/arch/arm/omap/omap_edma.c \
src/sys/arch/arm/omap/omap_emifs.c src/sys/arch/arm/omap/omap_ocp.c \
src/sys/arch/a

CVS commit: src/sys/arch/arm

2022-10-29 Thread Jared D. McNeill
Module Name:src
Committed By:   jmcneill
Date:   Sat Oct 29 13:37:59 UTC 2022

Modified Files:
src/sys/arch/arm: Makefile.inc
Removed Files:
src/sys/arch/arm/omap: am335x_cm_padconf.c am335x_dmtimer.c
am335x_gpio.c am335x_prcm.c am335x_prcm.h am335x_trng.c
am335x_trngreg.h files.omap files.omap2 files.omapl1x if_cpsw.c
if_cpswreg.h obio_com.c obio_mputmr.c obio_ohci.c obio_wdt.c
omap2430_intr.c omap2430_intr.h omap2_gpio.c omap2_gpio.h
omap2_gpmc.c omap2_gpmcreg.h omap2_gpmcvar.h omap2_icu.c
omap2_intr.h omap2_l3i.c omap2_mputmr.c omap2_mputmrreg.h
omap2_mputmrvar.h omap2_nand.c omap2_obio.c omap2_obioreg.h
omap2_obiovar.h omap2_prcm.c omap2_prcm.h omap2_reg.h omap3_ehci.c
omap3_i2c.c omap3_i2creg.h omap3_scm.c omap3_sdhc.c omap3_sdma.c
omap3_sdmareg.h omap3_sdmavar.h omap3_sdmmcreg.h omap3_uhhreg.h
omap3_usbtllreg.h omap4430_intr.h omap5430_intr.h omap5912_intr.c
omap5912_intr.h omap5_ahcisata.c omap_a2x_space.c omap_a4x_space.c
omap_com.c omap_com.h omap_dma.c omap_dmtimer.c omap_dmtimerreg.h
omap_dmtimervar.h omap_edma.c omap_edma.h omap_emifs.c omap_emifs.h
omap_gpio.c omap_gpio.h omap_gpioreg.h omap_gptmrreg.h omap_intr.c
omap_intr.h omap_mputmr.c omap_nobyteacc_io.S
omap_nobyteacc_space.c omap_ocp.c omap_ocp.h omap_reg.h omap_rtc.c
omap_space.c omap_start.S omap_tipb.c omap_tipb.h omap_var.h
omap_wdt.c omap_wdtreg.h omap_wdtvar.h omapfb.c omapfbreg.h
omapl1x_aintc.c omapl1x_bus_dma.c omapl1x_com.c omapl1x_emac.c
omapl1x_intr.h omapl1x_misc.h omapl1x_ohci.c omapl1x_psc.c
omapl1x_reg.h omapl1x_timer.c omapl1x_tipb.c sitara_cm.c
sitara_cm.h sitara_cmreg.h ti_iic.c ti_iicreg.h tifb.c tifbreg.h
tifbvar.h tiotg.c tiotgreg.h

Log Message:
Remove old OMAP port.

This code was a mess and full of unmaintainable SoC and board specific
ifdefs. A modern devicetree port for OMAP3530 and AM335x based boards
now lives in arch/arm/ti. If someone is interested in bringing back
support for any boards lost in this transition, feel free, but please
do so using the new devicetree based model.


To generate a diff of this commit:
cvs rdiff -u -r1.2 -r1.3 src/sys/arch/arm/Makefile.inc
cvs rdiff -u -r1.3 -r0 src/sys/arch/arm/omap/am335x_cm_padconf.c \
src/sys/arch/arm/omap/omap2_gpmcvar.h \
src/sys/arch/arm/omap/omap2_mputmrvar.h \
src/sys/arch/arm/omap/omap2_prcm.h src/sys/arch/arm/omap/omap3_sdma.c \
src/sys/arch/arm/omap/omap3_sdmavar.h \
src/sys/arch/arm/omap/omap5_ahcisata.c \
src/sys/arch/arm/omap/omap_nobyteacc_io.S \
src/sys/arch/arm/omap/sitara_cm.c src/sys/arch/arm/omap/sitara_cmreg.h
cvs rdiff -u -r1.1 -r0 src/sys/arch/arm/omap/am335x_dmtimer.c \
src/sys/arch/arm/omap/am335x_trngreg.h src/sys/arch/arm/omap/omap2_gpio.h \
src/sys/arch/arm/omap/omap3_i2creg.h \
src/sys/arch/arm/omap/omap5912_intr.h src/sys/arch/arm/omap/omap_com.h \
src/sys/arch/arm/omap/omap_dmtimerreg.h \
src/sys/arch/arm/omap/omap_dmtimervar.h src/sys/arch/arm/omap/omap_edma.h \
src/sys/arch/arm/omap/omap_emifs.h src/sys/arch/arm/omap/omap_ocp.h \
src/sys/arch/arm/omap/omap_reg.h src/sys/arch/arm/omap/omap_tipb.h \
src/sys/arch/arm/omap/omapl1x_bus_dma.c \
src/sys/arch/arm/omap/omapl1x_intr.h src/sys/arch/arm/omap/omapl1x_misc.h \
src/sys/arch/arm/omap/omapl1x_reg.h src/sys/arch/arm/omap/tifbvar.h \
src/sys/arch/arm/omap/tiotgreg.h
cvs rdiff -u -r1.4 -r0 src/sys/arch/arm/omap/am335x_gpio.c \
src/sys/arch/arm/omap/omap3_uhhreg.h \
src/sys/arch/arm/omap/omap4430_intr.h \
src/sys/arch/arm/omap/omap5430_intr.h \
src/sys/arch/arm/omap/omap_a2x_space.c \
src/sys/arch/arm/omap/omap_a4x_space.c \
src/sys/arch/arm/omap/omap_nobyteacc_space.c \
src/sys/arch/arm/omap/omap_var.h src/sys/arch/arm/omap/omap_wdtvar.h \
src/sys/arch/arm/omap/omapl1x_tipb.c
cvs rdiff -u -r1.11 -r0 src/sys/arch/arm/omap/am335x_prcm.c \
src/sys/arch/arm/omap/omap2_intr.h src/sys/arch/arm/omap/tifb.c
cvs rdiff -u -r1.10 -r0 src/sys/arch/arm/omap/am335x_prcm.h \
src/sys/arch/arm/omap/omap2_gpmcreg.h \
src/sys/arch/arm/omap/omap3_sdmmcreg.h src/sys/arch/arm/omap/omap_gpio.c \
src/sys/arch/arm/omap/omap_intr.h
cvs rdiff -u -r1.6 -r0 src/sys/arch/arm/omap/am335x_trng.c \
src/sys/arch/arm/omap/omap2_nand.c src/sys/arch/arm/omap/omap2_prcm.c \
src/sys/arch/arm/omap/omap3_i2c.c src/sys/arch/arm/omap/omap3_scm.c \
src/sys/arch/arm/omap/omap3_sdmareg.h \
src/sys/arch/arm/omap/omap5912_intr.c src/sys/arch/arm/omap/omap_rtc.c
cvs rdiff -u -r1.7 -r0 src/sys/arch/arm/omap/files.omap \
src/sys/arch/arm/omap/omap2430_intr.c src/sys/arch/arm/omap/omap_edma.c \
src/sys/arch/arm/omap/omap_emifs.c src/sys/arch/arm/omap/omap_ocp.c \
src/sys/arch/a

CVS commit: src/sys/arch/arm/samsung

2022-10-29 Thread Jared D. McNeill
Module Name:src
Committed By:   jmcneill
Date:   Sat Oct 29 13:29:47 UTC 2022

Modified Files:
src/sys/arch/arm/samsung: exynos_platform.c exynos_soc.c

Log Message:
Build fixes.


To generate a diff of this commit:
cvs rdiff -u -r1.38 -r1.39 src/sys/arch/arm/samsung/exynos_platform.c
cvs rdiff -u -r1.40 -r1.41 src/sys/arch/arm/samsung/exynos_soc.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/samsung/exynos_platform.c
diff -u src/sys/arch/arm/samsung/exynos_platform.c:1.38 src/sys/arch/arm/samsung/exynos_platform.c:1.39
--- src/sys/arch/arm/samsung/exynos_platform.c:1.38	Sat Apr 24 23:36:28 2021
+++ src/sys/arch/arm/samsung/exynos_platform.c	Sat Oct 29 13:29:46 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: exynos_platform.c,v 1.38 2021/04/24 23:36:28 thorpej Exp $ */
+/* $NetBSD: exynos_platform.c,v 1.39 2022/10/29 13:29:46 jmcneill Exp $ */
 
 /*-
  * Copyright (c) 2017 Jared D. McNeill 
@@ -35,15 +35,15 @@
 #include "ukbd.h"
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: exynos_platform.c,v 1.38 2021/04/24 23:36:28 thorpej Exp $");
+__KERNEL_RCSID(0, "$NetBSD: exynos_platform.c,v 1.39 2022/10/29 13:29:46 jmcneill Exp $");
 
+#define	EXYNOS_CORE_VBASE	KERNEL_IO_VBASE
 
 /*
  * Booting a CA7 core on Exynos5422 is currently broken, disable starting CA7 secondaries.
  */
 #defineEXYNOS5422_DISABLE_CA7_CLUSTER
 
-
 #include 
 #include 
 #include 
@@ -62,7 +62,7 @@ __KERNEL_RCSID(0, "$NetBSD: exynos_platf
 #include 
 #include 
 
-#include 
+#include 
 #include 
 
 #include 

Index: src/sys/arch/arm/samsung/exynos_soc.c
diff -u src/sys/arch/arm/samsung/exynos_soc.c:1.40 src/sys/arch/arm/samsung/exynos_soc.c:1.41
--- src/sys/arch/arm/samsung/exynos_soc.c:1.40	Sun Sep 19 10:34:08 2021
+++ src/sys/arch/arm/samsung/exynos_soc.c	Sat Oct 29 13:29:46 2022
@@ -1,4 +1,4 @@
-/*	$NetBSD: exynos_soc.c,v 1.40 2021/09/19 10:34:08 andvar Exp $	*/
+/*	$NetBSD: exynos_soc.c,v 1.41 2022/10/29 13:29:46 jmcneill Exp $	*/
 
 /*-
  * Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -33,7 +33,7 @@
 #include "opt_exynos.h"
 
 #include 
-__KERNEL_RCSID(1, "$NetBSD: exynos_soc.c,v 1.40 2021/09/19 10:34:08 andvar Exp $");
+__KERNEL_RCSID(1, "$NetBSD: exynos_soc.c,v 1.41 2022/10/29 13:29:46 jmcneill Exp $");
 
 #include 
 #include 
@@ -58,8 +58,9 @@ __KERNEL_RCSID(1, "$NetBSD: exynos_soc.c
 #include 
 #include 
 
-/* XXXNH */
-#include 
+#include 
+
+#define	EXYNOS_CORE_VBASE	KERNEL_IO_VBASE
 
 
 /* these variables are retrieved in start.S and stored in .data */



CVS commit: src/sys/arch/arm/samsung

2022-10-29 Thread Jared D. McNeill
Module Name:src
Committed By:   jmcneill
Date:   Sat Oct 29 13:29:47 UTC 2022

Modified Files:
src/sys/arch/arm/samsung: exynos_platform.c exynos_soc.c

Log Message:
Build fixes.


To generate a diff of this commit:
cvs rdiff -u -r1.38 -r1.39 src/sys/arch/arm/samsung/exynos_platform.c
cvs rdiff -u -r1.40 -r1.41 src/sys/arch/arm/samsung/exynos_soc.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/arm/xilinx

2022-10-28 Thread Jared D. McNeill
Module Name:src
Committed By:   jmcneill
Date:   Sat Oct 29 01:19:36 UTC 2022

Modified Files:
src/sys/arch/arm/xilinx: zynq_gpio.c

Log Message:
Fix MASK_DATA_SET macro


To generate a diff of this commit:
cvs rdiff -u -r1.2 -r1.3 src/sys/arch/arm/xilinx/zynq_gpio.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/xilinx/zynq_gpio.c
diff -u src/sys/arch/arm/xilinx/zynq_gpio.c:1.2 src/sys/arch/arm/xilinx/zynq_gpio.c:1.3
--- src/sys/arch/arm/xilinx/zynq_gpio.c:1.2	Thu Oct 27 22:35:31 2022
+++ src/sys/arch/arm/xilinx/zynq_gpio.c	Sat Oct 29 01:19:36 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: zynq_gpio.c,v 1.2 2022/10/27 22:35:31 jmcneill Exp $ */
+/* $NetBSD: zynq_gpio.c,v 1.3 2022/10/29 01:19:36 jmcneill Exp $ */
 
 /*-
  * Copyright (c) 2022 Jared McNeill 
@@ -27,7 +27,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: zynq_gpio.c,v 1.2 2022/10/27 22:35:31 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: zynq_gpio.c,v 1.3 2022/10/29 01:19:36 jmcneill Exp $");
 
 #include 
 #include 
@@ -46,7 +46,8 @@ __KERNEL_RCSID(0, "$NetBSD: zynq_gpio.c,
 #define	ZYNQ_GPIO_NPINS		(4 * 32)
 
 #define	MASK_DATA_REG(pin)	(0x000 + 0x4 * ((pin) / 16))
-#define	MASK_DATA_SET(pin, val)	pin) % 16) << 16) | ((val) << ((pin) % 16)))
+#define	MASK_DATA_SET(pin, val)	\
+	((1 << (((pin) % 16) + 16)) | ((val) << ((pin) % 16)))
 #define	DATA_RO_REG(pin)	(0x060 + 0x4 * ((pin) / 32))
 #define	DATA_RO_BIT(pin)	__BIT((pin) % 32)
 #define	DIRM_REG(pin)		(0x204 + 0x40 * ((pin) / 32))



CVS commit: src/sys/arch/arm/xilinx

2022-10-28 Thread Jared D. McNeill
Module Name:src
Committed By:   jmcneill
Date:   Sat Oct 29 01:19:36 UTC 2022

Modified Files:
src/sys/arch/arm/xilinx: zynq_gpio.c

Log Message:
Fix MASK_DATA_SET macro


To generate a diff of this commit:
cvs rdiff -u -r1.2 -r1.3 src/sys/arch/arm/xilinx/zynq_gpio.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/arm/xilinx

2022-10-27 Thread Jared D. McNeill
Module Name:src
Committed By:   jmcneill
Date:   Thu Oct 27 22:35:32 UTC 2022

Modified Files:
src/sys/arch/arm/xilinx: zynq_gpio.c

Log Message:
Fix bit macros


To generate a diff of this commit:
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/arm/xilinx/zynq_gpio.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/xilinx/zynq_gpio.c
diff -u src/sys/arch/arm/xilinx/zynq_gpio.c:1.1 src/sys/arch/arm/xilinx/zynq_gpio.c:1.2
--- src/sys/arch/arm/xilinx/zynq_gpio.c:1.1	Thu Oct 27 09:41:28 2022
+++ src/sys/arch/arm/xilinx/zynq_gpio.c	Thu Oct 27 22:35:31 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: zynq_gpio.c,v 1.1 2022/10/27 09:41:28 jmcneill Exp $ */
+/* $NetBSD: zynq_gpio.c,v 1.2 2022/10/27 22:35:31 jmcneill Exp $ */
 
 /*-
  * Copyright (c) 2022 Jared McNeill 
@@ -27,7 +27,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: zynq_gpio.c,v 1.1 2022/10/27 09:41:28 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: zynq_gpio.c,v 1.2 2022/10/27 22:35:31 jmcneill Exp $");
 
 #include 
 #include 
@@ -48,11 +48,11 @@ __KERNEL_RCSID(0, "$NetBSD: zynq_gpio.c,
 #define	MASK_DATA_REG(pin)	(0x000 + 0x4 * ((pin) / 16))
 #define	MASK_DATA_SET(pin, val)	pin) % 16) << 16) | ((val) << ((pin) % 16)))
 #define	DATA_RO_REG(pin)	(0x060 + 0x4 * ((pin) / 32))
-#define	DATA_RO_BIT(pin)	((pin) % 32)
+#define	DATA_RO_BIT(pin)	__BIT((pin) % 32)
 #define	DIRM_REG(pin)		(0x204 + 0x40 * ((pin) / 32))
-#define	DIRM_BIT(pin)		((pin) % 32)
+#define	DIRM_BIT(pin)		__BIT((pin) % 32)
 #define	OEN_REG(pin)		(0x208 + 0x40 * ((pin) / 32))
-#define	OEN_BIT(pin)		((pin) % 32)
+#define	OEN_BIT(pin)		__BIT((pin) % 32)
 
 static const struct device_compatible_entry compat_data[] = {
 	{ .compat = "xlnx,zynq-gpio-1.0" },



CVS commit: src/sys/arch/arm/xilinx

2022-10-27 Thread Jared D. McNeill
Module Name:src
Committed By:   jmcneill
Date:   Thu Oct 27 22:35:32 UTC 2022

Modified Files:
src/sys/arch/arm/xilinx: zynq_gpio.c

Log Message:
Fix bit macros


To generate a diff of this commit:
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/arm/xilinx/zynq_gpio.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/arm/xilinx

2022-10-27 Thread Jared D. McNeill
Module Name:src
Committed By:   jmcneill
Date:   Thu Oct 27 20:37:10 UTC 2022

Modified Files:
src/sys/arch/arm/xilinx: zynq_platform.c

Log Message:
Add OCM to devmap


To generate a diff of this commit:
cvs rdiff -u -r1.7 -r1.8 src/sys/arch/arm/xilinx/zynq_platform.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/xilinx/zynq_platform.c
diff -u src/sys/arch/arm/xilinx/zynq_platform.c:1.7 src/sys/arch/arm/xilinx/zynq_platform.c:1.8
--- src/sys/arch/arm/xilinx/zynq_platform.c:1.7	Thu Oct 27 08:49:08 2022
+++ src/sys/arch/arm/xilinx/zynq_platform.c	Thu Oct 27 20:37:10 2022
@@ -1,4 +1,4 @@
-/*	$NetBSD: zynq_platform.c,v 1.7 2022/10/27 08:49:08 jmcneill Exp $	*/
+/*	$NetBSD: zynq_platform.c,v 1.8 2022/10/27 20:37:10 jmcneill Exp $	*/
 
 /*-
  * Copyright (c) 2019 The NetBSD Foundation, Inc.
@@ -35,7 +35,7 @@
 #include "arml2cc.h"
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: zynq_platform.c,v 1.7 2022/10/27 08:49:08 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: zynq_platform.c,v 1.8 2022/10/27 20:37:10 jmcneill Exp $");
 
 #include 
 #include 
@@ -77,6 +77,10 @@ __KERNEL_RCSID(0, "$NetBSD: zynq_platfor
 #define ZYNQ_ARMCORE_PBASE	0xf8f0
 #define ZYNQ_ARMCORE_SIZE	0x3000
 
+#define	ZYNQ_OCM_VBASE		(ZYNQ_ARMCORE_VBASE + ZYNQ_ARMCORE_SIZE)
+#define	ZYNQ_OCM_PBASE		0xfff0
+#define	ZYNQ_OCM_SIZE		0x0010
+
 #define	ZYNQ_ARMCORE_SCU_BASE	0x
 #define	ZYNQ_ARMCORE_L2C_BASE	0x2000
 
@@ -101,6 +105,9 @@ zynq_platform_devmap(void)
 		DEVMAP_ENTRY(ZYNQ_ARMCORE_VBASE,
 			 ZYNQ_ARMCORE_PBASE,
 			 ZYNQ_ARMCORE_SIZE),
+		DEVMAP_ENTRY(ZYNQ_OCM_VBASE,
+			 ZYNQ_OCM_PBASE,
+			 ZYNQ_OCM_SIZE),
 		DEVMAP_ENTRY_END
 	};
 



CVS commit: src/sys/arch/arm/xilinx

2022-10-27 Thread Jared D. McNeill
Module Name:src
Committed By:   jmcneill
Date:   Thu Oct 27 20:37:10 UTC 2022

Modified Files:
src/sys/arch/arm/xilinx: zynq_platform.c

Log Message:
Add OCM to devmap


To generate a diff of this commit:
cvs rdiff -u -r1.7 -r1.8 src/sys/arch/arm/xilinx/zynq_platform.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/arm/xilinx

2022-10-27 Thread Jared D. McNeill
Module Name:src
Committed By:   jmcneill
Date:   Thu Oct 27 08:49:08 UTC 2022

Modified Files:
src/sys/arch/arm/xilinx: zynq_platform.c

Log Message:
Add AP startup for Zynq-7000.


To generate a diff of this commit:
cvs rdiff -u -r1.6 -r1.7 src/sys/arch/arm/xilinx/zynq_platform.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/xilinx/zynq_platform.c
diff -u src/sys/arch/arm/xilinx/zynq_platform.c:1.6 src/sys/arch/arm/xilinx/zynq_platform.c:1.7
--- src/sys/arch/arm/xilinx/zynq_platform.c:1.6	Tue Oct 25 22:59:10 2022
+++ src/sys/arch/arm/xilinx/zynq_platform.c	Thu Oct 27 08:49:08 2022
@@ -1,4 +1,4 @@
-/*	$NetBSD: zynq_platform.c,v 1.6 2022/10/25 22:59:10 jmcneill Exp $	*/
+/*	$NetBSD: zynq_platform.c,v 1.7 2022/10/27 08:49:08 jmcneill Exp $	*/
 
 /*-
  * Copyright (c) 2019 The NetBSD Foundation, Inc.
@@ -35,7 +35,7 @@
 #include "arml2cc.h"
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: zynq_platform.c,v 1.6 2022/10/25 22:59:10 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: zynq_platform.c,v 1.7 2022/10/27 08:49:08 jmcneill Exp $");
 
 #include 
 #include 
@@ -50,6 +50,7 @@ __KERNEL_RCSID(0, "$NetBSD: zynq_platfor
 #include 
 
 #include 
+#include 
 #include 
 
 #include 
@@ -58,8 +59,9 @@ __KERNEL_RCSID(0, "$NetBSD: zynq_platfor
 
 #include 
 
-#define	ZYNQ_REF_FREQ	2400
+#include 
 
+#define	ZYNQ_REF_FREQ	2400
 #define	ZYNQ7000_DDR_PBASE	0x
 #define	ZYNQ7000_DDR_SIZE	0x4000
 
@@ -75,6 +77,12 @@ __KERNEL_RCSID(0, "$NetBSD: zynq_platfor
 #define ZYNQ_ARMCORE_PBASE	0xf8f0
 #define ZYNQ_ARMCORE_SIZE	0x3000
 
+#define	ZYNQ_ARMCORE_SCU_BASE	0x
+#define	ZYNQ_ARMCORE_L2C_BASE	0x2000
+
+#define	ZYNQ7000_CPU1_ENTRY	0xfff0
+#define	ZYNQ7000_CPU1_ENTRY_SZ	4
+
 extern struct bus_space arm_generic_bs_tag;
 extern struct arm32_bus_dma_tag arm_generic_dma_tag;
 
@@ -135,7 +143,51 @@ zynq_platform_uart_freq(void)
 	return ZYNQ_REF_FREQ;
 }
 
-#define ZYNQ_ARMCORE_L2C_BASE	0x2000
+#ifdef MULTIPROCESSOR
+static int
+zynq_platform_mpstart(void)
+{
+	bus_space_tag_t bst = &arm_generic_bs_tag;
+	bus_space_handle_t bsh;
+	uint32_t val;
+	int error;
+	u_int i;
+
+	/* Invalidate all SCU cache tags and enable SCU. */
+	bsh = ZYNQ_ARMCORE_VBASE + ZYNQ_ARMCORE_SCU_BASE;
+	bus_space_write_4(bst, bsh, SCU_INV_ALL_REG, 0x);
+	val = bus_space_read_4(bst, bsh, SCU_CTL);
+	bus_space_write_4(bst, bsh, SCU_CTL, val | SCU_CTL_SCU_ENA);
+	armv7_dcache_wbinv_all();
+
+	/* Write start address for CPU1. */
+	error = bus_space_map(bst, ZYNQ7000_CPU1_ENTRY,
+	ZYNQ7000_CPU1_ENTRY_SZ, 0, &bsh);
+	if (error) {
+		panic("%s: Couldn't map OCM: %d", __func__, error);
+	}
+	bus_space_write_4(bst, bsh, 0, KERN_VTOPHYS((vaddr_t)cpu_mpstart));
+	bus_space_unmap(bst, bsh, ZYNQ7000_CPU1_ENTRY_SZ);
+
+	dsb(sy);
+	sev();
+
+	const u_int cpuindex = 1;
+	for (i = 0x1000; i > 0; i--) {
+		if (cpu_hatched_p(cpuindex)) {
+			break;
+		}
+	}
+	if (i == 0) {
+		aprint_error("cpu%d: WARNING: AP failed to start\n",
+		cpuindex);
+		return EIO;
+	}
+
+	return 0;
+}
+#endif
+
 #define ZYNQ_ARM_PL310_BASE	ZYNQ_ARMCORE_VBASE + ZYNQ_ARMCORE_L2C_BASE
 
 static void
@@ -184,8 +236,8 @@ static const struct arm_platform zynq_pl
 	.ap_reset = zynq_platform_reset,
 	.ap_delay = a9tmr_delay,
 	.ap_uart_freq = zynq_platform_uart_freq,
-#if 0
-	.ap_mpstart = arm_fdt_cpu_mpstart,
+#ifdef MULTIPROCESSOR
+	.ap_mpstart = zynq_platform_mpstart,
 #endif
 };
 



CVS commit: src/sys/arch/arm/xilinx

2022-10-27 Thread Jared D. McNeill
Module Name:src
Committed By:   jmcneill
Date:   Thu Oct 27 08:49:08 UTC 2022

Modified Files:
src/sys/arch/arm/xilinx: zynq_platform.c

Log Message:
Add AP startup for Zynq-7000.


To generate a diff of this commit:
cvs rdiff -u -r1.6 -r1.7 src/sys/arch/arm/xilinx/zynq_platform.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/arm/xilinx

2022-10-27 Thread Nick Hudson
Module Name:src
Committed By:   skrll
Date:   Thu Oct 27 07:57:46 UTC 2022

Modified Files:
src/sys/arch/arm/xilinx: zynq_uart.c

Log Message:
Fix build.
Sprinkle some consistency


To generate a diff of this commit:
cvs rdiff -u -r1.4 -r1.5 src/sys/arch/arm/xilinx/zynq_uart.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/xilinx/zynq_uart.c
diff -u src/sys/arch/arm/xilinx/zynq_uart.c:1.4 src/sys/arch/arm/xilinx/zynq_uart.c:1.5
--- src/sys/arch/arm/xilinx/zynq_uart.c:1.4	Wed Oct 26 23:38:07 2022
+++ src/sys/arch/arm/xilinx/zynq_uart.c	Thu Oct 27 07:57:46 2022
@@ -1,4 +1,4 @@
-/*	$NetBSD: zynq_uart.c,v 1.4 2022/10/26 23:38:07 riastradh Exp $	*/
+/*	$NetBSD: zynq_uart.c,v 1.5 2022/10/27 07:57:46 skrll Exp $	*/
 
 /*
  * Copyright (c) 2012  Genetec Corporation.  All rights reserved.
@@ -96,7 +96,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: zynq_uart.c,v 1.4 2022/10/26 23:38:07 riastradh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: zynq_uart.c,v 1.5 2022/10/27 07:57:46 skrll Exp $");
 
 #include "opt_soc.h"
 #include "opt_console.h"
@@ -1904,10 +1904,9 @@ zynquart_common_getc(dev_t dev, struct z
 
 	c = 0xff & bus_space_read_4(iot, ioh, UART_TX_RX_FIFO);
 
-	{
+	if (!db_active) {
 		int cn_trapped __unused = 0;
-		if (!db_active) {
-			cn_check_magic(dev, c, zynquart_cnm_state);
+		cn_check_magic(dev, c, zynquart_cnm_state);
 	}
 	splx(s);
 	return (c);
@@ -1923,8 +1922,8 @@ zynquart_common_putc(dev_t dev, struct z
 
 	if (!READAHEAD_IS_FULL() &&
 	!(bus_space_read_4(iot, ioh, UART_CHANNEL_STS) & STS_REMPTY)) {
+		int cn_trapped __unused = 0;
 
-		int __attribute__((__unused__))cn_trapped = 0;
 		cin = bus_space_read_4(iot, ioh, UART_TX_RX_FIFO);
 		cn_check_magic(dev, cin & 0xff, zynquart_cnm_state);
 		zynquart_readahead_in = (zynquart_readahead_in + 1) &



CVS commit: src/sys/arch/arm/xilinx

2022-10-27 Thread Nick Hudson
Module Name:src
Committed By:   skrll
Date:   Thu Oct 27 07:57:46 UTC 2022

Modified Files:
src/sys/arch/arm/xilinx: zynq_uart.c

Log Message:
Fix build.
Sprinkle some consistency


To generate a diff of this commit:
cvs rdiff -u -r1.4 -r1.5 src/sys/arch/arm/xilinx/zynq_uart.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/arm/xilinx

2022-10-26 Thread Jared D. McNeill
Module Name:src
Committed By:   jmcneill
Date:   Wed Oct 26 22:14:22 UTC 2022

Modified Files:
src/sys/arch/arm/xilinx: zynq7000_clkc.c

Log Message:
Since this node is a child of a syscon, the reg property doesn't fully
describe the device physical address. Use syscon accessors to read/write
clock registers instead.


To generate a diff of this commit:
cvs rdiff -u -r1.2 -r1.3 src/sys/arch/arm/xilinx/zynq7000_clkc.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/arm/xilinx

2022-10-26 Thread Jared D. McNeill
Module Name:src
Committed By:   jmcneill
Date:   Wed Oct 26 22:14:22 UTC 2022

Modified Files:
src/sys/arch/arm/xilinx: zynq7000_clkc.c

Log Message:
Since this node is a child of a syscon, the reg property doesn't fully
describe the device physical address. Use syscon accessors to read/write
clock registers instead.


To generate a diff of this commit:
cvs rdiff -u -r1.2 -r1.3 src/sys/arch/arm/xilinx/zynq7000_clkc.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/xilinx/zynq7000_clkc.c
diff -u src/sys/arch/arm/xilinx/zynq7000_clkc.c:1.2 src/sys/arch/arm/xilinx/zynq7000_clkc.c:1.3
--- src/sys/arch/arm/xilinx/zynq7000_clkc.c:1.2	Wed Oct 26 10:55:23 2022
+++ src/sys/arch/arm/xilinx/zynq7000_clkc.c	Wed Oct 26 22:14:22 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: zynq7000_clkc.c,v 1.2 2022/10/26 10:55:23 jmcneill Exp $ */
+/* $NetBSD: zynq7000_clkc.c,v 1.3 2022/10/26 22:14:22 jmcneill Exp $ */
 
 /*-
  * Copyright (c) 2022 Jared McNeill 
@@ -28,7 +28,7 @@
 
 #include 
 
-__KERNEL_RCSID(0, "$NetBSD: zynq7000_clkc.c,v 1.2 2022/10/26 10:55:23 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: zynq7000_clkc.c,v 1.3 2022/10/26 22:14:22 jmcneill Exp $");
 
 #include 
 #include 
@@ -41,29 +41,30 @@ __KERNEL_RCSID(0, "$NetBSD: zynq7000_clk
 #include 
 
 #include 
+#include 
 
-#define	ARM_PLL_CTRL	0x000
-#define	DDR_PLL_CTRL	0x004
-#define	IO_PLL_CTRL	0x008
+#define	ARM_PLL_CTRL	0x100
+#define	DDR_PLL_CTRL	0x104
+#define	IO_PLL_CTRL	0x108
 #define	 PLL_FDIV		__BITS(18,12)
-#define	ARM_CLK_CTRL	0x020
-#define	 ARM_CLK_CTRL_DIVISOR		__BITS(13,8)
+#define	ARM_CLK_CTRL	0x120
 #define	 ARM_CLK_CTRL_CPU_1XCLKACT	__BIT(27)
 #define	 ARM_CLK_CTRL_CPU_2XCLKACT	__BIT(26)
 #define	 ARM_CLK_CTRL_CPU_3OR2XCLKACT	__BIT(25)
 #define	 ARM_CLK_CTRL_CPU_6OR4XCLKACT	__BIT(24)
-#define	APER_CLK_CTRL	0x02c
+#define	 ARM_CLK_CTRL_DIVISOR		__BITS(13,8)
+#define	APER_CLK_CTRL	0x12c
 #define	 UART1_CPU_1XCLKACT	__BIT(21)
 #define	 UART0_CPU_1XCLKACT	__BIT(20)
 #define	 SDI1_CPU_1XCLKACT	__BIT(11)
 #define	 SDI0_CPU_1XCLKACT	__BIT(10)
-#define	SDIO_CLK_CTRL	0x050
-#define	UART_CLK_CTRL	0x054
+#define	SDIO_CLK_CTRL	0x150
+#define	UART_CLK_CTRL	0x154
 #define	 CLK_CTRL_DIVISOR	__BITS(13,8)
 #define	 CLK_CTRL_SRCSEL	__BITS(5,4)
 #define	 CLK_CTRL_CLKACT1	__BIT(1)
 #define	 CLK_CTRL_CLKACT0	__BIT(0)
-#define	CLK_621_TRUE	0x0C4
+#define	CLK_621_TRUE	0x1C4
 #define	 CLK_621_TRUE_EN	__BIT(0)
 
 enum xynq7000_clkid {
@@ -135,9 +136,7 @@ struct zynq7000_clkc_softc {
 	struct clk		sc_clk[num_clkid];
 
 	u_int			sc_ps_clk_frequency;
-
-	bus_space_tag_t		sc_bst;
-	bus_space_handle_t	sc_bsh;
+	struct syscon		*sc_syscon;
 };
 
 CFATTACH_DECL_NEW(zynq7000_clkc, sizeof(struct zynq7000_clkc_softc),
@@ -169,7 +168,9 @@ zynq7000_clkc_get_rate_pll(struct zynq70
 {
 	uint32_t val;
 
-	val = bus_space_read_4(sc->sc_bst, sc->sc_bsh, reg);
+	syscon_lock(sc->sc_syscon);
+	val = syscon_read_4(sc->sc_syscon, reg);
+	syscon_unlock(sc->sc_syscon);
 
 	return sc->sc_ps_clk_frequency * __SHIFTOUT(val, PLL_FDIV);
 }
@@ -181,7 +182,10 @@ zynq7000_clkc_get_rate_iop(struct zynq70
 	uint32_t val;
 	u_int prate, sel;
 
-	val = bus_space_read_4(sc->sc_bst, sc->sc_bsh, reg);
+	syscon_lock(sc->sc_syscon);
+	val = syscon_read_4(sc->sc_syscon, reg);
+	syscon_unlock(sc->sc_syscon);
+
 	sel = __SHIFTOUT(val, CLK_CTRL_SRCSEL);
 	if (sel == 2) {
 		prate = zynq7000_clkc_clk_get_rate(sc,
@@ -211,15 +215,17 @@ zynq7000_clkc_clk_get_rate(void *priv, s
 	} else if (clk == &sc->sc_clk[clkid_cpu_6or4x]) {
 		prate = zynq7000_clkc_clk_get_rate(sc,
 		&sc->sc_clk[clkid_cpu_1x]);
-		val = bus_space_read_4(sc->sc_bst, sc->sc_bsh,
-		CLK_621_TRUE);
+		syscon_lock(sc->sc_syscon);
+		val = syscon_read_4(sc->sc_syscon, CLK_621_TRUE);
+		syscon_unlock(sc->sc_syscon);
 		return (val & CLK_621_TRUE_EN) != 0 ?
 		prate * 6 : prate * 4;
 	} else if (clk == &sc->sc_clk[clkid_cpu_3or2x]) {
 		prate = zynq7000_clkc_clk_get_rate(sc,
 		&sc->sc_clk[clkid_cpu_1x]);
-		val = bus_space_read_4(sc->sc_bst, sc->sc_bsh,
-		CLK_621_TRUE);
+		syscon_lock(sc->sc_syscon);
+		val = syscon_read_4(sc->sc_syscon, CLK_621_TRUE);
+		syscon_unlock(sc->sc_syscon);
 		return (val & CLK_621_TRUE_EN) != 0 ?
 		prate * 3 : prate * 2;
 	} else if (clk == &sc->sc_clk[clkid_cpu_2x]) {
@@ -229,9 +235,10 @@ zynq7000_clkc_clk_get_rate(void *priv, s
 	} else if (clk == &sc->sc_clk[clkid_cpu_1x]) {
 		prate = zynq7000_clkc_clk_get_rate(sc,
 		&sc->sc_clk[clkid_armpll]);
-		val = bus_space_read_4(sc->sc_bst, sc->sc_bsh,
-		ARM_CLK_CTRL);
-		return prate / __SHIFTOUT(val, ARM_CLK_CTRL_DIVISOR);
+		syscon_lock(sc->sc_syscon);
+		val = syscon_read_4(sc->sc_syscon, ARM_CLK_CTRL);
+		syscon_unlock(sc->sc_syscon);
+		return prate / __SHIFTOUT(val, ARM_CLK_CTRL_DIVISOR) / 6;
 	} else if (clk == &sc->sc_clk[clkid_sdio0] ||
 		   clk == &sc->sc_clk[clkid_sdio1]) {
 		return zynq7000_clkc_get_rate_iop(sc, SDIO_CL

CVS commit: src/sys/arch/arm/xilinx

2022-10-26 Thread Jared D. McNeill
Module Name:src
Committed By:   jmcneill
Date:   Wed Oct 26 11:31:11 UTC 2022

Modified Files:
src/sys/arch/arm/xilinx: zynq_cemac.c

Log Message:
Inherit MAC address from Devicetree "local-mac-address" property.


To generate a diff of this commit:
cvs rdiff -u -r1.3 -r1.4 src/sys/arch/arm/xilinx/zynq_cemac.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/xilinx/zynq_cemac.c
diff -u src/sys/arch/arm/xilinx/zynq_cemac.c:1.3 src/sys/arch/arm/xilinx/zynq_cemac.c:1.4
--- src/sys/arch/arm/xilinx/zynq_cemac.c:1.3	Tue Oct 25 22:49:39 2022
+++ src/sys/arch/arm/xilinx/zynq_cemac.c	Wed Oct 26 11:31:11 2022
@@ -1,4 +1,4 @@
-/*	$NetBSD: zynq_cemac.c,v 1.3 2022/10/25 22:49:39 jmcneill Exp $	*/
+/*	$NetBSD: zynq_cemac.c,v 1.4 2022/10/26 11:31:11 jmcneill Exp $	*/
 /*-
  * Copyright (c) 2015  Genetec Corporation.  All rights reserved.
  * Written by Hashimoto Kenichi for Genetec Corporation.
@@ -26,7 +26,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: zynq_cemac.c,v 1.3 2022/10/25 22:49:39 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: zynq_cemac.c,v 1.4 2022/10/26 11:31:11 jmcneill Exp $");
 
 #include "opt_soc.h"
 
@@ -41,6 +41,8 @@ __KERNEL_RCSID(0, "$NetBSD: zynq_cemac.c
 #include 
 #include 
 
+#include 
+
 #include 
 
 static const struct device_compatible_entry compat_data[] = {
@@ -61,11 +63,13 @@ cemac_attach(device_t parent, device_t s
 {
 	struct fdt_attach_args * const faa = aux;
 	const int phandle = faa->faa_phandle;
+	prop_dictionary_t prop = device_properties(self);
 	bus_space_handle_t ioh;
 	char intrstr[128];
+	const char *macaddr;
 	bus_addr_t addr;
 	bus_size_t size;
-	int error;
+	int error, len;
 
 	if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0) {
 		aprint_error(": couldn't get registers\n");
@@ -90,6 +94,11 @@ cemac_attach(device_t parent, device_t s
 		return;
 	}
 
+	macaddr = fdtbus_get_prop(phandle, "local-mac-address", &len);
+	if (macaddr != NULL && len == ETHER_ADDR_LEN) {
+		prop_dictionary_set_data(prop, "mac-address", macaddr, len);
+	}
+
 	cemac_attach_common(self, faa->faa_bst, ioh, faa->faa_dmat, CEMAC_FLAG_GEM);
 	aprint_normal_dev(self, "interrupting on %s\n", intrstr);
 }



CVS commit: src/sys/arch/arm/xilinx

2022-10-26 Thread Jared D. McNeill
Module Name:src
Committed By:   jmcneill
Date:   Wed Oct 26 11:31:11 UTC 2022

Modified Files:
src/sys/arch/arm/xilinx: zynq_cemac.c

Log Message:
Inherit MAC address from Devicetree "local-mac-address" property.


To generate a diff of this commit:
cvs rdiff -u -r1.3 -r1.4 src/sys/arch/arm/xilinx/zynq_cemac.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/arm/xilinx

2022-10-25 Thread Jared D. McNeill
Module Name:src
Committed By:   jmcneill
Date:   Tue Oct 25 22:59:10 UTC 2022

Modified Files:
src/sys/arch/arm/xilinx: zynq_platform.c

Log Message:
Remove unnecessary code in zynq_platform_device_register


To generate a diff of this commit:
cvs rdiff -u -r1.5 -r1.6 src/sys/arch/arm/xilinx/zynq_platform.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/xilinx/zynq_platform.c
diff -u src/sys/arch/arm/xilinx/zynq_platform.c:1.5 src/sys/arch/arm/xilinx/zynq_platform.c:1.6
--- src/sys/arch/arm/xilinx/zynq_platform.c:1.5	Sat Apr 24 23:36:29 2021
+++ src/sys/arch/arm/xilinx/zynq_platform.c	Tue Oct 25 22:59:10 2022
@@ -1,4 +1,4 @@
-/*	$NetBSD: zynq_platform.c,v 1.5 2021/04/24 23:36:29 thorpej Exp $	*/
+/*	$NetBSD: zynq_platform.c,v 1.6 2022/10/25 22:59:10 jmcneill Exp $	*/
 
 /*-
  * Copyright (c) 2019 The NetBSD Foundation, Inc.
@@ -35,7 +35,7 @@
 #include "arml2cc.h"
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: zynq_platform.c,v 1.5 2021/04/24 23:36:29 thorpej Exp $");
+__KERNEL_RCSID(0, "$NetBSD: zynq_platform.c,v 1.6 2022/10/25 22:59:10 jmcneill Exp $");
 
 #include 
 #include 
@@ -127,12 +127,6 @@ zynq_platform_early_putchar(char c)
 static void
 zynq_platform_device_register(device_t dev, void *aux)
 {
-	prop_dictionary_t dict = device_properties(dev);
-
-	if (device_is_a(dev, "arma9tmr")) {
-		prop_dictionary_set_uint32(dict, "frequency",
-			ZYNQ_REF_FREQ / 4);
-	}
 }
 
 static u_int



CVS commit: src/sys/arch/arm/xilinx

2022-10-25 Thread Jared D. McNeill
Module Name:src
Committed By:   jmcneill
Date:   Tue Oct 25 22:59:10 UTC 2022

Modified Files:
src/sys/arch/arm/xilinx: zynq_platform.c

Log Message:
Remove unnecessary code in zynq_platform_device_register


To generate a diff of this commit:
cvs rdiff -u -r1.5 -r1.6 src/sys/arch/arm/xilinx/zynq_platform.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/arm/xilinx

2022-10-25 Thread Jared D. McNeill
Module Name:src
Committed By:   jmcneill
Date:   Tue Oct 25 22:52:48 UTC 2022

Modified Files:
src/sys/arch/arm/xilinx: zynq7000_usb.c

Log Message:
Fixup mixed up log messages.


To generate a diff of this commit:
cvs rdiff -u -r1.2 -r1.3 src/sys/arch/arm/xilinx/zynq7000_usb.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/xilinx/zynq7000_usb.c
diff -u src/sys/arch/arm/xilinx/zynq7000_usb.c:1.2 src/sys/arch/arm/xilinx/zynq7000_usb.c:1.3
--- src/sys/arch/arm/xilinx/zynq7000_usb.c:1.2	Wed Jan 27 03:10:20 2021
+++ src/sys/arch/arm/xilinx/zynq7000_usb.c	Tue Oct 25 22:52:48 2022
@@ -1,4 +1,4 @@
-/*	$NetBSD: zynq7000_usb.c,v 1.2 2021/01/27 03:10:20 thorpej Exp $	*/
+/*	$NetBSD: zynq7000_usb.c,v 1.3 2022/10/25 22:52:48 jmcneill Exp $	*/
 /*-
  * Copyright (c) 2015  Genetec Corporation.  All rights reserved.
  * Written by Hashimoto Kenichi for Genetec Corporation.
@@ -26,7 +26,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: zynq7000_usb.c,v 1.2 2021/01/27 03:10:20 thorpej Exp $");
+__KERNEL_RCSID(0, "$NetBSD: zynq7000_usb.c,v 1.3 2022/10/25 22:52:48 jmcneill Exp $");
 
 #include "opt_soc.h"
 
@@ -93,13 +93,13 @@ zynqusb_attach(device_t parent, device_t
 	}
 
 	if (fdtbus_intr_establish(phandle, 0, IPL_USB, IST_LEVEL, ehci_intr,
-		hsc) == NULL) {
-		aprint_error_dev(self, "failed to establish interrupt on %s\n",
+  hsc) == NULL) {
+		aprint_error("failed to establish interrupt on %s\n",
 		intrstr);
 		return;
 	}
-	aprint_normal_dev(self, "interrupting on %s\n", intrstr);
 
 	zynqusb_attach_common(parent, self, faa->faa_bst, faa->faa_dmat,
 	addr, size, 0, ZYNQUSBC_IF_ULPI, ZYNQUSB_HOST);
+	aprint_normal_dev(self, "interrupting on %s\n", intrstr);
 }



CVS commit: src/sys/arch/arm/xilinx

2022-10-25 Thread Jared D. McNeill
Module Name:src
Committed By:   jmcneill
Date:   Tue Oct 25 22:52:48 UTC 2022

Modified Files:
src/sys/arch/arm/xilinx: zynq7000_usb.c

Log Message:
Fixup mixed up log messages.


To generate a diff of this commit:
cvs rdiff -u -r1.2 -r1.3 src/sys/arch/arm/xilinx/zynq7000_usb.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/arm/xilinx

2022-10-25 Thread Jared D. McNeill
Module Name:src
Committed By:   jmcneill
Date:   Tue Oct 25 22:49:39 UTC 2022

Modified Files:
src/sys/arch/arm/xilinx: zynq7000_uart.c zynq_cemac.c

Log Message:
Fixup some mixed up log messages.


To generate a diff of this commit:
cvs rdiff -u -r1.2 -r1.3 src/sys/arch/arm/xilinx/zynq7000_uart.c \
src/sys/arch/arm/xilinx/zynq_cemac.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/xilinx/zynq7000_uart.c
diff -u src/sys/arch/arm/xilinx/zynq7000_uart.c:1.2 src/sys/arch/arm/xilinx/zynq7000_uart.c:1.3
--- src/sys/arch/arm/xilinx/zynq7000_uart.c:1.2	Wed Jan 27 03:10:20 2021
+++ src/sys/arch/arm/xilinx/zynq7000_uart.c	Tue Oct 25 22:49:39 2022
@@ -1,4 +1,4 @@
-/*	$NetBSD: zynq7000_uart.c,v 1.2 2021/01/27 03:10:20 thorpej Exp $	*/
+/*	$NetBSD: zynq7000_uart.c,v 1.3 2022/10/25 22:49:39 jmcneill Exp $	*/
 
 /*-
  * Copyright (c) 2015  Genetec Corporation.  All rights reserved.
@@ -27,7 +27,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: zynq7000_uart.c,v 1.2 2021/01/27 03:10:20 thorpej Exp $");
+__KERNEL_RCSID(0, "$NetBSD: zynq7000_uart.c,v 1.3 2022/10/25 22:49:39 jmcneill Exp $");
 
 #include "opt_soc.h"
 #include "opt_console.h"
@@ -75,13 +75,13 @@ zynquart_attach(device_t parent, device_
 	}
 
 	if (fdtbus_intr_establish(phandle, 0, IPL_SERIAL, IST_LEVEL,
-		zynquartintr, device_private(self)) == NULL) {
-		aprint_error_dev(self, "failed to establish interrupt on %s\n", intrstr);
+  zynquartintr, device_private(self)) == NULL) {
+		aprint_error(": failed to establish interrupt on %s\n", intrstr);
 		return;
 	}
-	aprint_normal_dev(self, "interrupting on %s\n", intrstr);
 
 	zynquart_attach_common(parent, self, faa->faa_bst, addr, size, 0);
+	aprint_normal_dev(self, "interrupting on %s\n", intrstr);
 }
 
 /*
Index: src/sys/arch/arm/xilinx/zynq_cemac.c
diff -u src/sys/arch/arm/xilinx/zynq_cemac.c:1.2 src/sys/arch/arm/xilinx/zynq_cemac.c:1.3
--- src/sys/arch/arm/xilinx/zynq_cemac.c:1.2	Wed Jan 27 03:10:20 2021
+++ src/sys/arch/arm/xilinx/zynq_cemac.c	Tue Oct 25 22:49:39 2022
@@ -1,4 +1,4 @@
-/*	$NetBSD: zynq_cemac.c,v 1.2 2021/01/27 03:10:20 thorpej Exp $	*/
+/*	$NetBSD: zynq_cemac.c,v 1.3 2022/10/25 22:49:39 jmcneill Exp $	*/
 /*-
  * Copyright (c) 2015  Genetec Corporation.  All rights reserved.
  * Written by Hashimoto Kenichi for Genetec Corporation.
@@ -26,7 +26,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: zynq_cemac.c,v 1.2 2021/01/27 03:10:20 thorpej Exp $");
+__KERNEL_RCSID(0, "$NetBSD: zynq_cemac.c,v 1.3 2022/10/25 22:49:39 jmcneill Exp $");
 
 #include "opt_soc.h"
 
@@ -85,12 +85,12 @@ cemac_attach(device_t parent, device_t s
 	}
 
 	if (fdtbus_intr_establish(phandle, 0, IPL_NET, 0, cemac_intr,
-		device_private(self)) == NULL) {
-		aprint_error_dev(self, "failed to establish interrupt on %s\n", intrstr);
+  device_private(self)) == NULL) {
+		aprint_error(": failed to establish interrupt on %s\n", intrstr);
 		return;
 	}
-	aprint_normal_dev(self, "interrupting on %s\n", intrstr);
 
 	cemac_attach_common(self, faa->faa_bst, ioh, faa->faa_dmat, CEMAC_FLAG_GEM);
+	aprint_normal_dev(self, "interrupting on %s\n", intrstr);
 }
 



CVS commit: src/sys/arch/arm/xilinx

2022-10-25 Thread Jared D. McNeill
Module Name:src
Committed By:   jmcneill
Date:   Tue Oct 25 22:49:39 UTC 2022

Modified Files:
src/sys/arch/arm/xilinx: zynq7000_uart.c zynq_cemac.c

Log Message:
Fixup some mixed up log messages.


To generate a diff of this commit:
cvs rdiff -u -r1.2 -r1.3 src/sys/arch/arm/xilinx/zynq7000_uart.c \
src/sys/arch/arm/xilinx/zynq_cemac.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/arm/arm

2022-10-19 Thread Nick Hudson
Module Name:src
Committed By:   skrll
Date:   Thu Oct 20 06:58:38 UTC 2022

Modified Files:
src/sys/arch/arm/arm: bcopyinout.S bcopyinout_xscale.S blockio.S
copystr.S cpu_in_cksum.S cpufunc_asm_arm10.S cpufunc_asm_arm67.S
cpufunc_asm_arm7tdmi.S cpufunc_asm_arm8.S cpufunc_asm_arm9.S
cpufunc_asm_armv4.S cpufunc_asm_armv5.S cpufunc_asm_fa526.S
cpufunc_asm_pj4b.S cpufunc_asm_sa1.S cpufunc_asm_xscale.S vectors.S

Log Message:
Trailing whitespace.


To generate a diff of this commit:
cvs rdiff -u -r1.22 -r1.23 src/sys/arch/arm/arm/bcopyinout.S
cvs rdiff -u -r1.11 -r1.12 src/sys/arch/arm/arm/bcopyinout_xscale.S \
src/sys/arch/arm/arm/cpufunc_asm_arm10.S \
src/sys/arch/arm/arm/cpufunc_asm_arm9.S
cvs rdiff -u -r1.8 -r1.9 src/sys/arch/arm/arm/blockio.S \
src/sys/arch/arm/arm/cpufunc_asm_armv5.S
cvs rdiff -u -r1.13 -r1.14 src/sys/arch/arm/arm/copystr.S \
src/sys/arch/arm/arm/cpufunc_asm_pj4b.S
cvs rdiff -u -r1.12 -r1.13 src/sys/arch/arm/arm/cpu_in_cksum.S
cvs rdiff -u -r1.7 -r1.8 src/sys/arch/arm/arm/cpufunc_asm_arm67.S \
src/sys/arch/arm/arm/cpufunc_asm_arm7tdmi.S \
src/sys/arch/arm/arm/cpufunc_asm_fa526.S
cvs rdiff -u -r1.10 -r1.11 src/sys/arch/arm/arm/cpufunc_asm_arm8.S \
src/sys/arch/arm/arm/vectors.S
cvs rdiff -u -r1.5 -r1.6 src/sys/arch/arm/arm/cpufunc_asm_armv4.S
cvs rdiff -u -r1.15 -r1.16 src/sys/arch/arm/arm/cpufunc_asm_sa1.S
cvs rdiff -u -r1.24 -r1.25 src/sys/arch/arm/arm/cpufunc_asm_xscale.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/arm/bcopyinout.S
diff -u src/sys/arch/arm/arm/bcopyinout.S:1.22 src/sys/arch/arm/arm/bcopyinout.S:1.23
--- src/sys/arch/arm/arm/bcopyinout.S:1.22	Fri Dec 11 09:14:19 2020
+++ src/sys/arch/arm/arm/bcopyinout.S	Thu Oct 20 06:58:38 2022
@@ -1,4 +1,4 @@
-/*	$NetBSD: bcopyinout.S,v 1.22 2020/12/11 09:14:19 dholland Exp $	*/
+/*	$NetBSD: bcopyinout.S,v 1.23 2022/10/20 06:58:38 skrll Exp $	*/
 
 /*
  * Copyright (c) 2002 Wasabi Systems, Inc.
@@ -52,14 +52,14 @@
 #include "bcopyinout_xscale.S"
 #else
 
-RCSID("$NetBSD: bcopyinout.S,v 1.22 2020/12/11 09:14:19 dholland Exp $")	
+RCSID("$NetBSD: bcopyinout.S,v 1.23 2022/10/20 06:58:38 skrll Exp $")
 
 	.text
 	.align	0
 
 #define SAVE_REGS	stmfd	sp!, {r4-r11}
 #define RESTORE_REGS	ldmfd	sp!, {r4-r11}
-		
+
 #if defined(__XSCALE__) || defined(_ARM_ARCH_6)
 #define HELLOCPP #
 #define PREFETCH(rx,o)	pld	[ rx , HELLOCPP (o) ]
@@ -78,7 +78,7 @@ RCSID("$NetBSD: bcopyinout.S,v 1.22 2020
  * r4-r11 are scratch
  */
 ENTRY(copyin)
-	/* Quick exit if length is zero */	
+	/* Quick exit if length is zero */
 	teq	r2, #0
 	moveq	r0, #0
 	RETc(eq)
@@ -291,7 +291,7 @@ END(copyin)
  */
 
 ENTRY(copyout)
-	/* Quick exit if length is zero */	
+	/* Quick exit if length is zero */
 	teq	r2, #0
 	moveq	r0, #0
 	moveq	pc, lr
@@ -494,7 +494,7 @@ END(copyout)
  */
 
 ENTRY(kcopy)
-	/* Quick exit if length is zero */	
+	/* Quick exit if length is zero */
 	teq	r2, #0
 	moveq	r0, #0
 	moveq	pc, lr

Index: src/sys/arch/arm/arm/bcopyinout_xscale.S
diff -u src/sys/arch/arm/arm/bcopyinout_xscale.S:1.11 src/sys/arch/arm/arm/bcopyinout_xscale.S:1.12
--- src/sys/arch/arm/arm/bcopyinout_xscale.S:1.11	Sun Dec  1 02:54:33 2013
+++ src/sys/arch/arm/arm/bcopyinout_xscale.S	Thu Oct 20 06:58:38 2022
@@ -1,4 +1,4 @@
-/*	$NetBSD: bcopyinout_xscale.S,v 1.11 2013/12/01 02:54:33 joerg Exp $	*/
+/*	$NetBSD: bcopyinout_xscale.S,v 1.12 2022/10/20 06:58:38 skrll Exp $	*/
 
 /*
  * Copyright 2003 Wasabi Systems, Inc.
@@ -35,7 +35,7 @@
  * POSSIBILITY OF SUCH DAMAGE.
  */
 
-RCSID("$NetBSD: bcopyinout_xscale.S,v 1.11 2013/12/01 02:54:33 joerg Exp $")	
+RCSID("$NetBSD: bcopyinout_xscale.S,v 1.12 2022/10/20 06:58:38 skrll Exp $")
 
 	.text
 	.align	0
@@ -292,10 +292,10 @@ ENTRY(copyin)
 	str	r6, [r1], #0x04
 	str	r7, [r1], #0x04
 .Lcopyin_bad1:
-	subs	r2, r2, #0x10 
+	subs	r2, r2, #0x10
 	bge	.Lcopyin_bad1_loop16
 
-	adds	r2, r2, #0x10 
+	adds	r2, r2, #0x10
 	popeq	{r4-r7}
 	RETc(eq)			/* Return now if done */
 	subs	r2, r2, #0x04
@@ -353,10 +353,10 @@ ENTRY(copyin)
 	str	r6, [r1], #0x04
 	str	r7, [r1], #0x04
 .Lcopyin_bad2:
-	subs	r2, r2, #0x10 
+	subs	r2, r2, #0x10
 	bge	.Lcopyin_bad2_loop16
 
-	adds	r2, r2, #0x10 
+	adds	r2, r2, #0x10
 	popeq	{r4-r7}
 	RETc(eq)			/* Return now if done */
 	subs	r2, r2, #0x04
@@ -414,10 +414,10 @@ ENTRY(copyin)
 	str	r6, [r1], #0x04
 	str	r7, [r1], #0x04
 .Lcopyin_bad3:
-	subs	r2, r2, #0x10 
+	subs	r2, r2, #0x10
 	bge	.Lcopyin_bad3_loop16
 
-	adds	r2, r2, #0x10 
+	adds	r2, r2, #0x10
 	popeq	{r4-r7}
 	RETc(eq)			/* Return now if done */
 	subs	r2, r2, #0x04
@@ -445,7 +445,7 @@ ENTRY(copyin)
 	pop	{r4-r7}
 	mov	r3, #0x00
 	adds	r2, r2, #0x04
-	RETc(eq)	
+	RETc(eq)
 .Lcopyin_l4_2:
 	rsbs	r2, r2, #0x03
 	addne	pc, pc, r2, lsl #3
@@ -732,10 +732,10 @@ ENTRY(copyout)
 	strt	r6, [r1], #0x04
 	strt	r7, [r1], #0

CVS commit: src/sys/arch/arm/arm

2022-10-19 Thread Nick Hudson
Module Name:src
Committed By:   skrll
Date:   Thu Oct 20 06:58:38 UTC 2022

Modified Files:
src/sys/arch/arm/arm: bcopyinout.S bcopyinout_xscale.S blockio.S
copystr.S cpu_in_cksum.S cpufunc_asm_arm10.S cpufunc_asm_arm67.S
cpufunc_asm_arm7tdmi.S cpufunc_asm_arm8.S cpufunc_asm_arm9.S
cpufunc_asm_armv4.S cpufunc_asm_armv5.S cpufunc_asm_fa526.S
cpufunc_asm_pj4b.S cpufunc_asm_sa1.S cpufunc_asm_xscale.S vectors.S

Log Message:
Trailing whitespace.


To generate a diff of this commit:
cvs rdiff -u -r1.22 -r1.23 src/sys/arch/arm/arm/bcopyinout.S
cvs rdiff -u -r1.11 -r1.12 src/sys/arch/arm/arm/bcopyinout_xscale.S \
src/sys/arch/arm/arm/cpufunc_asm_arm10.S \
src/sys/arch/arm/arm/cpufunc_asm_arm9.S
cvs rdiff -u -r1.8 -r1.9 src/sys/arch/arm/arm/blockio.S \
src/sys/arch/arm/arm/cpufunc_asm_armv5.S
cvs rdiff -u -r1.13 -r1.14 src/sys/arch/arm/arm/copystr.S \
src/sys/arch/arm/arm/cpufunc_asm_pj4b.S
cvs rdiff -u -r1.12 -r1.13 src/sys/arch/arm/arm/cpu_in_cksum.S
cvs rdiff -u -r1.7 -r1.8 src/sys/arch/arm/arm/cpufunc_asm_arm67.S \
src/sys/arch/arm/arm/cpufunc_asm_arm7tdmi.S \
src/sys/arch/arm/arm/cpufunc_asm_fa526.S
cvs rdiff -u -r1.10 -r1.11 src/sys/arch/arm/arm/cpufunc_asm_arm8.S \
src/sys/arch/arm/arm/vectors.S
cvs rdiff -u -r1.5 -r1.6 src/sys/arch/arm/arm/cpufunc_asm_armv4.S
cvs rdiff -u -r1.15 -r1.16 src/sys/arch/arm/arm/cpufunc_asm_sa1.S
cvs rdiff -u -r1.24 -r1.25 src/sys/arch/arm/arm/cpufunc_asm_xscale.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/arm

2022-10-15 Thread Jared D. McNeill
Module Name:src
Committed By:   jmcneill
Date:   Sat Oct 15 11:31:40 UTC 2022

Modified Files:
src/sys/arch/arm: Makefile.inc
Removed Files:
src/sys/arch/arm/mpcore: dic.c dic_intr.h dicreg.h files.mpcore
mpcore_a2x_space.c mpcore_a4x_space.c mpcore_axi.c mpcore_clock.c
mpcore_pmr.c mpcore_space.c mpcorereg.h mpcorevar.h

Log Message:
Remove unused ARM11 MPCore code.


To generate a diff of this commit:
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/arm/Makefile.inc
cvs rdiff -u -r1.3 -r0 src/sys/arch/arm/mpcore/dic.c \
src/sys/arch/arm/mpcore/mpcore_a4x_space.c \
src/sys/arch/arm/mpcore/mpcore_axi.c \
src/sys/arch/arm/mpcore/mpcore_clock.c
cvs rdiff -u -r1.1 -r0 src/sys/arch/arm/mpcore/dic_intr.h \
src/sys/arch/arm/mpcore/dicreg.h src/sys/arch/arm/mpcore/mpcorevar.h
cvs rdiff -u -r1.2 -r0 src/sys/arch/arm/mpcore/files.mpcore \
src/sys/arch/arm/mpcore/mpcorereg.h
cvs rdiff -u -r1.4 -r0 src/sys/arch/arm/mpcore/mpcore_a2x_space.c \
src/sys/arch/arm/mpcore/mpcore_space.c
cvs rdiff -u -r1.5 -r0 src/sys/arch/arm/mpcore/mpcore_pmr.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/Makefile.inc
diff -u src/sys/arch/arm/Makefile.inc:1.1 src/sys/arch/arm/Makefile.inc:1.2
--- src/sys/arch/arm/Makefile.inc:1.1	Mon Apr  4 19:43:34 2011
+++ src/sys/arch/arm/Makefile.inc	Sat Oct 15 11:31:40 2022
@@ -1,4 +1,4 @@
-#	$NetBSD: Makefile.inc,v 1.1 2011/04/04 19:43:34 dyoung Exp $
+#	$NetBSD: Makefile.inc,v 1.2 2022/10/15 11:31:40 jmcneill Exp $
 
 AARM=	${SYSDIR}/arch/arm/arm/*.S
 SARM=	${SYSDIR}/arch/arm/arm/*.[ch] ${SYSDIR}/arch/arm/include/*.h
@@ -13,7 +13,6 @@ SARM+=	${SYSDIR}/arch/arm/iomd/*.[ch]
 SARM+=	${SYSDIR}/arch/arm/ixp12x0/*.[ch]
 SARM+=	${SYSDIR}/arch/arm/mainbus/*.[ch]
 SARM+=	${SYSDIR}/arch/arm/marvell/*.[ch]
-SARM+=	${SYSDIR}/arch/arm/mpcore/*.[ch]
 SARM+=	${SYSDIR}/arch/arm/ofw/*.[ch]
 SARM+=	${SYSDIR}/arch/arm/omap/*.[ch]
 SARM+=	${SYSDIR}/arch/arm/pic/*.[ch]



CVS commit: src/sys/arch/arm

2022-10-15 Thread Jared D. McNeill
Module Name:src
Committed By:   jmcneill
Date:   Sat Oct 15 11:31:40 UTC 2022

Modified Files:
src/sys/arch/arm: Makefile.inc
Removed Files:
src/sys/arch/arm/mpcore: dic.c dic_intr.h dicreg.h files.mpcore
mpcore_a2x_space.c mpcore_a4x_space.c mpcore_axi.c mpcore_clock.c
mpcore_pmr.c mpcore_space.c mpcorereg.h mpcorevar.h

Log Message:
Remove unused ARM11 MPCore code.


To generate a diff of this commit:
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/arm/Makefile.inc
cvs rdiff -u -r1.3 -r0 src/sys/arch/arm/mpcore/dic.c \
src/sys/arch/arm/mpcore/mpcore_a4x_space.c \
src/sys/arch/arm/mpcore/mpcore_axi.c \
src/sys/arch/arm/mpcore/mpcore_clock.c
cvs rdiff -u -r1.1 -r0 src/sys/arch/arm/mpcore/dic_intr.h \
src/sys/arch/arm/mpcore/dicreg.h src/sys/arch/arm/mpcore/mpcorevar.h
cvs rdiff -u -r1.2 -r0 src/sys/arch/arm/mpcore/files.mpcore \
src/sys/arch/arm/mpcore/mpcorereg.h
cvs rdiff -u -r1.4 -r0 src/sys/arch/arm/mpcore/mpcore_a2x_space.c \
src/sys/arch/arm/mpcore/mpcore_space.c
cvs rdiff -u -r1.5 -r0 src/sys/arch/arm/mpcore/mpcore_pmr.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/arm/arm

2022-10-15 Thread Jared D. McNeill
Module Name:src
Committed By:   jmcneill
Date:   Sat Oct 15 11:19:23 UTC 2022

Modified Files:
src/sys/arch/arm/arm: efi_runtime.c

Log Message:
Add a boot option to disable EFI runtime services.


To generate a diff of this commit:
cvs rdiff -u -r1.9 -r1.10 src/sys/arch/arm/arm/efi_runtime.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/arm/efi_runtime.c
diff -u src/sys/arch/arm/arm/efi_runtime.c:1.9 src/sys/arch/arm/arm/efi_runtime.c:1.10
--- src/sys/arch/arm/arm/efi_runtime.c:1.9	Sat Jun 18 08:13:44 2022
+++ src/sys/arch/arm/arm/efi_runtime.c	Sat Oct 15 11:19:23 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: efi_runtime.c,v 1.9 2022/06/18 08:13:44 skrll Exp $ */
+/* $NetBSD: efi_runtime.c,v 1.10 2022/10/15 11:19:23 jmcneill Exp $ */
 
 /*-
  * Copyright (c) 2018 The NetBSD Foundation, Inc.
@@ -32,7 +32,7 @@
 #include "efi.h"
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: efi_runtime.c,v 1.9 2022/06/18 08:13:44 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: efi_runtime.c,v 1.10 2022/10/15 11:19:23 jmcneill Exp $");
 
 #include 
 #include 
@@ -43,6 +43,7 @@ __KERNEL_RCSID(0, "$NetBSD: efi_runtime.
 #include 
 
 #include 
+#include 
 
 #ifdef _LP64
 #define	EFIERR(x)	(0x8000 | x)
@@ -77,6 +78,12 @@ arm_efirt_init(paddr_t efi_system_table)
 	const size_t sz = PAGE_SIZE * 2;
 	vaddr_t va, cva;
 	paddr_t cpa;
+	int val;
+
+	if (get_bootconf_option(boot_args, "noefirt",
+BOOTOPT_TYPE_BOOLEAN, &val) && val) {
+		return ENXIO;
+	}
 
 	va = uvm_km_alloc(kernel_map, sz, 0, UVM_KMF_VAONLY);
 	if (va == 0) {



CVS commit: src/sys/arch/arm/arm

2022-10-15 Thread Jared D. McNeill
Module Name:src
Committed By:   jmcneill
Date:   Sat Oct 15 11:19:23 UTC 2022

Modified Files:
src/sys/arch/arm/arm: efi_runtime.c

Log Message:
Add a boot option to disable EFI runtime services.


To generate a diff of this commit:
cvs rdiff -u -r1.9 -r1.10 src/sys/arch/arm/arm/efi_runtime.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/arm/acpi

2022-10-15 Thread Jared D. McNeill
Module Name:src
Committed By:   jmcneill
Date:   Sat Oct 15 10:45:40 UTC 2022

Modified Files:
src/sys/arch/arm/acpi: acpi_pci_smccc.c

Log Message:
fix indentation


To generate a diff of this commit:
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/arm/acpi/acpi_pci_smccc.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/arm/acpi

2022-10-15 Thread Jared D. McNeill
Module Name:src
Committed By:   jmcneill
Date:   Sat Oct 15 10:45:40 UTC 2022

Modified Files:
src/sys/arch/arm/acpi: acpi_pci_smccc.c

Log Message:
fix indentation


To generate a diff of this commit:
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/arm/acpi/acpi_pci_smccc.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/acpi/acpi_pci_smccc.c
diff -u src/sys/arch/arm/acpi/acpi_pci_smccc.c:1.1 src/sys/arch/arm/acpi/acpi_pci_smccc.c:1.2
--- src/sys/arch/arm/acpi/acpi_pci_smccc.c:1.1	Sat Aug  7 21:27:53 2021
+++ src/sys/arch/arm/acpi/acpi_pci_smccc.c	Sat Oct 15 10:45:40 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: acpi_pci_smccc.c,v 1.1 2021/08/07 21:27:53 jmcneill Exp $ */
+/* $NetBSD: acpi_pci_smccc.c,v 1.2 2022/10/15 10:45:40 jmcneill Exp $ */
 
 /*-
  * Copyright (c) 2021 Jared McNeill 
@@ -27,7 +27,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: acpi_pci_smccc.c,v 1.1 2021/08/07 21:27:53 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: acpi_pci_smccc.c,v 1.2 2022/10/15 10:45:40 jmcneill Exp $");
 
 #include 
 #include 
@@ -84,7 +84,7 @@ acpi_pci_smccc_conf_write(pci_chipset_ta
 	}
 
 	status = pci_smccc_write(PCI_SMCCC_SBDF(ap->ap_seg, b, d, f), reg,
-PCI_SMCCC_ACCESS_32BIT, data);
+ PCI_SMCCC_ACCESS_32BIT, data);
 	if (!PCI_SMCCC_SUCCESS(status)) {
 		return EINVAL;
 	}



CVS commit: src/sys/arch/arm/omap

2022-10-07 Thread Andrius Varanavicius
Module Name:src
Committed By:   andvar
Date:   Fri Oct  7 22:30:48 UTC 2022

Modified Files:
src/sys/arch/arm/omap: omapl1x_timer.c

Log Message:
fix typos in chained/unchained mode definitions (s/CHANINED/CHAINED).
fix typo in comment s/32 bot/32-bit/.


To generate a diff of this commit:
cvs rdiff -u -r1.4 -r1.5 src/sys/arch/arm/omap/omapl1x_timer.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/omap/omapl1x_timer.c
diff -u src/sys/arch/arm/omap/omapl1x_timer.c:1.4 src/sys/arch/arm/omap/omapl1x_timer.c:1.5
--- src/sys/arch/arm/omap/omapl1x_timer.c:1.4	Sat Feb 12 17:09:43 2022
+++ src/sys/arch/arm/omap/omapl1x_timer.c	Fri Oct  7 22:30:48 2022
@@ -25,7 +25,7 @@
 
 #include 
 
-__KERNEL_RCSID(0, "$NetBSD: omapl1x_timer.c,v 1.4 2022/02/12 17:09:43 riastradh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: omapl1x_timer.c,v 1.5 2022/10/07 22:30:48 andvar Exp $");
 
 #include "opt_timer.h"
 
@@ -117,9 +117,9 @@ static struct omapl1xtmr_softc *ref_sc;
 
 /* Timer modes */
 #define TGCR_TIMMODE_64BIT		0x0
-#define TGCR_TIMMODE_32BIT_UNCHANINED	0x1
+#define TGCR_TIMMODE_32BIT_UNCHAINED	0x1
 #define TGCR_TIMMODE_64BIT_WDOG		0x2
-#define TGCR_TIMMODE_32BIT_CHANINED	0x3
+#define TGCR_TIMMODE_32BIT_CHAINED	0x3
 #define TGCR_TIMMODE_SHIFT		2
 
 #define TGCR_RS_STOP		0x0
@@ -277,8 +277,8 @@ timer_init (struct omapl1xtmr_softc *sc,
 	if (intr)
 		omapl1xtimer_prd_intr_enb(sc);
 
-	/* Set timers to 32 bot unchained mode */
-	val = TGCR_TIMMODE_32BIT_UNCHANINED << TGCR_TIMMODE_SHIFT;
+	/* Set timers to 32-bit unchained mode */
+	val = TGCR_TIMMODE_32BIT_UNCHAINED << TGCR_TIMMODE_SHIFT;
 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, TGCR, val);
 
 	omapl1xtimer_start(sc);



CVS commit: src/sys/arch/arm/omap

2022-10-07 Thread Andrius Varanavicius
Module Name:src
Committed By:   andvar
Date:   Fri Oct  7 22:30:48 UTC 2022

Modified Files:
src/sys/arch/arm/omap: omapl1x_timer.c

Log Message:
fix typos in chained/unchained mode definitions (s/CHANINED/CHAINED).
fix typo in comment s/32 bot/32-bit/.


To generate a diff of this commit:
cvs rdiff -u -r1.4 -r1.5 src/sys/arch/arm/omap/omapl1x_timer.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/arm/amlogic

2022-09-28 Thread Jared D. McNeill
Module Name:src
Committed By:   jmcneill
Date:   Wed Sep 28 10:23:37 UTC 2022

Modified Files:
src/sys/arch/arm/amlogic: mesongx_wdt.c

Log Message:
Match Meson GXBB watchdog.

>From Vincent DEFERT on port-arm:
http://mail-index.netbsd.org/port-arm/2022/09/21/msg007860.html


To generate a diff of this commit:
cvs rdiff -u -r1.2 -r1.3 src/sys/arch/arm/amlogic/mesongx_wdt.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/amlogic/mesongx_wdt.c
diff -u src/sys/arch/arm/amlogic/mesongx_wdt.c:1.2 src/sys/arch/arm/amlogic/mesongx_wdt.c:1.3
--- src/sys/arch/arm/amlogic/mesongx_wdt.c:1.2	Wed Jan 27 03:10:18 2021
+++ src/sys/arch/arm/amlogic/mesongx_wdt.c	Wed Sep 28 10:23:37 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: mesongx_wdt.c,v 1.2 2021/01/27 03:10:18 thorpej Exp $ */
+/* $NetBSD: mesongx_wdt.c,v 1.3 2022/09/28 10:23:37 jmcneill Exp $ */
 
 /*-
  * Copyright (c) 2019 Jared McNeill 
@@ -27,7 +27,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: mesongx_wdt.c,v 1.2 2021/01/27 03:10:18 thorpej Exp $");
+__KERNEL_RCSID(0, "$NetBSD: mesongx_wdt.c,v 1.3 2022/09/28 10:23:37 jmcneill Exp $");
 
 #include 
 #include 
@@ -56,6 +56,7 @@ __KERNEL_RCSID(0, "$NetBSD: mesongx_wdt.
 
 static const struct device_compatible_entry compat_data[] = {
 	{ .compat = "amlogic,meson-gx-wdt" },
+	{ .compat = "amlogic,meson-gxbb-wdt" },
 	DEVICE_COMPAT_EOL
 };
 



CVS commit: src/sys/arch/arm/amlogic

2022-09-28 Thread Jared D. McNeill
Module Name:src
Committed By:   jmcneill
Date:   Wed Sep 28 10:23:37 UTC 2022

Modified Files:
src/sys/arch/arm/amlogic: mesongx_wdt.c

Log Message:
Match Meson GXBB watchdog.

>From Vincent DEFERT on port-arm:
http://mail-index.netbsd.org/port-arm/2022/09/21/msg007860.html


To generate a diff of this commit:
cvs rdiff -u -r1.2 -r1.3 src/sys/arch/arm/amlogic/mesongx_wdt.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/arm

2022-09-26 Thread Nick Hudson
Module Name:src
Committed By:   skrll
Date:   Tue Sep 27 06:36:44 UTC 2022

Modified Files:
src/sys/arch/arm/at91: at91emac.c
src/sys/arch/arm/ep93xx: epe.c
src/sys/arch/arm/footbridge: footbridge.c footbridge_pci.c
src/sys/arch/arm/footbridge/isa: isadma_machdep.c isapnp_machdep.c
src/sys/arch/arm/gemini: gemini_dma.c gemini_ipm.c obio_wdc.c
src/sys/arch/arm/imx: imx_dma.c imx_pcic.c
src/sys/arch/arm/iomd: iomd.c qms.c vidcvideo.c
src/sys/arch/arm/ixp12x0: ixp12x0_pci.c ixp12x0_pci_dma.c
src/sys/arch/arm/mainbus: mainbus.c
src/sys/arch/arm/nxp: imx6_ccm.c imx6_clk.c
src/sys/arch/arm/omap: omap3_sdma.c omap5912_intr.c omap_dma.c
omap_intr.c omapfb.c tifb.c
src/sys/arch/arm/s3c2xx0: s3c2410_extint.c s3c2410_intr.c
s3c2440_extint.c s3c2440_i2s.c s3c2440_intr.c s3c2440_sdi.c
s3c2800_intr.c s3c2xx0_intr.c sscom_s3c2410.c sscom_s3c2800.c
src/sys/arch/arm/sa11x0: sa_kbc.c sa11x1_pcic.c sa11xx_pcic.c
src/sys/arch/arm/sociox: if_scx.c
src/sys/arch/arm/ti: omap3_dss.c
src/sys/arch/arm/xscale: becc_pci.c i80312_pci.c i80321_pci.c
ixp425_npe.c ixp425_pci.c ixp425_pci_dma.c pxa2x0_ac97.c
pxa2x0_dma.c pxa2x0_intr.c pxa2x0_mci.c pxa2x0_pcic.c
src/sys/arch/arm/zynq: zynq_dma.c

Log Message:
Remove unnecessary sys/malloc.h include


To generate a diff of this commit:
cvs rdiff -u -r1.34 -r1.35 src/sys/arch/arm/at91/at91emac.c
cvs rdiff -u -r1.49 -r1.50 src/sys/arch/arm/ep93xx/epe.c
cvs rdiff -u -r1.29 -r1.30 src/sys/arch/arm/footbridge/footbridge.c
cvs rdiff -u -r1.33 -r1.34 src/sys/arch/arm/footbridge/footbridge_pci.c
cvs rdiff -u -r1.16 -r1.17 src/sys/arch/arm/footbridge/isa/isadma_machdep.c
cvs rdiff -u -r1.6 -r1.7 src/sys/arch/arm/footbridge/isa/isapnp_machdep.c
cvs rdiff -u -r1.3 -r1.4 src/sys/arch/arm/gemini/gemini_dma.c
cvs rdiff -u -r1.5 -r1.6 src/sys/arch/arm/gemini/gemini_ipm.c
cvs rdiff -u -r1.11 -r1.12 src/sys/arch/arm/gemini/obio_wdc.c
cvs rdiff -u -r1.3 -r1.4 src/sys/arch/arm/imx/imx_dma.c
cvs rdiff -u -r1.8 -r1.9 src/sys/arch/arm/imx/imx_pcic.c
cvs rdiff -u -r1.23 -r1.24 src/sys/arch/arm/iomd/iomd.c
cvs rdiff -u -r1.21 -r1.22 src/sys/arch/arm/iomd/qms.c
cvs rdiff -u -r1.49 -r1.50 src/sys/arch/arm/iomd/vidcvideo.c
cvs rdiff -u -r1.17 -r1.18 src/sys/arch/arm/ixp12x0/ixp12x0_pci.c
cvs rdiff -u -r1.9 -r1.10 src/sys/arch/arm/ixp12x0/ixp12x0_pci_dma.c
cvs rdiff -u -r1.23 -r1.24 src/sys/arch/arm/mainbus/mainbus.c
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/arm/nxp/imx6_ccm.c
cvs rdiff -u -r1.3 -r1.4 src/sys/arch/arm/nxp/imx6_clk.c
cvs rdiff -u -r1.2 -r1.3 src/sys/arch/arm/omap/omap3_sdma.c
cvs rdiff -u -r1.5 -r1.6 src/sys/arch/arm/omap/omap5912_intr.c
cvs rdiff -u -r1.4 -r1.5 src/sys/arch/arm/omap/omap_dma.c
cvs rdiff -u -r1.11 -r1.12 src/sys/arch/arm/omap/omap_intr.c
cvs rdiff -u -r1.31 -r1.32 src/sys/arch/arm/omap/omapfb.c
cvs rdiff -u -r1.10 -r1.11 src/sys/arch/arm/omap/tifb.c
cvs rdiff -u -r1.15 -r1.16 src/sys/arch/arm/s3c2xx0/s3c2410_extint.c
cvs rdiff -u -r1.13 -r1.14 src/sys/arch/arm/s3c2xx0/s3c2410_intr.c \
src/sys/arch/arm/s3c2xx0/s3c2800_intr.c
cvs rdiff -u -r1.5 -r1.6 src/sys/arch/arm/s3c2xx0/s3c2440_extint.c
cvs rdiff -u -r1.6 -r1.7 src/sys/arch/arm/s3c2xx0/s3c2440_i2s.c
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/arm/s3c2xx0/s3c2440_intr.c
cvs rdiff -u -r1.7 -r1.8 src/sys/arch/arm/s3c2xx0/s3c2440_sdi.c \
src/sys/arch/arm/s3c2xx0/sscom_s3c2410.c
cvs rdiff -u -r1.18 -r1.19 src/sys/arch/arm/s3c2xx0/s3c2xx0_intr.c
cvs rdiff -u -r1.10 -r1.11 src/sys/arch/arm/s3c2xx0/sscom_s3c2800.c
cvs rdiff -u -r1.18 -r1.19 src/sys/arch/arm/sa11x0/sa_kbc.c
cvs rdiff -u -r1.24 -r1.25 src/sys/arch/arm/sa11x0/sa11x1_pcic.c
cvs rdiff -u -r1.13 -r1.14 src/sys/arch/arm/sa11x0/sa11xx_pcic.c
cvs rdiff -u -r1.38 -r1.39 src/sys/arch/arm/sociox/if_scx.c
cvs rdiff -u -r1.6 -r1.7 src/sys/arch/arm/ti/omap3_dss.c
cvs rdiff -u -r1.21 -r1.22 src/sys/arch/arm/xscale/becc_pci.c
cvs rdiff -u -r1.19 -r1.20 src/sys/arch/arm/xscale/i80312_pci.c
cvs rdiff -u -r1.18 -r1.19 src/sys/arch/arm/xscale/i80321_pci.c
cvs rdiff -u -r1.15 -r1.16 src/sys/arch/arm/xscale/ixp425_npe.c
cvs rdiff -u -r1.14 -r1.15 src/sys/arch/arm/xscale/ixp425_pci.c \
src/sys/arch/arm/xscale/pxa2x0_pcic.c
cvs rdiff -u -r1.6 -r1.7 src/sys/arch/arm/xscale/ixp425_pci_dma.c \
src/sys/arch/arm/xscale/pxa2x0_dma.c
cvs rdiff -u -r1.20 -r1.21 src/sys/arch/arm/xscale/pxa2x0_ac97.c
cvs rdiff -u -r1.23 -r1.24 src/sys/arch/arm/xscale/pxa2x0_intr.c
cvs rdiff -u -r1.12 -r1.13 src/sys/arch/arm/xscale/pxa2x0_mci.c
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/arm/zynq/zynq_dma.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/at91/at91emac.c
diff -u src/sys/arch/arm/at91/at91emac.c:1.34 src/sys/arch/arm/at91/at91emac.c:1.35
--- src/sys/arch/arm/at91/at91emac.c:1.34	Sat Sep 17 19:32

CVS commit: src/sys/arch/arm

2022-09-26 Thread Nick Hudson
Module Name:src
Committed By:   skrll
Date:   Tue Sep 27 06:36:44 UTC 2022

Modified Files:
src/sys/arch/arm/at91: at91emac.c
src/sys/arch/arm/ep93xx: epe.c
src/sys/arch/arm/footbridge: footbridge.c footbridge_pci.c
src/sys/arch/arm/footbridge/isa: isadma_machdep.c isapnp_machdep.c
src/sys/arch/arm/gemini: gemini_dma.c gemini_ipm.c obio_wdc.c
src/sys/arch/arm/imx: imx_dma.c imx_pcic.c
src/sys/arch/arm/iomd: iomd.c qms.c vidcvideo.c
src/sys/arch/arm/ixp12x0: ixp12x0_pci.c ixp12x0_pci_dma.c
src/sys/arch/arm/mainbus: mainbus.c
src/sys/arch/arm/nxp: imx6_ccm.c imx6_clk.c
src/sys/arch/arm/omap: omap3_sdma.c omap5912_intr.c omap_dma.c
omap_intr.c omapfb.c tifb.c
src/sys/arch/arm/s3c2xx0: s3c2410_extint.c s3c2410_intr.c
s3c2440_extint.c s3c2440_i2s.c s3c2440_intr.c s3c2440_sdi.c
s3c2800_intr.c s3c2xx0_intr.c sscom_s3c2410.c sscom_s3c2800.c
src/sys/arch/arm/sa11x0: sa_kbc.c sa11x1_pcic.c sa11xx_pcic.c
src/sys/arch/arm/sociox: if_scx.c
src/sys/arch/arm/ti: omap3_dss.c
src/sys/arch/arm/xscale: becc_pci.c i80312_pci.c i80321_pci.c
ixp425_npe.c ixp425_pci.c ixp425_pci_dma.c pxa2x0_ac97.c
pxa2x0_dma.c pxa2x0_intr.c pxa2x0_mci.c pxa2x0_pcic.c
src/sys/arch/arm/zynq: zynq_dma.c

Log Message:
Remove unnecessary sys/malloc.h include


To generate a diff of this commit:
cvs rdiff -u -r1.34 -r1.35 src/sys/arch/arm/at91/at91emac.c
cvs rdiff -u -r1.49 -r1.50 src/sys/arch/arm/ep93xx/epe.c
cvs rdiff -u -r1.29 -r1.30 src/sys/arch/arm/footbridge/footbridge.c
cvs rdiff -u -r1.33 -r1.34 src/sys/arch/arm/footbridge/footbridge_pci.c
cvs rdiff -u -r1.16 -r1.17 src/sys/arch/arm/footbridge/isa/isadma_machdep.c
cvs rdiff -u -r1.6 -r1.7 src/sys/arch/arm/footbridge/isa/isapnp_machdep.c
cvs rdiff -u -r1.3 -r1.4 src/sys/arch/arm/gemini/gemini_dma.c
cvs rdiff -u -r1.5 -r1.6 src/sys/arch/arm/gemini/gemini_ipm.c
cvs rdiff -u -r1.11 -r1.12 src/sys/arch/arm/gemini/obio_wdc.c
cvs rdiff -u -r1.3 -r1.4 src/sys/arch/arm/imx/imx_dma.c
cvs rdiff -u -r1.8 -r1.9 src/sys/arch/arm/imx/imx_pcic.c
cvs rdiff -u -r1.23 -r1.24 src/sys/arch/arm/iomd/iomd.c
cvs rdiff -u -r1.21 -r1.22 src/sys/arch/arm/iomd/qms.c
cvs rdiff -u -r1.49 -r1.50 src/sys/arch/arm/iomd/vidcvideo.c
cvs rdiff -u -r1.17 -r1.18 src/sys/arch/arm/ixp12x0/ixp12x0_pci.c
cvs rdiff -u -r1.9 -r1.10 src/sys/arch/arm/ixp12x0/ixp12x0_pci_dma.c
cvs rdiff -u -r1.23 -r1.24 src/sys/arch/arm/mainbus/mainbus.c
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/arm/nxp/imx6_ccm.c
cvs rdiff -u -r1.3 -r1.4 src/sys/arch/arm/nxp/imx6_clk.c
cvs rdiff -u -r1.2 -r1.3 src/sys/arch/arm/omap/omap3_sdma.c
cvs rdiff -u -r1.5 -r1.6 src/sys/arch/arm/omap/omap5912_intr.c
cvs rdiff -u -r1.4 -r1.5 src/sys/arch/arm/omap/omap_dma.c
cvs rdiff -u -r1.11 -r1.12 src/sys/arch/arm/omap/omap_intr.c
cvs rdiff -u -r1.31 -r1.32 src/sys/arch/arm/omap/omapfb.c
cvs rdiff -u -r1.10 -r1.11 src/sys/arch/arm/omap/tifb.c
cvs rdiff -u -r1.15 -r1.16 src/sys/arch/arm/s3c2xx0/s3c2410_extint.c
cvs rdiff -u -r1.13 -r1.14 src/sys/arch/arm/s3c2xx0/s3c2410_intr.c \
src/sys/arch/arm/s3c2xx0/s3c2800_intr.c
cvs rdiff -u -r1.5 -r1.6 src/sys/arch/arm/s3c2xx0/s3c2440_extint.c
cvs rdiff -u -r1.6 -r1.7 src/sys/arch/arm/s3c2xx0/s3c2440_i2s.c
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/arm/s3c2xx0/s3c2440_intr.c
cvs rdiff -u -r1.7 -r1.8 src/sys/arch/arm/s3c2xx0/s3c2440_sdi.c \
src/sys/arch/arm/s3c2xx0/sscom_s3c2410.c
cvs rdiff -u -r1.18 -r1.19 src/sys/arch/arm/s3c2xx0/s3c2xx0_intr.c
cvs rdiff -u -r1.10 -r1.11 src/sys/arch/arm/s3c2xx0/sscom_s3c2800.c
cvs rdiff -u -r1.18 -r1.19 src/sys/arch/arm/sa11x0/sa_kbc.c
cvs rdiff -u -r1.24 -r1.25 src/sys/arch/arm/sa11x0/sa11x1_pcic.c
cvs rdiff -u -r1.13 -r1.14 src/sys/arch/arm/sa11x0/sa11xx_pcic.c
cvs rdiff -u -r1.38 -r1.39 src/sys/arch/arm/sociox/if_scx.c
cvs rdiff -u -r1.6 -r1.7 src/sys/arch/arm/ti/omap3_dss.c
cvs rdiff -u -r1.21 -r1.22 src/sys/arch/arm/xscale/becc_pci.c
cvs rdiff -u -r1.19 -r1.20 src/sys/arch/arm/xscale/i80312_pci.c
cvs rdiff -u -r1.18 -r1.19 src/sys/arch/arm/xscale/i80321_pci.c
cvs rdiff -u -r1.15 -r1.16 src/sys/arch/arm/xscale/ixp425_npe.c
cvs rdiff -u -r1.14 -r1.15 src/sys/arch/arm/xscale/ixp425_pci.c \
src/sys/arch/arm/xscale/pxa2x0_pcic.c
cvs rdiff -u -r1.6 -r1.7 src/sys/arch/arm/xscale/ixp425_pci_dma.c \
src/sys/arch/arm/xscale/pxa2x0_dma.c
cvs rdiff -u -r1.20 -r1.21 src/sys/arch/arm/xscale/pxa2x0_ac97.c
cvs rdiff -u -r1.23 -r1.24 src/sys/arch/arm/xscale/pxa2x0_intr.c
cvs rdiff -u -r1.12 -r1.13 src/sys/arch/arm/xscale/pxa2x0_mci.c
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/arm/zynq/zynq_dma.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/arm/at91

2022-09-26 Thread Nick Hudson
Module Name:src
Committed By:   skrll
Date:   Tue Sep 27 06:34:45 UTC 2022

Modified Files:
src/sys/arch/arm/at91: at91cf.c

Log Message:
malloc -> kmem


To generate a diff of this commit:
cvs rdiff -u -r1.7 -r1.8 src/sys/arch/arm/at91/at91cf.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/at91/at91cf.c
diff -u src/sys/arch/arm/at91/at91cf.c:1.7 src/sys/arch/arm/at91/at91cf.c:1.8
--- src/sys/arch/arm/at91/at91cf.c:1.7	Sat Aug  7 16:18:43 2021
+++ src/sys/arch/arm/at91/at91cf.c	Tue Sep 27 06:34:44 2022
@@ -1,5 +1,5 @@
-/*	$Id: at91cf.c,v 1.7 2021/08/07 16:18:43 thorpej Exp $	*/
-/*	$NetBSD: at91cf.c,v 1.7 2021/08/07 16:18:43 thorpej Exp $	*/
+/*	$Id: at91cf.c,v 1.8 2022/09/27 06:34:44 skrll Exp $	*/
+/*	$NetBSD: at91cf.c,v 1.8 2022/09/27 06:34:44 skrll Exp $	*/
 
 /*
  * Copyright (c) 2007 Embedtronics Oy. All rights reserved.
@@ -30,12 +30,12 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: at91cf.c,v 1.7 2021/08/07 16:18:43 thorpej Exp $");
+__KERNEL_RCSID(0, "$NetBSD: at91cf.c,v 1.8 2022/09/27 06:34:44 skrll Exp $");
 
 #include 
 #include 
 #include 
-#include 
+#include 
 #include 
 #include 
 #include 
@@ -174,7 +174,7 @@ at91cf_attach_common(device_t parent, de
 	printf("\n");
 
 	/* socket 0 */
-	ph = malloc(sizeof(struct at91cf_handle), M_DEVBUF, M_WAITOK|M_ZERO);
+	ph = kmem_zalloc(sizeof(*ph), KM_SLEEP);
 	sc->sc_ph = ph;
 	ph->ph_sc = sc;
 	ph->ph_space[IO].base = sa->sa_addr + IO_BASE;



CVS commit: src/sys/arch/arm/at91

2022-09-26 Thread Nick Hudson
Module Name:src
Committed By:   skrll
Date:   Tue Sep 27 06:34:45 UTC 2022

Modified Files:
src/sys/arch/arm/at91: at91cf.c

Log Message:
malloc -> kmem


To generate a diff of this commit:
cvs rdiff -u -r1.7 -r1.8 src/sys/arch/arm/at91/at91cf.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/arm/ep93xx

2022-09-26 Thread Nick Hudson
Module Name:src
Committed By:   skrll
Date:   Tue Sep 27 06:32:53 UTC 2022

Modified Files:
src/sys/arch/arm/ep93xx: eppcic.c

Log Message:
malloc -> kmem


To generate a diff of this commit:
cvs rdiff -u -r1.11 -r1.12 src/sys/arch/arm/ep93xx/eppcic.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/ep93xx/eppcic.c
diff -u src/sys/arch/arm/ep93xx/eppcic.c:1.11 src/sys/arch/arm/ep93xx/eppcic.c:1.12
--- src/sys/arch/arm/ep93xx/eppcic.c:1.11	Sun Nov 21 08:25:26 2021
+++ src/sys/arch/arm/ep93xx/eppcic.c	Tue Sep 27 06:32:53 2022
@@ -1,4 +1,4 @@
-/*	$NetBSD: eppcic.c,v 1.11 2021/11/21 08:25:26 skrll Exp $	*/
+/*	$NetBSD: eppcic.c,v 1.12 2022/09/27 06:32:53 skrll Exp $	*/
 
 /*
  * Copyright (c) 2005 HAMAJIMA Katsuomi. All rights reserved.
@@ -26,12 +26,12 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: eppcic.c,v 1.11 2021/11/21 08:25:26 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: eppcic.c,v 1.12 2022/09/27 06:32:53 skrll Exp $");
 
 #include 
 #include 
 #include 
-#include 
+#include 
 #include 
 #include 
 #include 
@@ -175,7 +175,7 @@ eppcic_attach_common(device_t parent, de
 	epled_red_off();
 #endif
 	/* socket 0 */
-	ph = malloc(sizeof(struct eppcic_handle), M_DEVBUF, M_WAITOK);
+	ph = kmem_alloc(sizeof(*ph), KM_SLEEP);
 	sc->sc_ph[0] = ph;
 	ph->ph_sc = sc;
 	ph->ph_socket = 0;



CVS commit: src/sys/arch/arm/ep93xx

2022-09-26 Thread Nick Hudson
Module Name:src
Committed By:   skrll
Date:   Tue Sep 27 06:32:53 UTC 2022

Modified Files:
src/sys/arch/arm/ep93xx: eppcic.c

Log Message:
malloc -> kmem


To generate a diff of this commit:
cvs rdiff -u -r1.11 -r1.12 src/sys/arch/arm/ep93xx/eppcic.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/arm/iomd

2022-09-26 Thread Nick Hudson
Module Name:src
Committed By:   skrll
Date:   Tue Sep 27 06:14:41 UTC 2022

Modified Files:
src/sys/arch/arm/iomd: vidcaudio.c

Log Message:
malloc -> kmem


To generate a diff of this commit:
cvs rdiff -u -r1.61 -r1.62 src/sys/arch/arm/iomd/vidcaudio.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/iomd/vidcaudio.c
diff -u src/sys/arch/arm/iomd/vidcaudio.c:1.61 src/sys/arch/arm/iomd/vidcaudio.c:1.62
--- src/sys/arch/arm/iomd/vidcaudio.c:1.61	Wed Feb  3 14:22:21 2021
+++ src/sys/arch/arm/iomd/vidcaudio.c	Tue Sep 27 06:14:41 2022
@@ -1,4 +1,4 @@
-/*	$NetBSD: vidcaudio.c,v 1.61 2021/02/03 14:22:21 isaki Exp $	*/
+/*	$NetBSD: vidcaudio.c,v 1.62 2022/09/27 06:14:41 skrll Exp $	*/
 
 /*
  * Copyright (c) 1995 Melvin Tang-Richardson
@@ -65,13 +65,13 @@
 
 #include 	/* proc.h */
 
-__KERNEL_RCSID(0, "$NetBSD: vidcaudio.c,v 1.61 2021/02/03 14:22:21 isaki Exp $");
+__KERNEL_RCSID(0, "$NetBSD: vidcaudio.c,v 1.62 2022/09/27 06:14:41 skrll Exp $");
 
 #include 
 #include/* autoconfig functions */
 #include  /* device calls */
 #include 
-#include 
+#include 
 #include 	/* device calls */
 #include 
 
@@ -121,6 +121,7 @@ struct vidcaudio_softc {
 	vaddr_t	sc_poffset;
 	vaddr_t	sc_pbufsize;
 	paddr_t	*sc_ppages;
+	size_t	sc_szppages;
 	void	(*sc_pintr)(void *);
 	void	*sc_parg;
 	int	sc_pcountdown;
@@ -294,8 +295,9 @@ vidcaudio_close(void *addr)
 	DPRINTF(("DEBUG: vidcaudio_close called\n"));
 	sc = addr;
 	if (sc->sc_ppages != NULL) {
-		free(sc->sc_ppages, M_DEVBUF);
+		kmem_free(sc->sc_ppages, sc->sc_szppages * sizeof(paddr_t));
 		sc->sc_ppages = NULL;
+		sc->sc_szppages = 0;
 	}
 }
 
@@ -390,8 +392,9 @@ vidcaudio_trigger_output(void *addr, voi
 	sc->sc_pbufsize = (char *)end - (char *)start;
 	npages = sc->sc_pbufsize >> PGSHIFT;
 	if (sc->sc_ppages != NULL)
-		free(sc->sc_ppages, M_DEVBUF);
-	sc->sc_ppages = malloc(npages * sizeof(paddr_t), M_DEVBUF, M_WAITOK);
+		kmem_free(sc->sc_ppages, sc->sc_szppages);
+	sc->sc_szppages = npages * sizeof(paddr_t);
+	sc->sc_ppages = kmem_alloc(sc->sc_szppages, KM_SLEEP);
 	if (sc->sc_ppages == NULL)
 		return ENOMEM;
 	for (i = 0; i < npages; i++)



CVS commit: src/sys/arch/arm/iomd

2022-09-26 Thread Nick Hudson
Module Name:src
Committed By:   skrll
Date:   Tue Sep 27 06:14:41 UTC 2022

Modified Files:
src/sys/arch/arm/iomd: vidcaudio.c

Log Message:
malloc -> kmem


To generate a diff of this commit:
cvs rdiff -u -r1.61 -r1.62 src/sys/arch/arm/iomd/vidcaudio.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/arm/sunxi

2022-09-26 Thread Nick Hudson
Module Name:src
Committed By:   skrll
Date:   Tue Sep 27 06:14:13 UTC 2022

Modified Files:
src/sys/arch/arm/sunxi: sunxi_can.c

Log Message:
malloc -> kmem


To generate a diff of this commit:
cvs rdiff -u -r1.11 -r1.12 src/sys/arch/arm/sunxi/sunxi_can.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/sunxi/sunxi_can.c
diff -u src/sys/arch/arm/sunxi/sunxi_can.c:1.11 src/sys/arch/arm/sunxi/sunxi_can.c:1.12
--- src/sys/arch/arm/sunxi/sunxi_can.c:1.11	Wed Sep 21 20:21:16 2022
+++ src/sys/arch/arm/sunxi/sunxi_can.c	Tue Sep 27 06:14:13 2022
@@ -1,4 +1,4 @@
-/*	$NetBSD: sunxi_can.c,v 1.11 2022/09/21 20:21:16 bouyer Exp $	*/
+/*	$NetBSD: sunxi_can.c,v 1.12 2022/09/27 06:14:13 skrll Exp $	*/
 
 /*-
  * Copyright (c) 2017,2018 The NetBSD Foundation, Inc.
@@ -36,7 +36,7 @@
 
 #include 
 
-__KERNEL_RCSID(1, "$NetBSD: sunxi_can.c,v 1.11 2022/09/21 20:21:16 bouyer Exp $");
+__KERNEL_RCSID(1, "$NetBSD: sunxi_can.c,v 1.12 2022/09/27 06:14:13 skrll Exp $");
 
 #include 
 #include 
@@ -232,8 +232,7 @@ sunxi_can_attach(device_t parent, device
 	rnd_attach_source(&sc->sc_rnd_source, device_xname(self),
 	RND_TYPE_NET, RND_FLAG_DEFAULT);
 #ifdef MBUFTRACE
-	ifp->if_mowner = malloc(sizeof(struct mowner), M_DEVBUF,
-	M_WAITOK | M_ZERO);
+	ifp->if_mowner = kmem_zalloc(sizeof(*ifp->if_mowner), KM_SLEEP);
 	strlcpy(ifp->if_mowner->mo_name, ifp->if_xname,
 		sizeof(ifp->if_mowner->mo_name));
 	MOWNER_ATTACH(ifp->if_mowner);



CVS commit: src/sys/arch/arm/sunxi

2022-09-26 Thread Nick Hudson
Module Name:src
Committed By:   skrll
Date:   Tue Sep 27 06:14:13 UTC 2022

Modified Files:
src/sys/arch/arm/sunxi: sunxi_can.c

Log Message:
malloc -> kmem


To generate a diff of this commit:
cvs rdiff -u -r1.11 -r1.12 src/sys/arch/arm/sunxi/sunxi_can.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/arm/xscale

2022-09-26 Thread Nick Hudson
Module Name:src
Committed By:   skrll
Date:   Tue Sep 27 06:13:42 UTC 2022

Modified Files:
src/sys/arch/arm/xscale: ixp425_if_npe.c

Log Message:
malloc -> kmem


To generate a diff of this commit:
cvs rdiff -u -r1.52 -r1.53 src/sys/arch/arm/xscale/ixp425_if_npe.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/xscale/ixp425_if_npe.c
diff -u src/sys/arch/arm/xscale/ixp425_if_npe.c:1.52 src/sys/arch/arm/xscale/ixp425_if_npe.c:1.53
--- src/sys/arch/arm/xscale/ixp425_if_npe.c:1.52	Sun Sep 18 15:49:42 2022
+++ src/sys/arch/arm/xscale/ixp425_if_npe.c	Tue Sep 27 06:13:42 2022
@@ -1,4 +1,4 @@
-/*	$NetBSD: ixp425_if_npe.c,v 1.52 2022/09/18 15:49:42 thorpej Exp $ */
+/*	$NetBSD: ixp425_if_npe.c,v 1.53 2022/09/27 06:13:42 skrll Exp $ */
 
 /*-
  * Copyright (c) 2006 Sam Leffler.  All rights reserved.
@@ -28,7 +28,7 @@
 #if 0
 __FBSDID("$FreeBSD: src/sys/arm/xscale/ixp425/if_npe.c,v 1.1 2006/11/19 23:55:23 sam Exp $");
 #endif
-__KERNEL_RCSID(0, "$NetBSD: ixp425_if_npe.c,v 1.52 2022/09/18 15:49:42 thorpej Exp $");
+__KERNEL_RCSID(0, "$NetBSD: ixp425_if_npe.c,v 1.53 2022/09/27 06:13:42 skrll Exp $");
 
 /*
  * Intel XScale NPE Ethernet driver.
@@ -52,8 +52,8 @@ __KERNEL_RCSID(0, "$NetBSD: ixp425_if_np
 #include 
 #include 
 #include 
+#include 
 #include 
-#include 
 #include 
 #include 
 #include 
@@ -468,9 +468,7 @@ npe_dma_setup(struct npe_softc *sc, stru
 		goto unmap_dmamem;
 	}
 
-	/* XXX M_TEMP */
-	dma->buf = malloc(nbuf * sizeof(struct npebuf), M_TEMP,
-	M_WAITOK | M_ZERO);
+	dma->buf = kmem_zalloc(nbuf * sizeof(struct npebuf), KM_SLEEP);
 	dma->buf_phys = dma->buf_map->dm_segs[0].ds_addr;
 	for (i = 0; i < dma->nbuf; i++) {
 		struct npebuf *npe = &dma->buf[i];
@@ -514,7 +512,7 @@ npe_dma_destroy(struct npe_softc *sc, st
 		bus_dmamap_destroy(sc->sc_dt, dma->buf_map);
 	}
 	if (dma->buf != NULL)
-		free(dma->buf, M_TEMP);
+		kmem_free(dma->buf, dma->nbuf * sizeof(struct npebuf));
 	memset(dma, 0, sizeof(*dma));
 }
 #endif



CVS commit: src/sys/arch/arm/xscale

2022-09-26 Thread Nick Hudson
Module Name:src
Committed By:   skrll
Date:   Tue Sep 27 06:13:42 UTC 2022

Modified Files:
src/sys/arch/arm/xscale: ixp425_if_npe.c

Log Message:
malloc -> kmem


To generate a diff of this commit:
cvs rdiff -u -r1.52 -r1.53 src/sys/arch/arm/xscale/ixp425_if_npe.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/arm/xscale

2022-09-26 Thread Nick Hudson
Module Name:src
Committed By:   skrll
Date:   Tue Sep 27 06:12:58 UTC 2022

Modified Files:
src/sys/arch/arm/xscale: ixp425_qmgr.c

Log Message:
malloc -> kmem


To generate a diff of this commit:
cvs rdiff -u -r1.11 -r1.12 src/sys/arch/arm/xscale/ixp425_qmgr.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/xscale/ixp425_qmgr.c
diff -u src/sys/arch/arm/xscale/ixp425_qmgr.c:1.11 src/sys/arch/arm/xscale/ixp425_qmgr.c:1.12
--- src/sys/arch/arm/xscale/ixp425_qmgr.c:1.11	Fri Dec 10 20:36:02 2021
+++ src/sys/arch/arm/xscale/ixp425_qmgr.c	Tue Sep 27 06:12:58 2022
@@ -1,4 +1,4 @@
-/*	$NetBSD: ixp425_qmgr.c,v 1.11 2021/12/10 20:36:02 andvar Exp $	*/
+/*	$NetBSD: ixp425_qmgr.c,v 1.12 2022/09/27 06:12:58 skrll Exp $	*/
 
 /*-
  * Copyright (c) 2006 Sam Leffler, Errno Consulting
@@ -60,7 +60,7 @@
 */
 #include 
 /*__FBSDID("$FreeBSD: src/sys/arm/xscale/ixp425/ixp425_qmgr.c,v 1.1 2006/11/19 23:55:23 sam Exp $");*/
-__KERNEL_RCSID(0, "$NetBSD: ixp425_qmgr.c,v 1.11 2021/12/10 20:36:02 andvar Exp $");
+__KERNEL_RCSID(0, "$NetBSD: ixp425_qmgr.c,v 1.12 2022/09/27 06:12:58 skrll Exp $");
 
 /*
  * Intel XScale Queue Manager support.
@@ -80,7 +80,7 @@ __KERNEL_RCSID(0, "$NetBSD: ixp425_qmgr.
 #include 
 #include 
 #include 
-#include 
+#include 
 #include 
 
 #include 
@@ -229,7 +229,7 @@ ixpqmgr_init(bus_space_tag_t iot)
 	sc->sc_dev = dev;
 	sc->sc_iot = sa->sc_iot;
 #else
-	sc = malloc(sizeof(*sc), M_DEVBUF, M_WAITOK | M_ZERO);
+	sc = kmem_zalloc(sizeof(*sc), KM_SLEEP);
 	sc->sc_iot = iot;
 #endif
 
@@ -252,7 +252,7 @@ ixpqmgr_init(bus_space_tag_t iot)
 	ixpqmgr_intr, sc);
 	if (sc->sc_ih[0] == NULL) {
 		ixpqmgr_sc = NULL;
-		free(sc, M_DEVBUF);
+		kmem_free(sc, sizeof(*sc));
 		return (NULL);
 	}
 	sc->sc_ih[1] = ixp425_intr_establish(IXP425_INT_QUE33_64, IPL_NET,
@@ -260,7 +260,7 @@ ixpqmgr_init(bus_space_tag_t iot)
 	if (sc->sc_ih[1] == NULL) {
 		ixp425_intr_disestablish(sc->sc_ih[0]);
 		ixpqmgr_sc = NULL;
-		free(sc, M_DEVBUF);
+		kmem_free(sc, sizeof(*sc));
 		return (NULL);
 	}
 #endif



CVS commit: src/sys/arch/arm/xscale

2022-09-26 Thread Nick Hudson
Module Name:src
Committed By:   skrll
Date:   Tue Sep 27 06:12:58 UTC 2022

Modified Files:
src/sys/arch/arm/xscale: ixp425_qmgr.c

Log Message:
malloc -> kmem


To generate a diff of this commit:
cvs rdiff -u -r1.11 -r1.12 src/sys/arch/arm/xscale/ixp425_qmgr.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/arm/s3c2xx0

2022-09-25 Thread Andrius Varanavicius
Module Name:src
Committed By:   andvar
Date:   Sun Sep 25 12:28:54 UTC 2022

Modified Files:
src/sys/arch/arm/s3c2xx0: s3c2800_pci.c

Log Message:
s/itnerrupt/interrupt/


To generate a diff of this commit:
cvs rdiff -u -r1.33 -r1.34 src/sys/arch/arm/s3c2xx0/s3c2800_pci.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/arm/s3c2xx0

2022-09-25 Thread Andrius Varanavicius
Module Name:src
Committed By:   andvar
Date:   Sun Sep 25 12:28:54 UTC 2022

Modified Files:
src/sys/arch/arm/s3c2xx0: s3c2800_pci.c

Log Message:
s/itnerrupt/interrupt/


To generate a diff of this commit:
cvs rdiff -u -r1.33 -r1.34 src/sys/arch/arm/s3c2xx0/s3c2800_pci.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/s3c2xx0/s3c2800_pci.c
diff -u src/sys/arch/arm/s3c2xx0/s3c2800_pci.c:1.33 src/sys/arch/arm/s3c2xx0/s3c2800_pci.c:1.34
--- src/sys/arch/arm/s3c2xx0/s3c2800_pci.c:1.33	Mon May 23 19:52:34 2022
+++ src/sys/arch/arm/s3c2xx0/s3c2800_pci.c	Sun Sep 25 12:28:54 2022
@@ -1,4 +1,4 @@
-/*	$NetBSD: s3c2800_pci.c,v 1.33 2022/05/23 19:52:34 andvar Exp $	*/
+/*	$NetBSD: s3c2800_pci.c,v 1.34 2022/09/25 12:28:54 andvar Exp $	*/
 
 /*
  * Copyright (c) 2002 Fujitsu Component Limited
@@ -100,7 +100,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: s3c2800_pci.c,v 1.33 2022/05/23 19:52:34 andvar Exp $");
+__KERNEL_RCSID(0, "$NetBSD: s3c2800_pci.c,v 1.34 2022/09/25 12:28:54 andvar Exp $");
 
 #include "opt_pci.h"
 #include "pci.h"
@@ -691,7 +691,7 @@ sspci_intr(void *arg)
 		s = splhigh();
 		softint_schedule(sc->sc_softinterrupt);
 
-		/* mask INTA itnerrupt until softinterrupt is handled */
+		/* mask INTA interrupt until softinterrupt is handled */
 		sc->sc_pciinten &= ~PCIINT_INA;
 		bus_space_write_4(iot, ioh, PCICTL_PCIINTEN,
 		sc->sc_pciinten);



Re: CVS commit: src/sys/arch/arm/ti

2022-09-25 Thread Taylor R Campbell
> Module Name:src
> Committed By:   riastradh
> Date:   Sun Sep 25 07:50:32 UTC 2022
> 
> Modified Files:
> src/sys/arch/arm/ti: ti_fb.c ti_lcdc.c
> 
> Log Message:
> tilcdc(4): Set is_console on the drm device, not the fb child.
> 
> The drm device is represented by a rockchip,display-subsystem node in
> the device tree.  The fb child is a purely software abstraction used
> by drm.

This was supposed to read:

The drm device is represented by a ti,am33xx-tilcdc node in
the device tree.  The fb child is a purely software
abstraction used by drm.


Re: CVS commit: src/sys/arch/arm/sunxi

2022-09-25 Thread Taylor R Campbell
> Module Name:src
> Committed By:   riastradh
> Date:   Sun Sep 25 07:50:23 UTC 2022
> 
> Modified Files:
> src/sys/arch/arm/sunxi: sunxi_drm.c sunxi_fb.c
> 
> Log Message:
> sunxidrm: Set is_console on the drm device, not the fb child.
> 
> The drm device is represented by a rockchip,display-subsystem node in
> the device tree.  The fb child is a purely software abstraction used
> by drm.

This was supposed to read:

The drm device is represented by an
allwinner,sun*i-*-display-engine node in the device tree.  The
fb child is a purely software abstraction used by drm.


CVS commit: src/sys/arch/arm/ti

2022-09-25 Thread Taylor R Campbell
Module Name:src
Committed By:   riastradh
Date:   Sun Sep 25 07:50:32 UTC 2022

Modified Files:
src/sys/arch/arm/ti: ti_fb.c ti_lcdc.c

Log Message:
tilcdc(4): Set is_console on the drm device, not the fb child.

The drm device is represented by a rockchip,display-subsystem node in
the device tree.  The fb child is a purely software abstraction used
by drm.

The is_console property is used by MD firmware logic to mark which
actual device in hardware bus enumeration like PCI or FDT the system
has chosen for the console early at boot, so hanging it on the node
for the real hardware device makes more sense than hanging it on the
software abstraction, and is consistent with recent changes to drmfb
to respect its setting on other platforms for hardware devices.


To generate a diff of this commit:
cvs rdiff -u -r1.3 -r1.4 src/sys/arch/arm/ti/ti_fb.c
cvs rdiff -u -r1.13 -r1.14 src/sys/arch/arm/ti/ti_lcdc.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/ti/ti_fb.c
diff -u src/sys/arch/arm/ti/ti_fb.c:1.3 src/sys/arch/arm/ti/ti_fb.c:1.4
--- src/sys/arch/arm/ti/ti_fb.c:1.3	Sun Dec 19 12:44:57 2021
+++ src/sys/arch/arm/ti/ti_fb.c	Sun Sep 25 07:50:32 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: ti_fb.c,v 1.3 2021/12/19 12:44:57 riastradh Exp $ */
+/* $NetBSD: ti_fb.c,v 1.4 2022/09/25 07:50:32 riastradh Exp $ */
 
 /*-
  * Copyright (c) 2015-2019 Jared McNeill 
@@ -29,7 +29,7 @@
 #include "opt_wsdisplay_compat.h"
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: ti_fb.c,v 1.3 2021/12/19 12:44:57 riastradh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: ti_fb.c,v 1.4 2022/09/25 07:50:32 riastradh Exp $");
 
 #include 
 #include 
@@ -100,13 +100,6 @@ tilcdc_fb_init(struct tilcdc_drm_task *t
 	sc_attach_task);
 	device_t self = sc->sc_dev;
 	struct tilcdcfb_attach_args * const tfa = &sc->sc_tfa;
-
-#ifdef WSDISPLAY_MULTICONS
-	prop_dictionary_t dict = device_properties(self);
-	const bool is_console = true;
-	prop_dictionary_set_bool(dict, "is_console", is_console);
-#endif
-
 	const struct drmfb_attach_args da = {
 		.da_dev = self,
 		.da_fb_helper = tfa->tfa_fb_helper,

Index: src/sys/arch/arm/ti/ti_lcdc.c
diff -u src/sys/arch/arm/ti/ti_lcdc.c:1.13 src/sys/arch/arm/ti/ti_lcdc.c:1.14
--- src/sys/arch/arm/ti/ti_lcdc.c:1.13	Sat Jul  2 05:04:36 2022
+++ src/sys/arch/arm/ti/ti_lcdc.c	Sun Sep 25 07:50:32 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: ti_lcdc.c,v 1.13 2022/07/02 05:04:36 skrll Exp $ */
+/* $NetBSD: ti_lcdc.c,v 1.14 2022/09/25 07:50:32 riastradh Exp $ */
 
 /*-
  * Copyright (c) 2019 Jared D. McNeill 
@@ -27,7 +27,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: ti_lcdc.c,v 1.13 2022/07/02 05:04:36 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: ti_lcdc.c,v 1.14 2022/09/25 07:50:32 riastradh Exp $");
 
 #include 
 #include 
@@ -392,6 +392,11 @@ tilcdc_attach(device_t parent, device_t 
 		return;
 	}
 
+#ifdef WSDISPLAY_MULTICONS
+	const bool is_console = true;
+	prop_dictionary_set_bool(dict, "is_console", is_console);
+#endif
+
 	if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0) {
 		aprint_error(": couldn't get registers\n");
 		return;



CVS commit: src/sys/arch/arm/ti

2022-09-25 Thread Taylor R Campbell
Module Name:src
Committed By:   riastradh
Date:   Sun Sep 25 07:50:32 UTC 2022

Modified Files:
src/sys/arch/arm/ti: ti_fb.c ti_lcdc.c

Log Message:
tilcdc(4): Set is_console on the drm device, not the fb child.

The drm device is represented by a rockchip,display-subsystem node in
the device tree.  The fb child is a purely software abstraction used
by drm.

The is_console property is used by MD firmware logic to mark which
actual device in hardware bus enumeration like PCI or FDT the system
has chosen for the console early at boot, so hanging it on the node
for the real hardware device makes more sense than hanging it on the
software abstraction, and is consistent with recent changes to drmfb
to respect its setting on other platforms for hardware devices.


To generate a diff of this commit:
cvs rdiff -u -r1.3 -r1.4 src/sys/arch/arm/ti/ti_fb.c
cvs rdiff -u -r1.13 -r1.14 src/sys/arch/arm/ti/ti_lcdc.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/arm/sunxi

2022-09-25 Thread Taylor R Campbell
Module Name:src
Committed By:   riastradh
Date:   Sun Sep 25 07:50:23 UTC 2022

Modified Files:
src/sys/arch/arm/sunxi: sunxi_drm.c sunxi_fb.c

Log Message:
sunxidrm: Set is_console on the drm device, not the fb child.

The drm device is represented by a rockchip,display-subsystem node in
the device tree.  The fb child is a purely software abstraction used
by drm.

The is_console property is used by MD firmware logic to mark which
actual device in hardware bus enumeration like PCI or FDT the system
has chosen for the console early at boot, so hanging it on the node
for the real hardware device makes more sense than hanging it on the
software abstraction, and is consistent with recent changes to drmfb
to respect its setting on other platforms for hardware devices.


To generate a diff of this commit:
cvs rdiff -u -r1.25 -r1.26 src/sys/arch/arm/sunxi/sunxi_drm.c
cvs rdiff -u -r1.7 -r1.8 src/sys/arch/arm/sunxi/sunxi_fb.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/sunxi/sunxi_drm.c
diff -u src/sys/arch/arm/sunxi/sunxi_drm.c:1.25 src/sys/arch/arm/sunxi/sunxi_drm.c:1.26
--- src/sys/arch/arm/sunxi/sunxi_drm.c:1.25	Tue Jun 28 05:19:03 2022
+++ src/sys/arch/arm/sunxi/sunxi_drm.c	Sun Sep 25 07:50:23 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: sunxi_drm.c,v 1.25 2022/06/28 05:19:03 skrll Exp $ */
+/* $NetBSD: sunxi_drm.c,v 1.26 2022/09/25 07:50:23 riastradh Exp $ */
 
 /*-
  * Copyright (c) 2019 Jared D. McNeill 
@@ -27,7 +27,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: sunxi_drm.c,v 1.25 2022/06/28 05:19:03 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: sunxi_drm.c,v 1.26 2022/09/25 07:50:23 riastradh Exp $");
 
 #include 
 #include 
@@ -149,6 +149,11 @@ sunxi_drm_attach(device_t parent, device
 
 	aprint_normal(": Display Engine Pipeline\n");
 
+#ifdef WSDISPLAY_MULTICONS
+	const bool is_console = true;
+	prop_dictionary_set_bool(dict, "is_console", is_console);
+#endif
+
 	sc->sc_dev = self;
 	sc->sc_dmat = faa->faa_dmat;
 	sc->sc_bst = faa->faa_bst;

Index: src/sys/arch/arm/sunxi/sunxi_fb.c
diff -u src/sys/arch/arm/sunxi/sunxi_fb.c:1.7 src/sys/arch/arm/sunxi/sunxi_fb.c:1.8
--- src/sys/arch/arm/sunxi/sunxi_fb.c:1.7	Sun Dec 19 12:28:20 2021
+++ src/sys/arch/arm/sunxi/sunxi_fb.c	Sun Sep 25 07:50:23 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: sunxi_fb.c,v 1.7 2021/12/19 12:28:20 riastradh Exp $ */
+/* $NetBSD: sunxi_fb.c,v 1.8 2022/09/25 07:50:23 riastradh Exp $ */
 
 /*-
  * Copyright (c) 2015-2019 Jared McNeill 
@@ -29,7 +29,7 @@
 #include "opt_wsdisplay_compat.h"
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: sunxi_fb.c,v 1.7 2021/12/19 12:28:20 riastradh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: sunxi_fb.c,v 1.8 2022/09/25 07:50:23 riastradh Exp $");
 
 #include 
 #include 
@@ -92,11 +92,6 @@ sunxi_fb_attach(device_t parent, device_
 	aprint_naive("\n");
 	aprint_normal("\n");
 
-#ifdef WSDISPLAY_MULTICONS
-	prop_dictionary_t dict = device_properties(self);
-	const bool is_console = true;
-	prop_dictionary_set_bool(dict, "is_console", is_console);
-#endif
 	sunxi_task_init(&sc->sc_attach_task, &sunxi_fb_init);
 	sunxi_task_schedule(parent, &sc->sc_attach_task);
 }



CVS commit: src/sys/arch/arm/sunxi

2022-09-25 Thread Taylor R Campbell
Module Name:src
Committed By:   riastradh
Date:   Sun Sep 25 07:50:23 UTC 2022

Modified Files:
src/sys/arch/arm/sunxi: sunxi_drm.c sunxi_fb.c

Log Message:
sunxidrm: Set is_console on the drm device, not the fb child.

The drm device is represented by a rockchip,display-subsystem node in
the device tree.  The fb child is a purely software abstraction used
by drm.

The is_console property is used by MD firmware logic to mark which
actual device in hardware bus enumeration like PCI or FDT the system
has chosen for the console early at boot, so hanging it on the node
for the real hardware device makes more sense than hanging it on the
software abstraction, and is consistent with recent changes to drmfb
to respect its setting on other platforms for hardware devices.


To generate a diff of this commit:
cvs rdiff -u -r1.25 -r1.26 src/sys/arch/arm/sunxi/sunxi_drm.c
cvs rdiff -u -r1.7 -r1.8 src/sys/arch/arm/sunxi/sunxi_fb.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/arm/rockchip

2022-09-25 Thread Taylor R Campbell
Module Name:src
Committed By:   riastradh
Date:   Sun Sep 25 07:50:15 UTC 2022

Modified Files:
src/sys/arch/arm/rockchip: rk_drm.c rk_fb.c

Log Message:
rkdrm: Set is_console on the drm device, not the fb child.

The drm device is represented by a rockchip,display-subsystem node in
the device tree.  The fb child is a purely software abstraction used
by drm.

The is_console property is used by MD firmware logic to mark which
actual device in hardware bus enumeration like PCI or FDT the system
has chosen for the console early at boot, so hanging it on the node
for the real hardware device makes more sense than hanging it on the
software abstraction, and is consistent with recent changes to drmfb
to respect its setting on other platforms for hardware devices.


To generate a diff of this commit:
cvs rdiff -u -r1.19 -r1.20 src/sys/arch/arm/rockchip/rk_drm.c
cvs rdiff -u -r1.6 -r1.7 src/sys/arch/arm/rockchip/rk_fb.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/rockchip/rk_drm.c
diff -u src/sys/arch/arm/rockchip/rk_drm.c:1.19 src/sys/arch/arm/rockchip/rk_drm.c:1.20
--- src/sys/arch/arm/rockchip/rk_drm.c:1.19	Thu Apr 21 21:22:25 2022
+++ src/sys/arch/arm/rockchip/rk_drm.c	Sun Sep 25 07:50:15 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: rk_drm.c,v 1.19 2022/04/21 21:22:25 andvar Exp $ */
+/* $NetBSD: rk_drm.c,v 1.20 2022/09/25 07:50:15 riastradh Exp $ */
 
 /*-
  * Copyright (c) 2019 Jared D. McNeill 
@@ -27,7 +27,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: rk_drm.c,v 1.19 2022/04/21 21:22:25 andvar Exp $");
+__KERNEL_RCSID(0, "$NetBSD: rk_drm.c,v 1.20 2022/09/25 07:50:15 riastradh Exp $");
 
 #include 
 #include 
@@ -133,6 +133,11 @@ rk_drm_attach(device_t parent, device_t 
 
 	aprint_normal("\n");
 
+#ifdef WSDISPLAY_MULTICONS
+	const bool is_console = true;
+	prop_dictionary_set_bool(dict, "is_console", is_console);
+#endif
+
 	sc->sc_dev = self;
 	sc->sc_dmat = faa->faa_dmat;
 	sc->sc_bst = faa->faa_bst;

Index: src/sys/arch/arm/rockchip/rk_fb.c
diff -u src/sys/arch/arm/rockchip/rk_fb.c:1.6 src/sys/arch/arm/rockchip/rk_fb.c:1.7
--- src/sys/arch/arm/rockchip/rk_fb.c:1.6	Sun Dec 19 12:45:19 2021
+++ src/sys/arch/arm/rockchip/rk_fb.c	Sun Sep 25 07:50:15 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: rk_fb.c,v 1.6 2021/12/19 12:45:19 riastradh Exp $ */
+/* $NetBSD: rk_fb.c,v 1.7 2022/09/25 07:50:15 riastradh Exp $ */
 
 /*-
  * Copyright (c) 2015-2019 Jared McNeill 
@@ -29,7 +29,7 @@
 #include "opt_wsdisplay_compat.h"
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: rk_fb.c,v 1.6 2021/12/19 12:45:19 riastradh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: rk_fb.c,v 1.7 2022/09/25 07:50:15 riastradh Exp $");
 
 #include 
 #include 
@@ -88,12 +88,6 @@ rk_fb_attach(device_t parent, device_t s
 	aprint_naive("\n");
 	aprint_normal("\n");
 
-#ifdef WSDISPLAY_MULTICONS
-	prop_dictionary_t dict = device_properties(self);
-	const bool is_console = true;
-	prop_dictionary_set_bool(dict, "is_console", is_console);
-#endif
-
 	rk_task_init(&sc->sc_attach_task, &rk_fb_init);
 	rk_task_schedule(parent, &sc->sc_attach_task);
 }



CVS commit: src/sys/arch/arm/rockchip

2022-09-25 Thread Taylor R Campbell
Module Name:src
Committed By:   riastradh
Date:   Sun Sep 25 07:50:15 UTC 2022

Modified Files:
src/sys/arch/arm/rockchip: rk_drm.c rk_fb.c

Log Message:
rkdrm: Set is_console on the drm device, not the fb child.

The drm device is represented by a rockchip,display-subsystem node in
the device tree.  The fb child is a purely software abstraction used
by drm.

The is_console property is used by MD firmware logic to mark which
actual device in hardware bus enumeration like PCI or FDT the system
has chosen for the console early at boot, so hanging it on the node
for the real hardware device makes more sense than hanging it on the
software abstraction, and is consistent with recent changes to drmfb
to respect its setting on other platforms for hardware devices.


To generate a diff of this commit:
cvs rdiff -u -r1.19 -r1.20 src/sys/arch/arm/rockchip/rk_drm.c
cvs rdiff -u -r1.6 -r1.7 src/sys/arch/arm/rockchip/rk_fb.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/arm/sunxi

2022-09-21 Thread Manuel Bouyer
Module Name:src
Committed By:   bouyer
Date:   Wed Sep 21 20:21:16 UTC 2022

Modified Files:
src/sys/arch/arm/sunxi: sunxi_can.c

Log Message:
Just skipping sunxi_can_rx_intr() if the DATA_OR flag is set isn't enough
to properly recover from overrrun in all case. So go the linux way and reset
the hardware.

Don't write SUNXI_CAN_INT_RX_FLAG to SUNXI_CAN_INT_REG, this could race
with hardware and clear the interrupt while there are new packets received.
SUNXI_CAN_INT_RX_FLAG clears automatically when all pending packets have been
read, so when no more packets are pending just read SUNXI_CAN_INT_REG again
and process other interrupts, if any (or RX if there are new packets pending).
With this change it seems I get overruns less often in my use case.


To generate a diff of this commit:
cvs rdiff -u -r1.10 -r1.11 src/sys/arch/arm/sunxi/sunxi_can.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/sunxi/sunxi_can.c
diff -u src/sys/arch/arm/sunxi/sunxi_can.c:1.10 src/sys/arch/arm/sunxi/sunxi_can.c:1.11
--- src/sys/arch/arm/sunxi/sunxi_can.c:1.10	Mon Sep 19 11:21:36 2022
+++ src/sys/arch/arm/sunxi/sunxi_can.c	Wed Sep 21 20:21:16 2022
@@ -1,4 +1,4 @@
-/*	$NetBSD: sunxi_can.c,v 1.10 2022/09/19 11:21:36 bouyer Exp $	*/
+/*	$NetBSD: sunxi_can.c,v 1.11 2022/09/21 20:21:16 bouyer Exp $	*/
 
 /*-
  * Copyright (c) 2017,2018 The NetBSD Foundation, Inc.
@@ -36,7 +36,7 @@
 
 #include 
 
-__KERNEL_RCSID(1, "$NetBSD: sunxi_can.c,v 1.10 2022/09/19 11:21:36 bouyer Exp $");
+__KERNEL_RCSID(1, "$NetBSD: sunxi_can.c,v 1.11 2022/09/21 20:21:16 bouyer Exp $");
 
 #include 
 #include 
@@ -101,6 +101,8 @@ static void sunxi_can_ifwatchdog(struct 
 
 static void sunxi_can_enter_reset(struct sunxi_can_softc *);
 static void sunxi_can_exit_reset(struct sunxi_can_softc *);
+static void sunxi_can_ifdown(struct sunxi_can_softc * const);
+static int sunxi_can_ifup(struct sunxi_can_softc * const);
 
 CFATTACH_DECL_NEW(sunxi_can, sizeof(struct sunxi_can_softc),
 	sunxi_can_match, sunxi_can_attach, NULL, NULL);
@@ -344,7 +346,9 @@ sunxi_can_err_intr(struct sunxi_can_soft
 
 	if (irq & SUNXI_CAN_INT_DATA_OR) {
 		if_statinc(ifp, if_ierrors);
+		sunxi_can_ifdown(sc);
 		sunxi_can_write(sc, SUNXI_CAN_CMD_REG, SUNXI_CAN_CMD_CLR_OR);
+		sunxi_can_ifup(sc);
 	}
 	if (irq & SUNXI_CAN_INT_ERR) {
 		reg = sunxi_can_read(sc, SUNXI_CAN_REC_REG);
@@ -383,23 +387,31 @@ sunxi_can_intr(void *arg)
 	while ((irq = sunxi_can_read(sc, SUNXI_CAN_INT_REG)) != 0) {
 		uint32_t sts = sunxi_can_read(sc, SUNXI_CAN_STA_REG);
 		rv = 1;
+rnd_add_uint32(&sc->sc_rnd_source, irq);
 
-		if (irq & SUNXI_CAN_INT_TX_FLAG) {
-			sunxi_can_tx_intr(sc);
-		}
 		if ((irq & (SUNXI_CAN_INT_RX_FLAG | SUNXI_CAN_INT_DATA_OR)) ==
 		SUNXI_CAN_INT_RX_FLAG) {
 			while (sts & SUNXI_CAN_STA_RX_RDY) {
 sunxi_can_rx_intr(sc);
 sts = sunxi_can_read(sc, SUNXI_CAN_STA_REG);
 			}
+			/*
+			 * Don't write SUNXI_CAN_INT_RX_FLAG to the interrupt
+			 * register, this may clear the RX pending flag
+			 * while there is indeed a packet pending.
+			 * Reading packets should have cleared the RX interrupt,
+			 * so just restart the loop and re-read the interrupt
+			 * register. In the common case irq will now be 0.
+			 */
+			continue;
+		}
+		if (irq & SUNXI_CAN_INT_TX_FLAG) {
+			sunxi_can_tx_intr(sc);
 		}
 		if (irq & SUNXI_CAN_INT_ALLERRS) {
 			sunxi_can_err_intr(sc, irq, sts);
 		}
 		sunxi_can_write(sc, SUNXI_CAN_INT_REG, irq);
-rnd_add_uint32(&sc->sc_rnd_source, irq);
-
 	}
 	mutex_exit(&sc->sc_intr_lock);
 



CVS commit: src/sys/arch/arm/sunxi

2022-09-21 Thread Manuel Bouyer
Module Name:src
Committed By:   bouyer
Date:   Wed Sep 21 20:21:16 UTC 2022

Modified Files:
src/sys/arch/arm/sunxi: sunxi_can.c

Log Message:
Just skipping sunxi_can_rx_intr() if the DATA_OR flag is set isn't enough
to properly recover from overrrun in all case. So go the linux way and reset
the hardware.

Don't write SUNXI_CAN_INT_RX_FLAG to SUNXI_CAN_INT_REG, this could race
with hardware and clear the interrupt while there are new packets received.
SUNXI_CAN_INT_RX_FLAG clears automatically when all pending packets have been
read, so when no more packets are pending just read SUNXI_CAN_INT_REG again
and process other interrupts, if any (or RX if there are new packets pending).
With this change it seems I get overruns less often in my use case.


To generate a diff of this commit:
cvs rdiff -u -r1.10 -r1.11 src/sys/arch/arm/sunxi/sunxi_can.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/arm/sunxi

2022-09-19 Thread Manuel Bouyer
Module Name:src
Committed By:   bouyer
Date:   Mon Sep 19 11:21:36 UTC 2022

Modified Files:
src/sys/arch/arm/sunxi: sunxi_can.c

Log Message:
Don't process RX if SUNXI_CAN_INT_DATA_OR is pending. Seems to fix occasional
RX stalls


To generate a diff of this commit:
cvs rdiff -u -r1.9 -r1.10 src/sys/arch/arm/sunxi/sunxi_can.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/sunxi/sunxi_can.c
diff -u src/sys/arch/arm/sunxi/sunxi_can.c:1.9 src/sys/arch/arm/sunxi/sunxi_can.c:1.10
--- src/sys/arch/arm/sunxi/sunxi_can.c:1.9	Sun Sep 18 15:28:01 2022
+++ src/sys/arch/arm/sunxi/sunxi_can.c	Mon Sep 19 11:21:36 2022
@@ -1,4 +1,4 @@
-/*	$NetBSD: sunxi_can.c,v 1.9 2022/09/18 15:28:01 thorpej Exp $	*/
+/*	$NetBSD: sunxi_can.c,v 1.10 2022/09/19 11:21:36 bouyer Exp $	*/
 
 /*-
  * Copyright (c) 2017,2018 The NetBSD Foundation, Inc.
@@ -36,7 +36,7 @@
 
 #include 
 
-__KERNEL_RCSID(1, "$NetBSD: sunxi_can.c,v 1.9 2022/09/18 15:28:01 thorpej Exp $");
+__KERNEL_RCSID(1, "$NetBSD: sunxi_can.c,v 1.10 2022/09/19 11:21:36 bouyer Exp $");
 
 #include 
 #include 
@@ -387,7 +387,8 @@ sunxi_can_intr(void *arg)
 		if (irq & SUNXI_CAN_INT_TX_FLAG) {
 			sunxi_can_tx_intr(sc);
 		}
-		if (irq & SUNXI_CAN_INT_RX_FLAG) {
+		if ((irq & (SUNXI_CAN_INT_RX_FLAG | SUNXI_CAN_INT_DATA_OR)) ==
+		SUNXI_CAN_INT_RX_FLAG) {
 			while (sts & SUNXI_CAN_STA_RX_RDY) {
 sunxi_can_rx_intr(sc);
 sts = sunxi_can_read(sc, SUNXI_CAN_STA_REG);



CVS commit: src/sys/arch/arm/sunxi

2022-09-19 Thread Manuel Bouyer
Module Name:src
Committed By:   bouyer
Date:   Mon Sep 19 11:21:36 UTC 2022

Modified Files:
src/sys/arch/arm/sunxi: sunxi_can.c

Log Message:
Don't process RX if SUNXI_CAN_INT_DATA_OR is pending. Seems to fix occasional
RX stalls


To generate a diff of this commit:
cvs rdiff -u -r1.9 -r1.10 src/sys/arch/arm/sunxi/sunxi_can.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/arm/rockchip

2022-09-18 Thread Ryo Shimizu
Module Name:src
Committed By:   ryo
Date:   Sun Sep 18 21:33:57 UTC 2022

Modified Files:
src/sys/arch/arm/rockchip: rk_cru.c

Log Message:
KNF. 80 columns, use tab. NFC.


To generate a diff of this commit:
cvs rdiff -u -r1.9 -r1.10 src/sys/arch/arm/rockchip/rk_cru.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/rockchip/rk_cru.c
diff -u src/sys/arch/arm/rockchip/rk_cru.c:1.9 src/sys/arch/arm/rockchip/rk_cru.c:1.10
--- src/sys/arch/arm/rockchip/rk_cru.c:1.9	Sat Nov 17 16:51:51 2018
+++ src/sys/arch/arm/rockchip/rk_cru.c	Sun Sep 18 21:33:57 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: rk_cru.c,v 1.9 2018/11/17 16:51:51 jakllsch Exp $ */
+/* $NetBSD: rk_cru.c,v 1.10 2022/09/18 21:33:57 ryo Exp $ */
 
 /*-
  * Copyright (c) 2018 Jared McNeill 
@@ -30,7 +30,7 @@
 #include "opt_console.h"
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: rk_cru.c,v 1.9 2018/11/17 16:51:51 jakllsch Exp $");
+__KERNEL_RCSID(0, "$NetBSD: rk_cru.c,v 1.10 2022/09/18 21:33:57 ryo Exp $");
 
 #include 
 #include 
@@ -144,7 +144,8 @@ rk_cru_clock_get_rate(void *priv, struct
 
 	clkp_parent = clk_get_parent(clkp);
 	if (clkp_parent == NULL) {
-		aprint_debug("%s: no parent for %s\n", __func__, clk->base.name);
+		aprint_debug("%s: no parent for %s\n", __func__,
+		clk->base.name);
 		return 0;
 	}
 
@@ -161,7 +162,8 @@ rk_cru_clock_set_rate(void *priv, struct
 	if (clkp->flags & CLK_SET_RATE_PARENT) {
 		clkp_parent = clk_get_parent(clkp);
 		if (clkp_parent == NULL) {
-			aprint_error("%s: no parent for %s\n", __func__, clk->base.name);
+			aprint_error("%s: no parent for %s\n", __func__,
+			clk->base.name);
 			return ENXIO;
 		}
 		return clk_set_rate(clkp_parent, rate);
@@ -183,7 +185,8 @@ rk_cru_clock_round_rate(void *priv, stru
 	if (clkp->flags & CLK_SET_RATE_PARENT) {
 		clkp_parent = clk_get_parent(clkp);
 		if (clkp_parent == NULL) {
-			aprint_error("%s: no parent for %s\n", __func__, clk->base.name);
+			aprint_error("%s: no parent for %s\n", __func__,
+			clk->base.name);
 			return 0;
 		}
 		return clk_round_rate(clkp_parent, rate);
@@ -230,8 +233,7 @@ rk_cru_clock_disable(void *priv, struct 
 }
 
 static int
-rk_cru_clock_set_parent(void *priv, struct clk *clkp,
-struct clk *clkp_parent)
+rk_cru_clock_set_parent(void *priv, struct clk *clkp, struct clk *clkp_parent)
 {
 	struct rk_cru_softc * const sc = priv;
 	struct rk_cru_clk *clk = (struct rk_cru_clk *)clkp;
@@ -298,7 +300,8 @@ rk_cru_attach(struct rk_cru_softc *sc)
 	int i;
 
 	if (of_hasprop(sc->sc_phandle, "rockchip,grf")) {
-		sc->sc_grf = fdtbus_syscon_acquire(sc->sc_phandle, "rockchip,grf");
+		sc->sc_grf = fdtbus_syscon_acquire(sc->sc_phandle,
+		"rockchip,grf");
 		if (sc->sc_grf == NULL) {
 			aprint_error(": couldn't get grf syscon\n");
 			return ENXIO;
@@ -355,13 +358,13 @@ rk_cru_print(struct rk_cru_softc *sc)
 		default:			type = "???"; break;
 		}
 
-	aprint_debug_dev(sc->sc_dev,
+		aprint_debug_dev(sc->sc_dev,
 		"%3d %-14s %2s %-14s %-7s ",
 		clk->id,
-	clk->base.name,
-	clkp_parent ? "<-" : "",
-	clkp_parent ? clkp_parent->name : "",
-	type);
+		clk->base.name,
+		clkp_parent ? "<-" : "",
+		clkp_parent ? clkp_parent->name : "",
+		type);
 		aprint_debug("%10d Hz\n", clk_get_rate(&clk->base));
 	}
 }



CVS commit: src/sys/arch/arm/rockchip

2022-09-18 Thread Ryo Shimizu
Module Name:src
Committed By:   ryo
Date:   Sun Sep 18 21:33:57 UTC 2022

Modified Files:
src/sys/arch/arm/rockchip: rk_cru.c

Log Message:
KNF. 80 columns, use tab. NFC.


To generate a diff of this commit:
cvs rdiff -u -r1.9 -r1.10 src/sys/arch/arm/rockchip/rk_cru.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



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