date:20110620

But I forgot to add that the resultant jitter will be also the sampling 
rate period (10ns at 100MHz), so I think that the output will not be too 
clean... so I'm afraid it will not be a great improvement over using 
only the MSB :)


Regards,

Javier

El 21/06/2011 08:37, Javier Herrero escribió:


I supppose that then you will need the digital version of the DDS -> 
Filter -> Comparator think, usign a FIR and outputing the sign of the 
resultant signal.




--

Javier HerreroEMAIL: jherr...@hvsistemas.com
Chief Technology Officer
HV Sistemas S.L.  PHONE: +34 949 336 806
Los Charcones, 17 FAX:   +34 949 336 792
19170 El Casar - Guadalajara - Spain  WEB: http://www.hvsistemas.com


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Re: [time-nuts] DDS'ery narrow scoped.


Hello,

El 21/06/2011 02:19, Luis Cupido escribió:


Imagine an FPGA and a square wave coming out.
Just that. Nothing more.

(That is what I had in mind when querying about the MSB usage in
the first place.)


My first approach was the ACC MSB
(and that is working already on the bench.)


I supppose that then you will need the digital version of the DDS -> 
Filter -> Comparator think, usign a FIR and outputing the sign of the 
resultant signal.



P.S. At the moment I'm testing on the bench with a real FPGA cyclone III
with a 48bit dds at 100MHz fclock and at circa 6 and 18MHz output and 
it is not that bad. I got better than -60dBc in the desired ranges.

So not too unhappy for a start ;-) PLL cleans 99% of it...
but the close in spurs are annoying.


What it the topology you're using now? Also, I would like to know which 
DDS core are you using? (since I will need to use one quite soon, 
probably on a Cyclone IV E)


Best regards,

Javier


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--

Javier HerreroEMAIL: jherr...@hvsistemas.com
Chief Technology Officer
HV Sistemas S.L.  PHONE: +34 949 336 806
Los Charcones, 17 FAX:   +34 949 336 792
19170 El Casar - Guadalajara - Spain  WEB: http://www.hvsistemas.com


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[time-nuts] Update re light squared

2011-06-20 Thread Mark Spencer

http://www.pcworld.com/businesscenter/article/230780/lightsquared_may_change_bands_to_save_gps.html#tk.mod_rel

Regards 
Mark Spencer
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Re: [time-nuts] DDS'ery narrow scoped.

2011-06-20 Thread ehydra


That is maybe interesting to you:
http://www.holmea.demon.co.uk/Projects.htm#Frac

- Henry

--
ehydra.dyndns.info


Luis Cupido schrieb:

P.S. At the moment I'm testing on the bench with a real FPGA cyclone III
with a 48bit dds at 100MHz fclock and at circa 6 and 18MHz output and it 
is not that bad. I got better than -60dBc in the desired ranges.

So not too unhappy for a start ;-) PLL cleans 99% of it...
but the close in spurs are annoying.


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Re: [time-nuts] DDS'ery

2011-06-20 Thread John Miles

Correct, CORDIC doesn't require a multiplier, only adds and shifts.  That's
the whole idea.

-- john, KE5FX

> -Original Message-
> From: time-nuts-boun...@febo.com [mailto:time-nuts-
> boun...@febo.com] On Behalf Of li...@lazygranch.com
> Sent: Monday, June 20, 2011 5:24 PM
> To: Discussion of precise time and frequency measurement
> Subject: Re: [time-nuts] DDS'ery
> 
> I don't have the algorithm in front of me, but I don't recall any
> multiplication, just addition and magnitude comparison.
> -Original Message-
> From: Jim Lux 
> Sender: time-nuts-boun...@febo.com
> Date: Mon, 20 Jun 2011 17:14:44
> To: Discussion of precise time and frequency measurement n...@febo.com>
> Reply-To: Discussion of precise time and frequency measurement
>   
> Subject: Re: [time-nuts] DDS'ery
> 
> On 6/20/11 12:17 PM, li...@lazygranch.com wrote:
> > Just a FYI, you don't have to use sine lookup tables. You can generate
sine
> and cosine on the fly with a coordic. Perhaps not easy at RF speed, but
very
> common in audio DSP.
> >
> 
> It's a tradeoff..  To do CORDIC you need four multiplies and 2 adds,
> which might be a lot of gates, if you have a fair number of bits,
> compared to an adder and some lookup tables.
> 
> If you have a fast multiply instruction on a processor, then CORDIC gets
> very attractive.
> 
> The other problem with CORDIC is that roundoff errors accumulate, the
> longer you run the generator for, because it's basically a difference
> equation/numerical integration sort of scheme.
> 
> That said, some of AD's latest DDSes use a monolithic CORDIC generator.
> 
> 


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Re: [time-nuts] DDS'ery

I don't have the algorithm in front of me, but I don't recall any 
multiplication, just addition and magnitude comparison. 
-Original Message-
From: Jim Lux 
Sender: time-nuts-boun...@febo.com
Date: Mon, 20 Jun 2011 17:14:44 
To: Discussion of precise time and frequency measurement
Reply-To: Discussion of precise time and frequency measurement

Subject: Re: [time-nuts] DDS'ery

On 6/20/11 12:17 PM, li...@lazygranch.com wrote:
> Just a FYI, you don't have to use sine lookup tables. You can generate sine 
> and cosine on the fly with a coordic. Perhaps not easy at RF speed, but very 
> common in audio DSP.
>

It's a tradeoff..  To do CORDIC you need four multiplies and 2 adds, 
which might be a lot of gates, if you have a fair number of bits, 
compared to an adder and some lookup tables.

If you have a fast multiply instruction on a processor, then CORDIC gets 
very attractive.

The other problem with CORDIC is that roundoff errors accumulate, the 
longer you run the generator for, because it's basically a difference 
equation/numerical integration sort of scheme.

That said, some of AD's latest DDSes use a monolithic CORDIC generator.

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[time-nuts] DDS'ery narrow scoped.


Folks,

Many thanks to you all, for the info.
This is indeed a great forum.

My aplic. is a DDS signal that
will serve as reference for a pll with a relatively
narrow loop filter. As I said before.

Most replies presume the analog world with DAC
filters etc etc. But that I know ;-)
I'm digging out the possibilities in the digital side
not involving going back to analog and back to digital.
this is how this started :-)


Now that you all have been so kind in the great comments
you gave, please let me just be
very very very specific.


Imagine an FPGA and a square wave coming out.
Just that. Nothing more.

(That is what I had in mind when querying about the MSB usage in
the first place.)


My first approach was the ACC MSB
(and that is working already on the bench.)

So I'm researching a way to have that digital output cleaner (spurs) 
without leaving the digital(FPGA) world sticking to the block diagram
of one FPGA one digital output. Specially worried about close in spurs 
(the far away ones won't bother me much).


That is really scenario I'm trying to picture if there is any hope to
generate a cleaner digital output out of an FPGA (dds with whatever 
processing required to be done after and producing a square wave).


Thanks for your patience.

Luis Cupido.
ct1dmk


P.S. At the moment I'm testing on the bench with a real FPGA cyclone III
with a 48bit dds at 100MHz fclock and at circa 6 and 18MHz output and it 
is not that bad. I got better than -60dBc in the desired ranges.

So not too unhappy for a start ;-) PLL cleans 99% of it...
but the close in spurs are annoying.


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Re: [time-nuts] DDS'ery


On 6/20/11 12:17 PM, li...@lazygranch.com wrote:

Just a FYI, you don't have to use sine lookup tables. You can generate sine and 
cosine on the fly with a coordic. Perhaps not easy at RF speed, but very common 
in audio DSP.



It's a tradeoff..  To do CORDIC you need four multiplies and 2 adds, 
which might be a lot of gates, if you have a fair number of bits, 
compared to an adder and some lookup tables.


If you have a fast multiply instruction on a processor, then CORDIC gets 
very attractive.


The other problem with CORDIC is that roundoff errors accumulate, the 
longer you run the generator for, because it's basically a difference 
equation/numerical integration sort of scheme.


That said, some of AD's latest DDSes use a monolithic CORDIC generator.


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Re: [time-nuts] Replacing electrolytics - any disadvantages of high temp ones?

2011-06-20 Thread Alan Melia

David Another important factor when considering power supply caps is ripple
current rating. It is generally the ripple current that makes them get warm.

I think the "usual" thumbnail calculation still work for caps if you can
reduce the temperature by 20 degrees they will last at least 4 times as
long. That is an activation energy (Arrhenius eqn) of about 1ev. I also
believe though I cant quote that they are best run at about 75% of their
specified working voltage. I have always wonderd about this but it would
seem to be a mistake to have too low a voltage on electrolytics ...maybe
something to do with the strength of the instulating layer formed.

Alan
G3NYK

- Original Message - 
From: "Dr. David Kirkby" 
To: "Discussion of precise time and frequency measurement"

Sent: Tuesday, June 21, 2011 12:40 AM
Subject: Re: [time-nuts] Replacing electrolytics - any disadvantages of high
temp ones?

> On 06/20/11 10:44 PM, Poul-Henning Kamp wrote:
> > In message<4dffbaf4.4070...@onetel.net>, "Dr. David Kirkby" writes:
> >
> >> 1) Higher temperature devices (like 105 deg C) will be more relieable
than low
> >> temperature ones like the standard 85 deg C cap. I'm sure at high
temperatures,
> >
> > You should check both temperature and lifetime rating of the capactors.
>
> I have, but I would assume one rated at 6000 hours at 125 deg C would be
at
> least as good as one rated at 7000 hours at 105 deg C.
>
> > There are many capacitors on the market these days with 5000h or
> > even 2000h rated life.
> >
> > That is 7 or 3 months respectively.
>
> Even 1000 hours I've seen. But these are of course at the maximum
temperature,
> which few would use them at. Otherwise failure rates would be a lot higher
than
> they are.
>
> I've not seen any electrolytics rated more than 10,000 hours (14 months),
but
> they last a lot longer if the temperature is lower.
>
> My PC is already more than 14 months old, and has been on 24/7. Hopefully
it is
> not dying on me.
>
> > And yes, it should be criminal to manufacture and sell those.
>
> Well, I think the MTBF will be a lot more than that in practical use, as
few
> would design equipment to run at 85 deg C, which is the lowest maximum
> temperature rating I've seen on any cap.
>
> -- 
> A: Because it messes up the order in which people normally read text.
> Q: Why is top-posting such a bad thing?
> A: Top-posting.
> Q: What is the most annoying thing in e-mail?
>
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Re: [time-nuts] Bob Pease

2011-06-20 Thread Neville Michie


Mine did!

Sad to hear of his departure,

Neville Michie

On 21/06/2011, at 1:05 AM, Poul-Henning Kamp wrote:


In message <4dff5c52.4070...@erols.com>, Chuck Harris writes:


One important thing to note is he wasn't wearing his seat belts.


Does a 1969 VW Beetle even have them ?


--  
Poul-Henning Kamp   | UNIX since Zilog Zeus 3.20

p...@freebsd.org | TCP/IP since RFC 956
FreeBSD committer   | BSD since 4.3-tahoe
Never attribute to malice what can adequately be explained by  
incompetence.


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time-nuts

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Re: [time-nuts] DDS'ery

2011-06-20 Thread Peter G. Viscarola

>Unfortunately, my google skills fail me to locate a digital copy of this 
>dissertation. 

My Google-fu is pretty decent.  You can apparently order a PDF for web download 
for $37 from:
http://proquest.umi.com/pqdlink?did=753152421&Fmt=7&clientId 
=79356&RQT=309&VName=PQD 

I say "apparently" because I haven't actually TRIED it... but there it is.

Peter
K1PGV


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Re: [time-nuts] Replacing electrolytics - any disadvantages of high temp ones?

2011-06-20 Thread Dr. David Kirkby


On 06/20/11 10:44 PM, Poul-Henning Kamp wrote:

In message<4dffbaf4.4070...@onetel.net>, "Dr. David Kirkby" writes:


1) Higher temperature devices (like 105 deg C) will be more relieable than low
temperature ones like the standard 85 deg C cap. I'm sure at high temperatures,


You should check both temperature and lifetime rating of the capactors.


I have, but I would assume one rated at 6000 hours at 125 deg C would be at 
least as good as one rated at 7000 hours at 105 deg C.



There are many capacitors on the market these days with 5000h or
even 2000h rated life.

That is 7 or 3 months respectively.


Even 1000 hours I've seen. But these are of course at the maximum temperature, 
which few would use them at. Otherwise failure rates would be a lot higher than 
they are.


I've not seen any electrolytics rated more than 10,000 hours (14 months), but 
they last a lot longer if the temperature is lower.


My PC is already more than 14 months old, and has been on 24/7. Hopefully it is 
not dying on me.



And yes, it should be criminal to manufacture and sell those.


Well, I think the MTBF will be a lot more than that in practical use, as few 
would design equipment to run at 85 deg C, which is the lowest maximum 
temperature rating I've seen on any cap.


--
A: Because it messes up the order in which people normally read text.
Q: Why is top-posting such a bad thing?
A: Top-posting.
Q: What is the most annoying thing in e-mail?

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Re: [time-nuts] Bob Pease

2011-06-20 Thread David VanHorn



A good friend of mine is a huge Bob Pease fan and also a devout non-wearer of 
seat belts.  He's already used-up one of his nine lives on an accident where he 
wasn't belted-in.

Hopefully this unfortunate reminder will cause him to change his mind about 
belt use.



Buckle up!  Wear your seat belts!  PLEASE!


At the risk of being OT, I'll add my experience as a first responder.  It was 
VERY easy to tell who was and was not belted when we arrived.  The unbelted 
victims had much worse injuries in general, high speed impact with windshield 
etc, and occasionally were ejected.  The interesting thing about being ejected 
is that you get ejected generally into the path of the vehicle.  Unless you get 
very lucky.


I went through a 55mph collision with a telephone pole in my explorer with only 
a seat belt (no bags on that model/year)  I had only a belt bruise.
The impact was severe enough that my front plate bonded itself to the phone 
pole, and had to be peeled off after we towed the truck.
Black ice sucks.


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Re: [time-nuts] DDS'ery

2011-06-20 Thread John Miles

I'm not familiar with Altera's DDS options, but I will say that Xilinx's DDS
compiler is superb.  It can be configured to provide SFDR up to 150 dB (and
I'd notice it if I were getting much less than that in practice.)

As Javier hinted, the reason you can't use the MSB directly is that its
transition point is not necessarily stationary between cycles of the
frequency you're trying to synthesize.  It will flop around all over the
place.  You need at least a few more bits in most applications -- remember
that in an n-bit word, the magnitude represented by the n-1 LSBs is almost
as much as the bit-n MSB. 

When DDS technology was first becoming popular in the 1980s, Qualcomm was
one of the main vendors, and they required external DACs.  High-speed DACs
were pricy and used a lot of power, so I imagine that a great many people
tried feeding the MSB directly to the filter, as I did.  It could be
feasible at some selected frequencies or at very high clock/output ratios,
but in the general case the output signal is just comically awful.  

You would need a truly massive filter to provide the needed flywheel effect
to make up for those missing bits.  And it would need to be a BPF, not just
an LPF, because not all of the artifacts associated with output quantization
are above the desired carrier frequency.  Sometimes the MSB's toggle period
is going to be shorter than it should be, and sometimes it's going to be
longer.

-- john, KE5FX

> -Original Message-
> From: time-nuts-boun...@febo.com [mailto:time-nuts-
> boun...@febo.com] On Behalf Of Luis Cupido
> Sent: Monday, June 20, 2011 9:46 AM
> To: Discussion of precise time and frequency measurement
> Subject: Re: [time-nuts] DDS'ery
> 
> Gracias, Javier.
> 
> As you read in my previous email I'm basically
> worried about close-in spurs (those that
> will pass through the PLL loop filter).
> 
> will digest that 4th section... tks.
> 
> 
> 
> Since I'm inside an FPGA... I'm eager to get
> spurs down without leaving the digital world...
> Anyone knows any literature covering that ?
> 
> Thanks.
> 
> Luis cupido.
> ct1dmk.
> 
> 
> 
> 
> 
> On 6/20/2011 4:52 PM, Javier Herrero wrote:
> > To reduce the spurii due to quantization distortion. Here is an
> > explanation, in Section 4
> >
> > http://www.analog.com/static/imported-
> files/tutorials/450968421DDS_Tutorial_rev12-2-99.pdf
> >
> >
> > Regards,
> >
> > Javier
> >
> > El 20/06/2011 17:39, Luis Cupido escribió:
> >> Well, if we really need to filter it out
> >> we better filter the MSB and square it
> >> again...
> >>
> >> Why having a DAC for ???
> >>
> >> Right ?
> >>
> >> Luis Cupido.
> >> ct1dmk.
> >>
> >> ___
> >> time-nuts mailing list -- time-nuts@febo.com
> >> To unsubscribe, go to
> >> https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
> >> and follow the instructions there.
> >>
> >>
> >
> 
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Re: [time-nuts] DDS'ery

2011-06-20 Thread John Miles

Not even remotely.  Try it.

-- john, KE5FX

> -Original Message-
> From: time-nuts-boun...@febo.com [mailto:time-nuts-
> boun...@febo.com] On Behalf Of Poul-Henning Kamp
> Sent: Monday, June 20, 2011 8:04 AM
> To: Discussion of precise time and frequency measurement
> Subject: Re: [time-nuts] DDS'ery
> 
> In message <4dff5f2f.7050...@hvsistemas.es>, Javier Herrero writes:
> 
> >No, it is not the same. If you just use the MSB of the accumulator, it =
> >has a lot of period jitter. It can be unnoticeable if the ration between
=
> >reference frequency and output frequency is very high.
> 
> In practice, this jitter is a lot lower than you get from
> squaring the sinewave.
> 
> --
> Poul-Henning Kamp   | UNIX since Zilog Zeus 3.20
> p...@freebsd.org | TCP/IP since RFC 956
> FreeBSD committer   | BSD since 4.3-tahoe
> Never attribute to malice what can adequately be explained by
> incompetence.
> 
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Re: [time-nuts] DDS'ery

You did a good job just finding the title. Socrates search?

I looked at it in the flesh in the Terman library. I suppose the dissertation 
can be purchased. 

I left out hyperbolic functions. I'm not sure if it can compute logs. I had 
need once to compute a log and found an old paper from IBM for a log algorithm. 

We did a DTMF with a coordic. This was all part of a DSP based modem, unique 
for its time, routine to the point of boredom today. The DTMF accuracy was of 
course spot on. Basically once you have the algorithm in the box, you might as 
well use it, even if the quality is overkill. 

I don't have Marvin's Frerking's book on DSP comms because I left that field 
before it was published, but I am told it covers cordic and similar algorithms. 
If you google Marvin Frerking cordic, some of his book is digitized in google 
books. 

--Original Message--
From: Attila Kinali
To: li...@lazygranch.com
To: Discussion of precise time and frequencymeasurement
Subject: Re: [time-nuts] DDS'ery
Sent: Jun 20, 2011 2:35 PM

On Mon, 20 Jun 2011 20:26:46 +
li...@lazygranch.com wrote:

> With the coordic (yeah, sometimes cordic), you need to build it
> a few more bits wider than the DAC. Then it closely matches the lookup 
> table. One of the best references for the coordic I found was a PhD 
> dissertation at Stanford. The author's last name was Ahmed IIRC.

This seems to be "Signal processing algorithms and architectures" by
Hassan Masud Ahmed, 1982.

Unfortunately, my google skills fail me to locate a digital copy
of this dissertation. I'm even unable to locate a paper version
in any of the university libraries.

Does anyone have this as PS or PDF? 

Attila Kinali

-- 
Why does it take years to find the answers to
the questions one should have asked long ago?
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Re: [time-nuts] Replacing electrolytics - any disadvantages of high temp ones?

In message <4dffbaf4.4070...@onetel.net>, "Dr. David Kirkby" writes:

>1) Higher temperature devices (like 105 deg C) will be more relieable than low 
>temperature ones like the standard 85 deg C cap. I'm sure at high 
>temperatures, 

You should check both temperature and lifetime rating of the capactors.

There are many capacitors on the market these days with 5000h or
even 2000h rated life.

That is 7 or 3 months respectively.

And yes, it should be criminal to manufacture and sell those.

-- 
Poul-Henning Kamp   | UNIX since Zilog Zeus 3.20
p...@freebsd.org | TCP/IP since RFC 956
FreeBSD committer   | BSD since 4.3-tahoe
Never attribute to malice what can adequately be explained by incompetence.

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Re: [time-nuts] DDS'ery

2011-06-20 Thread Attila Kinali

On Mon, 20 Jun 2011 20:26:46 +
li...@lazygranch.com wrote:

> With the coordic (yeah, sometimes cordic), you need to build it
> a few more bits wider than the DAC. Then it closely matches the lookup 
> table. One of the best references for the coordic I found was a PhD 
> dissertation at Stanford. The author's last name was Ahmed IIRC.

This seems to be "Signal processing algorithms and architectures" by
Hassan Masud Ahmed, 1982.

Unfortunately, my google skills fail me to locate a digital copy
of this dissertation. I'm even unable to locate a paper version
in any of the university libraries.

Does anyone have this as PS or PDF? 

Attila Kinali

-- 
Why does it take years to find the answers to
the questions one should have asked long ago?

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[time-nuts] Replacing electrolytics - any disadvantages of high temp ones?

2011-06-20 Thread Dr. David Kirkby

I'm sure many of you with old equipment must have considered the fact that 
electrolytic caps have a finite life and considered replacing them. I have a few 
that look suspect (bulging) on a transceiver, and decided to replace them. I'm 
tempted to do all of them in the PSU, as:


* It runs hot
* PSU could destory other bits
* Two of the 15 or so caps on the PSU board show signs of bulging.

For the PSU I used all 105 deg C caps, apart from one which was rated at 125 deg 
C. These are higher spec than the originals.


I also replaced another cap (not in a hot region) with a 105 deg C rated cap.

I've made my capacitor choice based on assuming.

1) Higher temperature devices (like 105 deg C) will be more relieable than low 
temperature ones like the standard 85 deg C cap. I'm sure at high temperatures, 
that must be true, but I've no idea if it would be beneficial if the cap does 
not get very warm.


2) There are no disadvantage of the higher temperature caps, other than cost.

Are these true?

I've ruled out the idea of replacing all electrolytics with new ones. That would 
be a LOT of work, and cost a lot of money.


Dave


--
A: Because it messes up the order in which people normally read text.
Q: Why is top-posting such a bad thing?
A: Top-posting.
Q: What is the most annoying thing in e-mail?

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Re: [time-nuts] Bob Pease

2011-06-20 Thread John Lofgren

Thank you.

A good friend of mine is a huge Bob Pease fan and also a devout non-wearer of 
seat belts.  He's already used-up one of his nine lives on an accident where he 
wasn't belted-in.

Hopefully this unfortunate reminder will cause him to change his mind about 
belt use.

-John

-Original Message-
From: time-nuts-boun...@febo.com [mailto:time-nuts-boun...@febo.com] On Behalf 
Of Chuck Harris
Sent: Monday, June 20, 2011 9:42 AM
To: Discussion of precise time and frequency measurement
Subject: Re: [time-nuts] Bob Pease

One important thing to note is he wasn't wearing his seat belts.

All you old codgers, and immortal young bucks, that think not wearing
seat belts will allow you to fly free and live in an accident need
to take your blinders off and pay attention:  Flying free and living
after an accident only happens in Hollywood.  In the real world,
YOU DIE!

I have lost too many otherwise intelligent friends from this same
idiotic act of insanity.  Most in accidents under 25MPH.  Most within
a couple miles of their homes.  The only one that didn't die had serious
brain damage that left her with a stammer, crutches for life, and took
away her brilliant musical talent.  Several that did die left behind
spouses, and a host of children.  Several were childhood friends, that
were children at the time of their deaths.

Buckle up!  Wear your seat belts!  PLEASE!

-Chuck Harris

Javier Herrero wrote:
> More or less ...
>
> http://www.amazon.com/How-Drive-into-Accidents-Not/dp/0965564819
>
> Very sad that two great analog designers had passed away in the same week.

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Re: [time-nuts] OT: Bob Pease died

2011-06-20 Thread Scott Newell


At 02:51 PM 6/20/2011, Javier Herrero wrote:

I was thinking the same... and also that Pease name was Robert A., 
not Ralph (and its usually signature was RAP)


How's this: Ralph had two stories to tell in that post.  The first 
was that he received an email from Bob Pease the night of the 
accident (he provided the timestamp of RAP's email).  The second 
story was not the email from RAP, but instead was of Ralph's personal 
experience at Philbrick, remembering either RAP or JW.


That makes more sense to me.

--
newell  N5TNL 



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Re: [time-nuts] OT: Bob Pease died

2011-06-20 Thread paul swed

Very sad news to hear.
Though I have never emailed Robert Pease. I sure did read much of what he
had to print over many many years. Enjoyed his humor and approach to
communicating technology realities. A very sad ending.
Regards
Paul
WB8TSL

On Mon, Jun 20, 2011 at 3:51 PM, Javier Herrero wrote:

> El 20/06/2011 21:45, Scott Newell escribió:
>
>
>>  Here is a letter Bob wrote about Jim shortly before his death as posted
>>> by
>>> one of the commentators from the below link:
>>>
>>
>>  Then he calls us to an awards meeting. I was only 19. He gives the new
>>> CEO
>>> the triple humper award.He pulls a three cup bra from a shopping cart.
>>>
>>
>> I saw that too, but the age thing didn't make sense.  If Bob was 70 and
>> Jim was 63, how could Bob be the 19 year old kid working with Jim (at age
>> 12?!) at Philbrick?
>>
>>
>>  I was thinking the same... and also that Pease name was Robert A., not
> Ralph (and its usually signature was RAP)
>
> Regards,
>
> Javier
>
> --
> --**--**
> 
> Javier HerreroEMAIL: jherr...@hvsistemas.com
> Chief Technology Officer
> HV Sistemas S.L.  PHONE: +34 949 336 806
> Los Charcones, 17 FAX:   +34 949 336 792
> 19170 El Casar - Guadalajara - Spain  WEB: http://www.hvsistemas.com
>
>
>
> __**_
> time-nuts mailing list -- time-nuts@febo.com
> To unsubscribe, go to https://www.febo.com/cgi-bin/**
> mailman/listinfo/time-nuts
> and follow the instructions there.
>
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Re: [time-nuts] DDS'ery

With the coordic (yeah, sometimes cordic), you need to build it a few more bits 
wider than the DAC. Then it closely matches the lookup table. One of the best 
references for the coordic I found was a PhD dissertation at Stanford. The 
author's last name was Ahmed IIRC.

It is a very versatile algorithm. You can vary the magnitude of the initial 
vector to AM the signal. PM is done by directly. The coordic can also multiply, 
divide, and compute inverse trig functions. It was used (and might still be) in 
scientific calculators. 

We did a FSK demod with the coordic. Basically unwrap the phase of the signal 
and least mean square fit the phase to a straight line, where the slope of the 
line relates to the frequency. 

-Original Message-
From: Javier Herrero 
Sender: time-nuts-boun...@febo.com
Date: Mon, 20 Jun 2011 21:46:11 
To: 
Reply-To: Discussion of precise time and frequency measurement

Subject: Re: [time-nuts] DDS'ery

Inside an FPGA, CORDIC can be implemented performing quite fast. An 
open-source implementation of CORDIC algorithm and a DDS using look-up 
table or CORDIC can be found in OpenCores, gh_vhdl_lib.

Jim, thank you very much for all the excellent references, and 
particularly the last one about the CORDIC variation. The Altera 
simulations of its NCO showns significant more spurii for CORDIC 
(traditional one) than the other alternatives for same phase accumulator 
and magnitude precisions, and angular same angular resolution, but it is 
by far the most effective in terms of FPGA usage.

Probably I will use the CORDIC approach in the implementation of my 
digital down-converter, but the OpenCores core instead of the Altera IP, 
if it is clean enough (the signal I need to downconvert is 8-bit 
quantized and with poor S/N ratio, so some -40dB spurious will not have 
significance).

Regards,

Javier

El 20/06/2011 21:17, li...@lazygranch.com escribió:
> Just a FYI, you don't have to use sine lookup tables. You can generate sine 
> and cosine on the fly with a coordic. Perhaps not easy at RF speed, but very 
> common in audio DSP.
>
> -Original Message-
> From: Jim Lux
> Sender: time-nuts-boun...@febo.com
> Date: Mon, 20 Jun 2011 12:04:24
> To:
> Reply-To: Discussion of precise time and frequency measurement
>   
> Subject: Re: [time-nuts] DDS'ery
>
> On 6/20/11 9:46 AM, Luis Cupido wrote:
>> Gracias, Javier.
>>
>> As you read in my previous email I'm basically
>> worried about close-in spurs (those that
>> will pass through the PLL loop filter).
>>
>> will digest that 4th section... tks.
>>
>> ...
>>
>> Since I'm inside an FPGA... I'm eager to get
>> spurs down without leaving the digital world...
>> Anyone knows any literature covering that ?
>>
> Tons..
>
> Jouko Vankka wrote  whole books about it.
>
> Direct Digital Synthesizers and transmitters for software radio
> Direct Digital Synthesizers: Theory, Design and Applications
>
>
> You might want to look at various Error Feedback/Error Filtering schemes
> which allow you to use a smaller cosine table and/or smaller DAC and
> have better spur performance.
>
> Vankka, J,  "A direct digital synthesizer with a tunable error feedback
> structure", IEEE Trans on Comm, V45, #4, pp416-420, 1997
> Vankka's EF technique works quite well at suppressing spurs close to the
> carrier (at the expense of pushing them farther out).
>
>
> Reinhardt, V, "Spur Reduction Techniques in Direct Digital
> Synthesizers", Proc Intl Freq Control Symp, 1993
>
> Flanagan, M., Zimmerman, G., "Spur-reduced digital sinusoid synthesis"
> IEEE Trans on Comm, V43, #7, pp2254-2262, 1995
> (this one is about using dither to spread the spurs out)
>
> O'Leary, P., Maloberti, F., "A direct-digital synthesizer with improved
> spectral performance", IEEE Trans on Comm, V39, #7, 1991
>
>
> You might also look at some of the spur cancellation things, such as the
> one implemented in some of AD's DDS parts.. Basically, it's a second NCO
> that generates a coherent signal that is subtracted/added to the primary
> signal to "notch" out the spur.
>
>
>
>
>
>
>
>
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>

-- 

Javier HerreroEMAIL: jherr...@hvsistemas.com
Chief Technology Officer
HV Sistemas S.L.  PHONE: +34 949 336 806
Los Charcones, 17 FAX:   +34 949 336 792
19170 El Casar - Guadalajara - Spain  WEB: http://www.hvsistemas.com

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Re: [time-nuts] OT: Bob Pease died


El 20/06/2011 21:45, Scott Newell escribió:


Here is a letter Bob wrote about Jim shortly before his death as 
posted by

one of the commentators from the below link:


Then he calls us to an awards meeting. I was only 19. He gives the 
new CEO

the triple humper award.He pulls a three cup bra from a shopping cart.


I saw that too, but the age thing didn't make sense.  If Bob was 70 
and Jim was 63, how could Bob be the 19 year old kid working with Jim 
(at age 12?!) at Philbrick?



I was thinking the same... and also that Pease name was Robert A., not 
Ralph (and its usually signature was RAP)


Regards,

Javier

--

Javier HerreroEMAIL: jherr...@hvsistemas.com
Chief Technology Officer
HV Sistemas S.L.  PHONE: +34 949 336 806
Los Charcones, 17 FAX:   +34 949 336 792
19170 El Casar - Guadalajara - Spain  WEB: http://www.hvsistemas.com


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Re: [time-nuts] DDS'ery

Inside an FPGA, CORDIC can be implemented performing quite fast. An 
open-source implementation of CORDIC algorithm and a DDS using look-up 
table or CORDIC can be found in OpenCores, gh_vhdl_lib.


Jim, thank you very much for all the excellent references, and 
particularly the last one about the CORDIC variation. The Altera 
simulations of its NCO showns significant more spurii for CORDIC 
(traditional one) than the other alternatives for same phase accumulator 
and magnitude precisions, and angular same angular resolution, but it is 
by far the most effective in terms of FPGA usage.


Probably I will use the CORDIC approach in the implementation of my 
digital down-converter, but the OpenCores core instead of the Altera IP, 
if it is clean enough (the signal I need to downconvert is 8-bit 
quantized and with poor S/N ratio, so some -40dB spurious will not have 
significance).


Regards,

Javier

El 20/06/2011 21:17, li...@lazygranch.com escribió:

Just a FYI, you don't have to use sine lookup tables. You can generate sine and 
cosine on the fly with a coordic. Perhaps not easy at RF speed, but very common 
in audio DSP.

-Original Message-
From: Jim Lux
Sender: time-nuts-boun...@febo.com
Date: Mon, 20 Jun 2011 12:04:24
To:
Reply-To: Discussion of precise time and frequency measurement

Subject: Re: [time-nuts] DDS'ery

On 6/20/11 9:46 AM, Luis Cupido wrote:

Gracias, Javier.

As you read in my previous email I'm basically
worried about close-in spurs (those that
will pass through the PLL loop filter).

will digest that 4th section... tks.

...

Since I'm inside an FPGA... I'm eager to get
spurs down without leaving the digital world...
Anyone knows any literature covering that ?


Tons..

Jouko Vankka wrote  whole books about it.

Direct Digital Synthesizers and transmitters for software radio
Direct Digital Synthesizers: Theory, Design and Applications


You might want to look at various Error Feedback/Error Filtering schemes
which allow you to use a smaller cosine table and/or smaller DAC and
have better spur performance.

Vankka, J,  "A direct digital synthesizer with a tunable error feedback
structure", IEEE Trans on Comm, V45, #4, pp416-420, 1997
Vankka's EF technique works quite well at suppressing spurs close to the
carrier (at the expense of pushing them farther out).


Reinhardt, V, "Spur Reduction Techniques in Direct Digital
Synthesizers", Proc Intl Freq Control Symp, 1993

Flanagan, M., Zimmerman, G., "Spur-reduced digital sinusoid synthesis"
IEEE Trans on Comm, V43, #7, pp2254-2262, 1995
(this one is about using dither to spread the spurs out)

O'Leary, P., Maloberti, F., "A direct-digital synthesizer with improved
spectral performance", IEEE Trans on Comm, V39, #7, 1991


You might also look at some of the spur cancellation things, such as the
one implemented in some of AD's DDS parts.. Basically, it's a second NCO
that generates a coherent signal that is subtracted/added to the primary
signal to "notch" out the spur.








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--

Javier HerreroEMAIL: jherr...@hvsistemas.com
Chief Technology Officer
HV Sistemas S.L.  PHONE: +34 949 336 806
Los Charcones, 17 FAX:   +34 949 336 792
19170 El Casar - Guadalajara - Spain  WEB: http://www.hvsistemas.com


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Re: [time-nuts] OT: Bob Pease died

2011-06-20 Thread Scott Newell




Here is a letter Bob wrote about Jim shortly before his death as posted by
one of the commentators from the below link:



Then he calls us to an awards meeting. I was only 19. He gives the new CEO
the triple humper award.He pulls a three cup bra from a shopping cart.


I saw that too, but the age thing didn't make sense.  If Bob was 70 
and Jim was 63, how could Bob be the 19 year old kid working with Jim 
(at age 12?!) at Philbrick?



What a sad week in the analog world.


--
newell  N5TNL


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Re: [time-nuts] DDS'ery

2011-06-20 Thread Bruce Griffiths

Jim Lux wrote:

On 6/20/11 9:46 AM, Luis Cupido wrote:

Gracias, Javier.

As you read in my previous email I'm basically
worried about close-in spurs (those that
will pass through the PLL loop filter).

will digest that 4th section... tks.

...

Since I'm inside an FPGA... I'm eager to get
spurs down without leaving the digital world...
Anyone knows any literature covering that ?

Tons..

Jouko Vankka wrote whole books about it.

Direct Digital Synthesizers and transmitters for software radio
Direct Digital Synthesizers: Theory, Design and Applications

You might want to look at various Error Feedback/Error Filtering
schemes which allow you to use a smaller cosine table and/or smaller
DAC and have better spur performance.

Vankka, J, "A direct digital synthesizer with a tunable error
feedback structure", IEEE Trans on Comm, V45, #4, pp416-420, 1997
Vankka's EF technique works quite well at suppressing spurs close to
the carrier (at the expense of pushing them farther out).

Reinhardt, V, "Spur Reduction Techniques in Direct Digital
Synthesizers", Proc Intl Freq Control Symp, 1993

Flanagan, M., Zimmerman, G., "Spur-reduced digital sinusoid synthesis"
IEEE Trans on Comm, V43, #7, pp2254-2262, 1995

(this one is about using dither to spread the spurs out)

O'Leary, P., Maloberti, F., "A direct-digital synthesizer with
improved spectral performance", IEEE Trans on Comm, V39, #7, 1991

You might also look at some of the spur cancellation things, such as
the one implemented in some of AD's DDS parts.. Basically, it's a
second NCO that generates a coherent signal that is subtracted/added
to the primary signal to "notch" out the spur.

Re: [time-nuts] DDS'ery

Just a FYI, you don't have to use sine lookup tables. You can generate sine and 
cosine on the fly with a coordic. Perhaps not easy at RF speed, but very common 
in audio DSP. 

-Original Message-
From: Jim Lux 
Sender: time-nuts-boun...@febo.com
Date: Mon, 20 Jun 2011 12:04:24 
To: 
Reply-To: Discussion of precise time and frequency measurement

Subject: Re: [time-nuts] DDS'ery

On 6/20/11 9:46 AM, Luis Cupido wrote:
> Gracias, Javier.
>
> As you read in my previous email I'm basically
> worried about close-in spurs (those that
> will pass through the PLL loop filter).
>
> will digest that 4th section... tks.
>
> ...
>
> Since I'm inside an FPGA... I'm eager to get
> spurs down without leaving the digital world...
> Anyone knows any literature covering that ?
>
Tons..

Jouko Vankka wrote  whole books about it.

Direct Digital Synthesizers and transmitters for software radio
Direct Digital Synthesizers: Theory, Design and Applications

You might want to look at various Error Feedback/Error Filtering schemes 
which allow you to use a smaller cosine table and/or smaller DAC and 
have better spur performance.

Vankka, J,  "A direct digital synthesizer with a tunable error feedback 
structure", IEEE Trans on Comm, V45, #4, pp416-420, 1997
Vankka's EF technique works quite well at suppressing spurs close to the 
carrier (at the expense of pushing them farther out).

Reinhardt, V, "Spur Reduction Techniques in Direct Digital 
Synthesizers", Proc Intl Freq Control Symp, 1993

Flanagan, M., Zimmerman, G., "Spur-reduced digital sinusoid synthesis" 
IEEE Trans on Comm, V43, #7, pp2254-2262, 1995
(this one is about using dither to spread the spurs out)

O'Leary, P., Maloberti, F., "A direct-digital synthesizer with improved 
spectral performance", IEEE Trans on Comm, V39, #7, 1991

You might also look at some of the spur cancellation things, such as the 
one implemented in some of AD's DDS parts.. Basically, it's a second NCO 
that generates a coherent signal that is subtracted/added to the primary 
signal to "notch" out the spur.

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Re: [time-nuts] OT: Bob Pease died

2011-06-20 Thread SAIDJACK

I think Bob died out of grief for Jim Williams. Jim's death came as a shock 
 alredy. now Bob. I don't think Bob could stand it.
 
I had the great fortune to meet Jim about a year ago and to work with him  
since then, and he was such a joy to be around. A mentor and teacher par  
excellence. Both of them had such impact on me and all we do here over the  
last two decades.
 
Here is a letter Bob wrote about Jim shortly before his death as posted by  
one of the commentators from the below link:
 
From: Robert Pease
Date: 06/18/11 05:05:08
 
I worked for him as a kid at Philbrick on band gap reference  development.
 
The impact this guy had on me as a kid are deeply ingrained.
 
He was bigger than life,untamed, invincible, an analog hero. An icon. A  
showman. A Czar.
 
They came from around the world to see him. His office, his breadboards,It  
was non stop fun and excitement.
 
Then he calls us to an awards meeting. I was only 19. He gives the new CEO  
the triple humper award.He pulls a three cup bra from a shopping cart.
 
I was in awe.Incredible entertainment.Justice served. Under the first cup a 
 V/$ converter. Under the third cup a F/$ converter.
 
I thought this was the most incredible event I had ever witnessed.Until he  
unveils the third cup contents. He reaches into his pants and pulls out his 
 letter of resigation.
 
He quit,efffective immediately to go to National. I was in shock!  
Betrayed.When he left there was a vacuum.I feel it again. 
 
I feel so fortunate I was able to experience him, and so many other  
talented and interesting people in the industry.
 
He will be missed by all.
 
Ralph
 
 
In a message dated 6/20/2011 09:45:11 Pacific Daylight Time,  
p...@petelancashire.com writes:

http://www.eetimes.com/electronics-news/4217077/Analog-expert-Bob-Pease-dies
-in-tragic-accident

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Re: [time-nuts] DDS'ery


On 6/20/11 9:46 AM, Luis Cupido wrote:

Gracias, Javier.

As you read in my previous email I'm basically
worried about close-in spurs (those that
will pass through the PLL loop filter).

will digest that 4th section... tks.

...

Since I'm inside an FPGA... I'm eager to get
spurs down without leaving the digital world...
Anyone knows any literature covering that ?


Tons..

Jouko Vankka wrote  whole books about it.

Direct Digital Synthesizers and transmitters for software radio
Direct Digital Synthesizers: Theory, Design and Applications


You might want to look at various Error Feedback/Error Filtering schemes 
which allow you to use a smaller cosine table and/or smaller DAC and 
have better spur performance.


Vankka, J,  "A direct digital synthesizer with a tunable error feedback 
structure", IEEE Trans on Comm, V45, #4, pp416-420, 1997
Vankka's EF technique works quite well at suppressing spurs close to the 
carrier (at the expense of pushing them farther out).



Reinhardt, V, "Spur Reduction Techniques in Direct Digital 
Synthesizers", Proc Intl Freq Control Symp, 1993


Flanagan, M., Zimmerman, G., "Spur-reduced digital sinusoid synthesis" 
IEEE Trans on Comm, V43, #7, pp2254-2262, 1995

(this one is about using dither to spread the spurs out)

O'Leary, P., Maloberti, F., "A direct-digital synthesizer with improved 
spectral performance", IEEE Trans on Comm, V39, #7, 1991



You might also look at some of the spur cancellation things, such as the 
one implemented in some of AD's DDS parts.. Basically, it's a second NCO 
that generates a coherent signal that is subtracted/added to the primary 
signal to "notch" out the spur.









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Re: [time-nuts] DDS'ery


On 6/20/11 8:39 AM, Luis Cupido wrote:

Well, if we really need to filter it out
we better filter the MSB and square it
again...

Why having a DAC for ???



Spur content heading into the filter.. the sine table and DAC greatly 
reduces the harmonic content of the output, which makes filtering easier.


You could think of the cos table and DAC as a specialized filter

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Re: [time-nuts] DDS'ery


On 6/20/11 7:46 AM, Luis Cupido wrote:

Folks, a quick one...

A DDS, that is an accumulator with a DAC followed by a low pass filter
and comparator (zero crossing) to produce a square wave to drive a PLL
or a MIXER or else (at logic levels).

Isn't it the very same thing as just using the most significant bit of
the accumulator.


The zero crossing using just the MSB will have jitter, compared to 
making a sign wave and then letting the zero crossing occur "between" 
samples.


Depending on your application, MSB only might work well enough.

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Re: [time-nuts] DDS'ery

De nada, Luis :)

I've been playing around a bit with Altera NCO IP (in fact, I need to
implement a digital NCO quite shortly for a project, although in this
case close-in spurs are more tolerable than in other applications). A
lot of information in the application note for ADI is also applicable to
the purely digital side. I've not yet played on the practical side -
this will be after summer :)

Quartus software (for Altera FPGAs) enables to customize several
parameters of their NCO IP, and plots an expected spectrum of the output
signal. It is fun to explore the effect of different sin/cos algorithms
(ROM-based, CORDIC, multiplier-based), phase accumulator and magnitude
precision, and angular resolution. Although the IP is not free (but can
be used for evaluation), Quartus Web Edition (that it is free) enables
to play a bit around - and at least it is illustrative :)

I forgot that Section 7 shows what occurs taking only the MSB (it shows
it using a comparator after the DAC, without filtering and also after
filtering).

Best regards,

Javier

El 20/06/2011 18:46, Luis Cupido escribió:

Gracias, Javier.

As you read in my previous email I'm basically
worried about close-in spurs (those that
will pass through the PLL loop filter).

will digest that 4th section... tks.

...

Since I'm inside an FPGA... I'm eager to get
spurs down without leaving the digital world...
Anyone knows any literature covering that ?

Thanks.

Luis cupido.
ct1dmk.

On 6/20/2011 4:52 PM, Javier Herrero wrote:

To reduce the spurii due to quantization distortion. Here is an
explanation, in Section 4

http://www.analog.com/static/imported-files/tutorials/450968421DDS_Tutorial_rev12-2-99.pdf

Regards,

Javier

El 20/06/2011 17:39, Luis Cupido escribió:

Well, if we really need to filter it out
we better filter the MSB and square it
again...

Why having a DAC for ???

Right ?

Luis Cupido.
ct1dmk.

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Re: [time-nuts] DDS'ery

2011-06-20 Thread Attila Kinali

On Mon, 20 Jun 2011 16:39:16 +0100
Luis Cupido  wrote:

> Well, if we really need to filter it out
> we better filter the MSB and square it
> again...
> 
> Why having a DAC for ???
> 
> Right ?

If you filter a square wave, you have a lot more harmonics than
if you filter a signal that is already nearly sine. Hence the
DAC stage gives you a higher signal purity. And as filters are
never optimal, you'd rather go with a more pure signal :-)

Attila Kinali

-- 
Why does it take years to find the answers to
the questions one should have asked long ago?

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Re: [time-nuts] DDS'ery


Gracias, Javier.

As you read in my previous email I'm basically
worried about close-in spurs (those that
will pass through the PLL loop filter).

will digest that 4th section... tks.

...

Since I'm inside an FPGA... I'm eager to get
spurs down without leaving the digital world...
Anyone knows any literature covering that ?

Thanks.

Luis cupido.
ct1dmk.





On 6/20/2011 4:52 PM, Javier Herrero wrote:

To reduce the spurii due to quantization distortion. Here is an
explanation, in Section 4

http://www.analog.com/static/imported-files/tutorials/450968421DDS_Tutorial_rev12-2-99.pdf


Regards,

Javier

El 20/06/2011 17:39, Luis Cupido escribió:

Well, if we really need to filter it out
we better filter the MSB and square it
again...

Why having a DAC for ???

Right ?

Luis Cupido.
ct1dmk.

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[time-nuts] OT: Bob Pease died

2011-06-20 Thread Pete Lancashire

http://www.eetimes.com/electronics-news/4217077/Analog-expert-Bob-Pease-dies-in-tragic-accident

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Re: [time-nuts] Bob Pease

2011-06-20 Thread Brooke Clarke


Hi:

Google maps shows that address "14831 pierce road Saratoga" as "Mountain 
Winery" and a very twisty road.


Have Fun,

Brooke Clarke
http://www.PRC68.com


David C. Partridge wrote:

> From Dave Jones:

"Word has just filtered through Twitter that Bob Pease was killed in a car 
accident.
This one by the sounds of it:
http://www.mercurynews.com/bay-area-news/ci_18310586?source=rss&nclick_check=1

In a sad twist, it is reported that he was returning from Jim Willam's memorial.

A sad week indeed.

RIP Bob Pease.

Dave"

Regards,
David Partridge


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Re: [time-nuts] DDS'ery

2011-06-20 Thread Mike Feher

Actually it is (n*Fs +/-Fo), however, they do go down in amplitude as a
SinX/X. Theoretically, they would also be there after the Sin ROM, and the
only one really of concern in the real world is the Fs - Fo, hence the LPF.
When I used to design DDSs in the early 70's, we typically tried to use an
Fs that was about 2.5 times the max desired Fo, to make filtering easier. We
also used discrete parts then :). Now, with the higher speed devices
available a real high Fs can be selected to meet a desired Fmax. Of course
the limit is always being pushed, and, the devices are never fast enough.
Regards - Mike 

Mike B. Feher, EOZ Inc.
89 Arnold Blvd.
Howell, NJ, 07731
732-886-5960 office
908-902-3831 cell

-Original Message-
From: time-nuts-boun...@febo.com [mailto:time-nuts-boun...@febo.com] On
Behalf Of Graham / KE9H
Sent: Monday, June 20, 2011 11:12 AM
To: time-nuts@febo.com
Subject: Re: [time-nuts] DDS'ery

Luis:

No, not the same.

The most significant bit out of the accumulator has the alias information
on it (Fs +/- Fo), so it still needs to be run through the low pass filter
to clean off the alias signals.  The alias signals manifest themselves 
as jitter,
so no amount of just clipping will remove them.

If your application is not sensitive to the alias frequencies, then OK to
drive out of the DDS directly.

If you are driving something like a mixer in a wide band radio, then you
still need to use the low pass filters.  They don't call them anti-alias 
filters
for no reason.

--- Graham / KE9H

==

On 6/20/2011 9:46 AM, Luis Cupido wrote:
> Folks, a quick one...
>
> A DDS, that is an accumulator with a DAC followed by a low pass filter 
> and comparator (zero crossing) to produce a square wave to drive a PLL 
> or a MIXER or else (at logic levels).
>
> Isn't it the very same thing as just using the most significant bit of 
> the accumulator.
>
> Or am I missing something here ?
>
> Comments appreciated.
> thanks.
>
> Luis Cupido.
> ct1dmk.
>
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Re: [time-nuts] DDS'ery

To reduce the spurii due to quantization distortion. Here is an 
explanation, in Section 4


http://www.analog.com/static/imported-files/tutorials/450968421DDS_Tutorial_rev12-2-99.pdf

Regards,

Javier

El 20/06/2011 17:39, Luis Cupido escribió:

Well, if we really need to filter it out
we better filter the MSB and square it
again...

Why having a DAC for ???

Right ?

Luis Cupido.
ct1dmk.

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--

Javier HerreroEMAIL: jherr...@hvsistemas.com
Chief Technology Officer
HV Sistemas S.L.  PHONE: +34 949 336 806
Los Charcones, 17 FAX:   +34 949 336 792
19170 El Casar - Guadalajara - Spain  WEB: http://www.hvsistemas.com


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Re: [time-nuts] DDS'ery


Well, if we really need to filter it out
we better filter the MSB and square it
again...

Why having a DAC for ???

Right ?

Luis Cupido.
ct1dmk.

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Re: [time-nuts] DDS'ery


Thanks for the comments...

Yes the key is obviously the low pass filtering
one has the other doesn't.

I had mainly in my mind a PLL following that ACC.
so actually driving a phase comparator of
a PLL (narrow enough loop bw) that problem would
not exist. Ok great.

Good point on the mixer we got to have nothing in
the alias region for it to be ok. (not my application
at the moment but will keep that in mind)

Thanks guys...

Luis Cupido.
ct1dmk.




On 6/20/2011 4:11 PM, Graham / KE9H wrote:

Luis:

No, not the same.

The most significant bit out of the accumulator has the alias information
on it (Fs +/- Fo), so it still needs to be run through the low pass filter
to clean off the alias signals. The alias signals manifest themselves as
jitter,
so no amount of just clipping will remove them.

If your application is not sensitive to the alias frequencies, then OK to
drive out of the DDS directly.

If you are driving something like a mixer in a wide band radio, then you
still need to use the low pass filters. They don't call them anti-alias
filters
for no reason.

--- Graham / KE9H

==

On 6/20/2011 9:46 AM, Luis Cupido wrote:

Folks, a quick one...

A DDS, that is an accumulator with a DAC followed by a low pass filter
and comparator (zero crossing) to produce a square wave to drive a PLL
or a MIXER or else (at logic levels).

Isn't it the very same thing as just using the most significant bit of
the accumulator.

Or am I missing something here ?

Comments appreciated.
thanks.

Luis Cupido.
ct1dmk.

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Re: [time-nuts] Bob Pease


After 42 years, I suspect that the rust-proof warranty is also rusty ;)

I think that in Europe (at least in Spain) seat-belts became mandatory a 
bit after that in US, around 1970, so perhaps european MY1969 Beetle's 
did not have them.


Regards,

Javier

El 20/06/2011 17:17, J. Forster escribió:

Yes. My convertible Super-Beetle did for sure. Rustproofing- not so much. :)

-John

===


In message<4dff5c52.4070...@erols.com>, Chuck Harris writes:


One important thing to note is he wasn't wearing his seat belts.


Does a 1969 VW Beetle even have them ?


--
Poul-Henning Kamp   | UNIX since Zilog Zeus 3.20
p...@freebsd.org | TCP/IP since RFC 956
FreeBSD committer   | BSD since 4.3-tahoe
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incompetence.

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Javier HerreroEMAIL: jherr...@hvsistemas.com
Chief Technology Officer
HV Sistemas S.L.  PHONE: +34 949 336 806
Los Charcones, 17 FAX:   +34 949 336 792
19170 El Casar - Guadalajara - Spain  WEB: http://www.hvsistemas.com


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Re: [time-nuts] Bob Pease

2011-06-20 Thread J. Forster

Yes. My convertible Super-Beetle did for sure. Rustproofing- not so much. :)

-John

===

> In message <4dff5c52.4070...@erols.com>, Chuck Harris writes:
>
>>One important thing to note is he wasn't wearing his seat belts.
>
> Does a 1969 VW Beetle even have them ?
>
>
> --
> Poul-Henning Kamp   | UNIX since Zilog Zeus 3.20
> p...@freebsd.org | TCP/IP since RFC 956
> FreeBSD committer   | BSD since 4.3-tahoe
> Never attribute to malice what can adequately be explained by
> incompetence.
>
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Re: [time-nuts] DDS'ery

The jitter when taking only the MSB is same as the DDS clock period. I 
don't think that squaring the filtered sinewave you will get that jitter 
(of course, if you square the sinewave with no filtering, you will get 
the same jitter that taking only the MSB). In fact, it is the reason 
that AD9850/AD9851 include a comparator instead of just an MSB output.


Regards,

Javier

El 20/06/2011 17:04, Poul-Henning Kamp escribió:

In message<4dff5f2f.7050...@hvsistemas.es>, Javier Herrero writes:


No, it is not the same. If you just use the MSB of the accumulator, it =
has a lot of period jitter. It can be unnoticeable if the ration between =
reference frequency and output frequency is very high.


In practice, this jitter is a lot lower than you get from
squaring the sinewave.



--

Javier HerreroEMAIL: jherr...@hvsistemas.com
Chief Technology Officer
HV Sistemas S.L.  PHONE: +34 949 336 806
Los Charcones, 17 FAX:   +34 949 336 792
19170 El Casar - Guadalajara - Spain  WEB: http://www.hvsistemas.com


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Re: [time-nuts] Bob Pease

2011-06-20 Thread Chuck Harris


All US cars since 1963 have seat belts.

Poul-Henning Kamp wrote:

In message<4dff5c52.4070...@erols.com>, Chuck Harris writes:


One important thing to note is he wasn't wearing his seat belts.


Does a 1969 VW Beetle even have them ?




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Re: [time-nuts] Bob Pease

2011-06-20 Thread Bruce Lane

Indeed it does. At least, the model I drove did.

*** REPLY SEPARATOR  ***

On 20-Jun-11 at 15:05 Poul-Henning Kamp wrote:

>In message <4dff5c52.4070...@erols.com>, Chuck Harris writes:
>
>>One important thing to note is he wasn't wearing his seat belts.
>
>Does a 1969 VW Beetle even have them ?
>
>
>-- 
>Poul-Henning Kamp   | UNIX since Zilog Zeus 3.20
>p...@freebsd.org | TCP/IP since RFC 956
>FreeBSD committer   | BSD since 4.3-tahoe
>Never attribute to malice what can adequately be explained by
incompetence.
>
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>
>__ Information from ESET Smart Security, version of virus
>signature database 6223 (20110620) __
>
>The message was checked by ESET Smart Security.
>
>http://www.eset.com

Bruce Lane, Owner & Head Hardware Heavy,
Blue Feather Technologies (http://www.bluefeathertech.com)
Assoc. member, AZA & AAZK for many moons.
"Salvadore Dali's computer has surreal ports..."

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Re: [time-nuts] DDS'ery

2011-06-20 Thread Graham / KE9H


Luis:

No, not the same.

The most significant bit out of the accumulator has the alias information
on it (Fs +/- Fo), so it still needs to be run through the low pass filter
to clean off the alias signals.  The alias signals manifest themselves 
as jitter,

so no amount of just clipping will remove them.

If your application is not sensitive to the alias frequencies, then OK to
drive out of the DDS directly.

If you are driving something like a mixer in a wide band radio, then you
still need to use the low pass filters.  They don't call them anti-alias 
filters

for no reason.

--- Graham / KE9H

==

On 6/20/2011 9:46 AM, Luis Cupido wrote:

Folks, a quick one...

A DDS, that is an accumulator with a DAC followed by a low pass filter 
and comparator (zero crossing) to produce a square wave to drive a PLL 
or a MIXER or else (at logic levels).


Isn't it the very same thing as just using the most significant bit of 
the accumulator.


Or am I missing something here ?

Comments appreciated.
thanks.

Luis Cupido.
ct1dmk.

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Re: [time-nuts] Bob Pease

2011-06-20 Thread Peter G. Viscarola

>Does a 1969 VW Beetle even have them ?

A casual check via Google indicates that, yes indeed, the 1969 Beetle came with 
seat belts.

Peter
K1PGV


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Re: [time-nuts] Bob Pease

In message <4dff5c52.4070...@erols.com>, Chuck Harris writes:

>One important thing to note is he wasn't wearing his seat belts.

Does a 1969 VW Beetle even have them ?


-- 
Poul-Henning Kamp   | UNIX since Zilog Zeus 3.20
p...@freebsd.org | TCP/IP since RFC 956
FreeBSD committer   | BSD since 4.3-tahoe
Never attribute to malice what can adequately be explained by incompetence.

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Re: [time-nuts] DDS'ery

In message <4dff5f2f.7050...@hvsistemas.es>, Javier Herrero writes:

>No, it is not the same. If you just use the MSB of the accumulator, it =
>has a lot of period jitter. It can be unnoticeable if the ration between =
>reference frequency and output frequency is very high.

In practice, this jitter is a lot lower than you get from
squaring the sinewave.

-- 
Poul-Henning Kamp   | UNIX since Zilog Zeus 3.20
p...@freebsd.org | TCP/IP since RFC 956
FreeBSD committer   | BSD since 4.3-tahoe
Never attribute to malice what can adequately be explained by incompetence.

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Re: [time-nuts] DDS'ery


Hello,

No, it is not the same. If you just use the MSB of the accumulator, it 
has a lot of period jitter. It can be unnoticeable if the ration between 
reference frequency and output frequency is very high.


Think on the process inversely: draw a sine wave, and sample it at for 
example 4.3 samples per period, and look when the sample becames 
positive and when it is negative (that would be the same to take only 
the MSB).


Best regards

Javier

El 20/06/2011 16:46, Luis Cupido escribió:

Folks, a quick one...

A DDS, that is an accumulator with a DAC followed by a low pass filter 
and comparator (zero crossing) to produce a square wave to drive a PLL 
or a MIXER or else (at logic levels).


Isn't it the very same thing as just using the most significant bit of 
the accumulator.


Or am I missing something here ?

Comments appreciated.
thanks.

Luis Cupido.
ct1dmk.

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--

Javier HerreroEMAIL: jherr...@hvsistemas.com
Chief Technology Officer
HV Sistemas S.L.  PHONE: +34 949 336 806
Los Charcones, 17 FAX:   +34 949 336 792
19170 El Casar - Guadalajara - Spain  WEB: http://www.hvsistemas.com


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Re: [time-nuts] DDS'ery


Forgot the sine table...
I meant obviously <...an accumulator 'sine table' and DAC...>
lc.


On 6/20/2011 3:46 PM, Luis Cupido wrote:

Folks, a quick one...

A DDS, that is an accumulator with a DAC followed by a low pass filter
and comparator (zero crossing) to produce a square wave to drive a PLL
or a MIXER or else (at logic levels).

Isn't it the very same thing as just using the most significant bit of
the accumulator.

Or am I missing something here ?

Comments appreciated.
thanks.

Luis Cupido.
ct1dmk.

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Re: [time-nuts] DDS'ery

In message <4dff5d29.2070...@mail.ua.pt>, Luis Cupido writes:

>Isn't it the very same thing as just using the most significant bit of 
>the accumulator.

Indeed it is, and that's how programmable digital clocks often work.

-- 
Poul-Henning Kamp   | UNIX since Zilog Zeus 3.20
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[time-nuts] DDS'ery


Folks, a quick one...

A DDS, that is an accumulator with a DAC followed by a low pass filter 
and comparator (zero crossing) to produce a square wave to drive a PLL 
or a MIXER or else (at logic levels).


Isn't it the very same thing as just using the most significant bit of 
the accumulator.


Or am I missing something here ?

Comments appreciated.
thanks.

Luis Cupido.
ct1dmk.

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Re: [time-nuts] Bob Pease

2011-06-20 Thread Chuck Harris


One important thing to note is he wasn't wearing his seat belts.

All you old codgers, and immortal young bucks, that think not wearing
seat belts will allow you to fly free and live in an accident need
to take your blinders off and pay attention:  Flying free and living
after an accident only happens in Hollywood.  In the real world,
YOU DIE!

I have lost too many otherwise intelligent friends from this same
idiotic act of insanity.  Most in accidents under 25MPH.  Most within
a couple miles of their homes.  The only one that didn't die had serious
brain damage that left her with a stammer, crutches for life, and took
away her brilliant musical talent.  Several that did die left behind
spouses, and a host of children.  Several were childhood friends, that
were children at the time of their deaths.

Buckle up!  Wear your seat belts!  PLEASE!

-Chuck Harris

Javier Herrero wrote:

More or less ...

http://www.amazon.com/How-Drive-into-Accidents-Not/dp/0965564819

Very sad that two great analog designers had passed away in the same week.


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Re: [time-nuts] Bob Pease


More or less ...

http://www.amazon.com/How-Drive-into-Accidents-Not/dp/0965564819

Very sad that two great analog designers had passed away in the same week.

Best regards,

Javier

El 20/06/2011 15:52, lstosk...@cox.net escribió:

One of his books was something like:  Driving into an accident.!!!

N0UU

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--

Javier HerreroEMAIL: jherr...@hvsistemas.com
Chief Technology Officer
HV Sistemas S.L.  PHONE: +34 949 336 806
Los Charcones, 17 FAX:   +34 949 336 792
19170 El Casar - Guadalajara - Spain  WEB: http://www.hvsistemas.com


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Re: [time-nuts] Bob Pease

2011-06-20 Thread lstoskopf

One of his books was something like:  Driving into an accident.!!!

N0UU

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[time-nuts] PEMCO 50a Info

2011-06-20 Thread Chuck Forsberg WA7KGX N2469R


Anyone have info or schematic for this counter?
it has 5 seven segment filament display tubes
plus OVEN and OVER lights.

The logic board uses an oven holding a hc6 type 10 mHz
crystal.  One of the divider chips is a 74s112 so I presume
the counter goes to 50 mHz or so.

I got it for free from a junkbox.  It appears to count
but the time base isn't working - the count just keeps
increasing every time the display updates.

--
Chuck Forsberg WA7KGX N2469R c...@omen.com   www.omen.com
Developer of Industrial ZMODEM(Tm) for Embedded Applications
  Omen Technology Inc  "The High Reliability Software"
10255 NW Old Cornelius Pass Portland OR 97231   503-614-0430


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Re: [time-nuts] Bob Pease