Re: [U-Boot] [PATCH v2] OMAP5: USB: hsusbtll_clkctrl has to be in hw_auto for USB to work
Hi Lubomir,
On Monday 08 April 2013 03:05 PM, Lubomir Popov wrote:
Hello Sricharan,
On 08/04/13 09:05, Sricharan R wrote:
On Thursday 04 April 2013 09:21 PM, Lubomir Popov wrote:
V2 fixes line wrap issue of the patch itself.
This fix is needed (but not sufficient) for USB EHCI operation.
Signed-off-by: Lubomir Popov lpo...@mm-sol.com
---
arch/arm/cpu/armv7/omap5/hw_data.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/cpu/armv7/omap5/hw_data.c
b/arch/arm/cpu/armv7/omap5/hw_data.c
index ced274e..e5e41fd 100644
--- a/arch/arm/cpu/armv7/omap5/hw_data.c
+++ b/arch/arm/cpu/armv7/omap5/hw_data.c
@@ -403,6 +403,7 @@ void enable_basic_uboot_clocks(void)
};
u32 const clk_modules_hw_auto_essential[] = {
+ (*prcm)-cm_l3init_hsusbtll_clkctrl,
0
};
@@ -411,7 +412,6 @@ void enable_basic_uboot_clocks(void)
(*prcm)-cm_l4per_i2c2_clkctrl,
(*prcm)-cm_l4per_i2c3_clkctrl,
(*prcm)-cm_l4per_i2c4_clkctrl,
- (*prcm)-cm_l3init_hsusbtll_clkctrl,
(*prcm)-cm_l3init_hsusbhost_clkctrl,
(*prcm)-cm_l3init_fsusb_clkctrl,
0
No, how is this helping you. Are you using EHCI at SPL ?
Those usb clocks are anyways getting enabled at u-boot.
Regards,
Sricharan
Hmm, i get it. The actual problem was usb_tll clocks does not support
'explicit en essential'. It supports only 'hw_auto' control.
That's why moving it to the hw_auto array makes it to work.
Acked-by: R Sricharan r.sricha...@ti.com
Regards,
Sricharan
Why SPL? This is in the enable_basic_uboot_clocks() function. The problem
seems to be
_when_ are they enabled.
This fix (moving cm_l3init_hsusbtll_clkctrl from the
clk_modules_explicit_en_essential[]
array to clk_modules_hw_auto_essential[]) is something confirmed empirically
(apart from
the fact that it is so for the OMAP4, which gave me the hint why USB was not
working).
The following dump is for the SOM5 EVB
(http://patchwork.ozlabs.org/patch/232739/) with all
needed patches applied (this one, as well as
http://patchwork.ozlabs.org/patch/232742/).
Functional clocks are enabled/disabled in the board file. The boot script
just sets a MAC
address for the USB Ethernet controller to env.
U-Boot SPL 2013.04-rc1-00400-g7f594d9 (Apr 02 2013 - 14:55:24)
OMAP5430 ES1.0
OMAP SD/MMC: 0
reading u-boot.img
reading u-boot.img
U-Boot 2013.04-rc1-00400-g7f594d9 (Apr 02 2013 - 14:55:24)
CPU : OMAP5430 ES1.0
Board: MM Solutions SOM5 EVB
I2C: ready
DRAM: 2 GiB
MMC: OMAP SD/MMC: 0, OMAP SD/MMC: 1
Using default environment
In:serial
Out: serial
Err: serial
Net: No ethernet found.
Hit any key to stop autoboot: 0
mmc0 is current device
reading boot.scr
109 bytes read in 3 ms (35.2 KiB/s)
Running bootscript from mmc0 ...
## Executing script at 8200
SOM5_EVB #
SOM5_EVB # usb start
(Re)start USB...
USB0: USB EHCI 1.00
scanning bus 0 for devices... 6 USB Device(s) found
scanning usb for storage devices... 3 Storage Device(s) found
scanning usb for ethernet devices... 1 Ethernet Device(s) found
SOM5_EVB # usb tree
USB device tree:
1 Hub (480 Mb/s, 0mA)
| u-boot EHCI Host Controller
|
+-2 Mass Storage (480 Mb/s, 200mA)
|FSC MEMORYBIRD USB2 C157040817120315AA
|
+-3 Hub (480 Mb/s, 2mA)
| |
| +-4 Mass Storage (480 Mb/s, 96mA)
| |Generic Ultra Fast Media Reader 00264001
| |
| +-5 Mass Storage (480 Mb/s, 100mA)
| Generic Mass Storage C88BB2CE
|
+-6 Vendor specific (480 Mb/s, 500mA)
SOM5_EVB #
Now, for the experiment, I just moved cm_l3init_hsusbtll_clkctrl back to
clk_modules_explicit_en_essential[] and built again. As you can see, the
result is a Data Abort exception:
U-Boot SPL 2013.04-rc2-00020-g6b29a25-dirty (Apr 08 2013 - 11:14:14)
OMAP5430 ES1.0
OMAP SD/MMC: 0
reading u-boot.img
reading u-boot.img
U-Boot 2013.04-rc2-00020-g6b29a25-dirty (Apr 08 2013 - 11:14:14)
CPU : OMAP5430 ES1.0
Board: MM Solutions SOM5 EVB
I2C: ready
DRAM: 2 GiB
MMC: OMAP SD/MMC: 0, OMAP SD/MMC: 1
Using default environment
In:serial
Out: serial
Err: serial
Net: No ethernet found.
Hit any key to stop autoboot: 0
mmc0 is current device
reading boot.scr
109 bytes read in 3 ms (35.2 KiB/s)
Running bootscript from mmc0 ...
## Executing script at 8200
SOM5_EVB #
SOM5_EVB # usb start
(Re)start USB...
USB0: data abort
MAYBE you should read doc/README.arm-unaligned-accesses
pc : [fef8f32c] lr : [fef738b4]
sp : feef2d50 ip : 0034 fp : feef2dc4
r10: r9 : fefbc0c4 r8 : feef2f40
r7 : 0680 r6 : fefbc0c0 r5 : 27da r4 : 4a062000
r3 : r2 : 27da r1 : 27da r0 : 27da
Flags: nZcv IRQs off FIQs off Mode SVC_32
Resetting CPU ...
Re: [U-Boot] [PATCH v2] OMAP5: I2C: Enable i2c5 clocks
Hi Lubomir, On Monday 08 April 2013 03:05 PM, Lubomir Popov wrote: Hi Sricharan, On 08/04/13 09:09, Sricharan R wrote: On Thursday 04 April 2013 09:22 PM, Lubomir Popov wrote: V2 fixes line wrap issue of the patch itself. I2C5 is used on all known OMAP5 hardware platforms, therefore enable. Signed-off-by: Lubomir Popov lpo...@mm-sol.com --- arch/arm/cpu/armv7/omap5/hw_data.c |1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/cpu/armv7/omap5/hw_data.c b/arch/arm/cpu/armv7/omap5/hw_data.c index e5e41fd..5698876 100644 --- a/arch/arm/cpu/armv7/omap5/hw_data.c +++ b/arch/arm/cpu/armv7/omap5/hw_data.c @@ -412,6 +412,7 @@ void enable_basic_uboot_clocks(void) (*prcm)-cm_l4per_i2c2_clkctrl, (*prcm)-cm_l4per_i2c3_clkctrl, (*prcm)-cm_l4per_i2c4_clkctrl, + (*prcm)-cm_l4per_i2c5_clkctrl, This is fine. Can you also mention what device is connected on them ? and how you are using it ? Also can you add these in a series. Regards, Sricharan On our board we have an I/O expander on I2C5 - the same chip that is used on the TI sEVM (the handset) and uEVM (the PandaBoard5) platforms (on both of which it is also connected to I2C5). Therefore it seems reasonable to have I2C5 enabled in the mainline. This requires that the base address is defined, and that I2C_BUS_MAX is set to 5 (please see related patches). I shall do make a new series on I2C5 support. One more thing I would like to clarify to myself: in your patch series of Apr. 1 you rename the omap5_evm to omap5_uevm. On the other hand, uEVM was the TI-internal name for the PandaBoard5, and the evm was known as sEVM. Doesn't this cause confusion? After all, these are two quite different hardware platforms. Thanks for the explanation. It would good to have the reasoning in the original commit log. For the next one,Tom already answered this. So uEVM is the and also the only official. Regards, Sricharan ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V3 1/3] OMAP5: I2C: Enable i2c5 clocks
Hi Lubomir, On Monday 08 April 2013 04:03 PM, Lubomir Popov wrote: Signed-off-by: Lubomir Popov lpo...@mm-sol.com --- V3 consolidates this patch into a series. arch/arm/cpu/armv7/omap5/hw_data.c |1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/cpu/armv7/omap5/hw_data.c b/arch/arm/cpu/armv7/omap5/hw_data.c index e5e41fd..5698876 100644 --- a/arch/arm/cpu/armv7/omap5/hw_data.c +++ b/arch/arm/cpu/armv7/omap5/hw_data.c @@ -412,6 +412,7 @@ void enable_basic_uboot_clocks(void) (*prcm)-cm_l4per_i2c2_clkctrl, (*prcm)-cm_l4per_i2c3_clkctrl, (*prcm)-cm_l4per_i2c4_clkctrl, + (*prcm)-cm_l4per_i2c5_clkctrl, (*prcm)-cm_l3init_hsusbhost_clkctrl, (*prcm)-cm_l3init_fsusb_clkctrl, 0 Please note that whatever is above the '' gets committed. So now all the 3 patches will not have any commit message. Regards, Sricharan ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V3 1/3] OMAP5: I2C: Enable i2c5 clocks
Hi Sricharan, On 09/04/13 09:34, Sricharan R wrote: Hi Lubomir, On Monday 08 April 2013 04:03 PM, Lubomir Popov wrote: Signed-off-by: Lubomir Popov lpo...@mm-sol.com --- V3 consolidates this patch into a series. arch/arm/cpu/armv7/omap5/hw_data.c |1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/cpu/armv7/omap5/hw_data.c b/arch/arm/cpu/armv7/omap5/hw_data.c index e5e41fd..5698876 100644 --- a/arch/arm/cpu/armv7/omap5/hw_data.c +++ b/arch/arm/cpu/armv7/omap5/hw_data.c @@ -412,6 +412,7 @@ void enable_basic_uboot_clocks(void) (*prcm)-cm_l4per_i2c2_clkctrl, (*prcm)-cm_l4per_i2c3_clkctrl, (*prcm)-cm_l4per_i2c4_clkctrl, +(*prcm)-cm_l4per_i2c5_clkctrl, (*prcm)-cm_l3init_hsusbhost_clkctrl, (*prcm)-cm_l3init_fsusb_clkctrl, 0 Please note that whatever is above the '' gets committed. So now all the 3 patches will not have any commit message. Ooops... So much work, so little time... Should I do a V4? Regards, Sricharan Thanks, Lubo ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] Exynos5: i2c: Fix read NACK handling and remove some redundancy
On which branch is this patch based? It looks quite off from ToT.
On Mon, Mar 25, 2013 at 7:46 PM, Akshay Saraswat aksha...@samsung.comwrote:
From: Gabe Black gabebl...@google.com
The exynos s3c24x0 i2c driver wouldn't do the right thing when a NACK was
received on a read because it didn't attempt a read before waiting for the
read to finish. Putting a call to ReadWriteByte in the NACK path fixed a
problem where getting a NACK reading from a device would jam up the bus and
prevent future accesses like probing from working.
Because other than the ReadWriteByte call the NACK and normal paths were
almost the same thing, and to avoid future instances of the NACK path not
working because it's not exercised normally, this change also consolidates
those two paths.
Signed-off-by: Gabe Black gabebl...@google.com
Signed-off-by: Akshay Saraswat aksha...@samsung.com
---
drivers/i2c/s3c24x0_i2c.c | 53
---
1 file changed, 18 insertions(+), 35 deletions(-)
diff --git a/drivers/i2c/s3c24x0_i2c.c b/drivers/i2c/s3c24x0_i2c.c
index d2b4eb0..91298a7 100644
--- a/drivers/i2c/s3c24x0_i2c.c
+++ b/drivers/i2c/s3c24x0_i2c.c
@@ -366,21 +366,25 @@ static int i2c_transfer(struct s3c24x0_i2c *i2c,
break;
case I2C_READ:
- if (result == I2C_OK) {
- writel(I2C_MODE_MR | I2C_TXRX_ENA, i2c-iicstat);
- writel(chip, i2c-iicds);
- /* send START */
- writel(readl(i2c-iicstat) | I2C_START_STOP,
- i2c-iicstat);
- ReadWriteByte(i2c);
- result = WaitForXfer(i2c);
+ {
+ int was_ok = (result == I2C_OK);
+
+ writel(chip, i2c-iicds);
+ /* resend START */
+ writel(I2C_MODE_MR | I2C_TXRX_ENA |
+ I2C_START_STOP, i2c-iicstat);
+ ReadWriteByte(i2c);
+ result = WaitForXfer(i2c);
+
+ if (was_ok || IsACK(i2c)) {
i = 0;
while ((i data_len) (result == I2C_OK)) {
/* disable ACK for final READ */
- if (i == data_len - 1)
- writel(readl(i2c-iiccon)
-~I2CCON_ACKGEN,
- i2c-iiccon);
+ if (i == data_len - 1) {
+ writel(readl(i2c-iiccon)
+ ~I2CCON_ACKGEN,
+ i2c-iiccon);
+ }
ReadWriteByte(i2c);
result = WaitForXfer(i2c);
data[i] = readl(i2c-iicds);
@@ -388,35 +392,14 @@ static int i2c_transfer(struct s3c24x0_i2c *i2c,
}
} else {
- writel(I2C_MODE_MR | I2C_TXRX_ENA, i2c-iicstat);
- writel(chip, i2c-iicds);
- /* send START */
- writel(readl(i2c-iicstat) | I2C_START_STOP,
- i2c-iicstat);
- result = WaitForXfer(i2c);
-
- if (IsACK(i2c)) {
- i = 0;
- while ((i data_len) (result ==
I2C_OK)) {
- /* disable ACK for final READ */
- if (i == data_len - 1)
- writel(readl(i2c-iiccon)
- ~I2CCON_ACKGEN,
- i2c-iiccon);
- ReadWriteByte(i2c);
- result = WaitForXfer(i2c);
- data[i] = readl(i2c-iicds);
- i++;
- }
- } else {
- result = I2C_NACK;
- }
+ result = I2C_NACK;
}
/* send STOP */
writel(I2C_MODE_MR | I2C_TXRX_ENA, i2c-iicstat);
ReadWriteByte(i2c);
break;
+ }
default:
debug(i2c_transfer: bad call\n);
--
1.8.0
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Re: [U-Boot] [PATCH V3 1/3] OMAP5: I2C: Enable i2c5 clocks
On Tuesday 09 April 2013 12:09 PM, Lubomir Popov wrote: Hi Sricharan, On 09/04/13 09:34, Sricharan R wrote: Hi Lubomir, On Monday 08 April 2013 04:03 PM, Lubomir Popov wrote: Signed-off-by: Lubomir Popov lpo...@mm-sol.com --- V3 consolidates this patch into a series. arch/arm/cpu/armv7/omap5/hw_data.c |1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/cpu/armv7/omap5/hw_data.c b/arch/arm/cpu/armv7/omap5/hw_data.c index e5e41fd..5698876 100644 --- a/arch/arm/cpu/armv7/omap5/hw_data.c +++ b/arch/arm/cpu/armv7/omap5/hw_data.c @@ -412,6 +412,7 @@ void enable_basic_uboot_clocks(void) (*prcm)-cm_l4per_i2c2_clkctrl, (*prcm)-cm_l4per_i2c3_clkctrl, (*prcm)-cm_l4per_i2c4_clkctrl, + (*prcm)-cm_l4per_i2c5_clkctrl, (*prcm)-cm_l3init_hsusbhost_clkctrl, (*prcm)-cm_l3init_fsusb_clkctrl, 0 Please note that whatever is above the '' gets committed. So now all the 3 patches will not have any commit message. Ooops... So much work, so little time... Should I do a V4? ya, because a patch without a commit log would look really blank :) Regards, Sricharan ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] offer: program to deal with kirkwood boot from UART
-Original Message- From: u-boot-boun...@lists.denx.de [mailto:u-boot- boun...@lists.denx.de] On Behalf Of JPT Sent: 08 April 2013 14:44 To: u-boot@lists.denx.de Subject: [U-Boot] offer: program to deal with kirkwood boot from UART Hi, during my dealing with the bricked kirkwood board I wrote an app which automates the process of booting from UART. It's rather stable now, except right now it doesn't work any more. It's highly configurable, since the external calls to Xmodem and terminal go to shell scripts. Wolfgang, do you want to provide this app somewhere on your site? We already have kwboot in u-boot that supports boot from UART from kirkwood, If your work enables some additional functionality/features to it. You are welcomed to send patch for the same? Regards... Prafulla . . . looks like this now: $ ./marvellserialboot --mode bb --device /dev/ttyUSB0 - -baud 115200 Waiting for /dev/ttyUSB0: OK Open /dev/ttyUSB0: OK Set Parameters to 115200, 8, N, 1, SoftwareFlow: FALSE, HardwareFlow: FALSE: OK Clear Recieve Buffer: OK Sending Command Code BB11223344556677: .0x15 OK. Device is requesting Xmodem transfer now. Close /dev/ttyUSB0: OK Starting Xmodem Upload: sx -vv -b u-boot-1.1.4-netgear-533ddr3db-uart.bin /dev/ttyUSB0 /dev/ttyUSB0 Sende u-boot-1.1.4-netgear-533ddr3db-uart.bin, 12288 Blöcke:Starten Sie nun Ihr XMODEM-Empfangsprogramm. Bytes gesendet:1572992 BPS:9666 Übertragung abgeschlossen Xmodem Upload successful. Starting Terminal program: gtkterm Terminal program successful. regards, Jan ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] Exynos5: i2c: Fix read NACK handling and remove some redundancy
Hi Hung-ying Tyan,
On which branch is this patch based? It looks quite off from ToT.
I rebased this patch on u-boot-samsung and posted. But it's been quite some
time since I posted it, so I am not sure if it could be applied straightway now.
On Mon, Mar 25, 2013 at 7:46 PM, Akshay Saraswat aksha...@samsung.com wrote:
From: Gabe Black gabebl...@google.com
The exynos s3c24x0 i2c driver wouldn't do the right thing when a NACK was
received on a read because it didn't attempt a read before waiting for the
read to finish. Putting a call to ReadWriteByte in the NACK path fixed a
problem where getting a NACK reading from a device would jam up the bus and
prevent future accesses like probing from working.
Because other than the ReadWriteByte call the NACK and normal paths were
almost the same thing, and to avoid future instances of the NACK path not
working because it's not exercised normally, this change also consolidates
those two paths.
Signed-off-by: Gabe Black gabebl...@google.com
Signed-off-by: Akshay Saraswat aksha...@samsung.com
---
drivers/i2c/s3c24x0_i2c.c | 53 ---
1 file changed, 18 insertions(+), 35 deletions(-)
diff --git a/drivers/i2c/s3c24x0_i2c.c b/drivers/i2c/s3c24x0_i2c.c
index d2b4eb0..91298a7 100644
--- a/drivers/i2c/s3c24x0_i2c.c
+++ b/drivers/i2c/s3c24x0_i2c.c
@@ -366,21 +366,25 @@ static int i2c_transfer(struct s3c24x0_i2c *i2c,
break;
case I2C_READ:
- if (result == I2C_OK) {
- writel(I2C_MODE_MR | I2C_TXRX_ENA, i2c-iicstat);
- writel(chip, i2c-iicds);
- /* send START */
- writel(readl(i2c-iicstat) | I2C_START_STOP,
- i2c-iicstat);
- ReadWriteByte(i2c);
- result = WaitForXfer(i2c);
+ {
+ int was_ok = (result == I2C_OK);
+
+ writel(chip, i2c-iicds);
+ /* resend START */
+ writel(I2C_MODE_MR | I2C_TXRX_ENA |
+ I2C_START_STOP, i2c-iicstat);
+ ReadWriteByte(i2c);
+ result = WaitForXfer(i2c);
+
+ if (was_ok || IsACK(i2c)) {
i = 0;
while ((i data_len) (result == I2C_OK)) {
/* disable ACK for final READ */
- if (i == data_len - 1)
- writel(readl(i2c-iiccon)
-~I2CCON_ACKGEN,
- i2c-iiccon);
+ if (i == data_len - 1) {
+ writel(readl(i2c-iiccon)
+ ~I2CCON_ACKGEN,
+ i2c-iiccon);
+ }
ReadWriteByte(i2c);
result = WaitForXfer(i2c);
data[i] = readl(i2c-iicds);
@@ -388,35 +392,14 @@ static int i2c_transfer(struct s3c24x0_i2c *i2c,
}
} else {
- writel(I2C_MODE_MR | I2C_TXRX_ENA, i2c-iicstat);
- writel(chip, i2c-iicds);
- /* send START */
- writel(readl(i2c-iicstat) | I2C_START_STOP,
- i2c-iicstat);
- result = WaitForXfer(i2c);
-
- if (IsACK(i2c)) {
- i = 0;
- while ((i data_len) (result == I2C_OK)) {
- /* disable ACK for final READ */
- if (i == data_len - 1)
- writel(readl(i2c-iiccon)
- ~I2CCON_ACKGEN,
- i2c-iiccon);
- ReadWriteByte(i2c);
- result = WaitForXfer(i2c);
- data[i] = readl(i2c-iicds);
- i++;
- }
- } else {
- result = I2C_NACK;
- }
+ result = I2C_NACK;
}
/* send STOP */
writel(I2C_MODE_MR | I2C_TXRX_ENA, i2c-iicstat);
ReadWriteByte(i2c);
break;
+ }
default:
debug(i2c_transfer: bad call\n);
--
1.8.0
Regards,
Akshay Saraswat
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[U-Boot] [PATCH V4 0/3] OMAP5: I2C: Enable support of I2C4 and I2C5 buses
I2C4 and I2C5 are utilized on all known OMAP5 hardware platforms. This series prepares/enables their usage in U-Boot (for I2C5, an additional fix to the i2c driver is required). Changes since V3: Added detailed commit messages. Changes since V2: Separate patches consolidated into a series. Changes since V1: Fixed line wrap issues. Lubomir Popov (3): OMAP5: I2C: Enable i2c5 clocks OMAP5: I2C: Add I2C4 and I2C5 bases OMAP5: I2C: Set I2C_BUS_MAX to 5 to enable I2C4 and I2C5 arch/arm/cpu/armv7/omap5/hw_data.c|1 + arch/arm/include/asm/arch-omap5/cpu.h |2 ++ arch/arm/include/asm/arch-omap5/i2c.h |2 +- 3 files changed, 4 insertions(+), 1 deletion(-) -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH V4 1/3] OMAP5: I2C: Enable i2c5 clocks
I2C4 and I2C5 are utilized on all known OMAP5 hardware platforms. The i2c5 clock was however not enabled; do this here. Signed-off-by: Lubomir Popov lpo...@mm-sol.com --- Changes since V3: Added detailed commit messages. Changes since V2: Separate patches consolidated into a series. Changes since V1: Fixed line wrap issues. arch/arm/cpu/armv7/omap5/hw_data.c |1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/cpu/armv7/omap5/hw_data.c b/arch/arm/cpu/armv7/omap5/hw_data.c index e5e41fd..5698876 100644 --- a/arch/arm/cpu/armv7/omap5/hw_data.c +++ b/arch/arm/cpu/armv7/omap5/hw_data.c @@ -412,6 +412,7 @@ void enable_basic_uboot_clocks(void) (*prcm)-cm_l4per_i2c2_clkctrl, (*prcm)-cm_l4per_i2c3_clkctrl, (*prcm)-cm_l4per_i2c4_clkctrl, + (*prcm)-cm_l4per_i2c5_clkctrl, (*prcm)-cm_l3init_hsusbhost_clkctrl, (*prcm)-cm_l3init_fsusb_clkctrl, 0 -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH V4 2/3] OMAP5: I2C: Add I2C4 and I2C5 bases
I2C4 and I2C5 are utilized on all known OMAP5 hardware platforms.
The I2C4 and I2C5 base addresses were however not defined; do this
here.
Signed-off-by: Lubomir Popov lpo...@mm-sol.com
---
Changes since V3:
Added detailed commit messages.
Changes since V2:
Separate patches consolidated into a series.
Changes since V1:
Fixed line wrap issues.
arch/arm/include/asm/arch-omap5/cpu.h |2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/include/asm/arch-omap5/cpu.h
b/arch/arm/include/asm/arch-omap5/cpu.h
index 5e62013..044ab55 100644
--- a/arch/arm/include/asm/arch-omap5/cpu.h
+++ b/arch/arm/include/asm/arch-omap5/cpu.h
@@ -142,6 +142,8 @@ struct watchdog {
#define I2C_BASE1 (OMAP54XX_L4_PER_BASE + 0x7)
#define I2C_BASE2 (OMAP54XX_L4_PER_BASE + 0x72000)
#define I2C_BASE3 (OMAP54XX_L4_PER_BASE + 0x6)
+#define I2C_BASE4 (OMAP54XX_L4_PER_BASE + 0x7A000)
+#define I2C_BASE5 (OMAP54XX_L4_PER_BASE + 0x7C000)
/* MUSB base */
#define MUSB_BASE (OMAP54XX_L4_CORE_BASE + 0xAB000)
--
1.7.9.5
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[U-Boot] [PATCH V4 3/3] OMAP5: I2C: Set I2C_BUS_MAX to 5 to enable I2C4 and I2C5
I2C4 and I2C5 are utilized on all known OMAP5 hardware platforms.
In order to be able to select one of these buses however, I2C_BUS_MAX
has to be set to 5; do this here.
Please note that for working bus selection, a fix to the i2c driver
is required as well (subject of a separate patch).
Signed-off-by: Lubomir Popov lpo...@mm-sol.com
---
Changes since V3:
Added detailed commit messages.
Changes since V2:
Separate patches consolidated into a series.
Changes since V1:
Fixed line wrap issues.
arch/arm/include/asm/arch-omap5/i2c.h |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/include/asm/arch-omap5/i2c.h
b/arch/arm/include/asm/arch-omap5/i2c.h
index 68be03b..ec39a53 100644
--- a/arch/arm/include/asm/arch-omap5/i2c.h
+++ b/arch/arm/include/asm/arch-omap5/i2c.h
@@ -23,7 +23,7 @@
#ifndef _OMAP5_I2C_H_
#define _OMAP5_I2C_H_
-#define I2C_BUS_MAX3
+#define I2C_BUS_MAX5
#define I2C_DEFAULT_BASE I2C_BASE1
struct i2c {
--
1.7.9.5
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Re: [U-Boot] [U-Boot, 1/4] cam_enc_4xx: fix CONFIG_SPL_MAX_SIZE semantics
Hello Tom,
Am 08.04.2013 22:43, schrieb Tom Rini:
On Mon, Apr 08, 2013 at 09:58:26AM -, Albert ARIBAUD wrote:
CONFIG_SPL_MAX_SIZE wrongly included BSS size. Split
max size between image and BSS based on sizes reported
for current build.
Signed-off-by: Albert ARIBAUD albert.u.b...@aribaud.net
---
board/ait/cam_enc_4xx/u-boot-spl.lds |2 +-
include/configs/cam_enc_4xx.h|4 +++-
2 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/board/ait/cam_enc_4xx/u-boot-spl.lds
b/board/ait/cam_enc_4xx/u-boot-spl.lds
index dd9d52d..25625dc 100644
--- a/board/ait/cam_enc_4xx/u-boot-spl.lds
+++ b/board/ait/cam_enc_4xx/u-boot-spl.lds
@@ -25,7 +25,7 @@
*/
MEMORY { .sram : ORIGIN = CONFIG_SPL_TEXT_BASE,\
-LENGTH = CONFIG_SPL_MAX_SIZE }
+LENGTH = (CONFIG_SPL_MAX_SIZE + CONFIG_SPL_BSS_MAX_SIZE) }
OUTPUT_FORMAT(elf32-littlearm, elf32-littlearm, elf32-littlearm)
OUTPUT_ARCH(arm)
diff --git a/include/configs/cam_enc_4xx.h b/include/configs/cam_enc_4xx.h
index 56528dd..df3682b 100644
--- a/include/configs/cam_enc_4xx.h
+++ b/include/configs/cam_enc_4xx.h
@@ -230,7 +230,9 @@
#define CONFIG_SPL_STACK(0x0001 + 0x7f00)
#define CONFIG_SPL_TEXT_BASE0x0020
/*CONFIG_SYS_SRAM_START*/
-#define CONFIG_SPL_MAX_SIZE 12320
+/* SPL max size is 12K -- but --pad-to requires a single decimal number */
+#define CONFIG_SPL_MAX_SIZE 12288
+#define CONFIG_SPL_BSS_MAX_SIZE (4*1024)
This is wrong, you've just increased the overall limit to 16K. I know
there's a reason that current limit is so exact, Heiko? And also, this
The cam_enc_4xx use only 12k for the SPL code. This is defined in the
UBL header, see u-boot:doc/README.davinci.nand_spl, but can be adapted
for this board. The SoC has an IRam of 32K - ~2k for RBL stack, see:
http://www.ti.com/lit/gpn/tms320dm368
I have no access anymore to this HW to do some tests :-( so I looked
into the hexdump of the current u-boot code with your patch applied, and
the code on the interesting borders (0x0, 0x800 and 0x3800) looks good
to me ...
shows the conceptual problem I have (and 2/2 has the same, along with
tegra). The important limit is the combined size. It doesn't matter if
it's 11K text/data/rodata and 1K BSS, or 8+4. When using custom linker
scripts, we avoid this and can just comment overall (which would need
adding here) that we only care about the combined size. But then tegra
would be wrong since it uses the generic arm spl linker script?
bye,
Heiko
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HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
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[U-Boot] [PATCH] OMAP4: Fix bug in omap4460_volts struct
The omap4460_volts struct was incorrectly referencing tps62361
instead of twl6030 as PMIC for the core and mm voltages (the
tps is used for mpu supply only). This shall lead to bad OPP
settings while booting kernel. Fixing it.
Fix some comments as well.
Signed-off-by: Lubomir Popov lpo...@mm-sol.com
---
This patch is separated from the OMAP4470/TWL6032 support series
because it fixes an existing bug.
arch/arm/cpu/armv7/omap4/hw_data.c |8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/cpu/armv7/omap4/hw_data.c
b/arch/arm/cpu/armv7/omap4/hw_data.c
index 7551b98..04977b4 100644
--- a/arch/arm/cpu/armv7/omap4/hw_data.c
+++ b/arch/arm/cpu/armv7/omap4/hw_data.c
@@ -216,14 +216,14 @@ struct dplls omap4460_dplls = {
struct pmic_data twl6030_4430es1 = {
.base_offset = PHOENIX_SMPS_BASE_VOLT_STD_MODE_UV,
- .step = 12660, /* 10 mV represented in uV */
+ .step = 12660, /* 12.66 mV represented in uV */
/* The code starts at 1 not 0 */
.start_code = 1,
};
struct pmic_data twl6030 = {
.base_offset = PHOENIX_SMPS_BASE_VOLT_STD_MODE_WITH_OFFSET_UV,
- .step = 12660, /* 10 mV represented in uV */
+ .step = 12660, /* 12.66 mV represented in uV */
/* The code starts at 1 not 0 */
.start_code = 1,
};
@@ -271,11 +271,11 @@ struct vcores_data omap4460_volts = {
.core.value = 1200,
.core.addr = SMPS_REG_ADDR_VCORE1,
- .core.pmic = tps62361,
+ .core.pmic = twl6030,
.mm.value = 1200,
.mm.addr = SMPS_REG_ADDR_VCORE2,
- .mm.pmic = tps62361,
+ .mm.pmic = twl6030,
};
/*
--
1.7.9.6 (Apple Git-31.1)
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Re: [U-Boot] [U-Boot, 1/4] cam_enc_4xx: fix CONFIG_SPL_MAX_SIZE semantics
Hi Heiko,
On Tue, 09 Apr 2013 08:50:26 +0200, Heiko Schocher h...@denx.de wrote:
Hello Tom,
Am 08.04.2013 22:43, schrieb Tom Rini:
On Mon, Apr 08, 2013 at 09:58:26AM -, Albert ARIBAUD wrote:
CONFIG_SPL_MAX_SIZE wrongly included BSS size. Split
max size between image and BSS based on sizes reported
for current build.
Signed-off-by: Albert ARIBAUD albert.u.b...@aribaud.net
---
board/ait/cam_enc_4xx/u-boot-spl.lds |2 +-
include/configs/cam_enc_4xx.h|4 +++-
2 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/board/ait/cam_enc_4xx/u-boot-spl.lds
b/board/ait/cam_enc_4xx/u-boot-spl.lds
index dd9d52d..25625dc 100644
--- a/board/ait/cam_enc_4xx/u-boot-spl.lds
+++ b/board/ait/cam_enc_4xx/u-boot-spl.lds
@@ -25,7 +25,7 @@
*/
MEMORY { .sram : ORIGIN = CONFIG_SPL_TEXT_BASE,\
- LENGTH = CONFIG_SPL_MAX_SIZE }
+ LENGTH = (CONFIG_SPL_MAX_SIZE + CONFIG_SPL_BSS_MAX_SIZE) }
OUTPUT_FORMAT(elf32-littlearm, elf32-littlearm, elf32-littlearm)
OUTPUT_ARCH(arm)
diff --git a/include/configs/cam_enc_4xx.h b/include/configs/cam_enc_4xx.h
index 56528dd..df3682b 100644
--- a/include/configs/cam_enc_4xx.h
+++ b/include/configs/cam_enc_4xx.h
@@ -230,7 +230,9 @@
#define CONFIG_SPL_STACK (0x0001 + 0x7f00)
#define CONFIG_SPL_TEXT_BASE 0x0020
/*CONFIG_SYS_SRAM_START*/
-#define CONFIG_SPL_MAX_SIZE 12320
+/* SPL max size is 12K -- but --pad-to requires a single decimal number */
+#define CONFIG_SPL_MAX_SIZE 12288
+#define CONFIG_SPL_BSS_MAX_SIZE (4*1024)
This is wrong, you've just increased the overall limit to 16K. I know
there's a reason that current limit is so exact, Heiko? And also, this
The cam_enc_4xx use only 12k for the SPL code. This is defined in the
UBL header, see u-boot:doc/README.davinci.nand_spl, but can be adapted
for this board. The SoC has an IRam of 32K - ~2k for RBL stack, see:
http://www.ti.com/lit/gpn/tms320dm368
I have no access anymore to this HW to do some tests :-( so I looked
into the hexdump of the current u-boot code with your patch applied, and
the code on the interesting borders (0x0, 0x800 and 0x3800) looks good
to me ...
shows the conceptual problem I have (and 2/2 has the same, along with
tegra). The important limit is the combined size. It doesn't matter if
it's 11K text/data/rodata and 1K BSS, or 8+4. When using custom linker
scripts, we avoid this and can just comment overall (which would need
adding here) that we only care about the combined size. But then tegra
would be wrong since it uses the generic arm spl linker script?
Thanks Heiko.
I'd read about the SoC IRAM, and had chosen 16K indeed arbitrarily but
taking care not to use most of it -- half felt like safe enough.
However, I'd missed the UBL thing, thanks for pointing this out. So
either I keep 12K, split for instance 10K and 2K (5 pages and 1 page),
or I reaise the number of pages in board/ait/cam_enc_4xx/ublimage.cfg,
correct?
Let us assume I keep 12K. Here is a current build of cam_enc_4xx:
text data bss dec hex filename
439526 13148 311092 763766 ba776 ./u-boot
9073840 500 10413 28ad ./spl/u-boot-spl
And the map file gives __start = 0x20, __bss_start = 0x26e0, and
__bss_end = __image_copy_end = _end = 0x28d4, which makes the
size of the non-BSS part of the image equal to 9952 bytes (thus below
10K) and the BSS part size is 500 bytes, below 2K.
So, it seems I could just replace
#define CONFIG_SPL_MAX_SIZE 12288
#define CONFIG_SPL_BSS_MAX_SIZE (4*1024)
with
#define CONFIG_SPL_MAX_SIZE 10240
#define CONFIG_SPL_BSS_MAX_SIZE (2*1024)
and keep the UBL cfg file untouched -- any future size issue with
image or BSS size would imply changing these values and uptating the
UBL cfg file.
Would that be ok?
bye,
Heiko
Amicalement,
--
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Re: [U-Boot] mmc: sdhci: Add a quirk to add delay during completion of sdhci_send_cmd
Hi Tushar, On Mon, Apr 8, 2013 at 9:22 AM, Tushar Behera tushar.beh...@linaro.org wrote: On 04/07/2013 10:27 AM, Jagan Teki wrote: Hi, I saw that you have been added the SDHCI_QUIRK_WAIT_SEND_CMD on below commit http://git.denx.de/?p=u-boot.git;a=commitdiff;h=13243f2eafc4292917178051fe1bb5aab2774dca I need few quires regarding the QUIRK delay. 1. Why the delay is 1000 + if (host-quirks SDHCI_QUIRK_WAIT_SEND_CMD) + udelay(1000); + 2. is this delay specific to s5p_sdhci controller? BTW: Can you please help me out what is the reason for max and min clocks are at 5200 and 40 respectively. As per my knowledge the max clock of sdhci on spec-2 is 5000 (50Mhz), I may be in correct. Request for your help. Thanks, Jagan. This was specific to s5p_sdhci driver so as to replicate the behavior of s5p_mmc driver. 3. I have an issue Controller never released inhibit bit(s) but when I enable this quirk on my driver with udelay(1), it's working. I am not sure about the exact delay as per the spec. I have added Jaehoon to CC who might have additional information about this. Could you please help me. Thanks, Jagan. -- Tushar Behera ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] mmc: sdhci: Add a quirk to add delay during completion of sdhci_send_cmd
On 04/09/2013 06:41 PM, Jagan Teki wrote: Hi Tushar, On Mon, Apr 8, 2013 at 9:22 AM, Tushar Behera tushar.beh...@linaro.org wrote: On 04/07/2013 10:27 AM, Jagan Teki wrote: Hi, I saw that you have been added the SDHCI_QUIRK_WAIT_SEND_CMD on below commit http://git.denx.de/?p=u-boot.git;a=commitdiff;h=13243f2eafc4292917178051fe1bb5aab2774dca I need few quires regarding the QUIRK delay. 1. Why the delay is 1000 + if (host-quirks SDHCI_QUIRK_WAIT_SEND_CMD) + udelay(1000); + 2. is this delay specific to s5p_sdhci controller? BTW: Can you please help me out what is the reason for max and min clocks are at 5200 and 40 respectively. As per my knowledge the max clock of sdhci on spec-2 is 5000 (50Mhz), I may be in correct. Right..But eMMC can use up to 52MHz. And see into the drivers/mmc/mmc.c..SD-card's max_dtr is set to 50MHz, if card is supported HS_MODE. Request for your help. Thanks, Jagan. This was specific to s5p_sdhci driver so as to replicate the behavior of s5p_mmc driver. 3. I have an issue Controller never released inhibit bit(s) but when I enable this quirk on my driver with udelay(1), it's working. I am not sure about the exact delay as per the spec. I have added Jaehoon to CC who might have additional information about this. Could you please help me. Thanks, Jagan. -- Tushar Behera ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 0/5] FSL SECURE BOOT: Add support for next level image validation
-Original Message- From: Phillips Kim-R1AAHA Sent: Saturday, March 30, 2013 4:08 AM To: Gupta Ruchika-R66431 Cc: Otavio Salvador; U-Boot Mailing List; Fleming Andy-AFLEMING Subject: Re: [U-Boot] [PATCH 0/5] FSL SECURE BOOT: Add support for next level image validation On Fri, 29 Mar 2013 04:43:23 + Gupta Ruchika-R66431 r66...@freescale.com wrote: From: otavio.salva...@gmail.com [mailto:otavio.salva...@gmail.com] On Behalf Of Otavio Salvador Sent: Thursday, March 28, 2013 8:23 PM To: Gupta Ruchika-R66431 Cc: U-Boot Mailing List; Fleming Andy-AFLEMING Subject: Re: [U-Boot] [PATCH 0/5] FSL SECURE BOOT: Add support for next level image validation On Thu, Mar 28, 2013 at 7:46 AM, Ruchika Gupta ruchika.gu...@freescale.com wrote: The patch set adds support for next level image validation (linux, rootfs, dtb) in secure boot scenarios. It seems to focus in PowerPC, do you know if same code could be ported to ARM? For the code to be ported to ARM platform, corresponding hardware blocks like cryptographic accelerator/SW support for crypto operations, IOMMU and a security monitor block will be required. i.mx6 has, and other future ARM-based devices will have, a CAAM, so I see no reason why any of this code should be restricted to power arch at all. How does this patchseries integrate with this SHA offload patchseries: http://article.gmane.org/gmane.comp.boot-loaders.u-boot/156321 Once this patch series is applied on the main branch I will rebase my patch, align to this and re-send. and this verified boot implementation: http://article.gmane.org/gmane.comp.boot-loaders.u-boot/156422 ? Thanks for pointing this link out. We have been using bootscript approach for validating next level images, which works on validation of each of the Linux, rootfs and dtb image separately. The location of this bootscript is hardcoded in the board bootcmd file. However the approach pointed by this link is more generic, since it validates a single FIT image. I will work towards integrating our SoC's approach into this framework. Ruchika ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] mmc: sdhci: Add a quirk to add delay during completion of sdhci_send_cmd
Hi Tushar, On Tue, Apr 9, 2013 at 3:23 PM, Jaehoon Chung jh80.ch...@samsung.com wrote: On 04/09/2013 06:41 PM, Jagan Teki wrote: Hi Tushar, On Mon, Apr 8, 2013 at 9:22 AM, Tushar Behera tushar.beh...@linaro.org wrote: On 04/07/2013 10:27 AM, Jagan Teki wrote: Hi, I saw that you have been added the SDHCI_QUIRK_WAIT_SEND_CMD on below commit http://git.denx.de/?p=u-boot.git;a=commitdiff;h=13243f2eafc4292917178051fe1bb5aab2774dca I need few quires regarding the QUIRK delay. 1. Why the delay is 1000 + if (host-quirks SDHCI_QUIRK_WAIT_SEND_CMD) + udelay(1000); + 2. is this delay specific to s5p_sdhci controller? BTW: Can you please help me out what is the reason for max and min clocks are at 5200 and 40 respectively. As per my knowledge the max clock of sdhci on spec-2 is 5000 (50Mhz), I may be in correct. Right..But eMMC can use up to 52MHz. And see into the drivers/mmc/mmc.c..SD-card's max_dtr is set to 50MHz, if card is supported HS_MODE. Ok, Thanks for your information. means the max_clk 52MHz will handle eMMC as well.. is it? What is this min_clk as 40? Any idea if the max_clk and min_clk value are initialized to 0 so-that sdhci will re-init based on the capabilities register Base_Clock_Frequency_for_SD_Clock[13:8].? Thanks, Jagan. Request for your help. Thanks, Jagan. This was specific to s5p_sdhci driver so as to replicate the behavior of s5p_mmc driver. 3. I have an issue Controller never released inhibit bit(s) but when I enable this quirk on my driver with udelay(1), it's working. I am not sure about the exact delay as per the spec. I have added Jaehoon to CC who might have additional information about this. Could you please help me. Thanks, Jagan. -- Tushar Behera ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V8 3/9] DWMMC: Initialise dwmci and resolve EMMC read write issues
Hi Amar,
I'm not sure that need to enable the auto-stop command feature.
why do you enable this feature? Is there any benefit?
Is it related with read/write issue?
Best Regards,
Jaehoon Chung
On 04/03/2013 11:08 PM, Amar wrote:
This patch enumerates dwmci and set auto stop command during
dwmci initialisation.
EMMC read/write is not happening in current implementation
due to improper fifo size computation. Hence modified the fifo size
computation to resolve EMMC read write issues.
Signed-off-by: Amar amarendra...@samsung.com
---
Changes since V1:
1)Created the macros RX_WMARK_SHIFT and RX_WMARK_MASK in header file.
Changes since V2:
1)Updation of commit message and resubmition of proper patch set.
Changes since V3:
1)Updated to use the macro DWMCI_CTRL_SEND_AS_CCSD instead of
the hard coded value (1 10).
Changes since V4:
1)Updated the function dwmci_send_cmd() to use get_timer() instead
of using mdelay(1).
Changes since V5:
1)Updated in response to review comments.
Changes since V6:
No change.
Changes since V7:
1)Updated the function dwmci_setup_bus() to return 0 if (freq == 0).
This is to avoid the run time exception raise:Signal # 8 caught.
drivers/mmc/dw_mmc.c | 28 ++--
1 file changed, 18 insertions(+), 10 deletions(-)
diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c
index 4070d4e..963a515 100644
--- a/drivers/mmc/dw_mmc.c
+++ b/drivers/mmc/dw_mmc.c
@@ -129,13 +129,13 @@ static int dwmci_send_cmd(struct mmc *mmc, struct
mmc_cmd *cmd,
unsigned int timeout = 10;
u32 retry = 1;
u32 mask, ctrl;
+ ulong start = get_timer(0);
while (dwmci_readl(host, DWMCI_STATUS) DWMCI_BUSY) {
- if (timeout == 0) {
+ if (get_timer(start) timeout) {
printf(Timeout on data busy\n);
return TIMEOUT;
}
- timeout--;
}
dwmci_writel(host, DWMCI_RINTSTS, DWMCI_INTMSK_ALL);
@@ -143,7 +143,6 @@ static int dwmci_send_cmd(struct mmc *mmc, struct mmc_cmd
*cmd,
if (data)
dwmci_prepare_data(host, data);
-
dwmci_writel(host, DWMCI_CMDARG, cmd-cmdarg);
if (data)
@@ -231,9 +230,8 @@ static int dwmci_setup_bus(struct dwmci_host *host, u32
freq)
int timeout = 1;
unsigned long sclk;
- if (freq == host-clock)
+ if ((freq == host-clock) || (freq == 0))
return 0;
-
/*
* If host-mmc_clk didn't define,
* then assume that host-bus_hz is source clock value.
@@ -314,7 +312,7 @@ static void dwmci_set_ios(struct mmc *mmc)
static int dwmci_init(struct mmc *mmc)
{
struct dwmci_host *host = (struct dwmci_host *)mmc-priv;
- u32 fifo_size, fifoth_val;
+ u32 fifo_size, fifoth_val, ier;
dwmci_writel(host, DWMCI_PWREN, 1);
@@ -323,6 +321,14 @@ static int dwmci_init(struct mmc *mmc)
return -1;
}
+ /* Enumerate at 400KHz */
+ dwmci_setup_bus(host, mmc-f_min);
+
+ /* Set auto stop command */
+ ier = dwmci_readl(host, DWMCI_CTRL);
+ ier |= DWMCI_CTRL_SEND_AS_CCSD;
+ dwmci_writel(host, DWMCI_CTRL, ier);
+
dwmci_writel(host, DWMCI_RINTSTS, 0x);
dwmci_writel(host, DWMCI_INTMASK, 0);
@@ -332,11 +338,13 @@ static int dwmci_init(struct mmc *mmc)
dwmci_writel(host, DWMCI_BMOD, 1);
fifo_size = dwmci_readl(host, DWMCI_FIFOTH);
- if (host-fifoth_val)
+ fifo_size = ((fifo_size RX_WMARK_MASK) RX_WMARK_SHIFT) + 1;
+ if (host-fifoth_val) {
fifoth_val = host-fifoth_val;
- else
- fifoth_val = MSIZE(0x2) | RX_WMARK(fifo_size/2 -1) |
- TX_WMARK(fifo_size/2);
+ } else {
+ fifoth_val = MSIZE(0x2) | RX_WMARK(fifo_size / 2 - 1) |
+ TX_WMARK(fifo_size / 2);
+ }
dwmci_writel(host, DWMCI_FIFOTH, fifoth_val);
dwmci_writel(host, DWMCI_CLKENA, 0);
___
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U-Boot@lists.denx.de
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Re: [U-Boot] [PATCH V8 4/9] EXYNOS5: DWMMC: Added FDT support for DWMMC
On 04/03/2013 11:08 PM, Amar wrote:
This patch adds FDT support for DWMMC, by reading the DWMMC node data
from the device tree and initialising DWMMC channels as per data
obtained from the node.
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
Signed-off-by: Amar amarendra...@samsung.com
Acked-by: Simon Glass s...@chromium.org
---
Changes since V1:
1)Updated code to have same signature for the function
exynos_dwmci_init() for both FDT and non-FDT versions.
2)Updated code to pass device_id parameter to the function
exynos5_mmc_set_clk_div() instead of index.
3)Updated code to decode the value of samsung,width from FDT.
4)Channel index is computed instead of getting from FDT.
Changes since V2:
1)Updation of commit message and resubmition of proper patch set.
Changes since V3:
1)Replaced the new function exynos5_mmc_set_clk_div() with the
existing function set_mmc_clk(). set_mmc_clk() will do the purpose.
2)Computation of FSYS block clock divisor (pre-ratio) is added.
Changes since V4:
1)Replaced unsigned int exynos_dwmmc_init(int index, int bus_width)
with
int exynos_dwmci_add_port(int, u32, inth, u32)
i)exynos_dwmmc_add_port() will be used by non-FDT boards.
ii)In FDT case, exynos_dwmmc_init(const void *blob) will use
exynos_dwmmc_add_port() for every channel enabled in device
node.
2)Changed the computation method of mmc clock divisor.
3)Updated exynos_dwmmc_init() to compute the 'clksel_val' within the
function.
Changes since V5:
1)Updated in response to review comments and changed the mmc clock value
from 50MHz to 52MHz.
Changes since V6:
No change.
Changes since V7:
No change.
arch/arm/include/asm/arch-exynos/dwmmc.h | 11 +--
drivers/mmc/exynos_dw_mmc.c | 127
---
include/dwmmc.h | 3 +
3 files changed, 124 insertions(+), 17 deletions(-)
diff --git a/arch/arm/include/asm/arch-exynos/dwmmc.h
b/arch/arm/include/asm/arch-exynos/dwmmc.h
index 8acdf9b..3b147b8 100644
--- a/arch/arm/include/asm/arch-exynos/dwmmc.h
+++ b/arch/arm/include/asm/arch-exynos/dwmmc.h
@@ -27,10 +27,7 @@
#define DWMCI_SET_DRV_CLK(x) ((x) 16)
#define DWMCI_SET_DIV_RATIO(x) ((x) 24)
-int exynos_dwmci_init(u32 regbase, int bus_width, int index);
-
-static inline unsigned int exynos_dwmmc_init(int index, int bus_width)
-{
- unsigned int base = samsung_get_base_mmc() + (0x1 * index);
- return exynos_dwmci_init(base, bus_width, index);
-}
+#ifdef CONFIG_OF_CONTROL
+int exynos_dwmmc_init(const void *blob);
+#endif
+int exynos_dwmci_add_port(int index, u32 regbase, int bus_width, u32 clksel);
diff --git a/drivers/mmc/exynos_dw_mmc.c b/drivers/mmc/exynos_dw_mmc.c
index 72a31b7..4238dd9 100644
--- a/drivers/mmc/exynos_dw_mmc.c
+++ b/drivers/mmc/exynos_dw_mmc.c
@@ -19,39 +19,146 @@
*/
#include common.h
-#include malloc.h
#include dwmmc.h
+#include fdtdec.h
+#include libfdt.h
+#include malloc.h
#include asm/arch/dwmmc.h
#include asm/arch/clk.h
+#include asm/arch/pinmux.h
-static char *EXYNOS_NAME = EXYNOS DWMMC;
+#define DWMMC_MAX_CH_NUM4
+#define DWMMC_MAX_FREQ 5200
+#define DWMMC_MIN_FREQ 40
+#define DWMMC_MMC0_CLKSEL_VAL 0x03030001
+#define DWMMC_MMC2_CLKSEL_VAL 0x03020001
I known that CLKSEL's value is SoC specific.
All exynos series are working fine? I didn't think so.
Best Regards,
Jaehoon Chung
+/*
+ * Function used as callback function to initialise the
+ * CLKSEL register for every mmc channel.
+ */
static void exynos_dwmci_clksel(struct dwmci_host *host)
{
- u32 val;
- val = DWMCI_SET_SAMPLE_CLK(DWMCI_SHIFT_0) |
- DWMCI_SET_DRV_CLK(DWMCI_SHIFT_0) | DWMCI_SET_DIV_RATIO(0);
+ dwmci_writel(host, DWMCI_CLKSEL, host-clksel_val);
+}
- dwmci_writel(host, DWMCI_CLKSEL, val);
+unsigned int exynos_dwmci_get_clk(int dev_index)
+{
+ return get_mmc_clk(dev_index);
}
-int exynos_dwmci_init(u32 regbase, int bus_width, int index)
+/*
+ * This function adds the mmc channel to be registered with mmc core.
+ * index - mmc channel number.
+ * regbase - register base address of mmc channel specified in 'index'.
+ * bus_width - operating bus width of mmc channel specified in 'index'.
+ * clksel - value to be written into CLKSEL register in case of FDT.
+ * NULL in case od non-FDT.
+ */
+int exynos_dwmci_add_port(int index, u32 regbase, int bus_width, u32 clksel)
{
struct dwmci_host *host = NULL;
+ unsigned int div;
+ unsigned long freq, sclk;
host = malloc(sizeof(struct dwmci_host));
if (!host) {
printf(dwmci_host malloc fail!\n);
return 1;
Re: [U-Boot] [PATCH V8 5/9] EXYNOS5: DWMMC: Initialise the local variable to avoid unwanted results.
Acked-by: Jaehoon Chung jh80.ch...@samsung.com On 04/03/2013 11:08 PM, Amar wrote: This patch initialises the local variable 'shift' to zero. The uninitialised local variable 'shift' had garbage value and was resulting in unwnated results in the functions exynos5_get_mmc_clk() and exynos4_get_mmc_clk(). Signed-off-by: Amar amarendra...@samsung.com Acked-by: Simon Glass s...@chromium.org --- Changes since V1: 1)Updated the function exynos5_mmc_set_clk_div() to receive 'device_i'd as input parameter instead of 'index'. Changes since V2: 1)Updation of commit message and resubmition of proper patch set. Changes since V3: 1)Removed the new API exynos5_mmc_set_clk_div() from clock.c, because existing API set_mmc_clk() can be used to set mmc clock. Changes since V4: 1)Updated the subject line to reflect the changes present in this patch. 2)Changes of the file arch/arm/include/asm/arch-exynos/clk.h which were present in this patch, have been moved out of this patch. Changes since V5: No change. Changes since V6: No change. Changes since V7: No change. arch/arm/cpu/armv7/exynos/clock.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/cpu/armv7/exynos/clock.c b/arch/arm/cpu/armv7/exynos/clock.c index 223660a..cf3247a 100644 --- a/arch/arm/cpu/armv7/exynos/clock.c +++ b/arch/arm/cpu/armv7/exynos/clock.c @@ -613,7 +613,7 @@ static unsigned long exynos4_get_mmc_clk(int dev_index) (struct exynos4_clock *)samsung_get_base_clock(); unsigned long uclk, sclk; unsigned int sel, ratio, pre_ratio; - int shift; + int shift = 0; sel = readl(clk-src_fsys); sel = (sel (dev_index 2)) 0xf; @@ -662,7 +662,7 @@ static unsigned long exynos5_get_mmc_clk(int dev_index) (struct exynos5_clock *)samsung_get_base_clock(); unsigned long uclk, sclk; unsigned int sel, ratio, pre_ratio; - int shift; + int shift = 0; sel = readl(clk-src_fsys); sel = (sel (dev_index 2)) 0xf; ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V8 9/9] COMMON: MMC: Command to support EMMC booting and to resize EMMC boot partition
Dear Amarendra,
On 05/04/13 16:39, Amarendra Reddy wrote:
Hi Jaehoon,
Please find the responses below
Thanks Regards
Amarendra Reddy
On 5 April 2013 11:51, Jaehoon Chung jh80.ch...@samsung.com wrote:
Hi Amar,
On 04/03/2013 11:08 PM, Amar wrote:
This patch adds commands to access(open/close) and resize boot
partitions on EMMC.
Signed-off-by: Amar amarendra...@samsung.com
---
Changes since V1:
1)Combined the common piece of code between 'open' and 'close'
operations.
Changes since V2:
1)Updation of commit message and resubmition of proper patch set.
Changes since V3:
No change.
Changes since V4:
1)Added a new funtion boot_part_access() to combine the common
parts of
'mmc open' and 'mmc close' functionalities.
2)Used the generic function mmc_boot_part_access() instead of
two functions mmc_boot_open() and mmc_boot_close(). By doing
so user
can specify which boot partition to be accessed (opened / closed).
Changes since V5:
1)Updated minor nits in response to review comments.
Changes since V6:
No change.
Changes since V7:
1)The piece of code involved in open/close and resize of EMMC boot
partition has been made conditional and is enabled only if the
macro
CONFIG_SUPPORT_EMMC_BOOT is defined.
common/cmd_mmc.c | 110
++-
1 file changed, 108 insertions(+), 2 deletions(-)
diff --git a/common/cmd_mmc.c b/common/cmd_mmc.c
index 8c53a10..c5f60a2 100644
--- a/common/cmd_mmc.c
+++ b/common/cmd_mmc.c
@@ -147,6 +147,36 @@ U_BOOT_CMD(
- display info of the current MMC device
);
+#ifdef CONFIG_SUPPORT_EMMC_BOOT
+static int boot_part_access(struct mmc *mmc, u32 ack, u32 part_num, u32
access)
Why do you use u32? I know that just used 8bit.
Yes, just 8bit would suffice. I will update it.
+{
+ int err;
+ err = mmc_boot_part_access(mmc, ack, part_num, access);
+
+ if ((err == 0) (access != 0)) {
+ printf(\t\t\t!!!Notice!!!\n);
+
+ printf(!You must close EMMC boot Partition);
+ printf(after all images are written\n);
+
+ printf(!EMMC boot partition has continuity);
+ printf(at image writing time.\n);
+
+ printf(!So, do not close the boot partition);
+ printf(before all images are written.\n);
+ return 0;
+ } else if ((err == 0) (access == 0))
+ return 0;
+ else if ((err != 0) (access != 0)) {
+ printf(EMMC boot partition-%d OPEN Failed.\n, part_num);
+ return 1;
+ } else {
+ printf(EMMC boot partition-%d CLOSE Failed.\n, part_num);
+ return 1;
+ }
+}
+#endif
+
static int do_mmcops(cmd_tbl_t *cmdtp, int flag, int argc, char * const
argv[])
{
enum mmc_state state;
@@ -248,8 +278,75 @@ static int do_mmcops(cmd_tbl_t *cmdtp, int flag,
int argc, char * const argv[])
curr_device, mmc-part_num);
return 0;
- }
+#ifdef CONFIG_SUPPORT_EMMC_BOOT
+ } else if ((strcmp(argv[1], open) == 0) ||
+ (strcmp(argv[1], close) == 0)) {
+ int dev;
+ struct mmc *mmc;
+ u32 ack, part_num, access = 0;
+
+ if (argc == 4) {
+ dev = simple_strtoul(argv[2], NULL, 10);
+ part_num = simple_strtoul(argv[3], NULL, 10);
+ } else {
+ return CMD_RET_USAGE;
+ }
+ mmc = find_mmc_device(dev);
+ if (!mmc) {
+ printf(no mmc device at slot %x\n, dev);
+ return 1;
+ }
+
+ if (IS_SD(mmc)) {
+ printf(SD device cannot be opened/closed\n);
+ return 1;
+ }
+
+ if ((part_num = 0) || (part_num
MMC_NUM_BOOT_PARTITION)) {
+ printf(Invalid boot partition number:\n);
+ printf(Boot partition number cannot be = 0\n);
+ printf(EMMC44 supports only 2 boot partitions\n);
What means? EMMC44 supports only 2 boot partitions?
As per the eMMC 4.4 specification, eMMC 4.4 has 1 RPMB partition, 2 Boot
partitions and 4 General Purpose partitions.
As there are only 2 Boot partitions, we restrict the user not to use an
invalid partition number.
+ return 1;
+ }
+
+ if (strcmp(argv[1], open) == 0)
+ access = part_num; /* enable R/W access to boot
part*/
+ if (strcmp(argv[1], close) == 0)
else if?
Even 'else if' is fine, but I wanted to explicitly check the string in both
cases.
Why? I think, It doesn't make sense.
+ access = 0; /* No access to boot partition */
+
+ /* acknowledge
Re: [U-Boot] [PATCH V8 9/9] COMMON: MMC: Command to support EMMC booting and to resize EMMC boot partition
Dear Minkyu,
Thankyou for the review comments.
Please find my responses below.
Thanks Regards
Amarendra Reddy
On 9 April 2013 16:25, Minkyu Kang mk7.k...@samsung.com wrote:
Dear Amarendra,
On 05/04/13 16:39, Amarendra Reddy wrote:
Hi Jaehoon,
Please find the responses below
Thanks Regards
Amarendra Reddy
On 5 April 2013 11:51, Jaehoon Chung jh80.ch...@samsung.com wrote:
Hi Amar,
On 04/03/2013 11:08 PM, Amar wrote:
This patch adds commands to access(open/close) and resize boot
partitions on EMMC.
Signed-off-by: Amar amarendra...@samsung.com
---
Changes since V1:
1)Combined the common piece of code between 'open' and 'close'
operations.
Changes since V2:
1)Updation of commit message and resubmition of proper patch set.
Changes since V3:
No change.
Changes since V4:
1)Added a new funtion boot_part_access() to combine the common
parts of
'mmc open' and 'mmc close' functionalities.
2)Used the generic function mmc_boot_part_access() instead of
two functions mmc_boot_open() and mmc_boot_close(). By doing
so user
can specify which boot partition to be accessed (opened /
closed).
Changes since V5:
1)Updated minor nits in response to review comments.
Changes since V6:
No change.
Changes since V7:
1)The piece of code involved in open/close and resize of EMMC
boot
partition has been made conditional and is enabled only if the
macro
CONFIG_SUPPORT_EMMC_BOOT is defined.
common/cmd_mmc.c | 110
++-
1 file changed, 108 insertions(+), 2 deletions(-)
diff --git a/common/cmd_mmc.c b/common/cmd_mmc.c
index 8c53a10..c5f60a2 100644
--- a/common/cmd_mmc.c
+++ b/common/cmd_mmc.c
@@ -147,6 +147,36 @@ U_BOOT_CMD(
- display info of the current MMC device
);
+#ifdef CONFIG_SUPPORT_EMMC_BOOT
+static int boot_part_access(struct mmc *mmc, u32 ack, u32 part_num,
u32
access)
Why do you use u32? I know that just used 8bit.
Yes, just 8bit would suffice. I will update it.
+{
+ int err;
+ err = mmc_boot_part_access(mmc, ack, part_num, access);
+
+ if ((err == 0) (access != 0)) {
+ printf(\t\t\t!!!Notice!!!\n);
+
+ printf(!You must close EMMC boot Partition);
+ printf(after all images are written\n);
+
+ printf(!EMMC boot partition has continuity);
+ printf(at image writing time.\n);
+
+ printf(!So, do not close the boot partition);
+ printf(before all images are written.\n);
+ return 0;
+ } else if ((err == 0) (access == 0))
+ return 0;
+ else if ((err != 0) (access != 0)) {
+ printf(EMMC boot partition-%d OPEN Failed.\n,
part_num);
+ return 1;
+ } else {
+ printf(EMMC boot partition-%d CLOSE Failed.\n,
part_num);
+ return 1;
+ }
+}
+#endif
+
static int do_mmcops(cmd_tbl_t *cmdtp, int flag, int argc, char *
const
argv[])
{
enum mmc_state state;
@@ -248,8 +278,75 @@ static int do_mmcops(cmd_tbl_t *cmdtp, int flag,
int argc, char * const argv[])
curr_device, mmc-part_num);
return 0;
- }
+#ifdef CONFIG_SUPPORT_EMMC_BOOT
+ } else if ((strcmp(argv[1], open) == 0) ||
+ (strcmp(argv[1], close) == 0)) {
+ int dev;
+ struct mmc *mmc;
+ u32 ack, part_num, access = 0;
+
+ if (argc == 4) {
+ dev = simple_strtoul(argv[2], NULL, 10);
+ part_num = simple_strtoul(argv[3], NULL, 10);
+ } else {
+ return CMD_RET_USAGE;
+ }
+ mmc = find_mmc_device(dev);
+ if (!mmc) {
+ printf(no mmc device at slot %x\n, dev);
+ return 1;
+ }
+
+ if (IS_SD(mmc)) {
+ printf(SD device cannot be opened/closed\n);
+ return 1;
+ }
+
+ if ((part_num = 0) || (part_num
MMC_NUM_BOOT_PARTITION)) {
+ printf(Invalid boot partition number:\n);
+ printf(Boot partition number cannot be = 0\n);
+ printf(EMMC44 supports only 2 boot
partitions\n);
What means? EMMC44 supports only 2 boot partitions?
As per the eMMC 4.4 specification, eMMC 4.4 has 1 RPMB partition, 2 Boot
partitions and 4 General Purpose partitions.
As there are only 2 Boot partitions, we restrict the user not to use an
invalid partition number.
+ return 1;
+ }
+
+ if (strcmp(argv[1], open) == 0)
+ access = part_num;
Re: [U-Boot] [U-Boot, 1/4] cam_enc_4xx: fix CONFIG_SPL_MAX_SIZE semantics
Hello Albert,
On 09.04.2013 11:08, Albert ARIBAUD wrote:
Hi Heiko,
On Tue, 09 Apr 2013 08:50:26 +0200, Heiko Schocher h...@denx.de wrote:
Hello Tom,
Am 08.04.2013 22:43, schrieb Tom Rini:
On Mon, Apr 08, 2013 at 09:58:26AM -, Albert ARIBAUD wrote:
CONFIG_SPL_MAX_SIZE wrongly included BSS size. Split
max size between image and BSS based on sizes reported
for current build.
Signed-off-by: Albert ARIBAUD albert.u.b...@aribaud.net
---
board/ait/cam_enc_4xx/u-boot-spl.lds |2 +-
include/configs/cam_enc_4xx.h|4 +++-
2 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/board/ait/cam_enc_4xx/u-boot-spl.lds
b/board/ait/cam_enc_4xx/u-boot-spl.lds
index dd9d52d..25625dc 100644
--- a/board/ait/cam_enc_4xx/u-boot-spl.lds
+++ b/board/ait/cam_enc_4xx/u-boot-spl.lds
@@ -25,7 +25,7 @@
*/
MEMORY { .sram : ORIGIN = CONFIG_SPL_TEXT_BASE,\
- LENGTH = CONFIG_SPL_MAX_SIZE }
+ LENGTH = (CONFIG_SPL_MAX_SIZE + CONFIG_SPL_BSS_MAX_SIZE) }
OUTPUT_FORMAT(elf32-littlearm, elf32-littlearm, elf32-littlearm)
OUTPUT_ARCH(arm)
diff --git a/include/configs/cam_enc_4xx.h b/include/configs/cam_enc_4xx.h
index 56528dd..df3682b 100644
--- a/include/configs/cam_enc_4xx.h
+++ b/include/configs/cam_enc_4xx.h
@@ -230,7 +230,9 @@
#define CONFIG_SPL_STACK (0x0001 + 0x7f00)
#define CONFIG_SPL_TEXT_BASE 0x0020
/*CONFIG_SYS_SRAM_START*/
-#define CONFIG_SPL_MAX_SIZE 12320
+/* SPL max size is 12K -- but --pad-to requires a single decimal number */
+#define CONFIG_SPL_MAX_SIZE 12288
+#define CONFIG_SPL_BSS_MAX_SIZE (4*1024)
This is wrong, you've just increased the overall limit to 16K. I know
there's a reason that current limit is so exact, Heiko? And also, this
The cam_enc_4xx use only 12k for the SPL code. This is defined in the
UBL header, see u-boot:doc/README.davinci.nand_spl, but can be adapted
for this board. The SoC has an IRam of 32K - ~2k for RBL stack, see:
http://www.ti.com/lit/gpn/tms320dm368
I have no access anymore to this HW to do some tests :-( so I looked
into the hexdump of the current u-boot code with your patch applied, and
the code on the interesting borders (0x0, 0x800 and 0x3800) looks good
to me ...
shows the conceptual problem I have (and 2/2 has the same, along with
tegra). The important limit is the combined size. It doesn't matter if
it's 11K text/data/rodata and 1K BSS, or 8+4. When using custom linker
scripts, we avoid this and can just comment overall (which would need
adding here) that we only care about the combined size. But then tegra
would be wrong since it uses the generic arm spl linker script?
Thanks Heiko.
I'd read about the SoC IRAM, and had chosen 16K indeed arbitrarily but
taking care not to use most of it -- half felt like safe enough.
However, I'd missed the UBL thing, thanks for pointing this out. So
either I keep 12K, split for instance 10K and 2K (5 pages and 1 page),
or I reaise the number of pages in board/ait/cam_enc_4xx/ublimage.cfg,
correct?
Yes, but I would prefer not to change the number of pages.
Let us assume I keep 12K. Here is a current build of cam_enc_4xx:
text data bss dec hex filename
439526 13148 311092 763766 ba776 ./u-boot
9073 840 500 10413 28ad ./spl/u-boot-spl
And the map file gives __start = 0x20, __bss_start = 0x26e0, and
__bss_end = __image_copy_end = _end = 0x28d4, which makes the
size of the non-BSS part of the image equal to 9952 bytes (thus below
10K) and the BSS part size is 500 bytes, below 2K.
So, it seems I could just replace
#define CONFIG_SPL_MAX_SIZE 12288
#define CONFIG_SPL_BSS_MAX_SIZE (4*1024)
with
#define CONFIG_SPL_MAX_SIZE 10240
#define CONFIG_SPL_BSS_MAX_SIZE (2*1024)
and keep the UBL cfg file untouched -- any future size issue with
image or BSS size would imply changing these values and uptating the
UBL cfg file.
Would that be ok?
Yes, that seems good to me, but I could not test it ...
bye,
Heiko
--
DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
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[U-Boot] [PATCH v3 1/4] ARM: vexpress: refactoring of Versatile Express CA9x4 support
From: Ryan Harkin ryan.har...@linaro.org
The current ca9x4_ct_vxp platform contains support for a Versatile
Express motherboard with a quad core A9 core tile.
This patch separates the Versatile Express motherboard code and the
A9 specific code, to ease supporting more core tiles in the next
patches.
Andre: merged the first two of Ryan's original patches and did some
checkpatch fixes.
Signed-off-by: Ryan Harkin ryan.har...@linaro.org
Signed-off-by: Andre Przywara andre.przyw...@linaro.org
---
MAINTAINERS| 2 +-
board/armltd/vexpress/Makefile | 2 +-
.../vexpress/{ca9x4_ct_vxp.c = vexpress_common.c} | 6 ++--
boards.cfg | 2 +-
include/configs/vexpress_ca9x4.h | 34 ++
.../configs/{ca9x4_ct_vxp.h = vexpress_common.h} | 1 -
6 files changed, 40 insertions(+), 7 deletions(-)
rename board/armltd/vexpress/{ca9x4_ct_vxp.c = vexpress_common.c} (98%)
create mode 100644 include/configs/vexpress_ca9x4.h
rename include/configs/{ca9x4_ct_vxp.h = vexpress_common.h} (99%)
diff --git a/MAINTAINERS b/MAINTAINERS
index 1614b91..761c36c 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -960,7 +960,7 @@ Hugo Villeneuve hugo.villene...@lyrtech.com
Matt Waddel matt.wad...@linaro.org
- ca9x4_ct_vxpARM ARMV7 (Quad Core)
+ vexpress_ca9x4 ARM ARMV7 (Quad Core)
Otavio Salvador ota...@ossystems.com.br
diff --git a/board/armltd/vexpress/Makefile b/board/armltd/vexpress/Makefile
index 8749590..6719f3d 100644
--- a/board/armltd/vexpress/Makefile
+++ b/board/armltd/vexpress/Makefile
@@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk
LIB= $(obj)lib$(BOARD).o
-COBJS := ca9x4_ct_vxp.o
+COBJS := vexpress_common.o
SRCS := $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))
diff --git a/board/armltd/vexpress/ca9x4_ct_vxp.c
b/board/armltd/vexpress/vexpress_common.c
similarity index 98%
rename from board/armltd/vexpress/ca9x4_ct_vxp.c
rename to board/armltd/vexpress/vexpress_common.c
index d5e109e..c4f2520 100644
--- a/board/armltd/vexpress/ca9x4_ct_vxp.c
+++ b/board/armltd/vexpress/vexpress_common.c
@@ -166,8 +166,8 @@ static void vexpress_timer_init(void)
*/
writel(SYSTIMER_RELOAD, systimer_base-timer0load);
writel(SYSTIMER_RELOAD, systimer_base-timer0value);
- writel(SYSTIMER_EN | SYSTIMER_32BIT | \
- readl(systimer_base-timer0control), \
+ writel(SYSTIMER_EN | SYSTIMER_32BIT |
+ readl(systimer_base-timer0control),
systimer_base-timer0control);
reset_timer_masked();
@@ -251,7 +251,7 @@ unsigned long long get_ticks(void)
return get_timer(0);
}
-ulong get_tbclk (void)
+ulong get_tbclk(void)
{
return (ulong)CONFIG_SYS_HZ;
}
diff --git a/boards.cfg b/boards.cfg
index 5fc70be..908e3bc 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -232,7 +232,7 @@ versatilepb arm arm926ejs
versatile armltd
versatileqemuarm arm926ejs versatile
armltd versatile versatile:ARCH_VERSATILE_QEMU,ARCH_VERSATILE_PB
integratorap_cm946es arm arm946esintegrator
armltd - integratorap:CM946ES
integratorcp_cm946es arm arm946esintegrator
armltd - integratorcp:CM946ES
-ca9x4_ct_vxp arm armv7 vexpressarmltd
+vexpress_ca9x4 arm armv7 vexpressarmltd
am335x_evm arm armv7 am335x ti
am33xx am335x_evm:SERIAL1,CONS_INDEX=1
am335x_evm_spiboot arm armv7 am335x ti
am33xx am335x_evm:SERIAL1,CONS_INDEX=1,SPI_BOOT
am335x_evm_uart1 arm armv7 am335x ti
am33xx am335x_evm:SERIAL2,CONS_INDEX=2
diff --git a/include/configs/vexpress_ca9x4.h b/include/configs/vexpress_ca9x4.h
new file mode 100644
index 000..c3b6986
--- /dev/null
+++ b/include/configs/vexpress_ca9x4.h
@@ -0,0 +1,34 @@
+/*
+ * (C) Copyright 2011 Linaro
+ * Ryan Harkin, ryan.har...@linaro.org
+ *
+ * Configuration for Versatile Express. Parts were derived from other ARM
+ * configurations.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You
[U-Boot] [PATCH v3 3/4] ARM: vexpress: add support for Versatile Express Cortex-A15-TC2
This adds support for the Cortex-A15-TC2 core tile for the Versatile Express board by ARM. This is mostly a copy of the A5 support file, but will be extended later with A15 specific options. Signed-off-by: Andre Przywara andre.przyw...@linaro.org --- boards.cfg | 1 + include/configs/vexpress_ca15_tc2.h | 36 2 files changed, 37 insertions(+) create mode 100644 include/configs/vexpress_ca15_tc2.h diff --git a/boards.cfg b/boards.cfg index df8d5e5..e6a86a8 100644 --- a/boards.cfg +++ b/boards.cfg @@ -232,6 +232,7 @@ versatilepb arm arm926ejs versatile armltd versatileqemuarm arm926ejs versatile armltd versatile versatile:ARCH_VERSATILE_QEMU,ARCH_VERSATILE_PB integratorap_cm946es arm arm946esintegrator armltd - integratorap:CM946ES integratorcp_cm946es arm arm946esintegrator armltd - integratorcp:CM946ES +vexpress_ca15_tc2arm armv7 vexpressarmltd vexpress_ca5x2 arm armv7 vexpressarmltd vexpress_ca9x4 arm armv7 vexpressarmltd am335x_evm arm armv7 am335x ti am33xx am335x_evm:SERIAL1,CONS_INDEX=1 diff --git a/include/configs/vexpress_ca15_tc2.h b/include/configs/vexpress_ca15_tc2.h new file mode 100644 index 000..9e230ad --- /dev/null +++ b/include/configs/vexpress_ca15_tc2.h @@ -0,0 +1,36 @@ +/* + * (C) Copyright 2013 Linaro + * Andre Przywara, andre.przyw...@linaro.org + * + * Configuration for Versatile Express. Parts were derived from other ARM + * configurations. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __VEXPRESS_CA15X2_TC2_h +#define __VEXPRESS_CA15X2_TC2_h + +#define CONFIG_VEXPRESS_EXTENDED_MEMORY_MAP +#include vexpress_common.h +#define CONFIG_BOOTP_VCI_STRING U-boot.armv7.vexpress_ca15x2_tc2 + +#define CONFIG_SYS_CLK_FREQ 2400 + +#endif -- 1.7.12.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 4/4] ARM: vexpress: enable bootz and hush parser for all VExpress boards
Signed-off-by: Andre Przywara andre.przyw...@linaro.org --- include/configs/vexpress_common.h | 4 1 file changed, 4 insertions(+) diff --git a/include/configs/vexpress_common.h b/include/configs/vexpress_common.h index cd268e3..3c5683a 100644 --- a/include/configs/vexpress_common.h +++ b/include/configs/vexpress_common.h @@ -179,6 +179,8 @@ #define CONFIG_CMD_PING #define CONFIG_CMD_SAVEENV #define CONFIG_CMD_RUN +#define CONFIG_CMD_BOOTZ +#define CONFIG_SUPPORT_RAW_INITRD #define CONFIG_CMD_FAT #define CONFIG_DOS_PARTITION 1 @@ -302,6 +304,8 @@ #define CONFIG_SYS_PROMPT VExpress# #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_HUSH_PARSER + #define CONFIG_SYS_BARGSIZECONFIG_SYS_CBSIZE /* Boot args buffer */ #define CONFIG_CMD_SOURCE #define CONFIG_SYS_LONGHELP -- 1.7.12.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 2/4] ARM: vexpress: create A5 specific board config
From: Ryan Harkin ryan.har...@linaro.org
This patch creates a new config for the A5 dual core tile that includes the
generic config for the Versatile Express platform.
The generic config has been modified to provide support for the Extended
Memory Map, as used on the A5 core tile. A5 does not support the legacy
memory map.
Signed-off-by: Ryan Harkin ryan.har...@linaro.org
Signed-off-by: Andre Przywara andre.przyw...@linaro.org
---
MAINTAINERS | 1 +
board/armltd/vexpress/vexpress_common.c | 29 --
boards.cfg | 1 +
include/configs/vexpress_ca5x2.h| 34 +++
include/configs/vexpress_common.h | 152
5 files changed, 192 insertions(+), 25 deletions(-)
create mode 100644 include/configs/vexpress_ca5x2.h
diff --git a/MAINTAINERS b/MAINTAINERS
index 761c36c..dccee97 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -961,6 +961,7 @@ Hugo Villeneuve hugo.villene...@lyrtech.com
Matt Waddel matt.wad...@linaro.org
vexpress_ca9x4 ARM ARMV7 (Quad Core)
+ vexpress_ca5x2 ARM ARMV7 (Dual Core)
Otavio Salvador ota...@ossystems.com.br
diff --git a/board/armltd/vexpress/vexpress_common.c
b/board/armltd/vexpress/vexpress_common.c
index c4f2520..2c54869 100644
--- a/board/armltd/vexpress/vexpress_common.c
+++ b/board/armltd/vexpress/vexpress_common.c
@@ -45,8 +45,7 @@
static ulong timestamp;
static ulong lastdec;
-static struct wdt *wdt_base = (struct wdt *)WDT_BASE;
-static struct systimer *systimer_base = (struct systimer *)SYSTIMER_BASE;
+static struct systimer *systimer_base = (struct systimer *)V2M_TIMER01;
static struct sysctrl *sysctrl_base = (struct sysctrl *)SCTL_BASE;
static void flash__init(void);
@@ -173,13 +172,31 @@ static void vexpress_timer_init(void)
reset_timer_masked();
}
+int v2m_cfg_write(u32 devfn, u32 data)
+{
+ /* Configuration interface broken? */
+ u32 val;
+
+ devfn |= SYS_CFG_START | SYS_CFG_WRITE;
+
+ val = readl(V2M_SYS_CFGSTAT);
+ writel(val ~SYS_CFG_COMPLETE, V2M_SYS_CFGSTAT);
+
+ writel(data, V2M_SYS_CFGDATA);
+ writel(devfn, V2M_SYS_CFGCTRL);
+
+ do {
+ val = readl(V2M_SYS_CFGSTAT);
+ } while (val == 0);
+
+ return !!(val SYS_CFG_ERR);
+}
+
/* Use the ARM Watchdog System to cause reset */
void reset_cpu(ulong addr)
{
- writeb(WDT_EN, wdt_base-wdogcontrol);
- writel(WDT_RESET_LOAD, wdt_base-wdogload);
- while (1)
- ;
+ if (v2m_cfg_write(SYS_CFG_REBOOT | SYS_CFG_SITE_MB, 0))
+ printf(Unable to reboot\n);
}
/*
diff --git a/boards.cfg b/boards.cfg
index 908e3bc..df8d5e5 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -232,6 +232,7 @@ versatilepb arm arm926ejs
versatile armltd
versatileqemuarm arm926ejs versatile
armltd versatile versatile:ARCH_VERSATILE_QEMU,ARCH_VERSATILE_PB
integratorap_cm946es arm arm946esintegrator
armltd - integratorap:CM946ES
integratorcp_cm946es arm arm946esintegrator
armltd - integratorcp:CM946ES
+vexpress_ca5x2 arm armv7 vexpressarmltd
vexpress_ca9x4 arm armv7 vexpressarmltd
am335x_evm arm armv7 am335x ti
am33xx am335x_evm:SERIAL1,CONS_INDEX=1
am335x_evm_spiboot arm armv7 am335x ti
am33xx am335x_evm:SERIAL1,CONS_INDEX=1,SPI_BOOT
diff --git a/include/configs/vexpress_ca5x2.h b/include/configs/vexpress_ca5x2.h
new file mode 100644
index 000..9331134
--- /dev/null
+++ b/include/configs/vexpress_ca5x2.h
@@ -0,0 +1,34 @@
+/*
+ * (C) Copyright 2011 Linaro
+ * Ryan Harkin, ryan.har...@linaro.org
+ *
+ * Configuration for Versatile Express. Parts were derived from other ARM
+ * configurations.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __VEXPRESS_CA5X2_h
+#define __VEXPRESS_CA5X2_h
+
+#define
[U-Boot] [PATCH v3 0/4] ARM: vexpress: add support for more core tiles
This series adds support for the Cortex-A5 and Cortex-A15 core tiles for the ARM Versatile Express boards. The first two patches have been around for about one and a half years in the Linaro tree now, they refactor the A9 support and add support for A5. I kept the original commits and authors, just resolved some trivial merge conflicts and checkpatch complaints. As per request, I merged the first two original patches into one for better readability. Patch 3/4 adds support for the A15 core tile, this is actually the same as the A5 for now, but will be extended later. Patch 4/4 enables bootz and hush parser for all boards, just for convenience. Changes: v3: - drop now unneeded default prompt definition in patch 4 v2: - merge patch 1/5 and 2/5 as per Albert's request - add support for raw initrd for full bootz experience Regards, Andre. -- Andre Przywara Linaro Virtualization Team ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v9 18/30] nand: mxc: Switch NAND SPL to generic SPL
Hi Benoît, On Mon, Apr 8, 2013 at 3:55 PM, Fabio Estevam feste...@gmail.com wrote: Hi Benoît, On Mon, Apr 8, 2013 at 3:47 PM, Benoît Thébaudeau benoit.thebaud...@advansee.com wrote: Did you have a chance to perform this test? I have built v10 bundle and will have access to my mx31pdk tomorrow morning. Will let you know the results. Just tested v10 on mx31pdk. As reported in v9 I start to get reboots and never reach the prompt. Then I disabled watchdog options in mx31pdk.h and I get the following: U-Boot 2013.04-rc1-14135-gab21c72-dirty (Apr 09 2013 - 09:23:01) CPU: Freescale i.MX31 rev 2.0 at 532 MHz. Reset cause: POR Board: MX31PDK DRAM: 128 MiB NAND: 256 MiB In:serial Out: serial Err: serial Net: (Board hangs here). When I tested v9 and removed watchdog support I was able to get into the U-boot prompt. Regards, Fabio Estevam ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V8 3/9] DWMMC: Initialise dwmci and resolve EMMC read write issues
Hi Jaehoon,
Auto-stop command is not related to read/write issue.
Today, I commented the 'auto-stop command' enable code and tested, SD/EMMC
read write and EMMC boot work fine.
Hence enabling Auto-stop command is not required.
I shall update the same in next patchset.
Thanks Regards
Amarendra Reddy
On 9 April 2013 16:19, Jaehoon Chung jh80.ch...@samsung.com wrote:
Hi Amar,
I'm not sure that need to enable the auto-stop command feature.
why do you enable this feature? Is there any benefit?
Is it related with read/write issue?
Best Regards,
Jaehoon Chung
On 04/03/2013 11:08 PM, Amar wrote:
This patch enumerates dwmci and set auto stop command during
dwmci initialisation.
EMMC read/write is not happening in current implementation
due to improper fifo size computation. Hence modified the fifo size
computation to resolve EMMC read write issues.
Signed-off-by: Amar amarendra...@samsung.com
---
Changes since V1:
1)Created the macros RX_WMARK_SHIFT and RX_WMARK_MASK in header
file.
Changes since V2:
1)Updation of commit message and resubmition of proper patch set.
Changes since V3:
1)Updated to use the macro DWMCI_CTRL_SEND_AS_CCSD instead of
the hard coded value (1 10).
Changes since V4:
1)Updated the function dwmci_send_cmd() to use get_timer() instead
of using mdelay(1).
Changes since V5:
1)Updated in response to review comments.
Changes since V6:
No change.
Changes since V7:
1)Updated the function dwmci_setup_bus() to return 0 if (freq ==
0).
This is to avoid the run time exception raise:Signal # 8 caught.
drivers/mmc/dw_mmc.c | 28 ++--
1 file changed, 18 insertions(+), 10 deletions(-)
diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c
index 4070d4e..963a515 100644
--- a/drivers/mmc/dw_mmc.c
+++ b/drivers/mmc/dw_mmc.c
@@ -129,13 +129,13 @@ static int dwmci_send_cmd(struct mmc *mmc, struct
mmc_cmd *cmd,
unsigned int timeout = 10;
u32 retry = 1;
u32 mask, ctrl;
+ ulong start = get_timer(0);
while (dwmci_readl(host, DWMCI_STATUS) DWMCI_BUSY) {
- if (timeout == 0) {
+ if (get_timer(start) timeout) {
printf(Timeout on data busy\n);
return TIMEOUT;
}
- timeout--;
}
dwmci_writel(host, DWMCI_RINTSTS, DWMCI_INTMSK_ALL);
@@ -143,7 +143,6 @@ static int dwmci_send_cmd(struct mmc *mmc, struct
mmc_cmd *cmd,
if (data)
dwmci_prepare_data(host, data);
-
dwmci_writel(host, DWMCI_CMDARG, cmd-cmdarg);
if (data)
@@ -231,9 +230,8 @@ static int dwmci_setup_bus(struct dwmci_host *host,
u32 freq)
int timeout = 1;
unsigned long sclk;
- if (freq == host-clock)
+ if ((freq == host-clock) || (freq == 0))
return 0;
-
/*
* If host-mmc_clk didn't define,
* then assume that host-bus_hz is source clock value.
@@ -314,7 +312,7 @@ static void dwmci_set_ios(struct mmc *mmc)
static int dwmci_init(struct mmc *mmc)
{
struct dwmci_host *host = (struct dwmci_host *)mmc-priv;
- u32 fifo_size, fifoth_val;
+ u32 fifo_size, fifoth_val, ier;
dwmci_writel(host, DWMCI_PWREN, 1);
@@ -323,6 +321,14 @@ static int dwmci_init(struct mmc *mmc)
return -1;
}
+ /* Enumerate at 400KHz */
+ dwmci_setup_bus(host, mmc-f_min);
+
+ /* Set auto stop command */
+ ier = dwmci_readl(host, DWMCI_CTRL);
+ ier |= DWMCI_CTRL_SEND_AS_CCSD;
+ dwmci_writel(host, DWMCI_CTRL, ier);
+
dwmci_writel(host, DWMCI_RINTSTS, 0x);
dwmci_writel(host, DWMCI_INTMASK, 0);
@@ -332,11 +338,13 @@ static int dwmci_init(struct mmc *mmc)
dwmci_writel(host, DWMCI_BMOD, 1);
fifo_size = dwmci_readl(host, DWMCI_FIFOTH);
- if (host-fifoth_val)
+ fifo_size = ((fifo_size RX_WMARK_MASK) RX_WMARK_SHIFT) + 1;
+ if (host-fifoth_val) {
fifoth_val = host-fifoth_val;
- else
- fifoth_val = MSIZE(0x2) | RX_WMARK(fifo_size/2 -1) |
- TX_WMARK(fifo_size/2);
+ } else {
+ fifoth_val = MSIZE(0x2) | RX_WMARK(fifo_size / 2 - 1) |
+ TX_WMARK(fifo_size / 2);
+ }
dwmci_writel(host, DWMCI_FIFOTH, fifoth_val);
dwmci_writel(host, DWMCI_CLKENA, 0);
___
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Re: [U-Boot] [U-Boot, 1/4] cam_enc_4xx: fix CONFIG_SPL_MAX_SIZE semantics
Hi Heiko, On Tue, 09 Apr 2013 14:11:38 +0200, Heiko Schocher h...@denx.de wrote: Let us assume I keep 12K. Here is a current build of cam_enc_4xx: text data bss dec hex filename 439526 13148 311092 763766 ba776 ./u-boot 9073840 500 10413 28ad ./spl/u-boot-spl And the map file gives __start = 0x20, __bss_start = 0x26e0, and __bss_end = __image_copy_end = _end = 0x28d4, which makes the size of the non-BSS part of the image equal to 9952 bytes (thus below 10K) and the BSS part size is 500 bytes, below 2K. So, it seems I could just replace #define CONFIG_SPL_MAX_SIZE 12288 #define CONFIG_SPL_BSS_MAX_SIZE (4*1024) with #define CONFIG_SPL_MAX_SIZE 10240 #define CONFIG_SPL_BSS_MAX_SIZE (2*1024) and keep the UBL cfg file untouched -- any future size issue with image or BSS size would imply changing these values and uptating the UBL cfg file. Would that be ok? Yes, that seems good to me, but I could not test it ... I can do a diff of the binaries with and without the patch -- normally, they should be the same except for the U-Boot version identification. Would that do? bye, Heiko Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v9 18/30] nand: mxc: Switch NAND SPL to generic SPL
On Tue, Apr 9, 2013 at 9:30 AM, Fabio Estevam feste...@gmail.com wrote: Just tested v10 on mx31pdk. As reported in v9 I start to get reboots and never reach the prompt. Then I disabled watchdog options in mx31pdk.h and I get the following: U-Boot 2013.04-rc1-14135-gab21c72-dirty (Apr 09 2013 - 09:23:01) CPU: Freescale i.MX31 rev 2.0 at 532 MHz. Reset cause: POR Board: MX31PDK DRAM: 128 MiB NAND: 256 MiB In:serial Out: serial Err: serial Net: (Board hangs here). When I tested v9 and removed watchdog support I was able to get into the U-boot prompt. I just added #define DEBUG in arch/arm/lib/board to start debugging this and for my surprise I can reach the prompt now: U-Boot 2013.04-rc1-14135-gab21c72-dirty (Apr 09 2013 - 09:35:51) U-Boot code: 87F0 - 87F2C34C BSS: - 87F3137C CPU: Freescale i.MX31 rev 2.0 at 532 MHz. Reset cause: POR Board: MX31PDK monitor len: 0003137C ramsize: 0800 TLB table from 87ff to 87ff4000 Top of RAM usable for U-Boot at: 87ff Reserving 196k for U-Boot at: 87fbe000 Reserving 640k for malloc() at: 87f1e000 Reserving 32 Bytes for Board Info at: 87f1dfe0 Reserving 160 Bytes for Global Data at: 87f1df40 New Stack Pointer is: 87f1df30 RAM Configuration: Bank #0: 8000 128 MiB relocation Offset is: 000be000 monitor flash len: 000310F4 Now running in RAM - U-Boot at: 87fbe000 NAND: 256 MiB In:serial Out: serial Err: serial Net: smc911x-0 Hit any key to stop autoboot: 0 MX31PDK U-Boot I remember to have added #define DEBUG in v9 as well, so looks like the behavior between v9 and v10 is consistent. Now we need to understand why the prompt is not reached without #define DEBUG. Regards, Fabio Estevam ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [U-Boot, 1/4] cam_enc_4xx: fix CONFIG_SPL_MAX_SIZE semantics
Hello Albert, on 09.04.2013 14:42, wrote Albert ARIBAUD: Hi Heiko, On Tue, 09 Apr 2013 14:11:38 +0200, Heiko Schocher h...@denx.de wrote: Let us assume I keep 12K. Here is a current build of cam_enc_4xx: text data bss dec hex filename 439526 13148 311092 763766 ba776 ./u-boot 9073840 500 10413 28ad ./spl/u-boot-spl [...] Would that be ok? Yes, that seems good to me, but I could not test it ... I can do a diff of the binaries with and without the patch -- normally, they should be the same except for the U-Boot version identification. Would that do? Yes. I did this too, and see only a diff for the version string. (But not forget to commit your change first, else the -dirty in the version string will insert an offset ;-) bye, Heiko -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [U-Boot, 1/4] cam_enc_4xx: fix CONFIG_SPL_MAX_SIZE semantics
Hi Heiko, On Tue, 09 Apr 2013 15:17:02 +0200, Heiko Schocher h...@denx.de wrote: Hello Albert, on 09.04.2013 14:42, wrote Albert ARIBAUD: Hi Heiko, On Tue, 09 Apr 2013 14:11:38 +0200, Heiko Schocher h...@denx.de wrote: Let us assume I keep 12K. Here is a current build of cam_enc_4xx: text data bss dec hex filename 439526 13148 311092 763766 ba776 ./u-boot 9073 840 500 10413 28ad ./spl/u-boot-spl [...] Would that be ok? Yes, that seems good to me, but I could not test it ... I can do a diff of the binaries with and without the patch -- normally, they should be the same except for the U-Boot version identification. Would that do? Yes. I did this too, and see only a diff for the version string. Thanks -- I've staged the 10K+2K change for V2. (But not forget to commit your change first, else the -dirty in the version string will insert an offset ;-) I actually keep a 'fake_build' branch with a single nifty commit on it that makes almost all version information sources constant (only mkimage resists as it collects the current date and time programmatically, but that's ok, I don't aim for 100% faking. So, whenever I need to do bulk comparisons, I add this commit above the two branches to be compared, and two batch builds later, I can compare the .bins, even if different commit ID and/or local changes are involved. :) bye, Heiko Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 4/4] ARM: fix CONFIG_SPL_MAX_SIZE semantics
Hi Benoît,
On Mon, 8 Apr 2013 23:43:37 +0200 (CEST), Benoît Thébaudeau
benoit.thebaud...@advansee.com wrote:
Hi Albert,
diff --git a/arch/arm/cpu/u-boot-spl.lds b/arch/arm/cpu/u-boot-spl.lds
index 3c0d99c..89ef9ce 100644
--- a/arch/arm/cpu/u-boot-spl.lds
+++ b/arch/arm/cpu/u-boot-spl.lds
@@ -88,6 +88,12 @@ SECTIONS
/DISCARD/ : { *(.gnu*) }
}
-#if defined(CONFIG_SPL_TEXT_BASE) defined(CONFIG_SPL_MAX_SIZE)
-ASSERT(__bss_end (CONFIG_SPL_TEXT_BASE + CONFIG_SPL_MAX_SIZE), SPL image
too big);
+#if defined(CONFIG_SPL_MAX_SIZE)
+ASSERT(__image_copy_end - __image_copy_start (CONFIG_SPL_MAX_SIZE), \
The possible relocation and MMU data is also part of the binary image file, so
that would be __bss_start rather than __image_copy_end above, and README
should
be updated to reflect this.
Actually, mmutable is not used in any SPL; it is used only in targets
h2200, lubbock, palmtc, pxa255_idp and xaeniax, none of which use SPL.
I have just confirmed this with a MAKEALL -a arm and a grep on all map
files.
This presence of mmutable in u-boot-spl.lds is in fact an overlook
that I missed when I created this file from u-boot.lds. I have just
finished verifying that removing the mmutable section altogether does
not change a single bit to any of the 309 ARM platforms currently built
under MAKEALL -a arm.
I'll remove mmutable entries from u-boot-spl.lds in V2.
Amicalement,
--
Albert.
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Re: [U-Boot] [PATCH 4/4] ARM: fix CONFIG_SPL_MAX_SIZE semantics
Hi Albert,
On Tuesday, April 9, 2013 4:23:58 PM, Albert ARIBAUD wrote:
Hi Benoît,
On Mon, 8 Apr 2013 23:43:37 +0200 (CEST), Benoît Thébaudeau
benoit.thebaud...@advansee.com wrote:
Hi Albert,
diff --git a/arch/arm/cpu/u-boot-spl.lds b/arch/arm/cpu/u-boot-spl.lds
index 3c0d99c..89ef9ce 100644
--- a/arch/arm/cpu/u-boot-spl.lds
+++ b/arch/arm/cpu/u-boot-spl.lds
@@ -88,6 +88,12 @@ SECTIONS
/DISCARD/ : { *(.gnu*) }
}
-#if defined(CONFIG_SPL_TEXT_BASE) defined(CONFIG_SPL_MAX_SIZE)
-ASSERT(__bss_end (CONFIG_SPL_TEXT_BASE + CONFIG_SPL_MAX_SIZE), SPL
image
too big);
+#if defined(CONFIG_SPL_MAX_SIZE)
+ASSERT(__image_copy_end - __image_copy_start (CONFIG_SPL_MAX_SIZE), \
The possible relocation and MMU data is also part of the binary image file,
so
that would be __bss_start rather than __image_copy_end above, and README
should
be updated to reflect this.
Actually, mmutable is not used in any SPL; it is used only in targets
h2200, lubbock, palmtc, pxa255_idp and xaeniax, none of which use SPL.
I have just confirmed this with a MAKEALL -a arm and a grep on all map
files.
This presence of mmutable in u-boot-spl.lds is in fact an overlook
that I missed when I created this file from u-boot.lds. I have just
finished verifying that removing the mmutable section altogether does
not change a single bit to any of the 309 ARM platforms currently built
under MAKEALL -a arm.
I'll remove mmutable entries from u-boot-spl.lds in V2.
OK, that's perfect for MMU data, but what about relocation data?
Best regards,
Benoît
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Re: [U-Boot] [PATCH v9 18/30] nand: mxc: Switch NAND SPL to generic SPL
Hi Fabio, On Tuesday, April 9, 2013 2:46:21 PM, Fabio Estevam wrote: On Tue, Apr 9, 2013 at 9:30 AM, Fabio Estevam feste...@gmail.com wrote: Just tested v10 on mx31pdk. As reported in v9 I start to get reboots and never reach the prompt. Then I disabled watchdog options in mx31pdk.h and I get the following: U-Boot 2013.04-rc1-14135-gab21c72-dirty (Apr 09 2013 - 09:23:01) CPU: Freescale i.MX31 rev 2.0 at 532 MHz. Reset cause: POR Board: MX31PDK DRAM: 128 MiB NAND: 256 MiB In:serial Out: serial Err: serial Net: (Board hangs here). When I tested v9 and removed watchdog support I was able to get into the U-boot prompt. I just added #define DEBUG in arch/arm/lib/board to start debugging this and for my surprise I can reach the prompt now: U-Boot 2013.04-rc1-14135-gab21c72-dirty (Apr 09 2013 - 09:35:51) U-Boot code: 87F0 - 87F2C34C BSS: - 87F3137C CPU: Freescale i.MX31 rev 2.0 at 532 MHz. Reset cause: POR Board: MX31PDK monitor len: 0003137C ramsize: 0800 TLB table from 87ff to 87ff4000 Top of RAM usable for U-Boot at: 87ff Reserving 196k for U-Boot at: 87fbe000 Reserving 640k for malloc() at: 87f1e000 Reserving 32 Bytes for Board Info at: 87f1dfe0 Reserving 160 Bytes for Global Data at: 87f1df40 New Stack Pointer is: 87f1df30 RAM Configuration: Bank #0: 8000 128 MiB relocation Offset is: 000be000 monitor flash len: 000310F4 Now running in RAM - U-Boot at: 87fbe000 NAND: 256 MiB In:serial Out: serial Err: serial Net: smc911x-0 Hit any key to stop autoboot: 0 MX31PDK U-Boot I remember to have added #define DEBUG in v9 as well, so looks like the behavior between v9 and v10 is consistent. Now we need to understand why the prompt is not reached without #define DEBUG. CONFIG_SYS_NAND_U_BOOT_SIZE CONFIG_ENV_OFFSET ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v9 18/30] nand: mxc: Switch NAND SPL to generic SPL
On Tuesday, April 9, 2013 4:32:21 PM, Benoît Thébaudeau wrote: Hi Fabio, On Tuesday, April 9, 2013 2:46:21 PM, Fabio Estevam wrote: On Tue, Apr 9, 2013 at 9:30 AM, Fabio Estevam feste...@gmail.com wrote: Just tested v10 on mx31pdk. As reported in v9 I start to get reboots and never reach the prompt. Then I disabled watchdog options in mx31pdk.h and I get the following: U-Boot 2013.04-rc1-14135-gab21c72-dirty (Apr 09 2013 - 09:23:01) CPU: Freescale i.MX31 rev 2.0 at 532 MHz. Reset cause: POR Board: MX31PDK DRAM: 128 MiB NAND: 256 MiB In:serial Out: serial Err: serial Net: (Board hangs here). When I tested v9 and removed watchdog support I was able to get into the U-boot prompt. I just added #define DEBUG in arch/arm/lib/board to start debugging this and for my surprise I can reach the prompt now: U-Boot 2013.04-rc1-14135-gab21c72-dirty (Apr 09 2013 - 09:35:51) U-Boot code: 87F0 - 87F2C34C BSS: - 87F3137C CPU: Freescale i.MX31 rev 2.0 at 532 MHz. Reset cause: POR Board: MX31PDK monitor len: 0003137C ramsize: 0800 TLB table from 87ff to 87ff4000 Top of RAM usable for U-Boot at: 87ff Reserving 196k for U-Boot at: 87fbe000 Reserving 640k for malloc() at: 87f1e000 Reserving 32 Bytes for Board Info at: 87f1dfe0 Reserving 160 Bytes for Global Data at: 87f1df40 New Stack Pointer is: 87f1df30 RAM Configuration: Bank #0: 8000 128 MiB relocation Offset is: 000be000 monitor flash len: 000310F4 Now running in RAM - U-Boot at: 87fbe000 NAND: 256 MiB In:serial Out: serial Err: serial Net: smc911x-0 Hit any key to stop autoboot: 0 MX31PDK U-Boot I remember to have added #define DEBUG in v9 as well, so looks like the behavior between v9 and v10 is consistent. Now we need to understand why the prompt is not reached without #define DEBUG. CONFIG_SYS_NAND_U_BOOT_SIZE CONFIG_ENV_OFFSET Please discard this message. Benoît ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v9 18/30] nand: mxc: Switch NAND SPL to generic SPL
Hi Fabio, On Tuesday, April 9, 2013 2:46:21 PM, Fabio Estevam wrote: On Tue, Apr 9, 2013 at 9:30 AM, Fabio Estevam feste...@gmail.com wrote: Just tested v10 on mx31pdk. As reported in v9 I start to get reboots and never reach the prompt. Then I disabled watchdog options in mx31pdk.h and I get the following: U-Boot 2013.04-rc1-14135-gab21c72-dirty (Apr 09 2013 - 09:23:01) CPU: Freescale i.MX31 rev 2.0 at 532 MHz. Reset cause: POR Board: MX31PDK DRAM: 128 MiB NAND: 256 MiB In:serial Out: serial Err: serial Net: (Board hangs here). When I tested v9 and removed watchdog support I was able to get into the U-boot prompt. I just added #define DEBUG in arch/arm/lib/board to start debugging this and for my surprise I can reach the prompt now: U-Boot 2013.04-rc1-14135-gab21c72-dirty (Apr 09 2013 - 09:35:51) U-Boot code: 87F0 - 87F2C34C BSS: - 87F3137C CPU: Freescale i.MX31 rev 2.0 at 532 MHz. Reset cause: POR Board: MX31PDK monitor len: 0003137C ramsize: 0800 TLB table from 87ff to 87ff4000 Top of RAM usable for U-Boot at: 87ff Reserving 196k for U-Boot at: 87fbe000 Reserving 640k for malloc() at: 87f1e000 Reserving 32 Bytes for Board Info at: 87f1dfe0 Reserving 160 Bytes for Global Data at: 87f1df40 New Stack Pointer is: 87f1df30 RAM Configuration: Bank #0: 8000 128 MiB relocation Offset is: 000be000 monitor flash len: 000310F4 Now running in RAM - U-Boot at: 87fbe000 NAND: 256 MiB In:serial Out: serial Err: serial Net: smc911x-0 Hit any key to stop autoboot: 0 MX31PDK U-Boot I remember to have added #define DEBUG in v9 as well, so looks like the behavior between v9 and v10 is consistent. Now we need to understand why the prompt is not reached without #define DEBUG. Can you try different values for the following configs in mx31pdk.h? - CONFIG_SYS_NAND_U_BOOT_SIZE - CONFIG_SPL_TEXT_BASE - CONFIG_SYS_TEXT_BASE - (CONFIG_ENV_OFFSET) - (CONFIG_ENV_OFFSET_REDUND) I would try: - 0x4 for CONFIG_SYS_NAND_U_BOOT_SIZE - 0x8600 for CONFIG_SPL_TEXT_BASE - 0x8700 for CONFIG_SYS_TEXT_BASE Best regards, Benoît ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/3] OMAP3/4/5/AM33xx: Correct logic for checking FAT or RAW MMC
Tom == Tom Rini tr...@ti.com writes: Tom In the case of booting from certain peripherals, such as UART, we must Tom not see what the device descriptor says for RAW or FAT mode because in Tom addition to being nonsensical, it leads to a hang. This is why we have Tom a test currently for the boot mode being within range. The problem Tom however is that on some platforms we get MMC2_2 as the boot mode and not Tom the defined value for MMC2, and in others we get the value for MMC2_2. Tom This is required to fix eMMC booting on omap5_uevm. Tom Tested on am335x_evm (UART, NAND, SD), omap3_beagle (NAND, SD on Tom classic, SD only on xM rev C5) and omap5_uevm (SD, eMMC). Tom Signed-off-by: Tom Rini tr...@ti.com Tom --- Tom arch/arm/cpu/armv7/omap-common/lowlevel_init.S | 10 +++--- Tom arch/arm/include/asm/arch-am33xx/spl.h |3 +++ Tom arch/arm/include/asm/arch-omap3/spl.h |3 +++ Tom arch/arm/include/asm/arch-omap4/spl.h |2 ++ Tom arch/arm/include/asm/arch-omap5/spl.h |2 ++ Tom 5 files changed, 17 insertions(+), 3 deletions(-) Tom diff --git a/arch/arm/cpu/armv7/omap-common/lowlevel_init.S b/arch/arm/cpu/armv7/omap-common/lowlevel_init.S Tom index b933fe8..90b3c8a 100644 Tom --- a/arch/arm/cpu/armv7/omap-common/lowlevel_init.S Tom +++ b/arch/arm/cpu/armv7/omap-common/lowlevel_init.S Tom @@ -60,10 +60,14 @@ ENTRY(save_boot_params) Tom ldr r3, =boot_params Tom strbr2, [r3, #BOOT_DEVICE_OFFSET] @ spl_boot_device - r1 Tom - /* boot mode is passed only for devices that can raw/fat mode */ Tom - cmp r2, #BOOT_DEVICE_XIP Tom + /* Tom + * boot mode is only valid for device that can be raw or FAT booted. Tom + * in other cases it may be fatal to look. While platforms differ Tom + * in the values used for each MMC slot, they are contiguous. Tom + */ Tom + cmp r2, #MMC_BOOT_DEVICES_START Tom blt 2f Tom - cmp r2, #BOOT_DEVICE_MMC2 Tom + cmp r2, #MMC_BOOT_DEVICES_END Tom bgt 2f Tom /* Store the boot mode (raw/FAT) in omap_bootmode */ Tom ldr r2, [r0, #DEV_DESC_PTR_OFFSET] @ get the device descriptor ptr Tom diff --git a/arch/arm/include/asm/arch-am33xx/spl.h b/arch/arm/include/asm/arch-am33xx/spl.h Tom index f60b086..14a2c7c 100644 Tom --- a/arch/arm/include/asm/arch-am33xx/spl.h Tom +++ b/arch/arm/include/asm/arch-am33xx/spl.h Tom @@ -37,4 +37,7 @@ Tom #define BOOT_DEVICE_USBETH 68 Tom #define BOOT_DEVICE_CPGMAC 70 Tom #define BOOT_DEVICE_MMC2_2 0xFF Tom + Tom +#define MMC_BOOT_DEVICES_START BOOT_DEVICE_MMC1 Tom +#define MMC_BOOT_DEVICES_END BOOT_DEVICE_MMC2 Doesn't this break ti814x with the funky inverted mmc1/mmc2? -- Bye, Peter Korsgaard ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v9 18/30] nand: mxc: Switch NAND SPL to generic SPL
On Tuesday, April 9, 2013 4:38:23 PM, Benoît Thébaudeau wrote: Hi Fabio, On Tuesday, April 9, 2013 2:46:21 PM, Fabio Estevam wrote: On Tue, Apr 9, 2013 at 9:30 AM, Fabio Estevam feste...@gmail.com wrote: Just tested v10 on mx31pdk. As reported in v9 I start to get reboots and never reach the prompt. Then I disabled watchdog options in mx31pdk.h and I get the following: U-Boot 2013.04-rc1-14135-gab21c72-dirty (Apr 09 2013 - 09:23:01) CPU: Freescale i.MX31 rev 2.0 at 532 MHz. Reset cause: POR Board: MX31PDK DRAM: 128 MiB NAND: 256 MiB In:serial Out: serial Err: serial Net: (Board hangs here). When I tested v9 and removed watchdog support I was able to get into the U-boot prompt. I just added #define DEBUG in arch/arm/lib/board to start debugging this and for my surprise I can reach the prompt now: U-Boot 2013.04-rc1-14135-gab21c72-dirty (Apr 09 2013 - 09:35:51) U-Boot code: 87F0 - 87F2C34C BSS: - 87F3137C CPU: Freescale i.MX31 rev 2.0 at 532 MHz. Reset cause: POR Board: MX31PDK monitor len: 0003137C ramsize: 0800 TLB table from 87ff to 87ff4000 Top of RAM usable for U-Boot at: 87ff Reserving 196k for U-Boot at: 87fbe000 Reserving 640k for malloc() at: 87f1e000 Reserving 32 Bytes for Board Info at: 87f1dfe0 Reserving 160 Bytes for Global Data at: 87f1df40 New Stack Pointer is: 87f1df30 RAM Configuration: Bank #0: 8000 128 MiB relocation Offset is: 000be000 monitor flash len: 000310F4 Now running in RAM - U-Boot at: 87fbe000 NAND: 256 MiB In:serial Out: serial Err: serial Net: smc911x-0 Hit any key to stop autoboot: 0 MX31PDK U-Boot I remember to have added #define DEBUG in v9 as well, so looks like the behavior between v9 and v10 is consistent. Now we need to understand why the prompt is not reached without #define DEBUG. Can you try different values for the following configs in mx31pdk.h? - CONFIG_SYS_NAND_U_BOOT_SIZE - CONFIG_SPL_TEXT_BASE - CONFIG_SYS_TEXT_BASE - (CONFIG_ENV_OFFSET) - (CONFIG_ENV_OFFSET_REDUND) I would try: - 0x4 for CONFIG_SYS_NAND_U_BOOT_SIZE - 0x8600 for CONFIG_SPL_TEXT_BASE - 0x8700 for CONFIG_SYS_TEXT_BASE I have retrieved your previous test trace: --- U-Boot 2013.01 (Feb 22 2013 - 16:25:48) CPU: Freescale i.MX31 rev 2.0 at 532 MHz. Reset cause: POR Board: MX31PDK DRAM: 128 MiB (hangs here). --- So it does not hang at the same step. Can you try to disable CONFIG_CMD_NET or to comment out eth_initialize() in arch/arm/lib/board.c? Do you know if something has changed in this function recently, or if there is something about it that has not yet been merged in the arm tree? Best regards, Benoît ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [Patch v2] cmd/gpt: Support gpt command for all devices
From: Egbert Eich e...@suse.com
The gpt command was only implemented for mmc devices. There is no reason
why this command should not be generalized and be applied all other
storage device classes.
This change both simplifies the implementation and eliminates a
build failure for systems that don't support mmcs.
Signed-off-by: Egbert Eich e...@suse.com
---
Changes for v2:
- Coding style cleanup.
common/cmd_gpt.c | 44 +++-
1 file changed, 19 insertions(+), 25 deletions(-)
diff --git a/common/cmd_gpt.c b/common/cmd_gpt.c
index efd7934..3594dca 100644
--- a/common/cmd_gpt.c
+++ b/common/cmd_gpt.c
@@ -23,7 +23,6 @@
#include common.h
#include malloc.h
#include command.h
-#include mmc.h
#include part_efi.h
#include exports.h
#include linux/ctype.h
@@ -134,7 +133,7 @@ static int set_gpt_info(block_dev_desc_t *dev_desc,
int errno = 0;
uint64_t size_ll, start_ll;
- debug(%s: MMC lba num: 0x%x %d\n, __func__,
+ debug(%s: lba num: 0x%x %d\n, __func__,
(unsigned int)dev_desc-lba, (unsigned int)dev_desc-lba);
if (str_part == NULL)
@@ -247,25 +246,18 @@ err:
return errno;
}
-static int gpt_mmc_default(int dev, const char *str_part)
+static int gpt_default(block_dev_desc_t *blk_dev_desc, const char *str_part)
{
int ret;
char *str_disk_guid;
u8 part_count = 0;
disk_partition_t *partitions = NULL;
- struct mmc *mmc = find_mmc_device(dev);
-
- if (mmc == NULL) {
- printf(%s: mmc dev %d NOT available\n, __func__, dev);
- return CMD_RET_FAILURE;
- }
-
if (!str_part)
return -1;
/* fill partitions */
- ret = set_gpt_info(mmc-block_dev, str_part,
+ ret = set_gpt_info(blk_dev_desc, str_part,
str_disk_guid, partitions, part_count);
if (ret) {
if (ret == -1)
@@ -278,7 +270,7 @@ static int gpt_mmc_default(int dev, const char *str_part)
}
/* save partitions layout to disk */
- gpt_restore(mmc-block_dev, str_disk_guid, partitions, part_count);
+ gpt_restore(blk_dev_desc, str_disk_guid, partitions, part_count);
free(str_disk_guid);
free(partitions);
@@ -306,20 +298,22 @@ static int do_gpt(cmd_tbl_t *cmdtp, int flag, int argc,
char * const argv[])
/* command: 'write' */
if ((strcmp(argv[1], write) == 0) (argc == 5)) {
- /* device: 'mmc' */
- if (strcmp(argv[2], mmc) == 0) {
- /* check if 'dev' is a number */
- for (pstr = argv[3]; *pstr != '\0'; pstr++)
- if (!isdigit(*pstr)) {
- printf('%s' is not a number\n,
- argv[3]);
- return CMD_RET_USAGE;
- }
- dev = (int)simple_strtoul(argv[3], NULL, 10);
- /* write to mmc */
- if (gpt_mmc_default(dev, argv[4]))
- return CMD_RET_FAILURE;
+ char *ep;
+ block_dev_desc_t *blk_dev_desc;
+ dev = (int)simple_strtoul(argv[3], NULL, 10);
+ if (*ep) {
+ printf('%s' is not a number\n, argv[3]);
+ return CMD_RET_USAGE;
}
+ blk_dev_desc = get_dev(argv[2], dev);
+ if (!blk_dev_desc) {
+ printf(%s: %s dev %d NOT available\n,
+ __func__, argv[2], dev);
+ return CMD_RET_FAILURE;
+ }
+
+ if (gpt_default(blk_dev_desc, argv[4]))
+ return CMD_RET_FAILURE;
} else {
return CMD_RET_USAGE;
}
--
1.8.1.4
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Re: [U-Boot] [PATCH v9 18/30] nand: mxc: Switch NAND SPL to generic SPL
On Tuesday, April 9, 2013 5:04:45 PM, Benoît Thébaudeau wrote: On Tuesday, April 9, 2013 4:38:23 PM, Benoît Thébaudeau wrote: Hi Fabio, On Tuesday, April 9, 2013 2:46:21 PM, Fabio Estevam wrote: On Tue, Apr 9, 2013 at 9:30 AM, Fabio Estevam feste...@gmail.com wrote: Just tested v10 on mx31pdk. As reported in v9 I start to get reboots and never reach the prompt. Then I disabled watchdog options in mx31pdk.h and I get the following: U-Boot 2013.04-rc1-14135-gab21c72-dirty (Apr 09 2013 - 09:23:01) CPU: Freescale i.MX31 rev 2.0 at 532 MHz. Reset cause: POR Board: MX31PDK DRAM: 128 MiB NAND: 256 MiB In:serial Out: serial Err: serial Net: (Board hangs here). When I tested v9 and removed watchdog support I was able to get into the U-boot prompt. I just added #define DEBUG in arch/arm/lib/board to start debugging this and for my surprise I can reach the prompt now: U-Boot 2013.04-rc1-14135-gab21c72-dirty (Apr 09 2013 - 09:35:51) U-Boot code: 87F0 - 87F2C34C BSS: - 87F3137C CPU: Freescale i.MX31 rev 2.0 at 532 MHz. Reset cause: POR Board: MX31PDK monitor len: 0003137C ramsize: 0800 TLB table from 87ff to 87ff4000 Top of RAM usable for U-Boot at: 87ff Reserving 196k for U-Boot at: 87fbe000 Reserving 640k for malloc() at: 87f1e000 Reserving 32 Bytes for Board Info at: 87f1dfe0 Reserving 160 Bytes for Global Data at: 87f1df40 New Stack Pointer is: 87f1df30 RAM Configuration: Bank #0: 8000 128 MiB relocation Offset is: 000be000 monitor flash len: 000310F4 Now running in RAM - U-Boot at: 87fbe000 NAND: 256 MiB In:serial Out: serial Err: serial Net: smc911x-0 Hit any key to stop autoboot: 0 MX31PDK U-Boot I remember to have added #define DEBUG in v9 as well, so looks like the behavior between v9 and v10 is consistent. Now we need to understand why the prompt is not reached without #define DEBUG. Can you try different values for the following configs in mx31pdk.h? - CONFIG_SYS_NAND_U_BOOT_SIZE - CONFIG_SPL_TEXT_BASE - CONFIG_SYS_TEXT_BASE - (CONFIG_ENV_OFFSET) - (CONFIG_ENV_OFFSET_REDUND) I would try: - 0x4 for CONFIG_SYS_NAND_U_BOOT_SIZE - 0x8600 for CONFIG_SPL_TEXT_BASE - 0x8700 for CONFIG_SYS_TEXT_BASE I have retrieved your previous test trace: --- U-Boot 2013.01 (Feb 22 2013 - 16:25:48) CPU: Freescale i.MX31 rev 2.0 at 532 MHz. Reset cause: POR Board: MX31PDK DRAM: 128 MiB (hangs here). --- So it does not hang at the same step. Can you try to disable CONFIG_CMD_NET or to comment out eth_initialize() in arch/arm/lib/board.c? Do you know if something has changed in this function recently, or if there is something about it that has not yet been merged in the arm tree? gd-bd might also be broken for some reason. Can you print it with and without DEBUG, right before the call to eth_initialize()? Also, can you try to apply this patch? http://patchwork.ozlabs.org/patch/233964/ Best regards, Benoît ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [Patch v2] cmd/gpt: Support gpt command for all devices
-BEGIN PGP SIGNED MESSAGE- Hash: SHA1 On 04/09/2013 11:11 AM, Egbert Eich wrote: From: Egbert Eich e...@suse.com The gpt command was only implemented for mmc devices. There is no reason why this command should not be generalized and be applied all other storage device classes. This change both simplifies the implementation and eliminates a build failure for systems that don't support mmcs. Signed-off-by: Egbert Eich e...@suse.com --- Changes for v2: - Coding style cleanup. common/cmd_gpt.c | 44 +++- 1 file changed, 19 insertions(+), 25 deletions(-) Reviewed-by: Tom Rini tr...@ti.com Thanks! - -- Tom -BEGIN PGP SIGNATURE- Version: GnuPG v1.4.11 (GNU/Linux) Comment: Using GnuPG with Thunderbird - http://www.enigmail.net/ iQIcBAEBAgAGBQJRZDOLAAoJENk4IS6UOR1WdAwP/jUM63BXUnoe1ZdL40MjjK8W ML48SoHv14unwjHB3Nr5fl4EGQOGpWN18HB7h/tGVdcZPCu6MaP3VQR+dV9iWDlh ijwv0b390ojj2Hb9tqOy3VEt+v/jrOJOcfDdgheDkfs/82d6NysJnbxbmfCTbtFv B68ToxYNKv2LirLz/HC4lUYWLekfwLSgqK+lcwA0WqgylnUuANa05d+VD8LUzPem bPDzn7dhoMmhaCqfzyRhPCsdT3RREGeFNqQ3rkhmdXZ359Zj7ex2z0oVzzzxbWPy mes60Hj9l6zRayiR2NQ4eiB31jJWM5EPj2mzKCV/XGIj7C/unecbfbt8JxJlTnUg gkT8Y1b3vBSf18Zh6GrUBJRcofVbfj3e5hQJ8t36ItQqX8iPJu0lVCXVed8y+67I u+WCQ6LIZroSYUM+f+U2S2ZPyRMq2gyp9C+P6VPXtQTL6v2qZEezZhsKzlNwKiql UDZLMK3KafaWY52hXrld5d49fPpaufHS+2CfWR4+2tM2sFgHhXjCuBVwwcL7iJF1 E1gtJF77sFnGk8Dwcb/WGGbqbLw6kc+cMyIMKowLulvluQsbPkl2UWen4YI4Kom2 7+Z4wLVp9MExKAZ7F5ySjkCJ5LwE3VE8COZCzOfNYE4dfun2IPkGHguywGG/udQK D8YnUvj3CfcACvYC/ZBt =PcsZ -END PGP SIGNATURE- ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 7/8] mtd: nand: add driver for diskonchip g4 nand flash
On 04/08/2013 05:59 PM, Scott Wood wrote: On 04/08/2013 01:25:01 AM, Marek Vasut wrote: Dear Mike Dunn, This patch adds a driver for the diskonchip G4 nand flash device. It is based on the driver from the linux kernel. This also includes a separate SPL driver. A separate SPL driver is used because the device operates in a different mode (reliable mode) when loading a boot image, and also because the storage format of the boot image is different from normal data (pages are stored redundantly). The SPL driver basically mimics how a typical IPL reads data from the device. The special operating mode and storage format are used to compensate for the fact that the IPL does not contain the BCH ecc decoding algorithm (due to size constraints). Although the u-boot SPL *could* use ecc, it operates like an IPL for the sake of simplicity and uniformity, since the IPL and SPL share the task of loading the u-boot image. As a side benefit, the SPL driver is very small. Signed-off-by: Mike Dunn miked...@newsguy.com Try #ifdef U_BOOT instead of #if 0, no? Just remove the code that would be hidden by #if 0. Besides making the U-Boot code easier to read, we *want* to get a conflict marker if we try to merge in a new upstream version, and those lines were changed in Linux. This would give us an opportunity to see if similar changes are needed to the U-Boot version of the code. OK. Another option would be to introduce for_each_set_bit in U-Boot. This was my first inclination, but it looked like a lot of work across multiple architectures, so I let it go. Thanks, Mike ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/3] OMAP3/4/5/AM33xx: Correct logic for checking FAT or RAW MMC
-BEGIN PGP SIGNED MESSAGE- Hash: SHA1 On 04/09/2013 10:52 AM, Peter Korsgaard wrote: Tom == Tom Rini tr...@ti.com writes: Tom In the case of booting from certain peripherals, such as UART, we must Tom not see what the device descriptor says for RAW or FAT mode because in Tom addition to being nonsensical, it leads to a hang. This is why we have Tom a test currently for the boot mode being within range. The problem Tom however is that on some platforms we get MMC2_2 as the boot mode and not Tom the defined value for MMC2, and in others we get the value for MMC2_2. Tom This is required to fix eMMC booting on omap5_uevm. Tom Tested on am335x_evm (UART, NAND, SD), omap3_beagle (NAND, SD on Tom classic, SD only on xM rev C5) and omap5_uevm (SD, eMMC). Tom Signed-off-by: Tom Rini tr...@ti.com Tom --- Tom arch/arm/cpu/armv7/omap-common/lowlevel_init.S | 10 +++--- Tom arch/arm/include/asm/arch-am33xx/spl.h |3 +++ Tom arch/arm/include/asm/arch-omap3/spl.h |3 +++ Tom arch/arm/include/asm/arch-omap4/spl.h |2 ++ Tom arch/arm/include/asm/arch-omap5/spl.h |2 ++ Tom 5 files changed, 17 insertions(+), 3 deletions(-) Tom diff --git a/arch/arm/cpu/armv7/omap-common/lowlevel_init.S b/arch/arm/cpu/armv7/omap-common/lowlevel_init.S Tom index b933fe8..90b3c8a 100644 Tom --- a/arch/arm/cpu/armv7/omap-common/lowlevel_init.S Tom +++ b/arch/arm/cpu/armv7/omap-common/lowlevel_init.S Tom @@ -60,10 +60,14 @@ ENTRY(save_boot_params) Tomldr r3, =boot_params Tom strb r2, [r3, #BOOT_DEVICE_OFFSET] @ spl_boot_device - r1 Tom -/* boot mode is passed only for devices that can raw/fat mode */ Tom -cmp r2, #BOOT_DEVICE_XIP Tom + /* Tom + * boot mode is only valid for device that can be raw or FAT booted. Tom + * in other cases it may be fatal to look. While platforms differ Tom + * in the values used for each MMC slot, they are contiguous. Tom + */ Tom + cmp r2, #MMC_BOOT_DEVICES_START Tom blt 2f Tom - cmp r2, #BOOT_DEVICE_MMC2 Tom +cmp r2, #MMC_BOOT_DEVICES_END Tombgt 2f Tom /* Store the boot mode (raw/FAT) in omap_bootmode */ Tomldr r2, [r0, #DEV_DESC_PTR_OFFSET] @ get the device descriptor ptr Tom diff --git a/arch/arm/include/asm/arch-am33xx/spl.h b/arch/arm/include/asm/arch-am33xx/spl.h Tom index f60b086..14a2c7c 100644 Tom --- a/arch/arm/include/asm/arch-am33xx/spl.h Tom +++ b/arch/arm/include/asm/arch-am33xx/spl.h Tom @@ -37,4 +37,7 @@ Tom #define BOOT_DEVICE_USBETH 68 Tom #define BOOT_DEVICE_CPGMAC70 Tom #define BOOT_DEVICE_MMC2_2 0xFF Tom + Tom +#define MMC_BOOT_DEVICES_START BOOT_DEVICE_MMC1 Tom +#define MMC_BOOT_DEVICES_END BOOT_DEVICE_MMC2 Doesn't this break ti814x with the funky inverted mmc1/mmc2? That's probably true, dang. I knew OMAP3 also had them swapped, number-wise but didn't recall until you said this that it doesn't use that code at all. I'll V2 this part. Thanks! - -- Tom -BEGIN PGP SIGNATURE- Version: GnuPG v1.4.11 (GNU/Linux) Comment: Using GnuPG with Thunderbird - http://www.enigmail.net/ iQIcBAEBAgAGBQJRZDY4AAoJENk4IS6UOR1WUBoP/1wPoJ5C0ZCSpEDmm7YFs5b2 XaafK0dIJ/aw7K264vYY8tHBj/ku6mbgNOvfRUL9rxGAPPStESMQynkwF/H7llbd 7GkFlsWpLAgotPnCSwHGqQnApCeUeu0BGCAGvaB8NK0uFlU+D0bsWBdgRe/sML+m LjF0/2eQmm2rTo8ifkDTvCdldaeyGqUo0amefEvfW2cLMxPlYGWcfPh/MW1X35ib RnnBUhdVM38XPKmktjSQMQ4IBkLnd2Hu64KFkZl3ejyMPDjr/uOkm+1UawL34IPH wgSC5Y1+w7HvnxM+D3pre4yrpRSYq+dcg3m9CLb7HcrGFCjLxtTEEcy6DOCF3RG0 aK62JQ0itrXcGCnwMYO6t/w7JlNj/flqCTQW4qU4HJ/ixaICRrg30IePqqcJ0Rj0 69EA4BjgR8JhRZOWRuCkwirz0LQpg7DY43Ioax7EmZ6qjve7/ryEnPxdfSEWTPgr ZcqhsYCwoc0wkADW894UveUW49qXhQCBR0C1eXbynfbpdWSu0ObHX4ErAH1JP4x/ ihtuMZAoTcpYTM0b/Fg+A9t45QhIZBMRKLWar4h5zFrMGyfIODPUjXLqJRSI6Lef kTcUZY9Fy837Vok1NlllTMFxGd8Ot5mRgDehvZiZlTjzbRUfPdC212NUQQ/px7C8 7KPGRHhQds5Fsur7bnXJ =2NME -END PGP SIGNATURE- ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] am335x/ti814x: Correct MMC_BOOT_DEVICES_START/END
Given that on TI814x we have MMC1/2 swapped, we also need to swap them in MMC_BOOT_DEVICES_START/END Reported-by: Peter Korsgaard jac...@sunsite.dk Signed-off-by: Tom Rini tr...@ti.com --- arch/arm/include/asm/arch-am33xx/spl.h |5 + 1 file changed, 5 insertions(+) diff --git a/arch/arm/include/asm/arch-am33xx/spl.h b/arch/arm/include/asm/arch-am33xx/spl.h index 14a2c7c..4c23b27 100644 --- a/arch/arm/include/asm/arch-am33xx/spl.h +++ b/arch/arm/include/asm/arch-am33xx/spl.h @@ -38,6 +38,11 @@ #define BOOT_DEVICE_CPGMAC 70 #define BOOT_DEVICE_MMC2_2 0xFF +#ifdef CONFIG_AM33XX #define MMC_BOOT_DEVICES_START BOOT_DEVICE_MMC1 #define MMC_BOOT_DEVICES_END BOOT_DEVICE_MMC2 +#elif defined(CONFIG_TI814X) +#define MMC_BOOT_DEVICES_START BOOT_DEVICE_MMC2 +#define MMC_BOOT_DEVICES_END BOOT_DEVICE_MMC1 +#endif #endif -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [Patch v2] disk/part_dos: check harder for partition table
From: Egbert Eich e...@suse.com
Devices that used to have a whole disk FAT filesystem but got then
partitioned will most likely still have a FAT or FAT32 signature
in the first sector as this sector does not get overwritten by
a partitioning tool (otherwise the tool would risk to kill the mbr).
The current partition search algorithm will erronously detects such
a device as a raw FAT device.
Instead of looking for the FAT or FAT32 signatures immediately we
use the same algorithm as used by the Linux kernel and first check
for a valid boot indicator flag on each of the 4 partitions.
If the value of this flag is invalid for the first entry we then
do the raw partition check.
If the flag for any higher partition is wrong we assume the device
is neiter a MBR nor PBR device.
Signed-off-by: Egbert Eich e...@suse.com
---
Changes for v2:
- Coding style fixes.
disk/part_dos.c | 19 ---
1 file changed, 16 insertions(+), 3 deletions(-)
diff --git a/disk/part_dos.c b/disk/part_dos.c
index 37087a6..ab984cd 100644
--- a/disk/part_dos.c
+++ b/disk/part_dos.c
@@ -74,13 +74,26 @@ static void print_one_part(dos_partition_t *p, int
ext_part_sector,
static int test_block_type(unsigned char *buffer)
{
+ int slot;
+ struct dos_partition *p;
+
if((buffer[DOS_PART_MAGIC_OFFSET + 0] != 0x55) ||
(buffer[DOS_PART_MAGIC_OFFSET + 1] != 0xaa) ) {
return (-1);
} /* no DOS Signature at all */
- if (strncmp((char *)buffer[DOS_PBR_FSTYPE_OFFSET],FAT,3)==0 ||
- strncmp((char *)buffer[DOS_PBR32_FSTYPE_OFFSET],FAT32,5)==0) {
- return DOS_PBR; /* is PBR */
+ p = (struct dos_partition *)buffer[DOS_PART_TBL_OFFSET];
+ for (slot = 0; slot 3; slot++) {
+ if (p-boot_ind != 0 p-boot_ind != 0x80) {
+ if (!slot
+ (strncmp((char *)buffer[DOS_PBR_FSTYPE_OFFSET],
+FAT, 3) == 0 ||
+strncmp((char *)buffer[DOS_PBR32_FSTYPE_OFFSET],
+FAT32, 5) == 0)) {
+ return DOS_PBR; /* is PBR */
+ } else {
+ return -1;
+ }
+ }
}
return DOS_MBR; /* Is MBR */
}
--
1.8.1.4
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Re: [U-Boot] PPC4XX Custom Board - Failing to read I2C
Greg, On 08.04.2013 21:54, txcotrader wrote: Yes, I am working with a 460SX and a board based off of AMCC Eiger (unsupported as of 2010). 460SX is quite untested these days I'm afraid. I don't have such a board here as well. IICx_STS Register settings: 04 = MDBF Full = Master data buffer contains data 40 = IRQA Active = An IIC interrrupt has been sent to the UIC I'm clearing the IIC register early on in my code: mtdcr(UIC0SR, 0x); /* clear all */ mtdcr(UIC0ER, 0x); /* disable all */ mtdcr(UIC0CR, 0x0005); /* ATI UIC1 crit are critical */ mtdcr(UIC0PR, 0x); /* per ref-board manual */ mtdcr(UIC0TR, 0x); /* per ref-board manual */ mtdcr(UIC0VR, 0x); /* int31 highest, base=0x000 */ mtdcr(UIC0SR, 0x); /* clear all */ mtdcr(UIC1SR, 0x); /* clear all */ mtdcr(UIC1ER, 0x); /* disable all */ mtdcr(UIC1CR, 0x); /* all non-critical */ mtdcr(UIC1PR, 0x); /* per ref-board manual */ mtdcr(UIC1TR, 0x); /* per ref-board manual */ mtdcr(UIC1VR, 0x); /* int31 highest, base=0x000 */ mtdcr(UIC1SR, 0x); /* clear all */ Ughh! This is not IIC (I2C) but UIC released code. So its for the interrupt controller and not I2C controller. But nevertheless this should not matter. I'm really not sure what to look for at this point, any additional tips you might have would be extremely helpful. I truly appreciate your help to this point. As mentioned above I don't have such a board here, so I can't really test anything. Sorry. Best regards, Stefan ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [Patch v2] disk/gpt: Fix GPT partition handling for blocksize != 512
From: Egbert Eich e...@suse.com
Disks beyond 2T in size use blocksizes of 4096 bytes. However a lot of
code in u-boot still assumes a 512 byte blocksize.
This patch fixes the handling of GPTs.
Signed-off-by: Egbert Eich e...@suse.com
---
Changes for v2:
- Coding style fixes.
disk/part_efi.c| 38 ++
include/common.h | 11 +--
include/part.h | 4
include/part_efi.h | 2 --
4 files changed, 35 insertions(+), 20 deletions(-)
diff --git a/disk/part_efi.c b/disk/part_efi.c
index e9987f0..5986589 100644
--- a/disk/part_efi.c
+++ b/disk/part_efi.c
@@ -115,7 +115,7 @@ static inline int is_bootable(gpt_entry *p)
void print_part_efi(block_dev_desc_t * dev_desc)
{
- ALLOC_CACHE_ALIGN_BUFFER(gpt_header, gpt_head, 1);
+ ALLOC_CACHE_ALIGN_BUFFER_PAD(gpt_header, gpt_head, 1, dev_desc-blksz);
gpt_entry *gpt_pte = NULL;
int i = 0;
char uuid[37];
@@ -162,7 +162,7 @@ void print_part_efi(block_dev_desc_t * dev_desc)
int get_partition_info_efi(block_dev_desc_t * dev_desc, int part,
disk_partition_t * info)
{
- ALLOC_CACHE_ALIGN_BUFFER(gpt_header, gpt_head, 1);
+ ALLOC_CACHE_ALIGN_BUFFER_PAD(gpt_header, gpt_head, 1, dev_desc-blksz);
gpt_entry *gpt_pte = NULL;
/* part argument must be at least 1 */
@@ -190,7 +190,7 @@ int get_partition_info_efi(block_dev_desc_t * dev_desc, int
part,
/* The ending LBA is inclusive, to calculate size, add 1 to it */
info-size = ((u64)le64_to_cpu(gpt_pte[part - 1].ending_lba) + 1)
- info-start;
- info-blksz = GPT_BLOCK_SIZE;
+ info-blksz = dev_desc-blksz;
sprintf((char *)info-name, %s,
print_efiname(gpt_pte[part - 1]));
@@ -210,7 +210,7 @@ int get_partition_info_efi(block_dev_desc_t * dev_desc, int
part,
int test_part_efi(block_dev_desc_t * dev_desc)
{
- ALLOC_CACHE_ALIGN_BUFFER(legacy_mbr, legacymbr, 1);
+ ALLOC_CACHE_ALIGN_BUFFER_PAD(legacy_mbr, legacymbr, 1, dev_desc-blksz);
/* Read legacy MBR from block 0 and validate it */
if ((dev_desc-block_read(dev_desc-dev, 0, 1, (ulong *)legacymbr) != 1)
@@ -311,9 +311,8 @@ static int string_uuid(char *uuid, u8 *dst)
int write_gpt_table(block_dev_desc_t *dev_desc,
gpt_header *gpt_h, gpt_entry *gpt_e)
{
- const int pte_blk_num = (gpt_h-num_partition_entries
- * sizeof(gpt_entry)) / dev_desc-blksz;
-
+ const int pte_blk_cnt = BLOCK_CNT((gpt_h-num_partition_entries
+ * sizeof(gpt_entry)), dev_desc);
u32 calc_crc32;
u64 val;
@@ -336,8 +335,8 @@ int write_gpt_table(block_dev_desc_t *dev_desc,
if (dev_desc-block_write(dev_desc-dev, 1, 1, gpt_h) != 1)
goto err;
- if (dev_desc-block_write(dev_desc-dev, 2, pte_blk_num, gpt_e)
- != pte_blk_num)
+ if (dev_desc-block_write(dev_desc-dev, 2, pte_blk_cnt, gpt_e)
+ != pte_blk_cnt)
goto err;
/* recalculate the values for the Second GPT Header */
@@ -352,7 +351,7 @@ int write_gpt_table(block_dev_desc_t *dev_desc,
if (dev_desc-block_write(dev_desc-dev,
le32_to_cpu(gpt_h-last_usable_lba + 1),
- pte_blk_num, gpt_e) != pte_blk_num)
+ pte_blk_cnt, gpt_e) != pte_blk_cnt)
goto err;
if (dev_desc-block_write(dev_desc-dev,
@@ -462,13 +461,18 @@ int gpt_restore(block_dev_desc_t *dev_desc, char
*str_disk_guid,
{
int ret;
- gpt_header *gpt_h = calloc(1, sizeof(gpt_header));
+ gpt_header *gpt_h = calloc(1, PAD_TO_BLOCKSIZE(sizeof(gpt_header),
+ dev_desc));
+ gpt_entry *gpt_e;
+
if (gpt_h == NULL) {
printf(%s: calloc failed!\n, __func__);
return -1;
}
- gpt_entry *gpt_e = calloc(GPT_ENTRY_NUMBERS, sizeof(gpt_entry));
+ gpt_e = calloc(1, PAD_TO_BLOCKSIZE(GPT_ENTRY_NUMBERS
+ * sizeof(gpt_entry),
+ dev_desc));
if (gpt_e == NULL) {
printf(%s: calloc failed!\n, __func__);
free(gpt_h);
@@ -652,7 +656,7 @@ static int is_gpt_valid(block_dev_desc_t * dev_desc,
unsigned long long lba,
static gpt_entry *alloc_read_gpt_entries(block_dev_desc_t * dev_desc,
gpt_header * pgpt_head)
{
- size_t count = 0;
+ size_t count = 0, blk_cnt;
gpt_entry *pte = NULL;
if (!dev_desc || !pgpt_head) {
@@ -669,7 +673,8 @@ static gpt_entry *alloc_read_gpt_entries(block_dev_desc_t *
dev_desc,
/* Allocate memory for PTE, remember to FREE */
if (count != 0) {
- pte = memalign(ARCH_DMA_MINALIGN,
Re: [U-Boot] [PATCH v9 18/30] nand: mxc: Switch NAND SPL to generic SPL
Hi Benoît, On Tue, Apr 9, 2013 at 11:38 AM, Benoît Thébaudeau benoit.thebaud...@advansee.com wrote: Can you try different values for the following configs in mx31pdk.h? - CONFIG_SYS_NAND_U_BOOT_SIZE - CONFIG_SPL_TEXT_BASE - CONFIG_SYS_TEXT_BASE - (CONFIG_ENV_OFFSET) - (CONFIG_ENV_OFFSET_REDUND) I would try: - 0x4 for CONFIG_SYS_NAND_U_BOOT_SIZE - 0x8600 for CONFIG_SPL_TEXT_BASE - 0x8700 for CONFIG_SYS_TEXT_BASE Thanks, that did the trick! With the changes below I am able to get into the U-boot prompt: diff --git a/include/configs/mx31pdk.h b/include/configs/mx31pdk.h index 8f12825..d82bf65 100644 --- a/include/configs/mx31pdk.h +++ b/include/configs/mx31pdk.h @@ -51,8 +51,8 @@ #define CONFIG_SPL_MAX_SIZE2048 #define CONFIG_SPL_NAND_SUPPORT -#define CONFIG_SPL_TEXT_BASE 0x87ec -#define CONFIG_SYS_TEXT_BASE 0x87f0 +#define CONFIG_SPL_TEXT_BASE 0x8600 +#define CONFIG_SYS_TEXT_BASE 0x8700 #ifndef CONFIG_SPL_BUILD #define CONFIG_SKIP_LOWLEVEL_INIT @@ -69,8 +69,6 @@ #define CONFIG_MXC_UART #define CONFIG_MXC_UART_BASE UART1_BASE -#define CONFIG_HW_WATCHDOG -#define CONFIG_IMX_WATCHDOG #define CONFIG_MXC_GPIO #define CONFIG_HARD_SPI @@ -199,7 +197,7 @@ /* Start copying real U-boot from the second page */ #define CONFIG_SYS_NAND_U_BOOT_OFFSCONFIG_SPL_PAD_TO -#define CONFIG_SYS_NAND_U_BOOT_SIZE0x32000 +#define CONFIG_SYS_NAND_U_BOOT_SIZE0x4 /* Load U-Boot to this address */ #define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_NAND_U_BOOT_DST -- 1.7.9. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v9 18/30] nand: mxc: Switch NAND SPL to generic SPL
Hi Fabio, On Tuesday, April 9, 2013 6:40:45 PM, Fabio Estevam wrote: Hi Benoît, On Tue, Apr 9, 2013 at 11:38 AM, Benoît Thébaudeau benoit.thebaud...@advansee.com wrote: Can you try different values for the following configs in mx31pdk.h? - CONFIG_SYS_NAND_U_BOOT_SIZE - CONFIG_SPL_TEXT_BASE - CONFIG_SYS_TEXT_BASE - (CONFIG_ENV_OFFSET) - (CONFIG_ENV_OFFSET_REDUND) I would try: - 0x4 for CONFIG_SYS_NAND_U_BOOT_SIZE - 0x8600 for CONFIG_SPL_TEXT_BASE - 0x8700 for CONFIG_SYS_TEXT_BASE Thanks, that did the trick! With the changes below I am able to get into the U-boot prompt: diff --git a/include/configs/mx31pdk.h b/include/configs/mx31pdk.h index 8f12825..d82bf65 100644 --- a/include/configs/mx31pdk.h +++ b/include/configs/mx31pdk.h @@ -51,8 +51,8 @@ #define CONFIG_SPL_MAX_SIZE 2048 #define CONFIG_SPL_NAND_SUPPORT -#define CONFIG_SPL_TEXT_BASE 0x87ec -#define CONFIG_SYS_TEXT_BASE 0x87f0 +#define CONFIG_SPL_TEXT_BASE 0x8600 +#define CONFIG_SYS_TEXT_BASE 0x8700 #ifndef CONFIG_SPL_BUILD #define CONFIG_SKIP_LOWLEVEL_INIT @@ -69,8 +69,6 @@ #define CONFIG_MXC_UART #define CONFIG_MXC_UART_BASE UART1_BASE -#define CONFIG_HW_WATCHDOG -#define CONFIG_IMX_WATCHDOG #define CONFIG_MXC_GPIO #define CONFIG_HARD_SPI @@ -199,7 +197,7 @@ /* Start copying real U-boot from the second page */ #define CONFIG_SYS_NAND_U_BOOT_OFFS CONFIG_SPL_PAD_TO -#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x32000 +#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x4 /* Load U-Boot to this address */ #define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_NAND_U_BOOT_DST Cool, then we need to determine the minimal change set required for v11, so can you retry with fewer of those changes to determine which ones are strictly necessary (apart from the watchdog removal that we already know is required)? What is the size of u-boot-with-spl.bin without DEBUG? Regarding the watchdog removal, it is unrelated to this patch, so do you want me to add a patch for it in this series, or will you handle it separately? And is the correct change to remove it as above, or to change its time-out somewhere? I think that it's probably better if you take care of this separately. Best regards, Benoît ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 3/8] pxa_lcd: allow L_BIAS line to be unused
On 04/07/2013 10:28 PM, Marek Vasut wrote: Dear Mike Dunn, This patch adds a config option CONFIG_SYS_LCD_PXA_NO_L_BIAS, which causes the lcd controller initialization code to leave as an ordinary gpio the line that is typically configured as the lcd L_BIAS alternate function (this is the gpio 77 line). For some reason (I don't have a datasheet), the lcd device on the palmtreo680 board does not use the L_BIAS line. PalmOS does not configure the gpio 77 line for the L_BIAS alternate function, and if it is configured as such, the lcd does not work. Signed-off-by: Mike Dunn miked...@newsguy.com The other option would be to pull the GPIO setup from the driver. That'd be the best. Well, there's a lot of shared code in pxafb_setup_gpio() that handles pin configuration for all possible interface widths. But after looking at this problem some more, I realized that the board-specific lcd_enable() is called after the pxa driver's initialization, so the board code can undo the L_BIAS pin configuration. Not elegant, but better than the ugly #ifdefs. Thanks, Mike ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v9 18/30] nand: mxc: Switch NAND SPL to generic SPL
Hi Albert, On Wednesday, April 3, 2013 10:05:57 AM, Albert ARIBAUD wrote: Hi Benoît, On Wed, 3 Apr 2013 08:30:12 +0200 (CEST), Benoît Thébaudeau benoit.thebaud...@advansee.com wrote: Hi Albert, Here is the v10 bundle for those who want to test: http://dl.free.fr/vdXBGExyq Thanks, will build-test it ASAP. People with ARM (expecially tx25 and mx31pdk) and non-ARM boards please run-test it too. Following Fabio's tests, I will issue a v11 today with a small change in 18/30 limited to mx31pdk.h. Do you want me to do it on top of your [PATCH] ARM: Fix __bss_start and __bss_end in linker scripts, or not? Best regards, Benoît ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] mx28evk: add trimffs to nand command
On Mon, Apr 8, 2013 at 3:59 PM, Eric Bénard e...@eukrea.com wrote: this is usefull when writing an UBI image which contains and UBIFS volume (check README.nand and UBI FAQ for more details) Signed-off-by: Eric Bénard e...@eukrea.com Acked-by: Otavio Salvador ota...@ossystems.com.br -- Otavio Salvador O.S. Systems E-mail: ota...@ossystems.com.br http://www.ossystems.com.br Mobile: +55 53 9981-7854 http://projetos.ossystems.com.br ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] mx28evk: add trimffs to nand command
Eric Bénard wrote: this is usefull when writing an UBI image which contains and UBIFS volume (check README.nand and UBI FAQ for more details) Signed-off-by: Eric Bénard e...@eukrea.com --- include/configs/mx28evk.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/configs/mx28evk.h b/include/configs/mx28evk.h index d470b47..b22a20b 100644 --- a/include/configs/mx28evk.h +++ b/include/configs/mx28evk.h @@ -63,6 +63,7 @@ #define CONFIG_CMD_USB #define CONFIG_CMD_BOOTZ #define CONFIG_CMD_NAND +#define CONFIG_CMD_NAND_TRIMFFS You should add this into mx28evk_nand.h, available in u-boot.imx tree. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v9 18/30] nand: mxc: Switch NAND SPL to generic SPL
On Tuesday, April 9, 2013 6:56:18 PM, Benoît Thébaudeau wrote: Hi Fabio, On Tuesday, April 9, 2013 6:40:45 PM, Fabio Estevam wrote: Hi Benoît, On Tue, Apr 9, 2013 at 11:38 AM, Benoît Thébaudeau benoit.thebaud...@advansee.com wrote: Can you try different values for the following configs in mx31pdk.h? - CONFIG_SYS_NAND_U_BOOT_SIZE - CONFIG_SPL_TEXT_BASE - CONFIG_SYS_TEXT_BASE - (CONFIG_ENV_OFFSET) - (CONFIG_ENV_OFFSET_REDUND) I would try: - 0x4 for CONFIG_SYS_NAND_U_BOOT_SIZE - 0x8600 for CONFIG_SPL_TEXT_BASE - 0x8700 for CONFIG_SYS_TEXT_BASE Thanks, that did the trick! With the changes below I am able to get into the U-boot prompt: diff --git a/include/configs/mx31pdk.h b/include/configs/mx31pdk.h index 8f12825..d82bf65 100644 --- a/include/configs/mx31pdk.h +++ b/include/configs/mx31pdk.h @@ -51,8 +51,8 @@ #define CONFIG_SPL_MAX_SIZE2048 #define CONFIG_SPL_NAND_SUPPORT -#define CONFIG_SPL_TEXT_BASE 0x87ec -#define CONFIG_SYS_TEXT_BASE 0x87f0 +#define CONFIG_SPL_TEXT_BASE 0x8600 +#define CONFIG_SYS_TEXT_BASE 0x8700 #ifndef CONFIG_SPL_BUILD #define CONFIG_SKIP_LOWLEVEL_INIT @@ -69,8 +69,6 @@ #define CONFIG_MXC_UART #define CONFIG_MXC_UART_BASE UART1_BASE -#define CONFIG_HW_WATCHDOG -#define CONFIG_IMX_WATCHDOG #define CONFIG_MXC_GPIO #define CONFIG_HARD_SPI @@ -199,7 +197,7 @@ /* Start copying real U-boot from the second page */ #define CONFIG_SYS_NAND_U_BOOT_OFFSCONFIG_SPL_PAD_TO -#define CONFIG_SYS_NAND_U_BOOT_SIZE0x32000 +#define CONFIG_SYS_NAND_U_BOOT_SIZE0x4 /* Load U-Boot to this address */ #define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_NAND_U_BOOT_DST Cool, then we need to determine the minimal change set required for v11, so can you retry with fewer of those changes to determine which ones are strictly necessary (apart from the watchdog removal that we already know is required)? Especially, does it work with only: -#define CONFIG_HW_WATCHDOG -#define CONFIG_IMX_WATCHDOG -#define CONFIG_SYS_NAND_U_BOOT_SIZE0x32000 +#define CONFIG_SYS_NAND_U_BOOT_SIZE0x3f800 ? What is the size of u-boot-with-spl.bin without DEBUG? Regarding the watchdog removal, it is unrelated to this patch, so do you want me to add a patch for it in this series, or will you handle it separately? And is the correct change to remove it as above, or to change its time-out somewhere? I think that it's probably better if you take care of this separately. Best regards, Benoît ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 4/4] ARM: fix CONFIG_SPL_MAX_SIZE semantics
Hi Benoît,
On Tue, 9 Apr 2013 16:24:36 +0200 (CEST), Benoît Thébaudeau
benoit.thebaud...@advansee.com wrote:
Hi Albert,
On Tuesday, April 9, 2013 4:23:58 PM, Albert ARIBAUD wrote:
Hi Benoît,
On Mon, 8 Apr 2013 23:43:37 +0200 (CEST), Benoît Thébaudeau
benoit.thebaud...@advansee.com wrote:
Hi Albert,
diff --git a/arch/arm/cpu/u-boot-spl.lds b/arch/arm/cpu/u-boot-spl.lds
index 3c0d99c..89ef9ce 100644
--- a/arch/arm/cpu/u-boot-spl.lds
+++ b/arch/arm/cpu/u-boot-spl.lds
@@ -88,6 +88,12 @@ SECTIONS
/DISCARD/ : { *(.gnu*) }
}
-#if defined(CONFIG_SPL_TEXT_BASE) defined(CONFIG_SPL_MAX_SIZE)
-ASSERT(__bss_end (CONFIG_SPL_TEXT_BASE + CONFIG_SPL_MAX_SIZE), SPL
image
too big);
+#if defined(CONFIG_SPL_MAX_SIZE)
+ASSERT(__image_copy_end - __image_copy_start (CONFIG_SPL_MAX_SIZE), \
The possible relocation and MMU data is also part of the binary image
file,
so
that would be __bss_start rather than __image_copy_end above, and README
should
be updated to reflect this.
Actually, mmutable is not used in any SPL; it is used only in targets
h2200, lubbock, palmtc, pxa255_idp and xaeniax, none of which use SPL.
I have just confirmed this with a MAKEALL -a arm and a grep on all map
files.
This presence of mmutable in u-boot-spl.lds is in fact an overlook
that I missed when I created this file from u-boot.lds. I have just
finished verifying that removing the mmutable section altogether does
not change a single bit to any of the 309 ARM platforms currently built
under MAKEALL -a arm.
I'll remove mmutable entries from u-boot-spl.lds in V2.
OK, that's perfect for MMU data, but what about relocation data?
Relocation data should not exist for SPLs, which do not relocate.
Unfortunately, most tegra and some exynos have start.S code going
through the relocation loop even for their SPL; that's cardhu,
colibri_t20_iris, dalmore, harmony, medcom-wide, origen, paz00, plutux,
seaboard, smdkv310, tec, trimslice, ventana, and whistler.
Tegras do it for their arm720t; Exynos' probably do something similar.
I am not going to try and change some start.S so close in time to
release. :)
Fortunately, for all the SPLs that fail building if I remove .rel.dyn
and .dynsym, these sections are actually empty, i.e. their __end is
equal to their __image_copy_end. I have manually verified both reloc
section emptiness and equality of _end and __image_copy_end.
Therefore I'll leave the ASSERT() as written in V2, and will provide a
separate patch for fixing the Tegra / Exynos unneeded relocation data
issue.
Best regards,
Benoît
Amicalement,
--
Albert.
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Re: [U-Boot] [v3] command/cache: Add flush command
Dear Scott,
In message 1365449512.28843.10@snotra you wrote:
Maybe cache should be the toplevel command, with icache and
dcache refactored to be subcommands? Of course, then you're making
an incompatible interface change. How much is consistency worth?
I think backward compatibility is mandatory here. We cannot break
existing user scripts.
Sure. But if the main reason for the icache/dcache split is
compatibility, I don't think that should constrict the form of new
commands.
Backward compatibility is just the argument for not changing the
existing command interfaces. I tried to explain why I do not want
to see the flush_cache() combination of functions exposed to end
users.
I think the terminology is just fine. It's not just invalidating the
icache (flushing and invalidating are the same thing for cache lines
which are not modified -- or are incapable of being modified). It's
flushing the region out of *all* caches.
There is a well-defined difference between flushing and invalidating a
cache, and I don't intend to go into hair-splitting mode here just to
follow your path which would lead me to where I d not want to go.
See above. In such a case icache and dcache can just call the
same underlying code.
And then we end up having to do the flush twice, if the user follows
the first flush dcache, then flush icache instructions. That's not
an ideal interface.
OK, this is indeed a good argument. But is this really the case?
When looking at the current code of flash_cache() for PPC, it seems
actually easy to split:
28 void flush_cache(ulong start_addr, ulong size)
29 {
30 #ifndef CONFIG_5xx
31 ulong addr, start, end;
32
33 start = start_addr ~(CONFIG_SYS_CACHELINE_SIZE - 1);
34 end = start_addr + size - 1;
35
36 for (addr = start; (addr = end) (addr = start);
37 addr += CONFIG_SYS_CACHELINE_SIZE) {
38 asm volatile(dcbst 0,%0 : : r (addr) : memory);
39 WATCHDOG_RESET();
40 }
41 /* wait for all dcbst to complete on bus */
42 asm volatile(sync : : : memory);
43
44 for (addr = start; (addr = end) (addr = start);
45 addr += CONFIG_SYS_CACHELINE_SIZE) {
46 asm volatile(icbi 0,%0 : : r (addr) : memory);
47 WATCHDOG_RESET();
48 }
49 asm volatile(sync : : : memory);
50 /* flush prefetch queue */
51 asm volatile(isync : : : memory);
52 #endif
53 }
Lines 36..42 would go into the dcache command, while lines 44..51
would go into the icache command.
So far this code appears to work fine. What am I missing?
Best regards,
Wolfgang Denk
--
DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
You don't stop doing things because you get old. You get old because
you stop doing things.- Rosamunde Pilcher
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Re: [U-Boot] [PATCH 4/4] ARM: fix CONFIG_SPL_MAX_SIZE semantics
Hi Albert,
On Tuesday, April 9, 2013 7:43:06 PM, Albert ARIBAUD wrote:
Hi Benoît,
On Tue, 9 Apr 2013 16:24:36 +0200 (CEST), Benoît Thébaudeau
benoit.thebaud...@advansee.com wrote:
Hi Albert,
On Tuesday, April 9, 2013 4:23:58 PM, Albert ARIBAUD wrote:
Hi Benoît,
On Mon, 8 Apr 2013 23:43:37 +0200 (CEST), Benoît Thébaudeau
benoit.thebaud...@advansee.com wrote:
Hi Albert,
diff --git a/arch/arm/cpu/u-boot-spl.lds
b/arch/arm/cpu/u-boot-spl.lds
index 3c0d99c..89ef9ce 100644
--- a/arch/arm/cpu/u-boot-spl.lds
+++ b/arch/arm/cpu/u-boot-spl.lds
@@ -88,6 +88,12 @@ SECTIONS
/DISCARD/ : { *(.gnu*) }
}
-#if defined(CONFIG_SPL_TEXT_BASE) defined(CONFIG_SPL_MAX_SIZE)
-ASSERT(__bss_end (CONFIG_SPL_TEXT_BASE + CONFIG_SPL_MAX_SIZE),
SPL
image
too big);
+#if defined(CONFIG_SPL_MAX_SIZE)
+ASSERT(__image_copy_end - __image_copy_start
(CONFIG_SPL_MAX_SIZE), \
The possible relocation and MMU data is also part of the binary image
file,
so
that would be __bss_start rather than __image_copy_end above, and
README
should
be updated to reflect this.
Actually, mmutable is not used in any SPL; it is used only in targets
h2200, lubbock, palmtc, pxa255_idp and xaeniax, none of which use SPL.
I have just confirmed this with a MAKEALL -a arm and a grep on all map
files.
This presence of mmutable in u-boot-spl.lds is in fact an overlook
that I missed when I created this file from u-boot.lds. I have just
finished verifying that removing the mmutable section altogether does
not change a single bit to any of the 309 ARM platforms currently built
under MAKEALL -a arm.
I'll remove mmutable entries from u-boot-spl.lds in V2.
OK, that's perfect for MMU data, but what about relocation data?
Relocation data should not exist for SPLs, which do not relocate.
Unfortunately, most tegra and some exynos have start.S code going
through the relocation loop even for their SPL; that's cardhu,
colibri_t20_iris, dalmore, harmony, medcom-wide, origen, paz00, plutux,
seaboard, smdkv310, tec, trimslice, ventana, and whistler.
Tegras do it for their arm720t; Exynos' probably do something similar.
I am not going to try and change some start.S so close in time to
release. :)
Fortunately, for all the SPLs that fail building if I remove .rel.dyn
and .dynsym, these sections are actually empty, i.e. their __end is
equal to their __image_copy_end. I have manually verified both reloc
section emptiness and equality of _end and __image_copy_end.
Therefore I'll leave the ASSERT() as written in V2, and will provide a
separate patch for fixing the Tegra / Exynos unneeded relocation data
issue.
That's perfect.
Best regards,
Benoît
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Re: [U-Boot] [v3] command/cache: Add flush command
Dear Scott Wood, In message 1365450620.28843.12@snotra you wrote: I thought you said it was OK to flush more than the user asked for, if the implementation does not have separate icache/dcache flushes? Why is it fundamentally different if it's a hardware limitation, or a limitation of the software layer whose functionality is being exposed? I don't get what you are trying to prove. Can you please point me to the code (ideally in mainline U-Boot) which would cause problems with the suggested separation of invalidating the IC and flushing the DC into subcommands of the icache resp. dcache commands? Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Little known fact about Middle Earth: The Hobbits had a very sophi- sticated computer network! It was a Tolkien Ring... ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v9 18/30] nand: mxc: Switch NAND SPL to generic SPL
On Tue, Apr 9, 2013 at 2:37 PM, Benoît Thébaudeau benoit.thebaud...@advansee.com wrote: Especially, does it work with only: -#define CONFIG_HW_WATCHDOG -#define CONFIG_IMX_WATCHDOG -#define CONFIG_SYS_NAND_U_BOOT_SIZE0x32000 +#define CONFIG_SYS_NAND_U_BOOT_SIZE0x3f800 No, it hangs in Net :. Also tried 0x4 and the same hang happens. Maybe we should use the proposed values you proposed earlier? I can handle the watchdog patch separately. Regards, Fabio Estevam ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v9 18/30] nand: mxc: Switch NAND SPL to generic SPL
Hi Fabio, On Tuesday, April 9, 2013 8:07:31 PM, Fabio Estevam wrote: On Tue, Apr 9, 2013 at 2:37 PM, Benoît Thébaudeau benoit.thebaud...@advansee.com wrote: Especially, does it work with only: -#define CONFIG_HW_WATCHDOG -#define CONFIG_IMX_WATCHDOG -#define CONFIG_SYS_NAND_U_BOOT_SIZE0x32000 +#define CONFIG_SYS_NAND_U_BOOT_SIZE0x3f800 No, it hangs in Net :. Also tried 0x4 and the same hang happens. OK. Maybe we should use the proposed values you proposed earlier? These values were very wide, just for testing. It'd be better to adjust them. So can you just try the following, and I'll stop asking for more tests: -#define CONFIG_SPL_TEXT_BASE 0x87ec -#define CONFIG_SYS_TEXT_BASE 0x87f0 +#define CONFIG_SPL_TEXT_BASE 0x87dc +#define CONFIG_SYS_TEXT_BASE 0x87e0 -#define CONFIG_HW_WATCHDOG -#define CONFIG_IMX_WATCHDOG -#define CONFIG_SYS_NAND_U_BOOT_SIZE0x32000 +#define CONFIG_SYS_NAND_U_BOOT_SIZE0x3f800 ? I can handle the watchdog patch separately. OK. Best regards, Benoît ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/3] iomux-v3: Place pad control definitions into common file
On Fri, Apr 5, 2013 at 9:55 PM, Fabio Estevam feste...@gmail.com wrote:
From: Fabio Estevam fabio.este...@freescale.com
Instead of having the same PAD control definition in each MX6 variant pin
file,
place it into a common location.
Signed-off-by: Fabio Estevam fabio.este...@freescale.com
Breaks Wandboard builds...
---
arch/arm/include/asm/arch-mx6/mx6dl_pins.h | 27 ---
arch/arm/include/asm/arch-mx6/mx6q_pins.h | 27 ---
arch/arm/include/asm/imx-common/iomux-v3.h | 26 ++
3 files changed, 26 insertions(+), 54 deletions(-)
diff --git a/arch/arm/include/asm/arch-mx6/mx6dl_pins.h
b/arch/arm/include/asm/arch-mx6/mx6dl_pins.h
index 9846f1b..0ed12f3 100644
--- a/arch/arm/include/asm/arch-mx6/mx6dl_pins.h
+++ b/arch/arm/include/asm/arch-mx6/mx6dl_pins.h
@@ -22,33 +22,6 @@
#include asm/imx-common/iomux-v3.h
-/* Use to set PAD control */
-#define PAD_CTL_HYS(1 16)
-#define PAD_CTL_PUS_100K_DOWN (0 14)
-#define PAD_CTL_PUS_47K_UP (1 14)
-#define PAD_CTL_PUS_100K_UP(2 14)
-#define PAD_CTL_PUS_22K_UP (3 14)
-
-#define PAD_CTL_PUE(1 13)
-#define PAD_CTL_PKE(1 12)
-#define PAD_CTL_ODE(1 11)
-#define PAD_CTL_SPEED_LOW (1 6)
-#define PAD_CTL_SPEED_MED (2 6)
-#define PAD_CTL_SPEED_HIGH (3 6)
-#define PAD_CTL_DSE_DISABLE(0 3)
-#define PAD_CTL_DSE_240ohm (1 3)
-#define PAD_CTL_DSE_120ohm (2 3)
-#define PAD_CTL_DSE_80ohm (3 3)
-#define PAD_CTL_DSE_60ohm (4 3)
-#define PAD_CTL_DSE_48ohm (5 3)
-#define PAD_CTL_DSE_40ohm (6 3)
-#define PAD_CTL_DSE_34ohm (7 3)
-#define PAD_CTL_SRE_FAST (1 0)
-#define PAD_CTL_SRE_SLOW (0 0)
-
-#define IOMUX_CONFIG_SION 0x10
This has not been defined.
-#define NO_MUX_I0
-#define NO_PAD_I0
enum {
MX6_PAD_CSI0_DAT10__UART1_TXD = IOMUX_PAD(0x0360, 0x004C,
3, 0x, 0, 0),
MX6_PAD_CSI0_DAT11__UART1_RXD = IOMUX_PAD(0x0364, 0x0050,
3, 0x08FC, 1, 0),
diff --git a/arch/arm/include/asm/arch-mx6/mx6q_pins.h
b/arch/arm/include/asm/arch-mx6/mx6q_pins.h
index 1c1c008..02a40d4 100644
--- a/arch/arm/include/asm/arch-mx6/mx6q_pins.h
+++ b/arch/arm/include/asm/arch-mx6/mx6q_pins.h
@@ -24,33 +24,6 @@
#include asm/imx-common/iomux-v3.h
-/* Use to set PAD control */
-#define PAD_CTL_HYS(1 16)
-#define PAD_CTL_PUS_100K_DOWN (0 14)
-#define PAD_CTL_PUS_47K_UP (1 14)
-#define PAD_CTL_PUS_100K_UP(2 14)
-#define PAD_CTL_PUS_22K_UP (3 14)
-
-#define PAD_CTL_PUE(1 13)
-#define PAD_CTL_PKE(1 12)
-#define PAD_CTL_ODE(1 11)
-#define PAD_CTL_SPEED_LOW (1 6)
-#define PAD_CTL_SPEED_MED (2 6)
-#define PAD_CTL_SPEED_HIGH (3 6)
-#define PAD_CTL_DSE_DISABLE(0 3)
-#define PAD_CTL_DSE_240ohm (1 3)
-#define PAD_CTL_DSE_120ohm (2 3)
-#define PAD_CTL_DSE_80ohm (3 3)
-#define PAD_CTL_DSE_60ohm (4 3)
-#define PAD_CTL_DSE_48ohm (5 3)
-#define PAD_CTL_DSE_40ohm (6 3)
-#define PAD_CTL_DSE_34ohm (7 3)
-#define PAD_CTL_SRE_FAST (1 0)
-#define PAD_CTL_SRE_SLOW (0 0)
-
-#define NO_MUX_I0
-#define NO_PAD_I0
-
enum {
MX6_PAD_SD2_DAT1__USDHC2_DAT1 = IOMUX_PAD(0x0360, 0x004C,
0, 0x, 0, 0),
MX6_PAD_SD2_DAT1__ECSPI5_SS0= IOMUX_PAD(0x0360, 0x004C,
1, 0x0834, 0, 0),
diff --git a/arch/arm/include/asm/imx-common/iomux-v3.h
b/arch/arm/include/asm/imx-common/iomux-v3.h
index c34bb76..32126a7 100644
--- a/arch/arm/include/asm/imx-common/iomux-v3.h
+++ b/arch/arm/include/asm/imx-common/iomux-v3.h
@@ -97,6 +97,32 @@ typedef u64 iomux_v3_cfg_t;
#define MUX_CONFIG_SION(0x1 4)
+#define PAD_CTL_HYS(1 16)
+#define PAD_CTL_PUS_100K_DOWN (0 14)
+#define PAD_CTL_PUS_47K_UP (1 14)
+#define PAD_CTL_PUS_100K_UP(2 14)
+#define PAD_CTL_PUS_22K_UP (3 14)
+
+#define PAD_CTL_PUE(1 13)
+#define PAD_CTL_PKE(1 12)
+#define PAD_CTL_ODE(1 11)
+#define PAD_CTL_SPEED_LOW (1 6)
+#define PAD_CTL_SPEED_MED (2 6)
+#define PAD_CTL_SPEED_HIGH (3 6)
+#define PAD_CTL_DSE_DISABLE(0 3)
+#define PAD_CTL_DSE_240ohm (1 3)
+#define PAD_CTL_DSE_120ohm (2 3)
+#define PAD_CTL_DSE_80ohm (3 3)
+#define PAD_CTL_DSE_60ohm (4 3)
+#define PAD_CTL_DSE_48ohm (5 3)
+#define PAD_CTL_DSE_40ohm (6 3)
+#define PAD_CTL_DSE_34ohm (7 3)
+#define PAD_CTL_SRE_FAST (1 0)
+#define PAD_CTL_SRE_SLOW (0 0)
+
+#define NO_MUX_I0
+#define NO_PAD_I0
+
int imx_iomux_v3_setup_pad(iomux_v3_cfg_t pad);
int imx_iomux_v3_setup_multiple_pads(iomux_v3_cfg_t const *pad_list,
Re: [U-Boot] [PATCH v9 18/30] nand: mxc: Switch NAND SPL to generic SPL
On Tue, Apr 9, 2013 at 3:10 PM, Benoît Thébaudeau benoit.thebaud...@advansee.com wrote: These values were very wide, just for testing. It'd be better to adjust them. So can you just try the following, and I'll stop asking for more tests: -#define CONFIG_SPL_TEXT_BASE 0x87ec -#define CONFIG_SYS_TEXT_BASE 0x87f0 +#define CONFIG_SPL_TEXT_BASE 0x87dc +#define CONFIG_SYS_TEXT_BASE 0x87e0 -#define CONFIG_HW_WATCHDOG -#define CONFIG_IMX_WATCHDOG -#define CONFIG_SYS_NAND_U_BOOT_SIZE0x32000 +#define CONFIG_SYS_NAND_U_BOOT_SIZE0x3f800 These values work fine, thanks. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v9 18/30] nand: mxc: Switch NAND SPL to generic SPL
On Tuesday, April 9, 2013 8:35:09 PM, Fabio Estevam wrote: On Tue, Apr 9, 2013 at 3:10 PM, Benoît Thébaudeau benoit.thebaud...@advansee.com wrote: These values were very wide, just for testing. It'd be better to adjust them. So can you just try the following, and I'll stop asking for more tests: -#define CONFIG_SPL_TEXT_BASE 0x87ec -#define CONFIG_SYS_TEXT_BASE 0x87f0 +#define CONFIG_SPL_TEXT_BASE 0x87dc +#define CONFIG_SYS_TEXT_BASE 0x87e0 -#define CONFIG_HW_WATCHDOG -#define CONFIG_IMX_WATCHDOG -#define CONFIG_SYS_NAND_U_BOOT_SIZE0x32000 +#define CONFIG_SYS_NAND_U_BOOT_SIZE0x3f800 These values work fine, thanks. Thanks for testing and for your patience. Best regards, Benoît ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 3/3] mx6sl: Add initial support for mx6slevk board
mx6slevk board is a development board from Freescale based on the mx6 solo-lite processor. For details about mx6slevk, please refer to: http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=IMX6SLEVKparentCode=i.MX6SLfpsp=1 Signed-off-by: Fabio Estevam fabio.este...@freescale.com --- Changes since v1: - None MAINTAINERS |1 + board/freescale/mx6slevk/Makefile | 28 + board/freescale/mx6slevk/imximage.cfg | 118 board/freescale/mx6slevk/mx6slevk.c | 102 ++ boards.cfg|1 + include/configs/mx6slevk.h| 189 + 6 files changed, 439 insertions(+) create mode 100644 board/freescale/mx6slevk/Makefile create mode 100644 board/freescale/mx6slevk/imximage.cfg create mode 100644 board/freescale/mx6slevk/mx6slevk.c create mode 100644 include/configs/mx6slevk.h diff --git a/MAINTAINERS b/MAINTAINERS index 0f19078..723a316 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -665,6 +665,7 @@ Fabio Estevam fabio.este...@freescale.com mx6qsabresd i.MX6Q mx6qsabreauto i.MX6Q wandboard i.MX6DL/S + mx6slevki.MX6SL Daniel Gorsulowski daniel.gorsulow...@esd.eu diff --git a/board/freescale/mx6slevk/Makefile b/board/freescale/mx6slevk/Makefile new file mode 100644 index 000..43af351 --- /dev/null +++ b/board/freescale/mx6slevk/Makefile @@ -0,0 +1,28 @@ +# (C) Copyright 2013 Freescale Semiconductor, Inc. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# + +include $(TOPDIR)/config.mk + +LIB= $(obj)lib$(BOARD).o + +COBJS := mx6slevk.o + +SRCS := $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) + +$(LIB):$(obj).depend $(OBJS) + $(call cmd_link_o_target, $(OBJS)) + +# + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +# diff --git a/board/freescale/mx6slevk/imximage.cfg b/board/freescale/mx6slevk/imximage.cfg new file mode 100644 index 000..df39a16 --- /dev/null +++ b/board/freescale/mx6slevk/imximage.cfg @@ -0,0 +1,118 @@ +/* + * Copyright (C) 2013 Freescale Semiconductor, Inc. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License or (at your option) any later version. + * + * Refer docs/README.imxmage for more details about how-to configure + * and create imximage boot image + * + * The syntax is taken as close as possible with the kwbimage + */ + +/* image version */ + +IMAGE_VERSION 2 + +/* + * Boot Device : one of + * spi, sd (the board has no nand neither onenand) + */ + +BOOT_FROM sd + +/* + * Device Configuration Data (DCD) + * + * Each entry must have the format: + * Addr-type AddressValue + * + * where: + * Addr-type register length (1,2 or 4 bytes) + * Address absolute address of the register + * value value to be stored in the register + */ +DATA 4 0x020c4018 0x00260324 + +DATA 4 0x020c4068 0x +DATA 4 0x020c406c 0x +DATA 4 0x020c4070 0x +DATA 4 0x020c4074 0x +DATA 4 0x020c4078 0x +DATA 4 0x020c407c 0x +DATA 4 0x020c4080 0x + +DATA 4 0x020e0344 0x3030 +DATA 4 0x020e0348 0x3030 +DATA 4 0x020e034c 0x3030 +DATA 4 0x020e0350 0x3030 +DATA 4 0x020e030c 0x0030 +DATA 4 0x020e0310 0x0030 +DATA 4 0x020e0314 0x0030 +DATA 4 0x020e0318 0x0030 +DATA 4 0x020e0300 0x0030 +DATA 4 0x020e031c 0x0030 +DATA 4 0x020e0338 0x0028 +DATA 4 0x020e0320 0x0030 +DATA 4 0x020e032c 0x +DATA 4 0x020e033c 0x0008 +DATA 4 0x020e0340 0x0008 +DATA 4 0x020e05c4 0x0030 +DATA 4 0x020e05cc 0x0030 +DATA 4 0x020e05d4 0x0030 +DATA 4 0x020e05d8 0x0030 +DATA 4 0x020e05ac 0x0030 +DATA 4 0x020e05c8 0x0030 +DATA 4 0x020e05b0 0x0002 +DATA 4 0x020e05b4 0x +DATA 4 0x020e05c0 0x0002 +DATA 4 0x020e05d0 0x0008 + +DATA 4 0x021b001c 0x8000 +DATA 4 0x021b085c 0x1b4700c7 +DATA 4 0x021b0800 0xa1390003 +DATA 4 0x021b0890 0x0030 +DATA 4 0x021b08b8 0x0800 +DATA 4 0x021b081c 0x +DATA 4 0x021b0820 0x +DATA 4 0x021b0824 0x +DATA 4 0x021b0828 0x +DATA 4 0x021b082c 0xf333 +DATA 4 0x021b0830 0xf333 +DATA 4 0x021b0834 0xf333 +DATA 4 0x021b0838 0xf333 +DATA 4 0x021b0848 0x4241444a +DATA 4 0x021b0850 0x3030312b +DATA 4 0x021b083c 0x2000 +DATA 4 0x021b0840 0x +DATA 4 0x021b08c0 0x24911492 +DATA 4 0x021b08b8 0x0800
[U-Boot] [PATCH] mx31pdk: Remove watchdog support
The conversion of mx31pdk to SPL NAND fixed the boot issue, but we start seeing resets in loop, which prevents us from reaching the U-boot prompt. Until the proper fix can be identified, disable watchdog, so that mx31pdk can be functional again. Signed-off-by: Fabio Estevam fabio.este...@freescale.com --- include/configs/mx31pdk.h |2 -- 1 file changed, 2 deletions(-) diff --git a/include/configs/mx31pdk.h b/include/configs/mx31pdk.h index 34e4295..da894c4 100644 --- a/include/configs/mx31pdk.h +++ b/include/configs/mx31pdk.h @@ -60,8 +60,6 @@ #define CONFIG_MXC_UART #define CONFIG_MXC_UART_BASE UART1_BASE -#define CONFIG_HW_WATCHDOG -#define CONFIG_IMX_WATCHDOG #define CONFIG_MXC_GPIO #define CONFIG_HARD_SPI -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 1/3] iomux-v3: Place pad control definitions into common file
On Tue, Apr 9, 2013 at 3:55 PM, Fabio Estevam fabio.este...@freescale.com wrote: Instead of having the same PAD control definition in each MX6 variant pin file, place it into a common location. Signed-off-by: Fabio Estevam fabio.este...@freescale.com This fixes the build failure. Acked-by: Otavio Salvador ota...@ossystems.com.br -- Otavio Salvador O.S. Systems E-mail: ota...@ossystems.com.br http://www.ossystems.com.br Mobile: +55 53 9981-7854 http://projetos.ossystems.com.br ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 1/3] iomux-v3: Place pad control definitions into common file
Instead of having the same PAD control definition in each MX6 variant pin file,
place it into a common location.
Signed-off-by: Fabio Estevam fabio.este...@freescale.com
---
Changes since v2:
- Add missing IOMUX_CONFIG_SION definition
arch/arm/include/asm/arch-mx6/mx6dl_pins.h | 27 ---
arch/arm/include/asm/arch-mx6/mx6q_pins.h | 27 ---
arch/arm/include/asm/imx-common/iomux-v3.h | 27 ++-
3 files changed, 26 insertions(+), 55 deletions(-)
diff --git a/arch/arm/include/asm/arch-mx6/mx6dl_pins.h
b/arch/arm/include/asm/arch-mx6/mx6dl_pins.h
index 9846f1b..0ed12f3 100644
--- a/arch/arm/include/asm/arch-mx6/mx6dl_pins.h
+++ b/arch/arm/include/asm/arch-mx6/mx6dl_pins.h
@@ -22,33 +22,6 @@
#include asm/imx-common/iomux-v3.h
-/* Use to set PAD control */
-#define PAD_CTL_HYS(1 16)
-#define PAD_CTL_PUS_100K_DOWN (0 14)
-#define PAD_CTL_PUS_47K_UP (1 14)
-#define PAD_CTL_PUS_100K_UP(2 14)
-#define PAD_CTL_PUS_22K_UP (3 14)
-
-#define PAD_CTL_PUE(1 13)
-#define PAD_CTL_PKE(1 12)
-#define PAD_CTL_ODE(1 11)
-#define PAD_CTL_SPEED_LOW (1 6)
-#define PAD_CTL_SPEED_MED (2 6)
-#define PAD_CTL_SPEED_HIGH (3 6)
-#define PAD_CTL_DSE_DISABLE(0 3)
-#define PAD_CTL_DSE_240ohm (1 3)
-#define PAD_CTL_DSE_120ohm (2 3)
-#define PAD_CTL_DSE_80ohm (3 3)
-#define PAD_CTL_DSE_60ohm (4 3)
-#define PAD_CTL_DSE_48ohm (5 3)
-#define PAD_CTL_DSE_40ohm (6 3)
-#define PAD_CTL_DSE_34ohm (7 3)
-#define PAD_CTL_SRE_FAST (1 0)
-#define PAD_CTL_SRE_SLOW (0 0)
-
-#define IOMUX_CONFIG_SION 0x10
-#define NO_MUX_I0
-#define NO_PAD_I0
enum {
MX6_PAD_CSI0_DAT10__UART1_TXD = IOMUX_PAD(0x0360, 0x004C, 3,
0x, 0, 0),
MX6_PAD_CSI0_DAT11__UART1_RXD = IOMUX_PAD(0x0364, 0x0050, 3,
0x08FC, 1, 0),
diff --git a/arch/arm/include/asm/arch-mx6/mx6q_pins.h
b/arch/arm/include/asm/arch-mx6/mx6q_pins.h
index 1c1c008..02a40d4 100644
--- a/arch/arm/include/asm/arch-mx6/mx6q_pins.h
+++ b/arch/arm/include/asm/arch-mx6/mx6q_pins.h
@@ -24,33 +24,6 @@
#include asm/imx-common/iomux-v3.h
-/* Use to set PAD control */
-#define PAD_CTL_HYS(1 16)
-#define PAD_CTL_PUS_100K_DOWN (0 14)
-#define PAD_CTL_PUS_47K_UP (1 14)
-#define PAD_CTL_PUS_100K_UP(2 14)
-#define PAD_CTL_PUS_22K_UP (3 14)
-
-#define PAD_CTL_PUE(1 13)
-#define PAD_CTL_PKE(1 12)
-#define PAD_CTL_ODE(1 11)
-#define PAD_CTL_SPEED_LOW (1 6)
-#define PAD_CTL_SPEED_MED (2 6)
-#define PAD_CTL_SPEED_HIGH (3 6)
-#define PAD_CTL_DSE_DISABLE(0 3)
-#define PAD_CTL_DSE_240ohm (1 3)
-#define PAD_CTL_DSE_120ohm (2 3)
-#define PAD_CTL_DSE_80ohm (3 3)
-#define PAD_CTL_DSE_60ohm (4 3)
-#define PAD_CTL_DSE_48ohm (5 3)
-#define PAD_CTL_DSE_40ohm (6 3)
-#define PAD_CTL_DSE_34ohm (7 3)
-#define PAD_CTL_SRE_FAST (1 0)
-#define PAD_CTL_SRE_SLOW (0 0)
-
-#define NO_MUX_I0
-#define NO_PAD_I0
-
enum {
MX6_PAD_SD2_DAT1__USDHC2_DAT1 = IOMUX_PAD(0x0360, 0x004C, 0,
0x, 0, 0),
MX6_PAD_SD2_DAT1__ECSPI5_SS0= IOMUX_PAD(0x0360, 0x004C, 1,
0x0834, 0, 0),
diff --git a/arch/arm/include/asm/imx-common/iomux-v3.h
b/arch/arm/include/asm/imx-common/iomux-v3.h
index c34bb76..36917c8 100644
--- a/arch/arm/include/asm/imx-common/iomux-v3.h
+++ b/arch/arm/include/asm/imx-common/iomux-v3.h
@@ -95,7 +95,32 @@ typedef u64 iomux_v3_cfg_t;
#define GPIO_PORTE (4 GPIO_PORT_SHIFT)
#define GPIO_PORTF (5 GPIO_PORT_SHIFT)
-#define MUX_CONFIG_SION(0x1 4)
+#define PAD_CTL_HYS(1 16)
+#define PAD_CTL_PUS_100K_DOWN (0 14)
+#define PAD_CTL_PUS_47K_UP (1 14)
+#define PAD_CTL_PUS_100K_UP(2 14)
+#define PAD_CTL_PUS_22K_UP (3 14)
+
+#define PAD_CTL_PUE(1 13)
+#define PAD_CTL_PKE(1 12)
+#define PAD_CTL_ODE(1 11)
+#define PAD_CTL_SPEED_LOW (1 6)
+#define PAD_CTL_SPEED_MED (2 6)
+#define PAD_CTL_SPEED_HIGH (3 6)
+#define PAD_CTL_DSE_DISABLE(0 3)
+#define PAD_CTL_DSE_240ohm (1 3)
+#define PAD_CTL_DSE_120ohm (2 3)
+#define PAD_CTL_DSE_80ohm (3 3)
+#define PAD_CTL_DSE_60ohm (4 3)
+#define PAD_CTL_DSE_48ohm (5 3)
+#define PAD_CTL_DSE_40ohm (6 3)
+#define PAD_CTL_DSE_34ohm (7 3)
+#define PAD_CTL_SRE_FAST (1 0)
+#define PAD_CTL_SRE_SLOW (0 0)
+
+#define IOMUX_CONFIG_SION 0x10
+#define NO_MUX_I 0
+#define NO_PAD_I 0
int imx_iomux_v3_setup_pad(iomux_v3_cfg_t pad);
int imx_iomux_v3_setup_multiple_pads(iomux_v3_cfg_t const *pad_list,
--
1.7.9.5
___
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[U-Boot] [PATCH v2 2/3] mx6: Add solo-lite variant support
mx6 solo-lite is another member of the mx6 series.
For more information about mx6 solo-lite, please visit:
http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=i.MX6SLnodeId=018rH3ZrDRB24A
Signed-off-by: Fabio Estevam fabio.este...@freescale.com
---
Changes since v1:
- None
arch/arm/cpu/armv7/mx6/clock.c | 38 -
arch/arm/include/asm/arch-mx6/crm_regs.h |5 +++
arch/arm/include/asm/arch-mx6/imx-regs.h | 63 +++-
arch/arm/include/asm/arch-mx6/mx6-pins.h |4 ++
arch/arm/include/asm/arch-mx6/mx6sl_pins.h | 25 +++
5 files changed, 132 insertions(+), 3 deletions(-)
create mode 100644 arch/arm/include/asm/arch-mx6/mx6sl_pins.h
diff --git a/arch/arm/cpu/armv7/mx6/clock.c b/arch/arm/cpu/armv7/mx6/clock.c
index a50db70..8cba4fd 100644
--- a/arch/arm/cpu/armv7/mx6/clock.c
+++ b/arch/arm/cpu/armv7/mx6/clock.c
@@ -186,12 +186,16 @@ static u32 get_ipg_per_clk(void)
static u32 get_uart_clk(void)
{
u32 reg, uart_podf;
-
+ u32 freq = PLL3_80M;
reg = __raw_readl(imx_ccm-cscdr1);
+#ifdef CONFIG_MX6SL
+ if (reg MXC_CCM_CSCDR1_UART_CLK_SEL)
+ freq = MXC_HCLK;
+#endif
reg = MXC_CCM_CSCDR1_UART_CLK_PODF_MASK;
uart_podf = reg MXC_CCM_CSCDR1_UART_CLK_PODF_OFFSET;
- return PLL3_80M / (uart_podf + 1);
+ return freq / (uart_podf + 1);
}
static u32 get_cspi_clk(void)
@@ -252,6 +256,35 @@ static u32 get_emi_slow_clk(void)
return root_freq / (emi_slow_pof + 1);
}
+#ifdef CONFIG_MX6SL
+static u32 get_mmdc_ch0_clk(void)
+{
+ u32 cbcmr = __raw_readl(imx_ccm-cbcmr);
+ u32 cbcdr = __raw_readl(imx_ccm-cbcdr);
+ u32 freq, podf;
+
+ podf = (cbcdr MXC_CCM_CBCDR_MMDC_CH1_PODF_MASK) \
+MXC_CCM_CBCDR_MMDC_CH1_PODF_OFFSET;
+
+ switch ((cbcmr MXC_CCM_CBCMR_PRE_PERIPH2_CLK_SEL_MASK)
+ MXC_CCM_CBCMR_PRE_PERIPH2_CLK_SEL_OFFSET) {
+ case 0:
+ freq = decode_pll(PLL_BUS, MXC_HCLK);
+ break;
+ case 1:
+ freq = PLL2_PFD2_FREQ;
+ break;
+ case 2:
+ freq = PLL2_PFD0_FREQ;
+ break;
+ case 3:
+ freq = PLL2_PFD2_DIV_FREQ;
+ }
+
+ return freq / (podf + 1);
+
+}
+#else
static u32 get_mmdc_ch0_clk(void)
{
u32 cbcdr = __raw_readl(imx_ccm-cbcdr);
@@ -260,6 +293,7 @@ static u32 get_mmdc_ch0_clk(void)
return get_periph_clk() / (mmdc_ch0_podf + 1);
}
+#endif
static u32 get_usdhc_clk(u32 port)
{
diff --git a/arch/arm/include/asm/arch-mx6/crm_regs.h
b/arch/arm/include/asm/arch-mx6/crm_regs.h
index 7676457..b1ed62f 100644
--- a/arch/arm/include/asm/arch-mx6/crm_regs.h
+++ b/arch/arm/include/asm/arch-mx6/crm_regs.h
@@ -244,7 +244,12 @@ struct mxc_ccm_reg {
#define MXC_CCM_CSCDR1_USBOH3_CLK_PRED_MASK(0x7 8)
#define MXC_CCM_CSCDR1_USBOH3_CLK_PODF_OFFSET 6
#define MXC_CCM_CSCDR1_USBOH3_CLK_PODF_MASK(0x3 6)
+#ifdef CONFIG_MX6SL
+#define MXC_CCM_CSCDR1_UART_CLK_PODF_MASK 0x1F
+#define MXC_CCM_CSCDR1_UART_CLK_SEL(1 6)
+#else
#define MXC_CCM_CSCDR1_UART_CLK_PODF_MASK 0x3F
+#endif
#define MXC_CCM_CSCDR1_UART_CLK_PODF_OFFSET0
/* Define the bits in register CS1CDR */
diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h
b/arch/arm/include/asm/arch-mx6/imx-regs.h
index eaa7439..2d8fe69 100644
--- a/arch/arm/include/asm/arch-mx6/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx6/imx-regs.h
@@ -25,6 +25,13 @@
#define ROMCP_ARB_BASE_ADDR 0x
#define ROMCP_ARB_END_ADDR 0x000F
+
+#ifdef CONFIG_MX6SL
+#define GPU_2D_ARB_BASE_ADDR0x0220
+#define GPU_2D_ARB_END_ADDR 0x02203FFF
+#define OPENVG_ARB_BASE_ADDR0x02204000
+#define OPENVG_ARB_END_ADDR 0x02207FFF
+#else
#define CAAM_ARB_BASE_ADDR 0x0010
#define CAAM_ARB_END_ADDR 0x00103FFF
#define APBH_DMA_ARB_BASE_ADDR 0x0011
@@ -37,9 +44,14 @@
#define GPU_2D_ARB_END_ADDR 0x00137FFF
#define DTCP_ARB_BASE_ADDR 0x00138000
#define DTCP_ARB_END_ADDR 0x0013BFFF
-
+#endif /* CONFIG_MX6SL */
/* GPV - PL301 configuration ports */
+#ifdef CONFIG_MX6SL
+#define GPV2_BASE_ADDR 0x00D0
+#else
#define GPV2_BASE_ADDR 0x0020
+#endif
+
#define GPV3_BASE_ADDR 0x0030
#define GPV4_BASE_ADDR 0x0080
#define IRAM_BASE_ADDR 0x0090
@@ -70,10 +82,17 @@
#define WEIM_ARB_BASE_ADDR 0x0800
#define WEIM_ARB_END_ADDR 0x0FFF
+#ifdef CONFIG_MX6SL
+#define MMDC0_ARB_BASE_ADDR 0x8000
+#define MMDC0_ARB_END_ADDR 0x
+#define MMDC1_ARB_BASE_ADDR 0xC000
+#define MMDC1_ARB_END_ADDR 0x
Re: [U-Boot] [PATCH] mx28evk: add trimffs to nand command
Hi Fabio, Le Tue, 9 Apr 2013 15:02:44 -0300, Fabio Estevam fabio.este...@freescale.com a écrit : Eric Bénard wrote: this is usefull when writing an UBI image which contains and UBIFS volume (check README.nand and UBI FAQ for more details) Signed-off-by: Eric Bénard e...@eukrea.com --- include/configs/mx28evk.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/configs/mx28evk.h b/include/configs/mx28evk.h index d470b47..b22a20b 100644 --- a/include/configs/mx28evk.h +++ b/include/configs/mx28evk.h @@ -63,6 +63,7 @@ #define CONFIG_CMD_USB #define CONFIG_CMD_BOOTZ #define CONFIG_CMD_NAND +#define CONFIG_CMD_NAND_TRIMFFS You should add this into mx28evk_nand.h, available in u-boot.imx tree. that's the second time you ask this but mx28evk_nand.h doesn't exist, even in u-boot-imx tree, and you are the developer who added nand support to mx28evk in commit ab461be65dbfe3e2fa45f7cd836faa99663be5bb ;-) Here is a reminder of what you did in that commit : you added the mx28evk_nand option in boards.cfg which defines ENV_IS_IN_NAND when mx28evk defines ENV_IS_IN_MMC and both are using the same config which is include/configs/mx28evk.h : http://git.denx.de/?p=u-boot/u-boot-imx.git;a=commitdiff;h=ab461be65dbfe3e2fa45f7cd836faa99663be5bb So this patch is fine against u-boot-imx. Best regards Eric ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v11 02/30] mtd: nand: mxc_nand: Fix is_16bit_nand()
From: Fabio Estevam fabio.este...@freescale.com
Currently is_16bit_nand() is a per SoC function and it decides the bus nand
width by reading some boot related registers.
This method works when NAND is the boot medium, but does not work if another
boot medium is used. For example: booting from a SD card and then using NAND
to store the environment variables, would lead to the following error:
NAND bus width 16 instead 8 bit
No NAND device found!!!
0 MiB
Use CONFIG_SYS_NAND_BUSWIDTH_16BIT symbol to decide the bus width.
If it is defined in the board file, then consider 16-bit NAND bus-width,
otherwise assume 8-bit NAND is used.
This also aligns with Documentation/devicetree/bindings/mtd/nand.txt, which
states:
nand-bus-width : 8 or 16 bus width if not present 8
Signed-off-by: Fabio Estevam fabio.este...@freescale.com
Acked-by: Scott Wood scottw...@freescale.com
Reviewed-by: Benoît Thébaudeau benoit.thebaud...@advansee.com
---
Changes in v11: None
Changes in v10: None
Changes in v9: None
Changes in v8:
- New patch.
Changes in v7: None
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None
README |3 ++-
drivers/mtd/nand/mxc_nand.c | 37 +++--
2 files changed, 5 insertions(+), 35 deletions(-)
diff --git a/README b/README
index e9c3145..9285ddd 100644
--- a/README
+++ b/README
@@ -3759,8 +3759,9 @@ Low Level (hardware related) configuration options:
Defined to tell the NAND controller that the NAND chip is using
a 16 bit bus.
Not all NAND drivers use this symbol.
- Example of driver that uses it:
+ Example of drivers that use it:
- drivers/mtd/nand/ndfc.c
+ - drivers/mtd/nand/mxc_nand.c
- CONFIG_SYS_NDFC_EBC0_CFG
Sets the EBC0_CFG register for the NDFC. If not defined
diff --git a/drivers/mtd/nand/mxc_nand.c b/drivers/mtd/nand/mxc_nand.c
index d0ded48..bb475f2 100644
--- a/drivers/mtd/nand/mxc_nand.c
+++ b/drivers/mtd/nand/mxc_nand.c
@@ -98,45 +98,14 @@ static struct nand_ecclayout nand_hw_eccoob2k = {
#endif
#endif
-#ifdef CONFIG_MX27
static int is_16bit_nand(void)
{
- struct system_control_regs *sc_regs =
- (struct system_control_regs *)IMX_SYSTEM_CTL_BASE;
-
- if (readl(sc_regs-fmcr) NF_16BIT_SEL)
- return 1;
- else
- return 0;
-}
-#elif defined(CONFIG_MX31)
-static int is_16bit_nand(void)
-{
- struct clock_control_regs *sc_regs =
- (struct clock_control_regs *)CCM_BASE;
-
- if (readl(sc_regs-rcsr) CCM_RCSR_NF16B)
- return 1;
- else
- return 0;
-}
-#elif defined(CONFIG_MX25) || defined(CONFIG_MX35)
-static int is_16bit_nand(void)
-{
- struct ccm_regs *ccm = (struct ccm_regs *)IMX_CCM_BASE;
-
- if (readl(ccm-rcsr) CCM_RCSR_NF_16BIT_SEL)
- return 1;
- else
- return 0;
-}
+#if defined(CONFIG_SYS_NAND_BUSWIDTH_16BIT)
+ return 1;
#else
-#warning 8/16 bit NAND autodetection not supported
-static int is_16bit_nand(void)
-{
return 0;
-}
#endif
+}
static uint32_t *mxc_nand_memcpy32(uint32_t *dest, uint32_t *source, size_t
size)
{
--
1.7.10.4
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[U-Boot] [PATCH v11 01/30] mtd: nand: Introduce CONFIG_SYS_NAND_BUSWIDTH_16BIT
From: Fabio Estevam fabio.este...@freescale.com Introduce CONFIG_SYS_NAND_BUSWIDTH_16BIT option so that other NAND controller drivers could use it when a 16-bit NAND is deployed. drivers/mtd/nand/ndfc has CONFIG_SYS_NDFC_16BIT, so just rename it, so that other NAND drivers could reuse the same symbol. Signed-off-by: Fabio Estevam fabio.este...@freescale.com Acked-by: Scott Wood scottw...@freescale.com Reviewed-by: Benoît Thébaudeau benoit.thebaud...@advansee.com --- Changes in v11: None Changes in v10: None Changes in v9: None Changes in v8: - New patch. Changes in v7: None Changes in v6: None Changes in v5: None Changes in v4: None Changes in v3: None Changes in v2: None README |9 ++--- drivers/mtd/nand/ndfc.c |4 ++-- 2 files changed, 8 insertions(+), 5 deletions(-) diff --git a/README b/README index 5c5cd18..e9c3145 100644 --- a/README +++ b/README @@ -3755,9 +3755,12 @@ Low Level (hardware related) configuration options: - CONFIG_SYS_SRIOn_MEM_SIZE: Size of SRIO port 'n' memory region -- CONFIG_SYS_NDFC_16 - Defined to tell the NDFC that the NAND chip is using a - 16 bit bus. +- CONFIG_SYS_NAND_BUSWIDTH_16BIT + Defined to tell the NAND controller that the NAND chip is using + a 16 bit bus. + Not all NAND drivers use this symbol. + Example of driver that uses it: + - drivers/mtd/nand/ndfc.c - CONFIG_SYS_NDFC_EBC0_CFG Sets the EBC0_CFG register for the NDFC. If not defined diff --git a/drivers/mtd/nand/ndfc.c b/drivers/mtd/nand/ndfc.c index 6ebbb5e..213d2c9 100644 --- a/drivers/mtd/nand/ndfc.c +++ b/drivers/mtd/nand/ndfc.c @@ -156,7 +156,7 @@ static uint8_t ndfc_read_byte(struct mtd_info *mtd) struct nand_chip *chip = mtd-priv; -#ifdef CONFIG_SYS_NDFC_16BIT +#ifdef CONFIG_SYS_NAND_BUSWIDTH_16BIT return (uint8_t) readw(chip-IO_ADDR_R); #else return readb(chip-IO_ADDR_R); @@ -218,7 +218,7 @@ int board_nand_init(struct nand_chip *nand) nand-ecc.bytes = 3; nand-select_chip = ndfc_select_chip; -#ifdef CONFIG_SYS_NDFC_16BIT +#ifdef CONFIG_SYS_NAND_BUSWIDTH_16BIT nand-options |= NAND_BUSWIDTH_16; #endif -- 1.7.10.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v11 03/30] nand: mxc: Prepare to add support for i.MX5
Add some abstraction to NFC definitions so that some parts of the current code
can also be used for future i.MX5 code.
Clean up a few things by the way.
Signed-off-by: Benoît Thébaudeau benoit.thebaud...@advansee.com
Acked-by: Scott Wood scottw...@freescale.com
Tested-by: Fabio Estevam fabio.este...@freescale.com
---
Changes in v11: None
Changes in v10: None
Changes in v9: None
Changes in v8: None
Changes in v7:
- Fix typo in patch description.
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3:
- Separate code reformatting from behavioral changes.
Changes in v2:
- Fix warning for unused tmp variable in board_nand_init() for NFC V1.
drivers/mtd/nand/mxc_nand.c | 92 +-
include/fsl_nfc.h| 72 -
nand_spl/nand_boot_fsl_nfc.c | 47 +++--
3 files changed, 97 insertions(+), 114 deletions(-)
diff --git a/drivers/mtd/nand/mxc_nand.c b/drivers/mtd/nand/mxc_nand.c
index bb475f2..6ae95d6 100644
--- a/drivers/mtd/nand/mxc_nand.c
+++ b/drivers/mtd/nand/mxc_nand.c
@@ -119,7 +119,7 @@ static uint32_t *mxc_nand_memcpy32(uint32_t *dest, uint32_t
*source, size_t size
/*
* This function polls the NANDFC to wait for the basic operation to
- * complete by checking the INT bit of config2 register.
+ * complete by checking the INT bit.
*/
static void wait_op_done(struct mxc_nand_host *host, int max_retries,
uint16_t param)
@@ -127,10 +127,10 @@ static void wait_op_done(struct mxc_nand_host *host, int
max_retries,
uint32_t tmp;
while (max_retries-- 0) {
- if (readw(host-regs-config2) NFC_INT) {
- tmp = readw(host-regs-config2);
- tmp = ~NFC_INT;
- writew(tmp, host-regs-config2);
+ tmp = readnfc(host-regs-config2);
+ if (tmp NFC_V1_V2_CONFIG2_INT) {
+ tmp = ~NFC_V1_V2_CONFIG2_INT;
+ writenfc(tmp, host-regs-config2);
break;
}
udelay(1);
@@ -149,8 +149,8 @@ static void send_cmd(struct mxc_nand_host *host, uint16_t
cmd)
{
MTDDEBUG(MTD_DEBUG_LEVEL3, send_cmd(host, 0x%x)\n, cmd);
- writew(cmd, host-regs-flash_cmd);
- writew(NFC_CMD, host-regs-config2);
+ writenfc(cmd, host-regs-flash_cmd);
+ writenfc(NFC_CMD, host-regs-operation);
/* Wait for operation to complete */
wait_op_done(host, TROP_US_DELAY, cmd);
@@ -165,8 +165,8 @@ static void send_addr(struct mxc_nand_host *host, uint16_t
addr)
{
MTDDEBUG(MTD_DEBUG_LEVEL3, send_addr(host, 0x%x)\n, addr);
- writew(addr, host-regs-flash_addr);
- writew(NFC_ADDR, host-regs-config2);
+ writenfc(addr, host-regs-flash_addr);
+ writenfc(NFC_ADDR, host-regs-operation);
/* Wait for operation to complete */
wait_op_done(host, TROP_US_DELAY, addr);
@@ -198,19 +198,19 @@ static void send_prog_page(struct mxc_nand_host *host,
uint8_t buf_id,
}
}
- writew(buf_id, host-regs-buf_addr);
+ writenfc(buf_id, host-regs-buf_addr);
/* Configure spare or page+spare access */
if (!host-pagesize_2k) {
- uint16_t config1 = readw(host-regs-config1);
+ uint16_t config1 = readnfc(host-regs-config1);
if (spare_only)
- config1 |= NFC_SP_EN;
+ config1 |= NFC_CONFIG1_SP_EN;
else
- config1 = ~NFC_SP_EN;
- writew(config1, host-regs-config1);
+ config1 = ~NFC_CONFIG1_SP_EN;
+ writenfc(config1, host-regs-config1);
}
- writew(NFC_INPUT, host-regs-config2);
+ writenfc(NFC_INPUT, host-regs-operation);
/* Wait for operation to complete */
wait_op_done(host, TROP_US_DELAY, spare_only);
@@ -225,19 +225,19 @@ static void send_read_page(struct mxc_nand_host *host,
uint8_t buf_id,
{
MTDDEBUG(MTD_DEBUG_LEVEL3, send_read_page (%d)\n, spare_only);
- writew(buf_id, host-regs-buf_addr);
+ writenfc(buf_id, host-regs-buf_addr);
/* Configure spare or page+spare access */
if (!host-pagesize_2k) {
- uint32_t config1 = readw(host-regs-config1);
+ uint32_t config1 = readnfc(host-regs-config1);
if (spare_only)
- config1 |= NFC_SP_EN;
+ config1 |= NFC_CONFIG1_SP_EN;
else
- config1 = ~NFC_SP_EN;
- writew(config1, host-regs-config1);
+ config1 = ~NFC_CONFIG1_SP_EN;
+ writenfc(config1, host-regs-config1);
}
- writew(NFC_OUTPUT, host-regs-config2);
+ writenfc(NFC_OUTPUT, host-regs-operation);
/* Wait for operation to complete */
[U-Boot] [PATCH v11 08/30] nand: mxc: Use appropriate page number in syndrome functions
The syndrome functions should use the page number passed as argument instead of
the page number saved upon NAND_CMD_READ0.
This does not make any difference if the NAND_NO_AUTOINCR option is set, but
otherwise this fixes accesses to the wrong pages.
Signed-off-by: Benoît Thébaudeau benoit.thebaud...@advansee.com
Acked-by: Scott Wood scottw...@freescale.com
---
Changes in v11: None
Changes in v10: None
Changes in v9: None
Changes in v8: None
Changes in v7: None
Changes in v6: None
Changes in v5: None
Changes in v4:
- New patch.
Changes in v3: None
Changes in v2: None
drivers/mtd/nand/mxc_nand.c |6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/mtd/nand/mxc_nand.c b/drivers/mtd/nand/mxc_nand.c
index 62d6965..29ceab3 100644
--- a/drivers/mtd/nand/mxc_nand.c
+++ b/drivers/mtd/nand/mxc_nand.c
@@ -463,7 +463,7 @@ static int mxc_nand_read_page_raw_syndrome(struct mtd_info
*mtd,
int n;
_mxc_nand_enable_hwecc(mtd, 0);
- chip-cmdfunc(mtd, NAND_CMD_READ0, 0x00, host-page_addr);
+ chip-cmdfunc(mtd, NAND_CMD_READ0, 0x00, page);
for (n = 0, steps = chip-ecc.steps; steps 0; n++, steps--) {
host-col_addr = n * eccsize;
@@ -507,7 +507,7 @@ static int mxc_nand_read_page_syndrome(struct mtd_info *mtd,
uint8_t *oob = chip-oob_poi;
MTDDEBUG(MTD_DEBUG_LEVEL1, Reading page %u to buf %p oob %p\n,
- host-page_addr, buf, oob);
+ page, buf, oob);
/* first read the data area and the available portion of OOB */
for (n = 0; eccsteps; n++, eccsteps--, p += eccsize) {
@@ -545,7 +545,7 @@ static int mxc_nand_read_page_syndrome(struct mtd_info *mtd,
/* Then switch ECC off and read the OOB area to get the ECC code */
_mxc_nand_enable_hwecc(mtd, 0);
- chip-cmdfunc(mtd, NAND_CMD_READOOB, mtd-writesize, host-page_addr);
+ chip-cmdfunc(mtd, NAND_CMD_READOOB, mtd-writesize, page);
eccsteps = chip-ecc.steps;
oob = chip-oob_poi + chip-ecc.prepad;
for (n = 0; eccsteps; n++, eccsteps--, p += eccsize) {
--
1.7.10.4
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[U-Boot] [PATCH v11 11/30] arm1136: Remove redundant relocate_code() return
Signed-off-by: Benoît Thébaudeau benoit.thebaud...@advansee.com --- Changes in v11: None Changes in v10: None Changes in v9: None Changes in v8: None Changes in v7: None Changes in v6: - New patch, extracted from nand: mxc: Switch NAND SPL to generic SPL. Changes in v5: None Changes in v4: None Changes in v3: None Changes in v2: None arch/arm/cpu/arm1136/start.S |2 -- 1 file changed, 2 deletions(-) diff --git a/arch/arm/cpu/arm1136/start.S b/arch/arm/cpu/arm1136/start.S index eda4bc0..5225639 100644 --- a/arch/arm/cpu/arm1136/start.S +++ b/arch/arm/cpu/arm1136/start.S @@ -237,8 +237,6 @@ fixnext: add r2, r2, #8 /* each rel.dyn entry is 8 bytes */ cmp r2, r3 blo fixloop - bx lr - #endif relocate_done: -- 1.7.10.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v11 04/30] nand: mxc: Add support for i.MX5
Signed-off-by: Benoît Thébaudeau benoit.thebaud...@advansee.com
Acked-by: Scott Wood scottw...@freescale.com
Tested-by: Fabio Estevam fabio.este...@freescale.com
---
Changes in v11: None
Changes in v10: None
Changes in v9:
- Drop the now unused SRC register definitions.
Changes in v8:
- Rebase on Fabio's patches using CONFIG_SYS_NAND_BUSWIDTH_16BIT instead of
NAND Flash boot config pins to determine NAND Flash bus width.
Changes in v7: None
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3:
- Separate code reformatting from behavioral changes.
Changes in v2: None
drivers/mtd/nand/mxc_nand.c | 119 ++
include/fsl_nfc.h| 79 +++-
nand_spl/nand_boot_fsl_nfc.c | 67 +++-
3 files changed, 250 insertions(+), 15 deletions(-)
diff --git a/drivers/mtd/nand/mxc_nand.c b/drivers/mtd/nand/mxc_nand.c
index 6ae95d6..db72cdc 100644
--- a/drivers/mtd/nand/mxc_nand.c
+++ b/drivers/mtd/nand/mxc_nand.c
@@ -22,7 +22,8 @@
#include nand.h
#include linux/err.h
#include asm/io.h
-#if defined(CONFIG_MX25) || defined(CONFIG_MX27) || defined(CONFIG_MX35)
+#if defined(CONFIG_MX25) || defined(CONFIG_MX27) || defined(CONFIG_MX35) || \
+ defined(CONFIG_MX51) || defined(CONFIG_MX53)
#include asm/arch/imx-regs.h
#endif
#include fsl_nfc.h
@@ -36,6 +37,9 @@ struct mxc_nand_host {
struct nand_chip*nand;
struct fsl_nfc_regs __iomem *regs;
+#ifdef MXC_NFC_V3_2
+ struct fsl_nfc_ip_regs __iomem *ip_regs;
+#endif
int spare_only;
int status_request;
int pagesize_2k;
@@ -77,7 +81,7 @@ static struct nand_ecclayout nand_hw_eccoob2k = {
.oobfree = { {2, 4}, {11, 11}, {27, 11}, {43, 11}, {59, 5} },
};
#endif
-#elif defined(MXC_NFC_V2_1)
+#elif defined(MXC_NFC_V2_1) || defined(MXC_NFC_V3_2)
#ifndef CONFIG_SYS_NAND_LARGEPAGE
static struct nand_ecclayout nand_hw_eccoob = {
.eccbytes = 9,
@@ -127,10 +131,17 @@ static void wait_op_done(struct mxc_nand_host *host, int
max_retries,
uint32_t tmp;
while (max_retries-- 0) {
+#if defined(MXC_NFC_V1) || defined(MXC_NFC_V2_1)
tmp = readnfc(host-regs-config2);
if (tmp NFC_V1_V2_CONFIG2_INT) {
tmp = ~NFC_V1_V2_CONFIG2_INT;
writenfc(tmp, host-regs-config2);
+#elif defined(MXC_NFC_V3_2)
+ tmp = readnfc(host-ip_regs-ipc);
+ if (tmp NFC_V3_IPC_INT) {
+ tmp = ~NFC_V3_IPC_INT;
+ writenfc(tmp, host-ip_regs-ipc);
+#endif
break;
}
udelay(1);
@@ -182,7 +193,7 @@ static void send_prog_page(struct mxc_nand_host *host,
uint8_t buf_id,
if (spare_only)
MTDDEBUG(MTD_DEBUG_LEVEL1, send_prog_page (%d)\n, spare_only);
- if (is_mxc_nfc_21()) {
+ if (is_mxc_nfc_21() || is_mxc_nfc_32()) {
int i;
/*
* The controller copies the 64 bytes of spare data from
@@ -198,11 +209,18 @@ static void send_prog_page(struct mxc_nand_host *host,
uint8_t buf_id,
}
}
+#if defined(MXC_NFC_V1) || defined(MXC_NFC_V2_1)
writenfc(buf_id, host-regs-buf_addr);
+#elif defined(MXC_NFC_V3_2)
+ uint32_t tmp = readnfc(host-regs-config1);
+ tmp = ~NFC_V3_CONFIG1_RBA_MASK;
+ tmp |= NFC_V3_CONFIG1_RBA(buf_id);
+ writenfc(tmp, host-regs-config1);
+#endif
/* Configure spare or page+spare access */
if (!host-pagesize_2k) {
- uint16_t config1 = readnfc(host-regs-config1);
+ uint32_t config1 = readnfc(host-regs-config1);
if (spare_only)
config1 |= NFC_CONFIG1_SP_EN;
else
@@ -225,7 +243,14 @@ static void send_read_page(struct mxc_nand_host *host,
uint8_t buf_id,
{
MTDDEBUG(MTD_DEBUG_LEVEL3, send_read_page (%d)\n, spare_only);
+#if defined(MXC_NFC_V1) || defined(MXC_NFC_V2_1)
writenfc(buf_id, host-regs-buf_addr);
+#elif defined(MXC_NFC_V3_2)
+ uint32_t tmp = readnfc(host-regs-config1);
+ tmp = ~NFC_V3_CONFIG1_RBA_MASK;
+ tmp |= NFC_V3_CONFIG1_RBA(buf_id);
+ writenfc(tmp, host-regs-config1);
+#endif
/* Configure spare or page+spare access */
if (!host-pagesize_2k) {
@@ -242,7 +267,7 @@ static void send_read_page(struct mxc_nand_host *host,
uint8_t buf_id,
/* Wait for operation to complete */
wait_op_done(host, TROP_US_DELAY, spare_only);
- if (is_mxc_nfc_21()) {
+ if (is_mxc_nfc_21() || is_mxc_nfc_32()) {
int i;
/*
@@ -262,10 +287,16 @@ static void send_read_page(struct mxc_nand_host *host,
uint8_t buf_id,
/* Request the NANDFC to perform a read of the NAND device
[U-Boot] [PATCH v11 09/30] arm: start.S: Fix _TEXT_BASE for SPL
_TEXT_BASE must be set to CONFIG_SPL_TEXT_BASE for generic SPL, and to CONFIG_SYS_TEXT_BASE for non-SPL builds. Signed-off-by: Benoît Thébaudeau benoit.thebaud...@advansee.com Reviewed-by: Tom Rini tr...@ti.com --- Changes in v11: None Changes in v10: None Changes in v9: None Changes in v8: - Apply to mxs SPL too. Changes in v7: None Changes in v6: - New patch. Changes in v5: None Changes in v4: None Changes in v3: None Changes in v2: None arch/arm/cpu/arm1136/start.S |4 arch/arm/cpu/arm1176/start.S |8 arch/arm/cpu/arm720t/start.S |2 +- arch/arm/cpu/arm920t/start.S |4 arch/arm/cpu/arm925t/start.S |4 arch/arm/cpu/arm926ejs/mxs/start.S |4 arch/arm/cpu/arm926ejs/start.S |2 +- arch/arm/cpu/arm946es/start.S |4 arch/arm/cpu/arm_intcm/start.S |6 +- arch/arm/cpu/armv7/start.S |4 arch/arm/cpu/ixp/start.S |4 arch/arm/cpu/pxa/start.S |2 +- arch/arm/cpu/s3c44b0/start.S |4 arch/arm/cpu/sa1100/start.S|4 14 files changed, 52 insertions(+), 4 deletions(-) diff --git a/arch/arm/cpu/arm1136/start.S b/arch/arm/cpu/arm1136/start.S index eba2324..0cd2400 100644 --- a/arch/arm/cpu/arm1136/start.S +++ b/arch/arm/cpu/arm1136/start.S @@ -88,7 +88,11 @@ _end_vect: .globl _TEXT_BASE _TEXT_BASE: +#if defined(CONFIG_SPL_BUILD) defined(CONFIG_SPL_TEXT_BASE) + .word CONFIG_SPL_TEXT_BASE +#else .word CONFIG_SYS_TEXT_BASE +#endif /* * These are defined in the board-specific linker script. diff --git a/arch/arm/cpu/arm1176/start.S b/arch/arm/cpu/arm1176/start.S index 3c291fb..adc 100644 --- a/arch/arm/cpu/arm1176/start.S +++ b/arch/arm/cpu/arm1176/start.S @@ -98,7 +98,15 @@ _end_vect: .globl _TEXT_BASE _TEXT_BASE: +#ifdef CONFIG_NAND_SPL /* deprecated, use instead CONFIG_SPL_BUILD */ .word CONFIG_SYS_TEXT_BASE +#else +#if defined(CONFIG_SPL_BUILD) defined(CONFIG_SPL_TEXT_BASE) + .word CONFIG_SPL_TEXT_BASE +#else + .word CONFIG_SYS_TEXT_BASE +#endif +#endif /* * Below variable is very important because we use MMU in U-Boot. diff --git a/arch/arm/cpu/arm720t/start.S b/arch/arm/cpu/arm720t/start.S index 43bd6ed..1e3e5a1 100644 --- a/arch/arm/cpu/arm720t/start.S +++ b/arch/arm/cpu/arm720t/start.S @@ -85,7 +85,7 @@ _pad: .word 0x12345678 /* now 16*4=64 */ .globl _TEXT_BASE _TEXT_BASE: -#ifdef CONFIG_SPL_BUILD +#if defined(CONFIG_SPL_BUILD) defined(CONFIG_SPL_TEXT_BASE) .word CONFIG_SPL_TEXT_BASE #else .word CONFIG_SYS_TEXT_BASE diff --git a/arch/arm/cpu/arm920t/start.S b/arch/arm/cpu/arm920t/start.S index 2864d12..8c2c836 100644 --- a/arch/arm/cpu/arm920t/start.S +++ b/arch/arm/cpu/arm920t/start.S @@ -73,7 +73,11 @@ _fiq:.word fiq .globl _TEXT_BASE _TEXT_BASE: +#if defined(CONFIG_SPL_BUILD) defined(CONFIG_SPL_TEXT_BASE) + .word CONFIG_SPL_TEXT_BASE +#else .word CONFIG_SYS_TEXT_BASE +#endif /* * These are defined in the board-specific linker script. diff --git a/arch/arm/cpu/arm925t/start.S b/arch/arm/cpu/arm925t/start.S index 827fee2..7f067c0 100644 --- a/arch/arm/cpu/arm925t/start.S +++ b/arch/arm/cpu/arm925t/start.S @@ -79,7 +79,11 @@ _fiq:.word fiq .globl _TEXT_BASE _TEXT_BASE: +#if defined(CONFIG_SPL_BUILD) defined(CONFIG_SPL_TEXT_BASE) + .word CONFIG_SPL_TEXT_BASE +#else .word CONFIG_SYS_TEXT_BASE +#endif /* * These are defined in the board-specific linker script. diff --git a/arch/arm/cpu/arm926ejs/mxs/start.S b/arch/arm/cpu/arm926ejs/mxs/start.S index 373e6d8..bf54423 100644 --- a/arch/arm/cpu/arm926ejs/mxs/start.S +++ b/arch/arm/cpu/arm926ejs/mxs/start.S @@ -119,7 +119,11 @@ fiq: .globl _TEXT_BASE _TEXT_BASE: +#ifdef CONFIG_SPL_TEXT_BASE + .word CONFIG_SPL_TEXT_BASE +#else .word CONFIG_SYS_TEXT_BASE +#endif /* * These are defined in the board-specific linker script. diff --git a/arch/arm/cpu/arm926ejs/start.S b/arch/arm/cpu/arm926ejs/start.S index f5d1582..efdff3e 100644 --- a/arch/arm/cpu/arm926ejs/start.S +++ b/arch/arm/cpu/arm926ejs/start.S @@ -123,7 +123,7 @@ _TEXT_BASE: #ifdef CONFIG_NAND_SPL /* deprecated, use instead CONFIG_SPL_BUILD */ .word CONFIG_SYS_TEXT_BASE #else -#ifdef CONFIG_SPL_BUILD +#if defined(CONFIG_SPL_BUILD) defined(CONFIG_SPL_TEXT_BASE) .word CONFIG_SPL_TEXT_BASE #else .word CONFIG_SYS_TEXT_BASE diff --git a/arch/arm/cpu/arm946es/start.S b/arch/arm/cpu/arm946es/start.S index 9dec35b..85adc62 100644 --- a/arch/arm/cpu/arm946es/start.S +++ b/arch/arm/cpu/arm946es/start.S @@ -89,7 +89,11 @@ _vectors_end: .globl _TEXT_BASE _TEXT_BASE: +#if defined(CONFIG_SPL_BUILD) defined(CONFIG_SPL_TEXT_BASE) + .word CONFIG_SPL_TEXT_BASE +#else .word CONFIG_SYS_TEXT_BASE +#endif /* * These are defined in the
[U-Boot] [PATCH v11 10/30] arm: relocate_code() is no longer noreturn
Commit e05e5de7fae5bec79617e113916dac6631251156 made ARM's relocate_code() return to its caller, but it did not update its declaration accordingly. Fixing this function declaration fixes dropped C code following calls to relocate_code(). Signed-off-by: Benoît Thébaudeau benoit.thebaud...@advansee.com --- Changes in v11: None Changes in v10: None Changes in v9: None Changes in v8: - Update relocate_code() description in ARM start.S comments. Changes in v7: None Changes in v6: - New patch, extracted from nand: mxc: Switch NAND SPL to generic SPL. Changes in v5: None Changes in v4: None Changes in v3: None Changes in v2: None arch/arm/cpu/arm1136/start.S |4 +--- arch/arm/cpu/arm1176/start.S |4 +--- arch/arm/cpu/arm720t/start.S |4 +--- arch/arm/cpu/arm920t/start.S |4 +--- arch/arm/cpu/arm925t/start.S |4 +--- arch/arm/cpu/arm926ejs/start.S |4 +--- arch/arm/cpu/arm946es/start.S |4 +--- arch/arm/cpu/arm_intcm/start.S |4 +--- arch/arm/cpu/armv7/start.S |4 +--- arch/arm/cpu/ixp/start.S |4 +--- arch/arm/cpu/pxa/start.S |4 +--- arch/arm/cpu/s3c44b0/start.S |4 +--- arch/arm/cpu/sa1100/start.S|4 +--- include/common.h |6 +- 14 files changed, 18 insertions(+), 40 deletions(-) diff --git a/arch/arm/cpu/arm1136/start.S b/arch/arm/cpu/arm1136/start.S index 0cd2400..eda4bc0 100644 --- a/arch/arm/cpu/arm1136/start.S +++ b/arch/arm/cpu/arm1136/start.S @@ -176,9 +176,7 @@ next: /* * void relocate_code (addr_sp, gd, addr_moni) * - * This function does not return, instead it continues in RAM - * after relocating the monitor code. - * + * This function relocates the monitor code. */ .globl relocate_code relocate_code: diff --git a/arch/arm/cpu/arm1176/start.S b/arch/arm/cpu/arm1176/start.S index adc..c0698e6 100644 --- a/arch/arm/cpu/arm1176/start.S +++ b/arch/arm/cpu/arm1176/start.S @@ -239,9 +239,7 @@ skip_tcmdisable: /* * void relocate_code (addr_sp, gd, addr_moni) * - * This function does not return, instead it continues in RAM - * after relocating the monitor code. - * + * This function relocates the monitor code. */ .globl relocate_code relocate_code: diff --git a/arch/arm/cpu/arm720t/start.S b/arch/arm/cpu/arm720t/start.S index 1e3e5a1..c65af3f 100644 --- a/arch/arm/cpu/arm720t/start.S +++ b/arch/arm/cpu/arm720t/start.S @@ -154,9 +154,7 @@ reset: /* * void relocate_code (addr_sp, gd, addr_moni) * - * This function does not return, instead it continues in RAM - * after relocating the monitor code. - * + * This function relocates the monitor code. */ .globl relocate_code relocate_code: diff --git a/arch/arm/cpu/arm920t/start.S b/arch/arm/cpu/arm920t/start.S index 8c2c836..2b8b7ad 100644 --- a/arch/arm/cpu/arm920t/start.S +++ b/arch/arm/cpu/arm920t/start.S @@ -193,9 +193,7 @@ copyex: /* * void relocate_code (addr_sp, gd, addr_moni) * - * This function does not return, instead it continues in RAM - * after relocating the monitor code. - * + * This function relocates the monitor code. */ .globl relocate_code relocate_code: diff --git a/arch/arm/cpu/arm925t/start.S b/arch/arm/cpu/arm925t/start.S index 7f067c0..6920c93 100644 --- a/arch/arm/cpu/arm925t/start.S +++ b/arch/arm/cpu/arm925t/start.S @@ -183,9 +183,7 @@ poll1: /* * void relocate_code (addr_sp, gd, addr_moni) * - * This function does not return, instead it continues in RAM - * after relocating the monitor code. - * + * This function relocates the monitor code. */ .globl relocate_code relocate_code: diff --git a/arch/arm/cpu/arm926ejs/start.S b/arch/arm/cpu/arm926ejs/start.S index efdff3e..90b4e53 100644 --- a/arch/arm/cpu/arm926ejs/start.S +++ b/arch/arm/cpu/arm926ejs/start.S @@ -200,9 +200,7 @@ reset: /* * void relocate_code (addr_sp, gd, addr_moni) * - * This function does not return, instead it continues in RAM - * after relocating the monitor code. - * + * This function relocates the monitor code. */ .globl relocate_code relocate_code: diff --git a/arch/arm/cpu/arm946es/start.S b/arch/arm/cpu/arm946es/start.S index 85adc62..84fabf4 100644 --- a/arch/arm/cpu/arm946es/start.S +++ b/arch/arm/cpu/arm946es/start.S @@ -158,9 +158,7 @@ reset: /* * void relocate_code (addr_sp, gd, addr_moni) * - * This function does not return, instead it continues in RAM - * after relocating the monitor code. - * + * This function relocates the monitor code. */ .globl relocate_code relocate_code: diff --git a/arch/arm/cpu/arm_intcm/start.S b/arch/arm/cpu/arm_intcm/start.S index a69fb17..d0f8a48 100644 --- a/arch/arm/cpu/arm_intcm/start.S +++ b/arch/arm/cpu/arm_intcm/start.S @@ -154,9 +154,7 @@ reset: /* * void relocate_code (addr_sp, gd, addr_moni) * - * This function does not return, instead it continues in RAM - * after relocating the monitor code. - * + * This function relocates the monitor code. */ .globl relocate_code
[U-Boot] [PATCH v11 05/30] imx: mx5: lowlevel_init: Simplify code
Don't use several instructions to build constant values. Signed-off-by: Benoît Thébaudeau benoit.thebaud...@advansee.com Acked-by: Stefano Babic sba...@denx.de --- Changes in v11: None Changes in v10: None Changes in v9: None Changes in v8: None Changes in v7: None Changes in v6: None Changes in v5: None Changes in v4: None Changes in v3: - New patch. Changes in v2: None arch/arm/cpu/armv7/mx5/lowlevel_init.S |8 ++-- 1 file changed, 2 insertions(+), 6 deletions(-) diff --git a/arch/arm/cpu/armv7/mx5/lowlevel_init.S b/arch/arm/cpu/armv7/mx5/lowlevel_init.S index 6d9396a..dfce0ca 100644 --- a/arch/arm/cpu/armv7/mx5/lowlevel_init.S +++ b/arch/arm/cpu/armv7/mx5/lowlevel_init.S @@ -309,8 +309,7 @@ setup_pll_func: ldr r0, =CCM_BASE_ADDR ldr r1, =0x00015154 str r1, [r0, #CLKCTL_CBCMR] -ldr r1, =0x02888945 -orr r1, r1, #(1 16) +ldr r1, =0x02898945 str r1, [r0, #CLKCTL_CBCDR] /* make sure change is effective */ 1: ldr r1, [r0, #CLKCTL_CDHIPR] @@ -321,10 +320,7 @@ setup_pll_func: /* Switch peripheral to PLL2 */ ldr r0, =CCM_BASE_ADDR - ldr r1, =0x00808145 - orr r1, r1, #(2 10) - orr r1, r1, #(0 16) - orr r1, r1, #(1 19) + ldr r1, =0x00888945 str r1, [r0, #CLKCTL_CBCDR] ldr r1, =0x00016154 -- 1.7.10.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v11 14/30] arm: crt0.S: Remove bogus .globl
The purpose of .globl is to export symbols for ld, not to declare external symbols. By the way, use the ENTRY() and ENDPROC() macros to define functions rather than using .global directly. Signed-off-by: Benoît Thébaudeau benoit.thebaud...@advansee.com --- Changes in v11: None Changes in v10: - Rebase on current u-boot-arm/master. Changes in v9: None Changes in v8: - Use ENTRY() and ENDPROC() to define functions. Changes in v7: None Changes in v6: - New patch. Changes in v5: None Changes in v4: None Changes in v3: None Changes in v2: None arch/arm/lib/crt0.S | 28 1 file changed, 4 insertions(+), 24 deletions(-) diff --git a/arch/arm/lib/crt0.S b/arch/arm/lib/crt0.S index 37d9927..1524f7e 100644 --- a/arch/arm/lib/crt0.S +++ b/arch/arm/lib/crt0.S @@ -24,6 +24,7 @@ #include config.h #include asm-offsets.h +#include linux/linkage.h /* * This file handles the target-independent stages of the U-Boot @@ -67,33 +68,10 @@ */ /* - * declare nand_boot() or board_init_r() to jump to at end of crt0 - */ - -#if defined(CONFIG_NAND_SPL) - -.globl nand_boot - -#elif ! defined(CONFIG_SPL_BUILD) - -.globl board_init_r - -#endif - -/* - * start and end of BSS - */ - -.globl __bss_start -.globl __bss_end - -/* * entry point of crt0 sequence */ -.global _main - -_main: +ENTRY(_main) /* * Set up initial C runtime environment and call board_init_f(0). @@ -171,3 +149,5 @@ clbss_l:cmp r0, r1 /* while not at end of BSS */ /* we should not return here. */ #endif + +ENDPROC(_main) -- 1.7.10.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v11 12/30] arm: relocate_code(): Remove useless relocation offset computation
Signed-off-by: Benoît Thébaudeau benoit.thebaud...@advansee.com
---
Changes in v11: None
Changes in v10: None
Changes in v9: None
Changes in v8:
- Make sure that r9 is initialized in all cases because it may be used after
relocate_code().
Changes in v7: None
Changes in v6:
- New patch.
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None
arch/arm/cpu/arm1136/start.S |8 +++-
arch/arm/cpu/arm1176/start.S |8 +++-
arch/arm/cpu/arm720t/start.S |8 +++-
arch/arm/cpu/arm920t/start.S |8 +++-
arch/arm/cpu/arm925t/start.S |8 +++-
arch/arm/cpu/arm926ejs/start.S |9 +++--
arch/arm/cpu/arm946es/start.S |8 +++-
arch/arm/cpu/arm_intcm/start.S |8 +++-
arch/arm/cpu/armv7/start.S |8 +++-
arch/arm/cpu/ixp/start.S |8 +++-
arch/arm/cpu/pxa/start.S |8 +++-
arch/arm/cpu/s3c44b0/start.S |8 +++-
arch/arm/cpu/sa1100/start.S|8 +++-
13 files changed, 39 insertions(+), 66 deletions(-)
diff --git a/arch/arm/cpu/arm1136/start.S b/arch/arm/cpu/arm1136/start.S
index 5225639..67fcc4f 100644
--- a/arch/arm/cpu/arm1136/start.S
+++ b/arch/arm/cpu/arm1136/start.S
@@ -185,16 +185,15 @@ relocate_code:
mov r6, r2 /* save addr of destination */
adr r0, _start
- cmp r0, r6
- moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */
+ subsr9, r6, r0 /* r9 - relocation offset */
beq relocate_done /* skip relocation */
mov r1, r6 /* r1 - scratch for copy_loop */
ldr r3, _image_copy_end_ofs
add r2, r0, r3 /* r2 - source end address */
copy_loop:
- ldmia r0!, {r9-r10} /* copy from source address [r0]*/
- stmia r1!, {r9-r10} /* copy to target address [r1]*/
+ ldmia r0!, {r10-r11} /* copy from source address [r0]*/
+ stmia r1!, {r10-r11} /* copy to target address [r1]*/
cmp r0, r2 /* until source end address [r2]*/
blo copy_loop
@@ -203,7 +202,6 @@ copy_loop:
* fix .rel.dyn relocations
*/
ldr r0, _TEXT_BASE /* r0 - Text base */
- sub r9, r6, r0 /* r9 - relocation offset */
ldr r10, _dynsym_start_ofs /* r10 - sym table ofs */
add r10, r10, r0/* r10 - sym table in FLASH */
ldr r2, _rel_dyn_start_ofs /* r2 - rel dyn start ofs */
diff --git a/arch/arm/cpu/arm1176/start.S b/arch/arm/cpu/arm1176/start.S
index c0698e6..17b1277 100644
--- a/arch/arm/cpu/arm1176/start.S
+++ b/arch/arm/cpu/arm1176/start.S
@@ -248,16 +248,15 @@ relocate_code:
mov r6, r2 /* save addr of destination */
adr r0, _start
- cmp r0, r6
- moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */
+ subsr9, r6, r0 /* r9 - relocation offset */
beq relocate_done /* skip relocation */
mov r1, r6 /* r1 - scratch for copy_loop */
ldr r3, _bss_start_ofs
add r2, r0, r3 /* r2 - source end address */
copy_loop:
- ldmia r0!, {r9-r10} /* copy from source address [r0]*/
- stmia r1!, {r9-r10} /* copy to target address [r1]*/
+ ldmia r0!, {r10-r11} /* copy from source address [r0]*/
+ stmia r1!, {r10-r11} /* copy to target address [r1]*/
cmp r0, r2 /* until source end address [r2]*/
blo copy_loop
@@ -266,7 +265,6 @@ copy_loop:
* fix .rel.dyn relocations
*/
ldr r0, _TEXT_BASE /* r0 - Text base */
- sub r9, r6, r0 /* r9 - relocation offset */
ldr r10, _dynsym_start_ofs /* r10 - sym table ofs */
add r10, r10, r0/* r10 - sym table in FLASH */
ldr r2, _rel_dyn_start_ofs /* r2 - rel dyn start ofs */
diff --git a/arch/arm/cpu/arm720t/start.S b/arch/arm/cpu/arm720t/start.S
index c65af3f..95f4447 100644
--- a/arch/arm/cpu/arm720t/start.S
+++ b/arch/arm/cpu/arm720t/start.S
@@ -163,16 +163,15 @@ relocate_code:
mov r6, r2 /* save addr of destination */
adr r0, _start
- cmp r0, r6
- moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */
+ subsr9, r6, r0 /* r9 - relocation offset */
beq relocate_done /* skip relocation */
mov r1, r6 /* r1 - scratch for copy_loop */
ldr r3, _bss_start_ofs
add r2, r0, r3 /* r2 - source end address */
copy_loop:
- ldmia r0!, {r9-r10} /* copy from source address [r0]*/
-
[U-Boot] [PATCH v11 15/30] autoconfig.mk: Make it possible to define configs from other configs
Give more flexibility to define configs that can be interpreted by make, e.g. to define fallback values of configs like in the example below. Before this change, the config lines: #define CONFIG_SPL_MAX_SIZE2048 #define CONFIG_SPL_PAD_TO CONFIG_SPL_MAX_SIZE would have been changed in autoconfig.mk into: CONFIG_SPL_MAX_SIZE=2048 CONFIG_SPL_PAD_TO=CONFIG_SPL_MAX_SIZE Hence, a make recipe using as an argument to $(OBJCOPY): --pad-to=$(CONFIG_SPL_PAD_TO) would have issued: --pad-to=CONFIG_SPL_MAX_SIZE which means nothing for $(OBJCOPY) and makes it fail. Thanks to this change, the config lines above are changed in autoconfig.mk into: CONFIG_SPL_MAX_SIZE=2048 CONFIG_SPL_PAD_TO=$(CONFIG_SPL_MAX_SIZE) Hence, the make recipe above now issues: --pad-to=2048 as expected from the defined config. Signed-off-by: Benoît Thébaudeau benoit.thebaud...@advansee.com Reviewed-by: Tom Rini tr...@ti.com --- Changes in v11: None Changes in v10: None Changes in v9: - Add detailed patch description. Changes in v8: - New patch. Changes in v7: None Changes in v6: None Changes in v5: None Changes in v4: None Changes in v3: None Changes in v2: None tools/scripts/define2mk.sed |2 ++ 1 file changed, 2 insertions(+) diff --git a/tools/scripts/define2mk.sed b/tools/scripts/define2mk.sed index 13e2845..c641edf 100644 --- a/tools/scripts/define2mk.sed +++ b/tools/scripts/define2mk.sed @@ -24,6 +24,8 @@ s/=\([0-9][0-9]*\)/=\1/; # ... and from hex numbers s/=\(0[Xx][0-9a-fA-F][0-9a-fA-F]*\)/=\1/; + # ... and from configs defined from other configs + s/=\(CONFIG_[A-Za-z0-9_][A-Za-z0-9_]*\)/=$(\1)/; # Change '1' and empty values to y (not perfect, but # supports conditional compilation in the makefiles s/=$/=y/; -- 1.7.10.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v11 13/30] arm: relocate_code(): Use __image_copy_end for end of relocation
Use __image_copy_end instead of __bss_start for the end of the image to
relocate. This is the same as commit 033ca72, but applied to all ARM start.S.
This is a more appropriate symbol naming for an image copy relocate feature,
and this also saves a useless copy of data put between __image_copy_end and
__bss_start in linker scripts (e.g. relocation information, or MMU
initialization tables used only before jumping to the relocated image).
Signed-off-by: Benoît Thébaudeau benoit.thebaud...@advansee.com
---
Changes in v11: None
Changes in v10:
- Rebase on current u-boot-arm/master.
Changes in v9: None
Changes in v8:
- Fix space before tab warning.
- Give more details in patch description.
Changes in v7: None
Changes in v6:
- New patch.
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None
arch/arm/cpu/arm1136/start.S |4 ++--
arch/arm/cpu/arm1176/start.S |6 +-
arch/arm/cpu/arm720t/start.S |6 +-
arch/arm/cpu/arm920t/ep93xx/u-boot.lds |3 +++
arch/arm/cpu/arm920t/start.S |6 +-
arch/arm/cpu/arm925t/start.S |6 +-
arch/arm/cpu/arm926ejs/start.S |6 +-
arch/arm/cpu/arm946es/start.S |6 +-
arch/arm/cpu/arm_intcm/start.S |6 +-
arch/arm/cpu/armv7/start.S |4 ++--
arch/arm/cpu/ixp/start.S |6 +-
arch/arm/cpu/ixp/u-boot.lds|2 ++
arch/arm/cpu/pxa/start.S |6 +-
arch/arm/cpu/s3c44b0/start.S |6 +-
arch/arm/cpu/sa1100/start.S|6 +-
board/actux1/u-boot.lds|3 +++
board/actux2/u-boot.lds|3 +++
board/actux3/u-boot.lds|3 +++
board/davinci/da8xxevm/u-boot-spl-hawk.lds |1 +
board/dvlhost/u-boot.lds |3 +++
board/samsung/smdk6400/u-boot-nand.lds |4
board/vpac270/u-boot-spl.lds |2 ++
nand_spl/board/karo/tx25/u-boot.lds|2 ++
nand_spl/board/samsung/smdk6400/u-boot.lds |2 ++
24 files changed, 87 insertions(+), 15 deletions(-)
diff --git a/arch/arm/cpu/arm1136/start.S b/arch/arm/cpu/arm1136/start.S
index 67fcc4f..e36d7d3 100644
--- a/arch/arm/cpu/arm1136/start.S
+++ b/arch/arm/cpu/arm1136/start.S
@@ -104,9 +104,9 @@ _TEXT_BASE:
_bss_start_ofs:
.word __bss_start - _start
-.global_image_copy_end_ofs
+.globl _image_copy_end_ofs
_image_copy_end_ofs:
- .word __image_copy_end - _start
+ .word __image_copy_end - _start
.globl _bss_end_ofs
_bss_end_ofs:
diff --git a/arch/arm/cpu/arm1176/start.S b/arch/arm/cpu/arm1176/start.S
index 17b1277..0b570d5 100644
--- a/arch/arm/cpu/arm1176/start.S
+++ b/arch/arm/cpu/arm1176/start.S
@@ -127,6 +127,10 @@ _TEXT_PHY_BASE:
_bss_start_ofs:
.word __bss_start - _start
+.globl _image_copy_end_ofs
+_image_copy_end_ofs:
+ .word __image_copy_end - _start
+
.globl _bss_end_ofs
_bss_end_ofs:
.word __bss_end - _start
@@ -251,7 +255,7 @@ relocate_code:
subsr9, r6, r0 /* r9 - relocation offset */
beq relocate_done /* skip relocation */
mov r1, r6 /* r1 - scratch for copy_loop */
- ldr r3, _bss_start_ofs
+ ldr r3, _image_copy_end_ofs
add r2, r0, r3 /* r2 - source end address */
copy_loop:
diff --git a/arch/arm/cpu/arm720t/start.S b/arch/arm/cpu/arm720t/start.S
index 95f4447..a640eaa 100644
--- a/arch/arm/cpu/arm720t/start.S
+++ b/arch/arm/cpu/arm720t/start.S
@@ -101,6 +101,10 @@ _TEXT_BASE:
_bss_start_ofs:
.word __bss_start - _start
+.globl _image_copy_end_ofs
+_image_copy_end_ofs:
+ .word __image_copy_end - _start
+
.globl _bss_end_ofs
_bss_end_ofs:
.word __bss_end - _start
@@ -166,7 +170,7 @@ relocate_code:
subsr9, r6, r0 /* r9 - relocation offset */
beq relocate_done /* skip relocation */
mov r1, r6 /* r1 - scratch for copy_loop */
- ldr r3, _bss_start_ofs
+ ldr r3, _image_copy_end_ofs
add r2, r0, r3 /* r2 - source end address */
copy_loop:
diff --git a/arch/arm/cpu/arm920t/ep93xx/u-boot.lds
b/arch/arm/cpu/arm920t/ep93xx/u-boot.lds
index e483820..d0b1ada 100644
--- a/arch/arm/cpu/arm920t/ep93xx/u-boot.lds
+++ b/arch/arm/cpu/arm920t/ep93xx/u-boot.lds
@@ -55,6 +55,9 @@ SECTIONS
}
. = ALIGN(4);
+
+ __image_copy_end = .;
+
__bss_start = .;
.bss : { *(.bss) }
__bss_end = .;
diff --git a/arch/arm/cpu/arm920t/start.S b/arch/arm/cpu/arm920t/start.S
index cd8c8db..940ce72 100644
--- a/arch/arm/cpu/arm920t/start.S
+++ b/arch/arm/cpu/arm920t/start.S
@@ -89,6 +89,10 @@ _TEXT_BASE:
_bss_start_ofs:
.word __bss_start -
[U-Boot] [PATCH v11 16/30] Makefile: Change CONFIG_SPL_PAD_TO to image offset
Change CONFIG_SPL_PAD_TO from a link address to an image offset since this is
more handy and closer to the purpose of this config.
Automatically define CONFIG_SPL_PAD_TO to CONFIG_SPL_MAX_SIZE (or 0 without
CONFIG_SPL_MAX_SIZE).
Test that CONFIG_SPL_PAD_TO = CONFIG_SPL_MAX_SIZE if CONFIG_SPL_PAD_TO is
non-zero.
Signed-off-by: Benoît Thébaudeau benoit.thebaud...@advansee.com
---
Changes in v11: None
Changes in v10: None
Changes in v9: None
Changes in v8:
- Rebase on latest u-boot-imx/master.
- Use CONFIG_SPL_PAD_TO instead of CONFIG_SPL_MAX_SIZE for u-boot-with-spl.bin
padding.
Changes in v7:
- Use u-boot-spl.bin instead of u-boot-spl in order to avoid having to use
--change-addresses.
Changes in v6:
- Fix size passed to --pad-to thanks to --change-addresses.
Changes in v5: None
Changes in v4:
- New patch.
Changes in v3: None
Changes in v2: None
Makefile |5 ++---
README|7 +--
include/config_fallbacks.h| 16
include/configs/MPC8313ERDB.h |2 +-
4 files changed, 24 insertions(+), 6 deletions(-)
diff --git a/Makefile b/Makefile
index 4ede937..8d0e2b8 100644
--- a/Makefile
+++ b/Makefile
@@ -486,9 +486,8 @@ $(obj)u-boot.dis: $(obj)u-boot
$(obj)u-boot-with-spl.bin: $(obj)spl/u-boot-spl.bin $(obj)u-boot.bin
- $(OBJCOPY) ${OBJCFLAGS} --pad-to=$(or $(CONFIG_SPL_PAD_TO),0) \
- -O binary $(obj)spl/u-boot-spl \
- $(obj)spl/u-boot-spl-pad.bin
+ $(OBJCOPY) ${OBJCFLAGS} --pad-to=$(CONFIG_SPL_PAD_TO) \
+ -I binary -O binary $ $(obj)spl/u-boot-spl-pad.bin
cat $(obj)spl/u-boot-spl-pad.bin $(obj)u-boot.bin $@
rm $(obj)spl/u-boot-spl-pad.bin
diff --git a/README b/README
index 9285ddd..6272853 100644
--- a/README
+++ b/README
@@ -2908,8 +2908,11 @@ FIT uImage format:
Support for lib/libgeneric.o in SPL binary
CONFIG_SPL_PAD_TO
- Linker address to which the SPL should be padded before
- appending the SPL payload.
+ Image offset to which the SPL should be padded before appending
+ the SPL payload. By default, this is defined as
+ CONFIG_SPL_MAX_SIZE, or 0 if CONFIG_SPL_MAX_SIZE is undefined.
+ CONFIG_SPL_PAD_TO must be either 0, meaning to append the SPL
+ payload without any padding, or = CONFIG_SPL_MAX_SIZE.
CONFIG_SPL_TARGET
Final target image containing SPL and payload. Some SPLs
diff --git a/include/config_fallbacks.h b/include/config_fallbacks.h
index 9298d0e..e59ee96 100644
--- a/include/config_fallbacks.h
+++ b/include/config_fallbacks.h
@@ -9,6 +9,22 @@
#ifndef __CONFIG_FALLBACKS_H
#define __CONFIG_FALLBACKS_H
+#ifdef CONFIG_SPL
+#ifdef CONFIG_SPL_PAD_TO
+#ifdef CONFIG_SPL_MAX_SIZE
+#if CONFIG_SPL_PAD_TO CONFIG_SPL_PAD_TO CONFIG_SPL_MAX_SIZE
+#error CONFIG_SPL_PAD_TO CONFIG_SPL_MAX_SIZE
+#endif
+#endif
+#else
+#ifdef CONFIG_SPL_MAX_SIZE
+#define CONFIG_SPL_PAD_TO CONFIG_SPL_MAX_SIZE
+#else
+#define CONFIG_SPL_PAD_TO 0
+#endif
+#endif
+#endif
+
#ifndef CONFIG_SYS_BAUDRATE_TABLE
#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
#endif
diff --git a/include/configs/MPC8313ERDB.h b/include/configs/MPC8313ERDB.h
index 275d4f2..c28dfe0 100644
--- a/include/configs/MPC8313ERDB.h
+++ b/include/configs/MPC8313ERDB.h
@@ -52,7 +52,7 @@
#define CONFIG_SYS_TEXT_BASE 0x0010 /* CONFIG_SYS_NAND_U_BOOT_DST */
#define CONFIG_SYS_TEXT_BASE_SPL 0xfff0
#define CONFIG_SPL_MAX_SIZE(4 * 1024)
-#define CONFIG_SPL_PAD_TO 0xfff04000
+#define CONFIG_SPL_PAD_TO 0x4000
#define CONFIG_SYS_NAND_U_BOOT_SIZE (512 10)
#define CONFIG_SYS_NAND_U_BOOT_DST 0x0010
--
1.7.10.4
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[U-Boot] [PATCH v11 19/30] arm926ejs: Remove deprecated and now unused NAND SPL
Signed-off-by: Benoît Thébaudeau benoit.thebaud...@advansee.com --- Changes in v11: None Changes in v10: - Rebase on current u-boot-arm/master. Changes in v9: None Changes in v8: None Changes in v7: None Changes in v6: - New patch. Changes in v5: None Changes in v4: None Changes in v3: None Changes in v2: None arch/arm/cpu/arm926ejs/start.S | 10 -- 1 file changed, 10 deletions(-) diff --git a/arch/arm/cpu/arm926ejs/start.S b/arch/arm/cpu/arm926ejs/start.S index 0a9cf1d..3c9de3f 100644 --- a/arch/arm/cpu/arm926ejs/start.S +++ b/arch/arm/cpu/arm926ejs/start.S @@ -120,15 +120,11 @@ _fiq: .globl _TEXT_BASE _TEXT_BASE: -#ifdef CONFIG_NAND_SPL /* deprecated, use instead CONFIG_SPL_BUILD */ - .word CONFIG_SYS_TEXT_BASE -#else #if defined(CONFIG_SPL_BUILD) defined(CONFIG_SPL_TEXT_BASE) .word CONFIG_SPL_TEXT_BASE #else .word CONFIG_SYS_TEXT_BASE #endif -#endif /* * These are defined in the board-specific linker script. @@ -152,12 +148,6 @@ _bss_end_ofs: _end_ofs: .word _end - _start -#ifdef CONFIG_NAND_U_BOOT -.globl _end -_end: - .word __bss_end -#endif - #ifdef CONFIG_USE_IRQ /* IRQ stack memory (calculated at run-time) */ .globl IRQ_STACK_START -- 1.7.10.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v11 07/30] nand: mxc: Fix debug trace in mxc_nand_read_oob_syndrome()
The page number indicated in the debug trace of mxc_nand_read_oob_syndrome() did
not match the page being worked on.
By the way, replace the GCC-specific __FUNCTION__ with __func__.
Signed-off-by: Benoît Thébaudeau benoit.thebaud...@advansee.com
Acked-by: Scott Wood scottw...@freescale.com
---
Changes in v11: None
Changes in v10: None
Changes in v9: None
Changes in v8: None
Changes in v7: None
Changes in v6: None
Changes in v5:
- Replace __FUNCTION__ with __func__.
Changes in v4:
- New patch.
Changes in v3: None
Changes in v2: None
drivers/mtd/nand/mxc_nand.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mtd/nand/mxc_nand.c b/drivers/mtd/nand/mxc_nand.c
index db72cdc..62d6965 100644
--- a/drivers/mtd/nand/mxc_nand.c
+++ b/drivers/mtd/nand/mxc_nand.c
@@ -409,7 +409,7 @@ static int mxc_nand_read_oob_syndrome(struct mtd_info *mtd,
MTDDEBUG(MTD_DEBUG_LEVEL0,
%s: Reading OOB area of page %u to oob %p\n,
-__FUNCTION__, host-page_addr, buf);
+__func__, page, buf);
chip-cmdfunc(mtd, NAND_CMD_READOOB, mtd-writesize, page);
for (i = 0; i chip-ecc.steps; i++) {
--
1.7.10.4
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[U-Boot] [PATCH v11 06/30] imx: mx53ard: Add support for NAND Flash
Add support for the Samsung K9LAG08U0M NAND Flash (2-GiB MLC NAND Flash, 2-kiB
pages, 256-kiB blocks, 30-ns R/W cycles, 1 CS) on mx53ard.
eNFC_CLK_ROOT is set up with a cycle time of 37.5 ns (400 MHz / 3 / 5) for this
board, which satisfies the 30-ns NF R/W cycle requirement.
Signed-off-by: Benoît Thébaudeau benoit.thebaud...@advansee.com
Tested-by: Fabio Estevam fabio.este...@freescale.com
---
Changes in v11: None
Changes in v10: None
Changes in v9: None
Changes in v8:
- Fix NFC pad setup using Freescale's.
Changes in v7: None
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3:
- New patch.
Changes in v2: None
board/freescale/mx53ard/mx53ard.c | 66 +
include/configs/mx53ard.h | 10 ++
2 files changed, 76 insertions(+)
diff --git a/board/freescale/mx53ard/mx53ard.c
b/board/freescale/mx53ard/mx53ard.c
index 2fc8570..8d433a3 100644
--- a/board/freescale/mx53ard/mx53ard.c
+++ b/board/freescale/mx53ard/mx53ard.c
@@ -58,6 +58,71 @@ void dram_init_banksize(void)
gd-bd-bi_dram[1].size = PHYS_SDRAM_2_SIZE;
}
+#ifdef CONFIG_NAND_MXC
+static void setup_iomux_nand(void)
+{
+ u32 i, reg;
+ #define M4IF_GENP_WEIM_MM_MASK 0x0001
+ #define WEIM_GCR2_MUX16_BYP_GRANT_MASK 0x1000
+
+ reg = __raw_readl(M4IF_BASE_ADDR + 0xc);
+ reg = ~M4IF_GENP_WEIM_MM_MASK;
+ __raw_writel(reg, M4IF_BASE_ADDR + 0xc);
+ for (i = 0x4; i 0x94; i += 0x18) {
+ reg = __raw_readl(WEIM_BASE_ADDR + i);
+ reg = ~WEIM_GCR2_MUX16_BYP_GRANT_MASK;
+ __raw_writel(reg, WEIM_BASE_ADDR + i);
+ }
+
+ mxc_request_iomux(MX53_PIN_NANDF_CS0, IOMUX_CONFIG_ALT0);
+ mxc_iomux_set_pad(MX53_PIN_NANDF_CS0, PAD_CTL_DRV_HIGH);
+ mxc_request_iomux(MX53_PIN_NANDF_CS1, IOMUX_CONFIG_ALT0);
+ mxc_iomux_set_pad(MX53_PIN_NANDF_CS1, PAD_CTL_DRV_HIGH);
+ mxc_request_iomux(MX53_PIN_NANDF_RB0, IOMUX_CONFIG_ALT0);
+ mxc_iomux_set_pad(MX53_PIN_NANDF_RB0, PAD_CTL_PKE_ENABLE |
+ PAD_CTL_PUE_PULL | PAD_CTL_100K_PU);
+ mxc_request_iomux(MX53_PIN_NANDF_CLE, IOMUX_CONFIG_ALT0);
+ mxc_iomux_set_pad(MX53_PIN_NANDF_CLE, PAD_CTL_DRV_HIGH);
+ mxc_request_iomux(MX53_PIN_NANDF_ALE, IOMUX_CONFIG_ALT0);
+ mxc_iomux_set_pad(MX53_PIN_NANDF_ALE, PAD_CTL_DRV_HIGH);
+ mxc_request_iomux(MX53_PIN_NANDF_WP_B, IOMUX_CONFIG_ALT0);
+ mxc_iomux_set_pad(MX53_PIN_NANDF_WP_B, PAD_CTL_PKE_ENABLE |
+ PAD_CTL_PUE_PULL | PAD_CTL_100K_PU);
+ mxc_request_iomux(MX53_PIN_NANDF_RE_B, IOMUX_CONFIG_ALT0);
+ mxc_iomux_set_pad(MX53_PIN_NANDF_RE_B, PAD_CTL_DRV_HIGH);
+ mxc_request_iomux(MX53_PIN_NANDF_WE_B, IOMUX_CONFIG_ALT0);
+ mxc_iomux_set_pad(MX53_PIN_NANDF_WE_B, PAD_CTL_DRV_HIGH);
+ mxc_request_iomux(MX53_PIN_EIM_DA0, IOMUX_CONFIG_ALT0);
+ mxc_iomux_set_pad(MX53_PIN_EIM_DA0, PAD_CTL_PKE_ENABLE |
+ PAD_CTL_100K_PU | PAD_CTL_DRV_HIGH);
+ mxc_request_iomux(MX53_PIN_EIM_DA1, IOMUX_CONFIG_ALT0);
+ mxc_iomux_set_pad(MX53_PIN_EIM_DA1, PAD_CTL_PKE_ENABLE |
+ PAD_CTL_100K_PU | PAD_CTL_DRV_HIGH);
+ mxc_request_iomux(MX53_PIN_EIM_DA2, IOMUX_CONFIG_ALT0);
+ mxc_iomux_set_pad(MX53_PIN_EIM_DA2, PAD_CTL_PKE_ENABLE |
+ PAD_CTL_100K_PU | PAD_CTL_DRV_HIGH);
+ mxc_request_iomux(MX53_PIN_EIM_DA3, IOMUX_CONFIG_ALT0);
+ mxc_iomux_set_pad(MX53_PIN_EIM_DA3, PAD_CTL_PKE_ENABLE |
+ PAD_CTL_100K_PU | PAD_CTL_DRV_HIGH);
+ mxc_request_iomux(MX53_PIN_EIM_DA4, IOMUX_CONFIG_ALT0);
+ mxc_iomux_set_pad(MX53_PIN_EIM_DA4, PAD_CTL_PKE_ENABLE |
+ PAD_CTL_100K_PU | PAD_CTL_DRV_HIGH);
+ mxc_request_iomux(MX53_PIN_EIM_DA5, IOMUX_CONFIG_ALT0);
+ mxc_iomux_set_pad(MX53_PIN_EIM_DA5, PAD_CTL_PKE_ENABLE |
+ PAD_CTL_100K_PU | PAD_CTL_DRV_HIGH);
+ mxc_request_iomux(MX53_PIN_EIM_DA6, IOMUX_CONFIG_ALT0);
+ mxc_iomux_set_pad(MX53_PIN_EIM_DA6, PAD_CTL_PKE_ENABLE |
+ PAD_CTL_100K_PU | PAD_CTL_DRV_HIGH);
+ mxc_request_iomux(MX53_PIN_EIM_DA7, IOMUX_CONFIG_ALT0);
+ mxc_iomux_set_pad(MX53_PIN_EIM_DA7, PAD_CTL_PKE_ENABLE |
+ PAD_CTL_100K_PU | PAD_CTL_DRV_HIGH);
+}
+#else
+static void setup_iomux_nand(void)
+{
+}
+#endif
+
static void setup_iomux_uart(void)
{
/* UART1 RXD */
@@ -277,6 +342,7 @@ static void weim_cs1_settings(void)
int board_early_init_f(void)
{
+ setup_iomux_nand();
setup_iomux_uart();
return 0;
}
diff --git a/include/configs/mx53ard.h b/include/configs/mx53ard.h
index 62cb42b..148f7a2 100644
--- a/include/configs/mx53ard.h
+++ b/include/configs/mx53ard.h
@@ -41,6
[U-Boot] [PATCH v11 22/30] .gitignore: Add /SPL
Signed-off-by: Benoît Thébaudeau benoit.thebaud...@advansee.com --- Changes in v11: None Changes in v10: None Changes in v9: None Changes in v8: - New patch. Changes in v7: None Changes in v6: None Changes in v5: None Changes in v4: None Changes in v3: None Changes in v2: None .gitignore |1 + 1 file changed, 1 insertion(+) diff --git a/.gitignore b/.gitignore index be09894..bff721e 100644 --- a/.gitignore +++ b/.gitignore @@ -25,6 +25,7 @@ # /MLO +/SPL /System.map /u-boot /u-boot.hex -- 1.7.10.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v11 21/30] Makefile: Move SHELL setup to config.mk
make never uses the SHELL variable from the environment. Instead, it uses /bin/sh, or the value assigned to the SHELL variable by the Makefile. This makes the export of the SHELL variable useless for sub-makes (but still useful for the environment of recipes). However, we want all makes to use the same shell. This patch fixes this issue by moving the SHELL variable setup and export to the top config.mk, so that all Makefile-s including it use the same shell. Since BASH is used by default, this makes it possible to use things like 'echo -e ...' in sub-makes, which would otherwise fail e.g. with /bin/sh symlinked to /bin/dash on Ubuntu. Signed-off-by: Benoît Thébaudeau benoit.thebaud...@advansee.com Reviewed-by: Tom Rini tr...@ti.com --- Changes in v11: None Changes in v10: - Rebase on current u-boot-arm/master. Changes in v9: None Changes in v8: - New patch. Changes in v7: None Changes in v6: None Changes in v5: None Changes in v4: None Changes in v3: None Changes in v2: None Makefile |7 +-- config.mk |7 +++ 2 files changed, 8 insertions(+), 6 deletions(-) diff --git a/Makefile b/Makefile index 8d0e2b8..caca851 100644 --- a/Makefile +++ b/Makefile @@ -46,12 +46,7 @@ HOSTARCH := $(shell uname -m | \ HOSTOS := $(shell uname -s | tr '[:upper:]' '[:lower:]' | \ sed -e 's/\(cygwin\).*/cygwin/') -# Set shell to bash if possible, otherwise fall back to sh -SHELL := $(shell if [ -x $$BASH ]; then echo $$BASH; \ - else if [ -x /bin/bash ]; then echo /bin/bash; \ - else echo sh; fi; fi) - -export HOSTARCH HOSTOS SHELL +export HOSTARCH HOSTOS # Deal with colliding definitions from tcsh etc. VENDOR= diff --git a/config.mk b/config.mk index 4e6a19b..1fd109f 100644 --- a/config.mk +++ b/config.mk @@ -23,6 +23,13 @@ # +# Set shell to bash if possible, otherwise fall back to sh +SHELL := $(shell if [ -x $$BASH ]; then echo $$BASH; \ + else if [ -x /bin/bash ]; then echo /bin/bash; \ + else echo sh; fi; fi) + +export SHELL + ifeq ($(CURDIR),$(SRCTREE)) dir := else -- 1.7.10.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v11 17/30] imx: Fix automatic make targets for imx images
Automatically build the 'u-boot.imx' (i.e. imx header + u-boot.bin) and 'SPL' (i.e. imx header + u-boot-spl.bin) make targets for all imx processors supporting this header, so for arm926ejs, arm1136 and armv7. Some combinations were missing. At the same time, fix the build of SPL targets not supporting the imx header on arm1136. For arm1136, the 'SPL' make target was forced to build in all cases if CONFIG_SPL_BUILD was defined, even for non-imx platforms or imx setups without an imx header. Signed-off-by: Benoît Thébaudeau benoit.thebaud...@advansee.com --- Changes in v11: None Changes in v10: None Changes in v9: None Changes in v8: None Changes in v7: None Changes in v6: - New patch, extracted from nand: mxc: Switch NAND SPL to generic SPL. Changes in v5: None Changes in v4: None Changes in v3: None Changes in v2: None arch/arm/cpu/arm1136/config.mk |7 +++ arch/arm/cpu/arm926ejs/config.mk |8 ++-- arch/arm/cpu/armv7/config.mk |6 ++ 3 files changed, 19 insertions(+), 2 deletions(-) diff --git a/arch/arm/cpu/arm1136/config.mk b/arch/arm/cpu/arm1136/config.mk index 9092d91..797d122 100644 --- a/arch/arm/cpu/arm1136/config.mk +++ b/arch/arm/cpu/arm1136/config.mk @@ -31,6 +31,13 @@ PLATFORM_CPPFLAGS += -march=armv5 # = PF_RELFLAGS_SLB_AT := $(call cc-option,-mshort-load-bytes,$(call cc-option,-malignment-traps,)) PLATFORM_RELFLAGS += $(PF_RELFLAGS_SLB_AT) + +ifneq ($(CONFIG_IMX_CONFIG),) +ifdef CONFIG_SPL ifdef CONFIG_SPL_BUILD ALL-y += $(OBJTREE)/SPL endif +else +ALL-y += $(obj)u-boot.imx +endif +endif diff --git a/arch/arm/cpu/arm926ejs/config.mk b/arch/arm/cpu/arm926ejs/config.mk index 6a3a1bb..f0e31d1 100644 --- a/arch/arm/cpu/arm926ejs/config.mk +++ b/arch/arm/cpu/arm926ejs/config.mk @@ -33,7 +33,11 @@ PF_RELFLAGS_SLB_AT := $(call cc-option,-mshort-load-bytes,$(call cc-option,-mali PLATFORM_RELFLAGS += $(PF_RELFLAGS_SLB_AT) ifneq ($(CONFIG_IMX_CONFIG),) - +ifdef CONFIG_SPL +ifdef CONFIG_SPL_BUILD +ALL-y += $(OBJTREE)/SPL +endif +else ALL-y += $(obj)u-boot.imx - +endif endif diff --git a/arch/arm/cpu/armv7/config.mk b/arch/arm/cpu/armv7/config.mk index 9c3e2f3..56b8053 100644 --- a/arch/arm/cpu/armv7/config.mk +++ b/arch/arm/cpu/armv7/config.mk @@ -40,5 +40,11 @@ PF_NO_UNALIGNED := $(call cc-option, -mno-unaligned-access,) PLATFORM_NO_UNALIGNED := $(PF_NO_UNALIGNED) ifneq ($(CONFIG_IMX_CONFIG),) +ifdef CONFIG_SPL +ifdef CONFIG_SPL_BUILD +ALL-y += $(OBJTREE)/SPL +endif +else ALL-y += $(obj)u-boot.imx endif +endif -- 1.7.10.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v11 20/30] arm: Remove unused relocate_code() parameters
Commit e05e5de7fae5bec79617e113916dac6631251156 made the 2 1st parameters of ARM's relocate_code() useless since it moved the code handling them to crt0.S. So, drop these parameters. Signed-off-by: Benoît Thébaudeau benoit.thebaud...@advansee.com --- Changes in v11: None Changes in v10: None Changes in v9: None Changes in v8: - Update the function prototype in start.S comments. Changes in v7: None Changes in v6: - New patch. Changes in v5: None Changes in v4: None Changes in v3: None Changes in v2: None arch/arm/cpu/arm1136/start.S |6 ++ arch/arm/cpu/arm1176/start.S |6 ++ arch/arm/cpu/arm720t/start.S |6 ++ arch/arm/cpu/arm920t/start.S |6 ++ arch/arm/cpu/arm925t/start.S |6 ++ arch/arm/cpu/arm926ejs/start.S |6 ++ arch/arm/cpu/arm946es/start.S |6 ++ arch/arm/cpu/arm_intcm/start.S |6 ++ arch/arm/cpu/armv7/start.S |6 ++ arch/arm/cpu/ixp/start.S |6 ++ arch/arm/cpu/pxa/start.S |6 ++ arch/arm/cpu/s3c44b0/start.S |6 ++ arch/arm/cpu/sa1100/start.S|6 ++ arch/arm/lib/crt0.S|8 +++- board/freescale/mx31pdk/mx31pdk.c |2 +- board/karo/tx25/tx25.c |2 +- board/samsung/smdk6400/smdk6400_nand_spl.c |3 +-- include/common.h |8 18 files changed, 36 insertions(+), 65 deletions(-) diff --git a/arch/arm/cpu/arm1136/start.S b/arch/arm/cpu/arm1136/start.S index e36d7d3..ad24b80 100644 --- a/arch/arm/cpu/arm1136/start.S +++ b/arch/arm/cpu/arm1136/start.S @@ -174,15 +174,13 @@ next: /*--*/ /* - * void relocate_code (addr_sp, gd, addr_moni) + * void relocate_code(addr_moni) * * This function relocates the monitor code. */ .globl relocate_code relocate_code: - mov r4, r0 /* save addr_sp */ - mov r5, r1 /* save addr of gd */ - mov r6, r2 /* save addr of destination */ + mov r6, r0 /* save addr of destination */ adr r0, _start subsr9, r6, r0 /* r9 - relocation offset */ diff --git a/arch/arm/cpu/arm1176/start.S b/arch/arm/cpu/arm1176/start.S index 0b570d5..5654c19 100644 --- a/arch/arm/cpu/arm1176/start.S +++ b/arch/arm/cpu/arm1176/start.S @@ -241,15 +241,13 @@ skip_tcmdisable: /*--*/ /* - * void relocate_code (addr_sp, gd, addr_moni) + * void relocate_code(addr_moni) * * This function relocates the monitor code. */ .globl relocate_code relocate_code: - mov r4, r0 /* save addr_sp */ - mov r5, r1 /* save addr of gd */ - mov r6, r2 /* save addr of destination */ + mov r6, r0 /* save addr of destination */ adr r0, _start subsr9, r6, r0 /* r9 - relocation offset */ diff --git a/arch/arm/cpu/arm720t/start.S b/arch/arm/cpu/arm720t/start.S index a640eaa..9facc7e 100644 --- a/arch/arm/cpu/arm720t/start.S +++ b/arch/arm/cpu/arm720t/start.S @@ -156,15 +156,13 @@ reset: /*--*/ /* - * void relocate_code (addr_sp, gd, addr_moni) + * void relocate_code(addr_moni) * * This function relocates the monitor code. */ .globl relocate_code relocate_code: - mov r4, r0 /* save addr_sp */ - mov r5, r1 /* save addr of gd */ - mov r6, r2 /* save addr of destination */ + mov r6, r0 /* save addr of destination */ adr r0, _start subsr9, r6, r0 /* r9 - relocation offset */ diff --git a/arch/arm/cpu/arm920t/start.S b/arch/arm/cpu/arm920t/start.S index 940ce72..6250025 100644 --- a/arch/arm/cpu/arm920t/start.S +++ b/arch/arm/cpu/arm920t/start.S @@ -195,15 +195,13 @@ copyex: /*--*/ /* - * void relocate_code (addr_sp, gd, addr_moni) + * void relocate_code(addr_moni) * * This function relocates the monitor code. */ .globl relocate_code relocate_code: - mov r4, r0 /* save addr_sp */ - mov r5, r1 /* save addr of gd */ - mov r6, r2 /* save addr of destination */ + mov r6, r0 /* save addr of destination */ adr r0, _start subsr9, r6, r0 /* r9 - relocation offset */ diff --git a/arch/arm/cpu/arm925t/start.S b/arch/arm/cpu/arm925t/start.S index ed683b4..021e241 100644 --- a/arch/arm/cpu/arm925t/start.S +++ b/arch/arm/cpu/arm925t/start.S @@ -185,15 +185,13 @@ poll1: /*--*/
[U-Boot] [PATCH v11 24/30] imx: Add u-boot-with-nand-spl.imx make target
This image combines the SPL with the i.MX header, the FCB and U-Boot.
For i.MX25/35/51, the FCB is ignored by the boot ROM, so this image is just
useful because it can be programmed on a NAND Flash page boundary.
For i.MX53, the FCB is required by the boot ROM.
This does not support i.MX6 so far because its FCB is more complicated.
Signed-off-by: Benoît Thébaudeau benoit.thebaud...@advansee.com
---
Changes in v11: None
Changes in v10: None
Changes in v9: None
Changes in v8:
- Change the dummy 1024-byte header into a true FCB in order to add support for
i.MX53.
- Use CONFIG_SPL_PAD_TO instead of CONFIG_SPL_MAX_SIZE for padding, which
allows to pad the SPL after adding the i.MX header and the FCB, which may
save time when the boot ROM loads the SPL.
- Add /u-boot-with-nand-spl.imx to .gitignore.
Changes in v7:
- New patch.
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None
.gitignore |1 +
Makefile |5 +
arch/arm/imx-common/Makefile | 11 +++
3 files changed, 17 insertions(+)
diff --git a/.gitignore b/.gitignore
index e42d837..ed21203 100644
--- a/.gitignore
+++ b/.gitignore
@@ -31,6 +31,7 @@
/u-boot.hex
/u-boot.imx
/u-boot-with-spl.imx
+/u-boot-with-nand-spl.imx
/u-boot.map
/u-boot.srec
/u-boot.ldr
diff --git a/Makefile b/Makefile
index e22faa5..df03974 100644
--- a/Makefile
+++ b/Makefile
@@ -490,6 +490,10 @@ $(obj)u-boot-with-spl.imx: $(obj)spl/u-boot-spl.bin
$(obj)u-boot.bin
$(MAKE) -C $(SRCTREE)/arch/arm/imx-common \
$(OBJTREE)/u-boot-with-spl.imx
+$(obj)u-boot-with-nand-spl.imx: $(obj)spl/u-boot-spl.bin $(obj)u-boot.bin
+ $(MAKE) -C $(SRCTREE)/arch/arm/imx-common \
+ $(OBJTREE)/u-boot-with-nand-spl.imx
+
$(obj)u-boot.ubl: $(obj)u-boot-with-spl.bin
$(obj)tools/mkimage -n $(UBL_CONFIG) -T ublimage \
-e $(CONFIG_SYS_TEXT_BASE) -d $ $(obj)u-boot.ubl
@@ -855,6 +859,7 @@ clobber:tidy
@rm -f $(obj)u-boot.pbl
@rm -f $(obj)u-boot.imx
@rm -f $(obj)u-boot-with-spl.imx
+ @rm -f $(obj)u-boot-with-nand-spl.imx
@rm -f $(obj)u-boot.ubl
@rm -f $(obj)u-boot.ais
@rm -f $(obj)u-boot.dtb
diff --git a/arch/arm/imx-common/Makefile b/arch/arm/imx-common/Makefile
index f59ae6f..44b6822 100644
--- a/arch/arm/imx-common/Makefile
+++ b/arch/arm/imx-common/Makefile
@@ -61,6 +61,17 @@ $(OBJTREE)/u-boot-with-spl.imx: $(OBJTREE)/SPL
$(OBJTREE)/u-boot.bin
cat $(OBJTREE)/spl/u-boot-spl-pad.imx $(OBJTREE)/u-boot.bin $@
rm $(OBJTREE)/spl/u-boot-spl-pad.imx
+$(OBJTREE)/u-boot-with-nand-spl.imx: $(OBJTREE)/SPL $(OBJTREE)/u-boot.bin
+ (echo -ne '\x00\x00\x00\x00\x46\x43\x42\x20\x01' \
+ dd bs=1015 count=1 if=/dev/zero 2/dev/null) | \
+ cat - $ $(OBJTREE)/spl/u-boot-nand-spl.imx
+ $(OBJCOPY) ${OBJCFLAGS} --pad-to=$(CONFIG_SPL_PAD_TO) \
+ -I binary -O binary $(OBJTREE)/spl/u-boot-nand-spl.imx \
+ $(OBJTREE)/spl/u-boot-nand-spl-pad.imx
+ rm $(OBJTREE)/spl/u-boot-nand-spl.imx
+ cat $(OBJTREE)/spl/u-boot-nand-spl-pad.imx $(OBJTREE)/u-boot.bin $@
+ rm $(OBJTREE)/spl/u-boot-nand-spl-pad.imx
+
#
--
1.7.10.4
___
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[U-Boot] [PATCH v11 23/30] imx: Add u-boot-with-spl.imx make target
This image combines the SPL with the i.MX header and U-Boot. This is a
convenient way of having a single image to program on some boot devices.
The i.MX header has to be added to the SPL before appending U-Boot, so that the
boot ROM loads only the SPL.
Signed-off-by: Benoît Thébaudeau benoit.thebaud...@advansee.com
---
Changes in v11: None
Changes in v10: None
Changes in v9: None
Changes in v8:
- Use CONFIG_SPL_PAD_TO instead of CONFIG_SPL_MAX_SIZE for padding, which
allows to pad the SPL after adding the i.MX header, which may save time when
the boot ROM loads the SPL.
- Add /u-boot-with-spl.imx to .gitignore.
Changes in v7:
- New patch.
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None
.gitignore |1 +
Makefile |5 +
arch/arm/imx-common/Makefile |6 ++
3 files changed, 12 insertions(+)
diff --git a/.gitignore b/.gitignore
index bff721e..e42d837 100644
--- a/.gitignore
+++ b/.gitignore
@@ -30,6 +30,7 @@
/u-boot
/u-boot.hex
/u-boot.imx
+/u-boot-with-spl.imx
/u-boot.map
/u-boot.srec
/u-boot.ldr
diff --git a/Makefile b/Makefile
index caca851..e22faa5 100644
--- a/Makefile
+++ b/Makefile
@@ -486,6 +486,10 @@ $(obj)u-boot-with-spl.bin: $(obj)spl/u-boot-spl.bin
$(obj)u-boot.bin
cat $(obj)spl/u-boot-spl-pad.bin $(obj)u-boot.bin $@
rm $(obj)spl/u-boot-spl-pad.bin
+$(obj)u-boot-with-spl.imx: $(obj)spl/u-boot-spl.bin $(obj)u-boot.bin
+ $(MAKE) -C $(SRCTREE)/arch/arm/imx-common \
+ $(OBJTREE)/u-boot-with-spl.imx
+
$(obj)u-boot.ubl: $(obj)u-boot-with-spl.bin
$(obj)tools/mkimage -n $(UBL_CONFIG) -T ublimage \
-e $(CONFIG_SYS_TEXT_BASE) -d $ $(obj)u-boot.ubl
@@ -850,6 +854,7 @@ clobber:tidy
@rm -f $(obj)u-boot.kwb
@rm -f $(obj)u-boot.pbl
@rm -f $(obj)u-boot.imx
+ @rm -f $(obj)u-boot-with-spl.imx
@rm -f $(obj)u-boot.ubl
@rm -f $(obj)u-boot.ais
@rm -f $(obj)u-boot.dtb
diff --git a/arch/arm/imx-common/Makefile b/arch/arm/imx-common/Makefile
index 428a57e..f59ae6f 100644
--- a/arch/arm/imx-common/Makefile
+++ b/arch/arm/imx-common/Makefile
@@ -55,6 +55,12 @@ $(OBJTREE)/SPL: $(OBJTREE)/spl/u-boot-spl.bin
$(OBJTREE)/$(patsubst %,%,$(CONF
$(OBJTREE)/tools/mkimage -n $(filter-out %.bin,$^) -T imximage \
-e $(CONFIG_SPL_TEXT_BASE) -d $ $@
+$(OBJTREE)/u-boot-with-spl.imx: $(OBJTREE)/SPL $(OBJTREE)/u-boot.bin
+ $(OBJCOPY) ${OBJCFLAGS} --pad-to=$(CONFIG_SPL_PAD_TO) \
+ -I binary -O binary $ $(OBJTREE)/spl/u-boot-spl-pad.imx
+ cat $(OBJTREE)/spl/u-boot-spl-pad.imx $(OBJTREE)/u-boot.bin $@
+ rm $(OBJTREE)/spl/u-boot-spl-pad.imx
+
#
--
1.7.10.4
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[U-Boot] [PATCH v11 18/30] nand: mxc: Switch NAND SPL to generic SPL
This also fixes support for mx31pdk and tx25, which had been broken by commit e05e5de7fae5bec79617e113916dac6631251156. Signed-off-by: Benoît Thébaudeau benoit.thebaud...@advansee.com Acked-by: Scott Wood scottw...@freescale.com Tested-by: Fabio Estevam fabio.este...@freescale.com --- Changes in v11: - mx31pdk: Rename u-boot-nand.bin to u-boot-with-spl.bin (new target binary name) in prg_uboot command. - mx31pdk: Enlarge CONFIG_SYS_NAND_U_BOOT_SIZE from 0x32000 to 0x3f800 (which corresponds to the size allocated for this purpose in NAND Flash) in order to leave enough room whatever the toolchain used. - mx31pdk: Set back CONFIG_SPL_TEXT_BASE and CONFIG_SYS_TEXT_BASE by 0x0010 because the original U-Boot at CONFIG_SYS_TEXT_BASE was overlapping the global data being written prior to relocation by arch/arm/lib/board.c:board_init_f(). Changes in v10: - Rebase on current u-boot-arm/master, especially following commits 3ebd1cb and 65cdd64, which make it necessary to change CONFIG_SPL_LDSCRIPT to arch/$(ARCH)/cpu/u-boot-spl.lds for mx31pdk.h and tx25.h. Changes in v9: None Changes in v8: - Update doc/README.arm-relocation. - Drop useless line feed at end of inline asm. - Set CONFIG_SYS_NAND_U_BOOT_OFFS to CONFIG_SPL_PAD_TO instead of CONFIG_SPL_MAX_SIZE (this is a cosmetic change since they now have the same value). - Enlarge CONFIG_SYS_NAND_U_BOOT_SIZE from 0x3 to 0x32000 to let u-boot.bin fit in for mx31pdk. Changes in v7: None Changes in v6: - Automate 'u-boot.imx' and 'SPL' make targets for all imx processors. - Move board_init_f() to board.c. - Get rid of board SPL linker scripts. - Define CONFIG_SYS_NAND_U_BOOT_OFFS as CONFIG_SPL_MAX_SIZE rather than duplicating the constant value. - Define CONFIG_SYS_NAND_U_BOOT_DST as CONFIG_SYS_TEXT_BASE rather than duplicating the constant value. - Pass 0 as the 1st argument to relocate_code() since it's unused. - Fix stack pointers. - Rebase on latest u-boot-imx/master. - Move unrelated changes to separate patches. Changes in v5: - Remove spaces between function name and open parenthesis. - Fix mx31pdk and tx25 Makefile-s and SPL linker scripts. - Remove the useless definition of CONFIG_SPL_LDSCRIPT. - Fix the call to nand_boot(). Changes in v4: - New patch. Changes in v3: None Changes in v2: None arch/arm/cpu/arm926ejs/start.S |3 +- board/freescale/mx31pdk/Makefile |3 + board/freescale/mx31pdk/config.mk |5 -- board/freescale/mx31pdk/mx31pdk.c |8 ++ board/karo/tx25/Makefile |4 +- board/karo/tx25/config.mk |5 -- board/karo/tx25/tx25.c |8 ++ boards.cfg |2 +- doc/README.arm-relocation | 14 ++-- drivers/mtd/nand/Makefile |1 + drivers/mtd/nand/mxc_nand.c| 10 +-- include/fsl_nfc.h = drivers/mtd/nand/mxc_nand.h | 10 +-- .../mtd/nand/mxc_nand_spl.c| 26 ++ include/configs/mx31pdk.h | 21 +++-- include/configs/tx25.h | 22 +++-- nand_spl/board/freescale/mx31pdk/Makefile | 63 -- nand_spl/board/freescale/mx31pdk/u-boot.lds| 87 nand_spl/board/karo/tx25/Makefile | 84 --- nand_spl/board/karo/tx25/config.mk |1 - nand_spl/board/karo/tx25/u-boot.lds| 87 20 files changed, 81 insertions(+), 383 deletions(-) delete mode 100644 board/freescale/mx31pdk/config.mk delete mode 100644 board/karo/tx25/config.mk rename include/fsl_nfc.h = drivers/mtd/nand/mxc_nand.h (98%) rename nand_spl/nand_boot_fsl_nfc.c = drivers/mtd/nand/mxc_nand_spl.c (92%) delete mode 100644 nand_spl/board/freescale/mx31pdk/Makefile delete mode 100644 nand_spl/board/freescale/mx31pdk/u-boot.lds delete mode 100644 nand_spl/board/karo/tx25/Makefile delete mode 100644 nand_spl/board/karo/tx25/config.mk delete mode 100644 nand_spl/board/karo/tx25/u-boot.lds diff --git a/arch/arm/cpu/arm926ejs/start.S b/arch/arm/cpu/arm926ejs/start.S index 552279f..0a9cf1d 100644 --- a/arch/arm/cpu/arm926ejs/start.S +++ b/arch/arm/cpu/arm926ejs/start.S @@ -200,7 +200,6 @@ reset: /*--*/ -#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_NAND_SPL) /* * void relocate_code (addr_sp, gd, addr_moni) * @@ -269,6 +268,8 @@ relocate_done: bx lr +#ifndef CONFIG_SPL_BUILD + _rel_dyn_start_ofs: .word __rel_dyn_start - _start _rel_dyn_end_ofs: diff --git a/board/freescale/mx31pdk/Makefile b/board/freescale/mx31pdk/Makefile index 5b7cafd..b910722 100644 --- a/board/freescale/mx31pdk/Makefile +++
[U-Boot] [PATCH v11 28/30] arm: Remove deprecated and now unused NAND SPL
Signed-off-by: Benoît Thébaudeau benoit.thebaud...@advansee.com --- Changes in v11: None Changes in v10: None Changes in v9: None Changes in v8: - New patch. Changes in v7: None Changes in v6: None Changes in v5: None Changes in v4: None Changes in v3: None Changes in v2: None arch/arm/config.mk |2 -- arch/arm/cpu/arm1176/start.S | 12 arch/arm/lib/crt0.S | 16 ++-- 3 files changed, 6 insertions(+), 24 deletions(-) diff --git a/arch/arm/config.mk b/arch/arm/config.mk index e7839be..461899e 100644 --- a/arch/arm/config.mk +++ b/arch/arm/config.mk @@ -87,9 +87,7 @@ endif endif # needed for relocation -ifndef CONFIG_NAND_SPL LDFLAGS_u-boot += -pie -endif # # FIXME: binutils versions 2.22 have a bug in the assembler where diff --git a/arch/arm/cpu/arm1176/start.S b/arch/arm/cpu/arm1176/start.S index 5654c19..a7cf728 100644 --- a/arch/arm/cpu/arm1176/start.S +++ b/arch/arm/cpu/arm1176/start.S @@ -51,7 +51,7 @@ .globl _start _start: b reset -#ifndef CONFIG_NAND_SPL +#ifndef CONFIG_SPL_BUILD ldr pc, _undefined_instruction ldr pc, _software_interrupt ldr pc, _prefetch_abort @@ -98,15 +98,11 @@ _end_vect: .globl _TEXT_BASE _TEXT_BASE: -#ifdef CONFIG_NAND_SPL /* deprecated, use instead CONFIG_SPL_BUILD */ - .word CONFIG_SYS_TEXT_BASE -#else #if defined(CONFIG_SPL_BUILD) defined(CONFIG_SPL_TEXT_BASE) .word CONFIG_SPL_TEXT_BASE #else .word CONFIG_SYS_TEXT_BASE #endif -#endif /* * Below variable is very important because we use MMU in U-Boot. @@ -176,7 +172,7 @@ cpu_init_crit: * When booting from NAND - it has definitely been a reset, so, no need * to flush caches and disable the MMU */ -#ifndef CONFIG_NAND_SPL +#ifndef CONFIG_SPL_BUILD /* * flush v4 I/D caches */ @@ -361,7 +357,7 @@ c_runtime_cpu_setup: mov pc, lr -#ifndef CONFIG_NAND_SPL +#ifndef CONFIG_SPL_BUILD /* * we assume that cache operation is done before. (eg. cleanup_before_linux()) * actually, we don't need to do anything about cache if not use d-cache in @@ -539,4 +535,4 @@ fiq: get_bad_stack bad_save_user_regs bl do_fiq -#endif /* CONFIG_NAND_SPL */ +#endif /* CONFIG_SPL_BUILD */ diff --git a/arch/arm/lib/crt0.S b/arch/arm/lib/crt0.S index fa25319..a9657d1 100644 --- a/arch/arm/lib/crt0.S +++ b/arch/arm/lib/crt0.S @@ -64,7 +64,7 @@ *have some work left to do at this point regarding memory, so *call c_runtime_cpu_setup. * - * 6. Branch to either nand_boot() or board_init_r(). + * 6. Branch to board_init_r(). */ /* @@ -77,10 +77,7 @@ ENTRY(_main) * Set up initial C runtime environment and call board_init_f(0). */ -#if defined(CONFIG_NAND_SPL) - /* deprecated, use instead CONFIG_SPL_BUILD */ - ldr sp, =(CONFIG_SYS_INIT_SP_ADDR) -#elif defined(CONFIG_SPL_BUILD) defined(CONFIG_SPL_STACK) +#if defined(CONFIG_SPL_BUILD) defined(CONFIG_SPL_STACK) ldr sp, =(CONFIG_SPL_STACK) #else ldr sp, =(CONFIG_SYS_INIT_SP_ADDR) @@ -129,21 +126,12 @@ clbss_l:cmp r0, r1 /* while not at end of BSS */ bl coloured_LED_init bl red_led_on -#if defined(CONFIG_NAND_SPL) - - /* call _nand_boot() */ - ldr pc, =nand_boot - -#else - /* call board_init_r(gd_t *id, ulong dest_addr) */ mov r0, r8 /* gd_t */ ldr r1, [r8, #GD_RELOCADDR] /* dest_addr */ /* call board_init_r */ ldr pc, =board_init_r /* this is auto-relocated! */ -#endif - /* we should not return here. */ #endif -- 1.7.10.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v11 29/30] arm1176: Remove unused MMU setup from start.S
Following the removal of the smdk6400 board, the MMU setup code in arm1176/start.S becomes unused, so remove it. It will still be possible to restore it later from the Git history if necessary, in which case it should be moved out of the relocate_code() function. Signed-off-by: Benoît Thébaudeau benoit.thebaud...@advansee.com --- Changes in v11: None Changes in v10: None Changes in v9: - Do not use scrapyard in patch description because this is reserved to refer to the board scrapyard file. Changes in v8: - New patch. Changes in v7: None Changes in v6: None Changes in v5: None Changes in v4: None Changes in v3: None Changes in v2: None arch/arm/cpu/arm1176/start.S | 91 +- 1 file changed, 1 insertion(+), 90 deletions(-) diff --git a/arch/arm/cpu/arm1176/start.S b/arch/arm/cpu/arm1176/start.S index a7cf728..1fc1da0 100644 --- a/arch/arm/cpu/arm1176/start.S +++ b/arch/arm/cpu/arm1176/start.S @@ -33,11 +33,8 @@ #include asm-offsets.h #include config.h #include version.h -#ifdef CONFIG_ENABLE_MMU -#include asm/proc/domain.h -#endif -#if !defined(CONFIG_ENABLE_MMU) !defined(CONFIG_SYS_PHY_UBOOT_BASE) +#ifndef CONFIG_SYS_PHY_UBOOT_BASE #define CONFIG_SYS_PHY_UBOOT_BASE CONFIG_SYS_UBOOT_BASE #endif @@ -105,14 +102,6 @@ _TEXT_BASE: #endif /* - * Below variable is very important because we use MMU in U-Boot. - * Without it, we cannot run code correctly before MMU is ON. - * by scsuh. - */ -_TEXT_PHY_BASE: - .word CONFIG_SYS_PHY_UBOOT_BASE - -/* * These are defined in the board-specific linker script. * Subtracting _start from them lets the linker put their * relative position in the executable instead of leaving @@ -298,44 +287,6 @@ fixnext: blo fixloop #endif -#ifdef CONFIG_ENABLE_MMU -enable_mmu: - /* enable domain access */ - ldr r5, =0x - mcr p15, 0, r5, c3, c0, 0 /* load domain access register */ - - /* Set the TTB register */ - ldr r0, _mmu_table_base - ldr r1, =CONFIG_SYS_PHY_UBOOT_BASE - ldr r2, =0xfff0 - bic r0, r0, r2 - orr r1, r0, r1 - mcr p15, 0, r1, c2, c0, 0 - - /* Enable the MMU */ - mrc p15, 0, r0, c1, c0, 0 - orr r0, r0, #1 /* Set CR_M to enable MMU */ - - /* Prepare to enable the MMU */ - adr r1, skip_hw_init - and r1, r1, #0x3fc - ldr r2, _TEXT_BASE - ldr r3, =0xfff0 - and r2, r2, r3 - orr r2, r2, r1 - b mmu_enable - - .align 5 - /* Run in a single cache-line */ -mmu_enable: - - mcr p15, 0, r0, c1, c0, 0 - nop - nop - mov pc, r2 -skip_hw_init: -#endif - relocate_done: bx lr @@ -347,11 +298,6 @@ _rel_dyn_end_ofs: _dynsym_start_ofs: .word __dynsym_start - _start -#ifdef CONFIG_ENABLE_MMU -_mmu_table_base: - .word mmu_table -#endif - .globl c_runtime_cpu_setup c_runtime_cpu_setup: @@ -359,41 +305,6 @@ c_runtime_cpu_setup: #ifndef CONFIG_SPL_BUILD /* - * we assume that cache operation is done before. (eg. cleanup_before_linux()) - * actually, we don't need to do anything about cache if not use d-cache in - * U-Boot. So, in this function we clean only MMU. by scsuh - * - * voidtheLastJump(void *kernel, int arch_num, uint boot_params); - */ -#ifdef CONFIG_ENABLE_MMU - .globl theLastJump -theLastJump: - mov r9, r0 - ldr r3, =0xfff0 - ldr r4, _TEXT_PHY_BASE - adr r5, phy_last_jump - bic r5, r5, r3 - orr r5, r5, r4 - mov pc, r5 -phy_last_jump: - /* -* disable MMU stuff -*/ - mrc p15, 0, r0, c1, c0, 0 - bic r0, r0, #0x2300 /* clear bits 13, 9:8 (--V- --RS) */ - bic r0, r0, #0x0087 /* clear bits 7, 2:0 (B--- -CAM) */ - orr r0, r0, #0x0002 /* set bit 2 (A) Align */ - orr r0, r0, #0x1000 /* set bit 12 (I) I-Cache */ - mcr p15, 0, r0, c1, c0, 0 - - mcr p15, 0, r0, c8, c7, 0 /* flush v4 TLB */ - - mov r0, #0 - mov pc, r9 -#endif - - -/* * * * Interrupt handling -- 1.7.10.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
