Re: [U-Boot] [EXT] Re: [PATCH 1/4] ata: fsl_ahci: Add sata DM support for Freescale powerpc socs

2019-05-23 Thread Peng Ma
Hi Stefan,

>-Original Message-
>From: Stefan Roese 
>Sent: 2019年5月23日 13:09
>To: Prabhakar Kushwaha ; Peng Ma
>; Shengzhou Liu ; Ruchika
>Gupta 
>Cc: Yinbo Zhu ; s...@chromium.org; Jagdish Gediya
>; York Sun ;
>bmeng...@gmail.com; m...@marvell.com; Andy Tang ;
>u-boot@lists.denx.de
>Subject: [EXT] Re: [PATCH 1/4] ata: fsl_ahci: Add sata DM support for Freescale
>powerpc socs
>
>Caution: EXT Email
>
>On 23.05.19 06:58, Prabhakar Kushwaha wrote:
>
>
>
  drivers/ata/Kconfig|   10 +
  drivers/ata/Makefile   |1 +
  drivers/ata/fsl_ahci.c | 1030
>>> 
  drivers/ata/fsl_sata.h |1 +
  4 files changed, 1042 insertions(+)
  create mode 100644 drivers/ata/fsl_ahci.c
>>>
>>> Will this patch series replace the old fsl_sata.c driver? If yes,
>>> could you remove this driver as well in this series?
>> [Peng Ma]
>> Hi Stefan,
>>
>> fsl_sata.c used to Non DM sata driver for some powerpc socs.
>> Currently We only have one board that supports dts initialization.
>> I will remove this old driver When all of our powerpc socs support DM.
>
> I see, thanks. I just wanted to know, if this new SATA driver is a
> meant as a replacement for the old non-DM driver.
 [Peng Ma]
 Hi Stefan,

 I am so sorry to reply late, Other Non dts powerpc board need the
 old sata driver, so the new Sata driver does not replace the so far.
>>>
>>> Just curious: Which are the "other non dts powerpc boards"? Are there
>>> still many? Is there a plan to move them to DT as well? Or should
>>> they perhaps be dropped from mainline if not converted to DT? What's
>>> stopping the conversion here?
>>>
>>
>> There are too many powerpc platforms  which are not migrated to DT.
>>
>> My suggestion will be to have sata driver supporting both.  Once all
>> PowerPC platform using this SATA driver migrated, it can be dropped.
>
>I'm fine with this. Please go ahead.
>
Ok, thanks for your review.

Best Regards,
Peng
>Thanks,
>Stefan
___
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Re: [U-Boot] [EXT] Re: [PATCH 2/5] dm: spi: Convert Freescale ESPI driver to driver model

2019-05-23 Thread Chuanhua Han


> -Original Message-
> From: Prabhakar Kushwaha
> Sent: 2019年5月23日 0:53
> To: Chuanhua Han ; Jagan Teki
> 
> Cc: U-Boot-Denx ; Jiafei Pan ;
> Jagan Teki ; Yinbo Zhu ; Ruchika
> Gupta ; Xiaobo Xie ; Rajan
> Srivastava 
> Subject: RE: [U-Boot] [EXT] Re: [PATCH 2/5] dm: spi: Convert Freescale ESPI
> driver to driver model
> 
> Dear Chuanhua, Jagan,
> 
> > -Original Message-
> > From: U-Boot  On Behalf Of Chuanhua Han
> > Sent: Thursday, May 9, 2019 9:03 AM
> > To: Jagan Teki 
> > Cc: U-Boot-Denx ; Jiafei Pan
> > ; Jagan Teki ; Yinbo Zhu
> > ; Ruchika Gupta 
> > Subject: Re: [U-Boot] [EXT] Re: [PATCH 2/5] dm: spi: Convert Freescale
> > ESPI driver to driver model
> >
> >
> >
> > > -Original Message-
> > > From: Jagan Teki 
> > > Sent: 2019年5月6日 15:03
> > > To: Chuanhua Han 
> > > Cc: Jagan Teki ; Wolfgang Denk ;
> > > Shengzhou Liu ; Ruchika Gupta
> > > ; U-Boot-Denx ; Jiafei
> > > Pan ; Yinbo Zhu 
> > > Subject: Re: [EXT] Re: [U-Boot] [PATCH 2/5] dm: spi: Convert
> > > Freescale ESPI driver to driver model
> > >
> > > Caution: EXT Email
> > >
> > > On Mon, May 6, 2019 at 12:29 PM Chuanhua Han
> 
> > > wrote:
> > > >
> > > >
> > > >
> > > > > -Original Message-
> > > > > From: Jagan Teki 
> > > > > Sent: 2019年4月26日 2:07
> > > > > To: Chuanhua Han 
> > > > > Cc: Jagan Teki ; Wolfgang Denk ;
> > > > > Shengzhou Liu ; Ruchika Gupta
> > > > > ; U-Boot-Denx ;
> > > > > Jiafei Pan ; Yinbo Zhu 
> > > > > Subject: Re: [EXT] Re: [U-Boot] [PATCH 2/5] dm: spi: Convert
> > > > > Freescale ESPI driver to driver model
> > > > >
> > > > > Caution: EXT Email
> > > > >
> > > > > On Thu, Apr 25, 2019 at 8:27 AM Chuanhua Han
> > > 
> > > > > wrote:
> > > > > >
> > > > > > Hi,jagan
> > > > > > Thank you for your replay!
> > > > > >
> > > > > > > -Original Message-
> > > > > > > From: Jagan Teki 
> > > > > > > Sent: 2019年4月24日 14:57
> > > > > > > To: Chuanhua Han 
> > > > > > > Cc: Jagan Teki ; Wolfgang Denk
> > > > > > > ; Shengzhou Liu ; Ruchika
> > > > > > > Gupta ; U-Boot-Denx
> > > > > > > ; Jiafei Pan ;
> > > > > > > Yinbo Zhu 
> > > > > > > Subject: [EXT] Re: [U-Boot] [PATCH 2/5] dm: spi: Convert
> > > > > > > Freescale ESPI driver to driver model
> > > > > > >
> > > > > > > WARNING: This email was created outside of NXP. DO NOT CLICK
> > > > > > > links or attachments unless you recognize the sender and
> > > > > > > know the content is
> > > > > safe.
> > > > > > >
> > > > > > >
> > > > > > >
> > > > > > > On Tue, Apr 23, 2019 at 4:17 PM Chuanhua Han
> > > > > 
> > > > > > > wrote:
> > > > > > > >
> > > > > > > > Modify the Freescale ESPI driver to support the driver model.
> > > > > > > > Also resolved the following problems:
> > > > > > > >
> > > > > > > > = WARNING == This
> > > > > > > > board
> > > > > > > does
> > > > > > > > not use CONFIG_DM_SPI. Please update the board before
> > > > > > > > v2019.04 for no dm conversion and v2019.07 for partially
> > > > > > > > dm
> > converted drivers.
> > > > > > > > Failure to update can lead to driver/board removal See
> > > > > > > > doc/driver-model/MIGRATION.txt for more info.
> > > > > > > > 
> > > > > > > > = WARNING == This
> > > > > > > > board
> > > > > > > does
> > > > > > > > not use CONFIG_DM_SPI_FLASH. Please update the board to
> > > > > > > > use CONFIG_SPI_FLASH before the v2019.07 release.
> > > > > > > > Failure to update by the deadline may result in board removal.
> > > > > > > > See doc/driver-model/MIGRATION.txt for more info.
> > > > > > > > 
> > > > > > > >
> > > > > > > > Signed-off-by: Chuanhua Han 
> > > > > > > > ---
> > > > > > > > depends on:
> > > > > > > > -
> > > > > > > > https://eur01.safelinks.protection.outlook.com/?url=https%
> > > > > > > > 3A
> > > > > > > > %2
> > > > > > > > F%2F
> > > > > > > > patc
> > > > > > > >
> > > > > > >
> > > > >
> > >
> hwork.ozlabs.org%2Fproject%2Fuboot%2Flist%2F%3Fseries%3D99439&d
> > > > > > > ata
> > > > > > > >
> > > > > > >
> > > > >
> > >
> =02%7C01%7Cchuanhua.han%40nxp.com%7Cfa6bdd7859c4411b5d8608d6c8
> > > > > > > 8223e3%7
> > > > > > > >
> > > > > > >
> > > > >
> > >
> C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C1%7C63691685860819371
> > > > > > > 5&sda
> > > > > > > >
> > > > > > >
> > > > >
> > >
> ta=437CqPexTmJAzhl7wZ3lAUQVbmy%2B2NvHlurTcGTJKT0%3D&reserve
> > > > > > > d=0
> > > > > > > >
> > > > > > > >  drivers/spi/fsl_espi.c | 450
> > > > > > > > +
> > > > > > > >  1 file changed, 316 insertions(+), 134 deletions(-)
> > > > > > > >
> > > > > > > > diff --git a/drivers/spi/fsl_espi.c
> > > > > > > > b/drivers/spi/fsl_espi.c index 7444ae1a06..6ebe57c30b
> > > > > > > > 100644
> > > > > > > > --- a/drivers/spi/fsl_espi.c
> > > > > > > > +++ b/drivers/spi/fsl_espi.c
> > > > > > > > @@ -4,17 +4,27 @@
> > > > > > > >   *
> > > > >

Re: [U-Boot] [EXT] Re: [PATCH 2/5] dm: spi: Convert Freescale ESPI driver to driver model

2019-05-23 Thread Chuanhua Han


> -Original Message-
> From: Jagan Teki 
> Sent: 2019年5月23日 12:38
> To: Prabhakar Kushwaha 
> Cc: Chuanhua Han ; U-Boot-Denx
> ; Jiafei Pan ; Jagan Teki
> ; Yinbo Zhu ; Ruchika Gupta
> ; Xiaobo Xie ; Rajan
> Srivastava 
> Subject: Re: [U-Boot] [EXT] Re: [PATCH 2/5] dm: spi: Convert Freescale ESPI
> driver to driver model
> 
> Caution: EXT Email
> 
> On Wed, May 22, 2019 at 10:23 PM Prabhakar Kushwaha
>  wrote:
> >
> > Dear Chuanhua, Jagan,
> >
> > > -Original Message-
> > > From: U-Boot  On Behalf Of Chuanhua
> > > Han
> > > Sent: Thursday, May 9, 2019 9:03 AM
> > > To: Jagan Teki 
> > > Cc: U-Boot-Denx ; Jiafei Pan
> > > ; Jagan Teki ; Yinbo Zhu
> > > ; Ruchika Gupta 
> > > Subject: Re: [U-Boot] [EXT] Re: [PATCH 2/5] dm: spi: Convert
> > > Freescale ESPI driver to driver model
> > >
> > >
> > >
> > > > -Original Message-
> > > > From: Jagan Teki 
> > > > Sent: 2019年5月6日 15:03
> > > > To: Chuanhua Han 
> > > > Cc: Jagan Teki ; Wolfgang Denk ;
> > > > Shengzhou Liu ; Ruchika Gupta
> > > > ; U-Boot-Denx ;
> > > > Jiafei Pan ; Yinbo Zhu 
> > > > Subject: Re: [EXT] Re: [U-Boot] [PATCH 2/5] dm: spi: Convert
> > > > Freescale ESPI driver to driver model
> > > >
> > > > Caution: EXT Email
> > > >
> > > > On Mon, May 6, 2019 at 12:29 PM Chuanhua Han
> > > > 
> > > > wrote:
> > > > >
> > > > >
> > > > >
> > > > > > -Original Message-
> > > > > > From: Jagan Teki 
> > > > > > Sent: 2019年4月26日 2:07
> > > > > > To: Chuanhua Han 
> > > > > > Cc: Jagan Teki ; Wolfgang Denk
> > > > > > ; Shengzhou Liu ; Ruchika
> > > > > > Gupta ; U-Boot-Denx
> > > > > > ; Jiafei Pan ; Yinbo
> > > > > > Zhu 
> > > > > > Subject: Re: [EXT] Re: [U-Boot] [PATCH 2/5] dm: spi: Convert
> > > > > > Freescale ESPI driver to driver model
> > > > > >
> > > > > > Caution: EXT Email
> > > > > >
> > > > > > On Thu, Apr 25, 2019 at 8:27 AM Chuanhua Han
> > > > 
> > > > > > wrote:
> > > > > > >
> > > > > > > Hi,jagan
> > > > > > > Thank you for your replay!
> > > > > > >
> > > > > > > > -Original Message-
> > > > > > > > From: Jagan Teki 
> > > > > > > > Sent: 2019年4月24日 14:57
> > > > > > > > To: Chuanhua Han 
> > > > > > > > Cc: Jagan Teki ; Wolfgang Denk
> > > > > > > > ; Shengzhou Liu ;
> > > > > > > > Ruchika Gupta ; U-Boot-Denx
> > > > > > > > ; Jiafei Pan ;
> > > > > > > > Yinbo Zhu 
> > > > > > > > Subject: [EXT] Re: [U-Boot] [PATCH 2/5] dm: spi: Convert
> > > > > > > > Freescale ESPI driver to driver model
> > > > > > > >
> > > > > > > > WARNING: This email was created outside of NXP. DO NOT
> > > > > > > > CLICK links or attachments unless you recognize the sender
> > > > > > > > and know the content is
> > > > > > safe.
> > > > > > > >
> > > > > > > >
> > > > > > > >
> > > > > > > > On Tue, Apr 23, 2019 at 4:17 PM Chuanhua Han
> > > > > > 
> > > > > > > > wrote:
> > > > > > > > >
> > > > > > > > > Modify the Freescale ESPI driver to support the driver model.
> > > > > > > > > Also resolved the following problems:
> > > > > > > > >
> > > > > > > > > = WARNING ==
> > > > > > > > > This board
> > > > > > > > does
> > > > > > > > > not use CONFIG_DM_SPI. Please update the board before
> > > > > > > > > v2019.04 for no dm conversion and v2019.07 for partially
> > > > > > > > > dm
> > > converted drivers.
> > > > > > > > > Failure to update can lead to driver/board removal See
> > > > > > > > > doc/driver-model/MIGRATION.txt for more info.
> > > > > > > > > 
> > > > > > > > > = WARNING ==
> > > > > > > > > This board
> > > > > > > > does
> > > > > > > > > not use CONFIG_DM_SPI_FLASH. Please update the board to
> > > > > > > > > use CONFIG_SPI_FLASH before the v2019.07 release.
> > > > > > > > > Failure to update by the deadline may result in board removal.
> > > > > > > > > See doc/driver-model/MIGRATION.txt for more info.
> > > > > > > > > 
> > > > > > > > >
> > > > > > > > > Signed-off-by: Chuanhua Han 
> > > > > > > > > ---
> > > > > > > > > depends on:
> > > > > > > > > -
> > > > > > > > > https://eur01.safelinks.protection.outlook.com/?url=http
> > > > > > > > > s%3A
> > > > > > > > > %2
> > > > > > > > > F%2F
> > > > > > > > > patc
> > > > > > > > >
> > > > > > > >
> > > > > >
> > > >
> hwork.ozlabs.org%2Fproject%2Fuboot%2Flist%2F%3Fseries%3D99439&
> > > > d
> > > > > > > > ata
> > > > > > > > >
> > > > > > > >
> > > > > >
> > > >
> =02%7C01%7Cchuanhua.han%40nxp.com%7Cfa6bdd7859c4411b5d8608d6c8
> > > > > > > > 8223e3%7
> > > > > > > > >
> > > > > > > >
> > > > > >
> > > >
> C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C1%7C63691685860819371
> > > > > > > > 5&sda
> > > > > > > > >
> > > > > > > >
> > > > > >
> > > >
> ta=437CqPexTmJAzhl7wZ3lAUQVbmy%2B2NvHlurTcGTJKT0%3D&reserve
> > > > > > > > d=0
> > > > > > > > >
> > > > > > > > >  drivers/spi/fsl_espi.c | 450
> > > > > > > > > +

Re: [U-Boot] [EXT] Re: [PATCH 2/5] dm: spi: Convert Freescale ESPI driver to driver model

2019-05-23 Thread Chuanhua Han


> -Original Message-
> From: Jagan Teki 
> Sent: 2019年5月23日 12:36
> To: Chuanhua Han 
> Cc: Jagan Teki ; Wolfgang Denk ;
> Shengzhou Liu ; Ruchika Gupta
> ; U-Boot-Denx ; Jiafei Pan
> ; Yinbo Zhu 
> Subject: Re: [EXT] Re: [U-Boot] [PATCH 2/5] dm: spi: Convert Freescale ESPI
> driver to driver model
> 
> Caution: EXT Email
> 
> On Mon, May 6, 2019 at 1:38 PM Chuanhua Han 
> wrote:
> >
> >
> >
> > > -Original Message-
> > > From: Jagan Teki 
> > > Sent: 2019年5月6日 15:03
> > > To: Chuanhua Han 
> > > Cc: Jagan Teki ; Wolfgang Denk ;
> > > Shengzhou Liu ; Ruchika Gupta
> > > ; U-Boot-Denx ; Jiafei
> > > Pan ; Yinbo Zhu 
> > > Subject: Re: [EXT] Re: [U-Boot] [PATCH 2/5] dm: spi: Convert
> > > Freescale ESPI driver to driver model
> > >
> > > Caution: EXT Email
> > >
> > > On Mon, May 6, 2019 at 12:29 PM Chuanhua Han
> 
> > > wrote:
> > > >
> > > >
> > > >
> > > > > -Original Message-
> > > > > From: Jagan Teki 
> > > > > Sent: 2019年4月26日 2:07
> > > > > To: Chuanhua Han 
> > > > > Cc: Jagan Teki ; Wolfgang Denk ;
> > > > > Shengzhou Liu ; Ruchika Gupta
> > > > > ; U-Boot-Denx ;
> > > > > Jiafei Pan ; Yinbo Zhu 
> > > > > Subject: Re: [EXT] Re: [U-Boot] [PATCH 2/5] dm: spi: Convert
> > > > > Freescale ESPI driver to driver model
> > > > >
> > > > > Caution: EXT Email
> > > > >
> > > > > On Thu, Apr 25, 2019 at 8:27 AM Chuanhua Han
> > > 
> > > > > wrote:
> > > > > >
> > > > > > Hi,jagan
> > > > > > Thank you for your replay!
> > > > > >
> > > > > > > -Original Message-
> > > > > > > From: Jagan Teki 
> > > > > > > Sent: 2019年4月24日 14:57
> > > > > > > To: Chuanhua Han 
> > > > > > > Cc: Jagan Teki ; Wolfgang Denk
> > > > > > > ; Shengzhou Liu ; Ruchika
> > > > > > > Gupta ; U-Boot-Denx
> > > > > > > ; Jiafei Pan ;
> > > > > > > Yinbo Zhu 
> > > > > > > Subject: [EXT] Re: [U-Boot] [PATCH 2/5] dm: spi: Convert
> > > > > > > Freescale ESPI driver to driver model
> > > > > > >
> > > > > > > WARNING: This email was created outside of NXP. DO NOT CLICK
> > > > > > > links or attachments unless you recognize the sender and
> > > > > > > know the content is
> > > > > safe.
> > > > > > >
> > > > > > >
> > > > > > >
> > > > > > > On Tue, Apr 23, 2019 at 4:17 PM Chuanhua Han
> > > > > 
> > > > > > > wrote:
> > > > > > > >
> > > > > > > > Modify the Freescale ESPI driver to support the driver model.
> > > > > > > > Also resolved the following problems:
> > > > > > > >
> > > > > > > > = WARNING == This
> > > > > > > > board
> > > > > > > does
> > > > > > > > not use CONFIG_DM_SPI. Please update the board before
> > > > > > > > v2019.04 for no dm conversion and v2019.07 for partially dm
> converted drivers.
> > > > > > > > Failure to update can lead to driver/board removal See
> > > > > > > > doc/driver-model/MIGRATION.txt for more info.
> > > > > > > > 
> > > > > > > > = WARNING == This
> > > > > > > > board
> > > > > > > does
> > > > > > > > not use CONFIG_DM_SPI_FLASH. Please update the board to
> > > > > > > > use CONFIG_SPI_FLASH before the v2019.07 release.
> > > > > > > > Failure to update by the deadline may result in board removal.
> > > > > > > > See doc/driver-model/MIGRATION.txt for more info.
> > > > > > > > 
> > > > > > > >
> > > > > > > > Signed-off-by: Chuanhua Han 
> > > > > > > > ---
> > > > > > > > depends on:
> > > > > > > > -
> > > > > > > > https://eur01.safelinks.protection.outlook.com/?url=https%
> > > > > > > > 3A%2
> > > > > > > > F%2F
> > > > > > > > patc
> > > > > > > >
> > > > > > >
> > > > >
> > >
> hwork.ozlabs.org%2Fproject%2Fuboot%2Flist%2F%3Fseries%3D99439&d
> > > > > > > ata
> > > > > > > >
> > > > > > >
> > > > >
> > >
> =02%7C01%7Cchuanhua.han%40nxp.com%7Cfa6bdd7859c4411b5d8608d6c8
> > > > > > > 8223e3%7
> > > > > > > >
> > > > > > >
> > > > >
> > >
> C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C1%7C63691685860819371
> > > > > > > 5&sda
> > > > > > > >
> > > > > > >
> > > > >
> > >
> ta=437CqPexTmJAzhl7wZ3lAUQVbmy%2B2NvHlurTcGTJKT0%3D&reserve
> > > > > > > d=0
> > > > > > > >
> > > > > > > >  drivers/spi/fsl_espi.c | 450
> > > > > > > > +
> > > > > > > >  1 file changed, 316 insertions(+), 134 deletions(-)
> > > > > > > >
> > > > > > > > diff --git a/drivers/spi/fsl_espi.c
> > > > > > > > b/drivers/spi/fsl_espi.c index 7444ae1a06..6ebe57c30b
> > > > > > > > 100644
> > > > > > > > --- a/drivers/spi/fsl_espi.c
> > > > > > > > +++ b/drivers/spi/fsl_espi.c
> > > > > > > > @@ -4,17 +4,27 @@
> > > > > > > >   *
> > > > > > > >   * Copyright 2010-2011 Freescale Semiconductor, Inc.
> > > > > > > >   * Author: Mingkai Hu (mingkai...@freescale.com)
> > > > > > > > + *Chuanhua Han (chuanhua@nxp.com)
> > > > > > > >   */
> > > > > > > >
> > > > > > > >  #include 
> > > > > > > > -
> > > > > > > >  #include 
> > > > > > > >  #include 
> 

Re: [U-Boot] [EXT] Re: [PATCH 1/4] ata: fsl_ahci: Add sata DM support for Freescale powerpc socs

2019-05-23 Thread Prabhakar Kushwaha
Dear Peng,

> -Original Message-
> From: Peng Ma
> Sent: Thursday, May 23, 2019 12:37 PM
> To: Stefan Roese ; Prabhakar Kushwaha
> ; Shengzhou Liu ;
> Ruchika Gupta 
> Cc: Yinbo Zhu ; s...@chromium.org; Jagdish Gediya
> ; York Sun ;
> bmeng...@gmail.com; m...@marvell.com; Andy Tang ;
> u-boot@lists.denx.de
> Subject: RE: [EXT] Re: [PATCH 1/4] ata: fsl_ahci: Add sata DM support for
> Freescale powerpc socs
> 
> Hi Stefan,
> 
> >-Original Message-
> >From: Stefan Roese 
> >Sent: 2019年5月23日 13:09
> >To: Prabhakar Kushwaha ; Peng Ma
> >; Shengzhou Liu ; Ruchika
> Gupta
> >
> >Cc: Yinbo Zhu ; s...@chromium.org; Jagdish Gediya
> >; York Sun ;
> >bmeng...@gmail.com; m...@marvell.com; Andy Tang
> ;
> >u-boot@lists.denx.de
> >Subject: [EXT] Re: [PATCH 1/4] ata: fsl_ahci: Add sata DM support for
> >Freescale powerpc socs
> >
> >Caution: EXT Email
> >
> >On 23.05.19 06:58, Prabhakar Kushwaha wrote:
> >
> >
> >
>   drivers/ata/Kconfig|   10 +
>   drivers/ata/Makefile   |1 +
>   drivers/ata/fsl_ahci.c | 1030
> >>> 
>   drivers/ata/fsl_sata.h |1 +
>   4 files changed, 1042 insertions(+)
>   create mode 100644 drivers/ata/fsl_ahci.c
> >>>
> >>> Will this patch series replace the old fsl_sata.c driver? If
> >>> yes, could you remove this driver as well in this series?
> >> [Peng Ma]
> >> Hi Stefan,
> >>
> >> fsl_sata.c used to Non DM sata driver for some powerpc socs.
> >> Currently We only have one board that supports dts initialization.
> >> I will remove this old driver When all of our powerpc socs support DM.
> >
> > I see, thanks. I just wanted to know, if this new SATA driver is a
> > meant as a replacement for the old non-DM driver.
>  [Peng Ma]
>  Hi Stefan,
> 
>  I am so sorry to reply late, Other Non dts powerpc board need the
>  old sata driver, so the new Sata driver does not replace the so far.
> >>>
> >>> Just curious: Which are the "other non dts powerpc boards"? Are
> >>> there still many? Is there a plan to move them to DT as well? Or
> >>> should they perhaps be dropped from mainline if not converted to DT?
> >>> What's stopping the conversion here?
> >>>
> >>
> >> There are too many powerpc platforms  which are not migrated to DT.
> >>
> >> My suggestion will be to have sata driver supporting both.  Once all
> >> PowerPC platform using this SATA driver migrated, it can be dropped.
> >
> >I'm fine with this. Please go ahead.
> >
> Ok, thanks for your review.
> 

I am seeing build errors in drivers/ata/fsl_sata.c with this patch.  
Something may have changed from the time the patch has submitted and till I am 
trying to incorporate. 

Can you please fix and provide updated patch on top of the tree as early as 
possible 

--pk


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Re: [U-Boot] [v3, 0/5] Split fsl_esdhc driver for i.MX

2019-05-23 Thread linux-kernel-dev
Hi

On Tue, 2019-05-21 at 08:51 +, Y.b. Lu wrote:
> The fsl_esdhc driver was for Freescale eSDHC on MPC83XX/MPC85XX
> initially. The later QoriQ series PowerPC processors (which were
> evolutions of MPC83XX/MPC85XX), QorIQ series ARM processors, and
> i.MX series processors were using this driver for their eSDHCs too.
> 
> For the two series processors, the eSDHCs are becoming more and
> more different. We should have split it into two drivers, like them
> (sdhci-of-esdhc.c/sdhci-esdhc-imx.c) in linux kernel.
> 
> It's ideal to keep common part for reusing. However, it's hard to
> find out a little which could be reused. The truth is there will
> be more and more different registers, bits and operatiing processes.
> Even some code is common now, it may have to be split in the future.
> So let's just split is as two drivers.
> 
> Patch #2 just created a fsl_esdhc_imx driver which was a copy
> of fsl_esdhc driver for i.MX processors.
> Patch #3 converted i.MX platforms to use fsl_esdhc_imx.
> Patch #4 and #5 just dropped useless code for the two driver.
> There are still many cleaning up works needed to be done in the
> future,
> because the eSDHC driver is mess for a long time.
> Since I'm only owner for QorIQ eSDHC driver, I dropped only a little
> things which I'm sure for fsl_esdhc_imx. Let i.MX eSDHC owner do
> futhur
> cleaning up.

Tested-by: Steffen Dirkwinkel s.dirkwin...@beckhoff.com

I've tested this on the beckhoff/mx53cx9020 board. It still boots from
sd after the changes. When rebasing to master this board only needs the
defconfig change as we've recently removed the unused mmc code
in "mx53cx9020.c".

Regards,
Steffen Dirkwinkel

> 
> Yangbo Lu (5):
>   Move CONFIG_FSL_ESDHC to defconfig
>   mmc: split fsl_esdhc driver for i.MX
>   Convert to use fsl_esdhc_imx for i.MX platforms
>   mmc: fsl_esdhc: drop i.MX code
>   mmc: fsl_esdhc_imx: drop useless code
> 
>  arch/arm/cpu/arm1136/mx35/generic.c   |  10 +-
>  arch/arm/cpu/arm926ejs/mx25/generic.c |   8 +-
>  arch/arm/cpu/armv7/vf610/generic.c|  10 +-
>  arch/arm/cpu/armv8/s32v234/generic.c  |   2 +-
>  arch/arm/include/asm/global_data.h|   2 +-
>  arch/arm/mach-imx/cpu.c   |   6 +-
>  arch/arm/mach-imx/mx6/litesom.c   |   4 +-
>  arch/arm/mach-imx/mx7/clock.c |   4 +-
>  arch/arm/mach-imx/mx7ulp/clock.c  |   2 +-
>  arch/arm/mach-imx/speed.c |   4 +-
>  board/advantech/dms-ba16/dms-ba16.c   |   4 +-
>  board/aristainetos/aristainetos-v1.c  |   2 +-
>  board/aristainetos/aristainetos-v2.c  |   2 +-
>  board/aristainetos/aristainetos.c |   4 +-
>  board/bachmann/ot1200/ot1200.c|   2 +-
>  board/barco/platinum/platinum.c   |   2 +-
>  board/barco/titanium/titanium.c   |   4 +-
>  board/beckhoff/mx53cx9020/mx53cx9020.c|   4 +-
>  board/boundary/nitrogen6x/nitrogen6x.c|   4 +-
>  board/ccv/xpress/xpress.c |   2 +-
>  board/compulab/cl-som-imx7/cl-som-imx7.c  |   6 +-
>  board/compulab/cl-som-imx7/common.c   |   6 +-
>  board/compulab/cl-som-imx7/common.h   |   8 +-
>  board/compulab/cl-som-imx7/mux.c  |   8 +-
>  board/compulab/cl-som-imx7/spl.c  |   6 +-
>  board/compulab/cm_fx6/cm_fx6.c|   4 +-
>  board/compulab/cm_fx6/common.c|   4 +-
>  board/compulab/cm_fx6/spl.c   |   2 +-
>  board/congatec/cgtqmx6eval/cgtqmx6eval.c  |   4 +-
>  board/dhelectronics/dh_imx6/dh_imx6.c |   4 +-
>  board/dhelectronics/dh_imx6/dh_imx6_spl.c |   2 +-
>  board/el/el6x/el6x.c  |   4 +-
>  board/embest/mx6boards/mx6boards.c|   4 +-
>  board/freescale/imx8mq_evk/imx8mq_evk.c   |   2 +-
>  board/freescale/imx8mq_evk/spl.c  |   2 +-
>  board/freescale/imx8qxp_mek/imx8qxp_mek.c |   2 +-
>  board/freescale/mx25pdk/mx25pdk.c |   6 +-
>  board/freescale/mx35pdk/mx35pdk.c |   4 +-
>  board/freescale/mx51evk/mx51evk.c |   6 +-
>  board/freescale/mx53ard/mx53ard.c |   4 +-
>  board/freescale/mx53evk/mx53evk.c |   4 +-
>  board/freescale/mx53loco/mx53loco.c   |   4 +-
>  board/freescale/mx53smd/mx53smd.c |   4 +-
>  board/freescale/mx6qarm2/mx6qarm2.c   |   4 +-
>  board/freescale/mx6sabreauto/mx6sabreauto.c   |   4 +-
>  board/freescale/mx6sabresd/mx6sabresd.c   |   4 +-
>  board/freescale/mx6slevk/mx6slevk.c   |   2 +-
>  .../freescale/mx6sxsabreauto/mx6sxsabreauto.c |   2 +-
>  board/freescale/mx6sxsabresd/mx6sxsabresd.c   |   2 +-
>  .../mx6ul_14x14_evk/mx6ul_14x14_evk.c |   4 +-
>  board/freescale/mx6ullevk/mx6ullevk.c |   2 +-
>  board/freescale/mx7dsabresd/mx7dsabresd.c |   2 +-
>  board/freescale/s32v234evb/s32v234evb.c   |   4 +-
>  board/freescale

Re: [U-Boot] [PATCH v2 1/3] board_f: Add mach specific DMA address check function.

2019-05-23 Thread Christoph Müllner


On 23.05.19 00:57, Simon Glass wrote:
> Hi Heiko,
> 
> On Wed, 22 May 2019 at 05:29, Heiko Stuebner  wrote:
>>
>> Hi Simon,
>>
>> Am Samstag, 18. Mai 2019, 18:08:58 CEST schrieb Simon Glass:
>>> On Tue, 7 May 2019 at 09:59, Christoph Muellner
>>>  wrote:

 From: Christoph Müllner 

 Some machines have limited DMA engines, which cannot deal
 with arbitrary addresses. This patch introduces a function
 to model these restrictions on a machine level.

 Signed-off-by: Christoph Müllner 
 Signed-off-by: Christoph Muellner 
 
 ---

 Changes in v2: None

  common/board_f.c | 5 +
  include/init.h   | 2 ++
  2 files changed, 7 insertions(+)

>>>
>>> Can we handle this with driver model somehow? How does the kernel
>>> handle it?
>>
>> The problem Christoph is trying to solve here is doing a mmc transfer
>> from mmc to the sram (not main memory), which cannot use dma.
>> So this exact problem doesn't happen in the kernel itself.
>>
>> But back in veyron times we had a similar dma issue with anything accessing
>> that area as dma hung the system, but the solution was just reserving the
>> memblock:
>> https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=b21bcfc9fda56bac573367d18ce3e4dbf3cdedf9
>>
>> As the commit describes, other options would've been soc-settings
>> also going around the kernel's driver model or limiting the dma-able
>> memory even more (to 2GB), so we opted to just reserve the upper 16MB
>> completely.
> 
> OK I see.
> 
>>
>>
>>> Is there a device-tree binding for the DMA node that could
>>> provide this information.
>>
>> I don't think so. At least in the kernel affecting the dma-mask is a
>> setting for the using component (mmc, gmac, whatever), so would
>> mean adapting every device doing dma ... and even then there wasn't
>> a dt-binding for something like that, which in turn would've required
>> to adapt every driver to set a specific per-soc dma-mask for Rockchip
>> compatibles - hence the "simple" reserve above was the least intrusive
>> option.
> 
> That's odd. Are you saying that some devices can DMA from SRAM and some 
> cannot?

Yes, that is also confirmed by Kever (see commit message of [1]).
My patch series assumes, that only the CPU can see the non-DDR memory areas
(including SRAM). I would really like to get feedback here from Kever.

Kever has posted a first patch to address this end of March [2].
After waiting a few weeks, I've prepared a reworked version
(because I needed it for mainline ATF testing on our RK3399-Q7).
A few hours after I sent them to the list Kever also pushed
another patch for this [1].

From my perspective mainline ATF cannot be used with mainline U-Boot
on RK3399 when booting from SD card or eMMC at the moment.

[1] https://patchwork.ozlabs.org/patch/1096366/
[2] https://patchwork.ozlabs.org/patch/1069730/

> 
> If the DMA is not allowed, could the DMA driver return -EPERM or
> similar when the attempt is made, and then the bounce buffer can be
> used if needed?
> 
>>
>>
>>> Also, where is this function called from?
>>
>> In the theobroma u-boot it gets called from the bouncebuffer right now
>> 
>> https://git.theobroma-systems.com/puma-u-boot.git/commit/?id=d68222d45b4e7f55f500f5e28722cb4304ecde96
>> to check if the mmc drivers can dma directly or needs to use the
>> bouncebuffer for reaching something like the sram.
> 
> OK ta.
> 
>>
>>
>> Heiko
>>
>>
> 
> Regards,
> Simon
> 
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[U-Boot] [PATCH 2/2] board: lx2160a: use default scan_dev_for_boot

2019-05-23 Thread Mian Yousaf Kaukab
Default environment variable is more complete. Also scans for efi
binaries for example.

Signed-off-by: Mian Yousaf Kaukab 
---
 include/configs/lx2160a_common.h | 6 --
 1 file changed, 6 deletions(-)

diff --git a/include/configs/lx2160a_common.h b/include/configs/lx2160a_common.h
index eb0b1766aa..711b434baf 100644
--- a/include/configs/lx2160a_common.h
+++ b/include/configs/lx2160a_common.h
@@ -246,12 +246,6 @@ unsigned long get_board_ddr_clk(void);
"run scan_dev_for_boot; "   \
"fi; "  \
"done\0"\
-   "scan_dev_for_boot="\
-   "echo Scanning ${devtype} " \
-   "${devnum}:${distro_bootpart}...; " \
-   "for prefix in ${boot_prefixes}; do "   \
-   "run scan_dev_for_scripts; "\
-   "done;\0"   \
"boot_a_script="\
"load ${devtype} ${devnum}:${distro_bootpart} " \
"${scriptaddr} ${prefix}${script}; "\
-- 
2.11.0

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[U-Boot] [PATCH 1/2] board: lx2160a: fix fsl-mc status in fdt with bootefi

2019-05-23 Thread Mian Yousaf Kaukab
fsl-mc lazyapply command applies dpl from efi_exit_boot_services().
Status of fsl-mc node in working fdt is updated at this stage.
However, an efi application like grub may already have copied the fdt.
So the updates to fdt done at efi_exit_boot_services() may not be
visible to the OS. Fix it by updating fdt earlier if fsl-mc lazyapply
command is used.

Signed-off-by: Mian Yousaf Kaukab 
---
 board/freescale/lx2160a/lx2160a.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/board/freescale/lx2160a/lx2160a.c 
b/board/freescale/lx2160a/lx2160a.c
index 6109b280c6..3b4cb86692 100644
--- a/board/freescale/lx2160a/lx2160a.c
+++ b/board/freescale/lx2160a/lx2160a.c
@@ -509,7 +509,8 @@ void fdt_fixup_board_enet(void *fdt)
return;
}
 
-   if ((get_mc_boot_status() == 0) && (get_dpl_apply_status() == 0)) {
+   if (get_mc_boot_status() == 0 &&
+   (is_lazy_dpl_addr_valid() || get_dpl_apply_status() == 0)) {
fdt_status_okay(fdt, offset);
fdt_fixup_board_phy(fdt);
} else {
-- 
2.11.0

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Re: [U-Boot] [PATCH] mmc: Move tegra loopback disable option to be under tegra

2019-05-23 Thread Marcel Ziswiler
On Mon, 2019-04-01 at 23:05 +, Trent Piepho wrote:
> This is a configuration option specific to the tegra controller.
> 
> Doing it this way makes it show up directly under the tegra
> controller
> option, indented one level, as "Disable external clock loopback".
> 
> The way it is now, it shows up at the end of the controller list, not
> indented, as if it's some kind of generic MMC configuration option.
> 
> Cc: Marcel Ziswiler 
> Cc: Simon Glass 
> Cc: Jaehoon Chung 
> Cc: Tom Warren 
> Signed-off-by: Trent Piepho 

Acked-by: Marcel Ziswiler 

> ---
>  drivers/mmc/Kconfig | 22 +++---
>  1 file changed, 11 insertions(+), 11 deletions(-)
> 
> diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig
> index 08c2dd2541..759a1cceb4 100644
> --- a/drivers/mmc/Kconfig
> +++ b/drivers/mmc/Kconfig
> @@ -542,6 +542,17 @@ config MMC_SDHCI_TEGRA
>  
> If unsure, say N.
>  
> +config TEGRA124_MMC_DISABLE_EXT_LOOPBACK
> + bool "Disable external clock loopback"
> + depends on MMC_SDHCI_TEGRA && TEGRA124
> + help
> +   Disable the external clock loopback and use the internal one
> on SDMMC3
> +   as per the SDMMC_VENDOR_MISC_CNTRL_0 register's SDMMC_SPARE1
> bits
> +   being set to 0xfffd according to the TRM.
> +
> +   TODO(marcel.ziswi...@toradex.com): Move to device tree
> controlled
> +   approach once proper kernel integration made it mainline.
> +
>  config MMC_SDHCI_ZYNQ
>   bool "Arasan SDHCI controller support"
>   depends on ARCH_ZYNQ || ARCH_ZYNQMP || ARCH_VERSAL
> @@ -627,17 +638,6 @@ config FSL_ESDHC
>  
>  endif
>  
> -config TEGRA124_MMC_DISABLE_EXT_LOOPBACK
> - bool "Disable external clock loopback"
> - depends on MMC_SDHCI_TEGRA && TEGRA124
> - help
> -   Disable the external clock loopback and use the internal one
> on SDMMC3
> -   as per the SDMMC_VENDOR_MISC_CNTRL_0 register's SDMMC_SPARE1
> bits
> -   being set to 0xfffd according to the TRM.
> -
> -   TODO(marcel.ziswi...@toradex.com): Move to device tree
> controlled
> -   approach once proper kernel integration made it mainline.
> -
>  endmenu
>  
>  config SYS_FSL_ERRATUM_ESDHC111
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Re: [U-Boot] [v3, 0/5] Split fsl_esdhc driver for i.MX

2019-05-23 Thread Lukasz Majewski
Hi 

> Hi
> 
> On Tue, 2019-05-21 at 08:51 +, Y.b. Lu wrote:
> > The fsl_esdhc driver was for Freescale eSDHC on MPC83XX/MPC85XX
> > initially. The later QoriQ series PowerPC processors (which were
> > evolutions of MPC83XX/MPC85XX), QorIQ series ARM processors, and
> > i.MX series processors were using this driver for their eSDHCs too.
> > 
> > For the two series processors, the eSDHCs are becoming more and
> > more different. We should have split it into two drivers, like them
> > (sdhci-of-esdhc.c/sdhci-esdhc-imx.c) in linux kernel.
> > 
> > It's ideal to keep common part for reusing. However, it's hard to
> > find out a little which could be reused. The truth is there will
> > be more and more different registers, bits and operatiing processes.
> > Even some code is common now, it may have to be split in the future.
> > So let's just split is as two drivers.
> > 
> > Patch #2 just created a fsl_esdhc_imx driver which was a copy
> > of fsl_esdhc driver for i.MX processors.
> > Patch #3 converted i.MX platforms to use fsl_esdhc_imx.
> > Patch #4 and #5 just dropped useless code for the two driver.
> > There are still many cleaning up works needed to be done in the
> > future,
> > because the eSDHC driver is mess for a long time.
> > Since I'm only owner for QorIQ eSDHC driver, I dropped only a little
> > things which I'm sure for fsl_esdhc_imx. Let i.MX eSDHC owner do
> > futhur
> > cleaning up.  
> 
> Tested-by: Steffen Dirkwinkel s.dirkwin...@beckhoff.com
> 
> I've tested this on the beckhoff/mx53cx9020 board. It still boots from
> sd after the changes. When rebasing to master this board only needs
> the defconfig change as we've recently removed the unused mmc code
> in "mx53cx9020.c".
> 

Thanks for testing. I will strive to provide review soon.

> Regards,
> Steffen Dirkwinkel
> 
> > 
> > Yangbo Lu (5):
> >   Move CONFIG_FSL_ESDHC to defconfig
> >   mmc: split fsl_esdhc driver for i.MX
> >   Convert to use fsl_esdhc_imx for i.MX platforms
> >   mmc: fsl_esdhc: drop i.MX code
> >   mmc: fsl_esdhc_imx: drop useless code
> > 
> >  arch/arm/cpu/arm1136/mx35/generic.c   |  10 +-
> >  arch/arm/cpu/arm926ejs/mx25/generic.c |   8 +-
> >  arch/arm/cpu/armv7/vf610/generic.c|  10 +-
> >  arch/arm/cpu/armv8/s32v234/generic.c  |   2 +-
> >  arch/arm/include/asm/global_data.h|   2 +-
> >  arch/arm/mach-imx/cpu.c   |   6 +-
> >  arch/arm/mach-imx/mx6/litesom.c   |   4 +-
> >  arch/arm/mach-imx/mx7/clock.c |   4 +-
> >  arch/arm/mach-imx/mx7ulp/clock.c  |   2 +-
> >  arch/arm/mach-imx/speed.c |   4 +-
> >  board/advantech/dms-ba16/dms-ba16.c   |   4 +-
> >  board/aristainetos/aristainetos-v1.c  |   2 +-
> >  board/aristainetos/aristainetos-v2.c  |   2 +-
> >  board/aristainetos/aristainetos.c |   4 +-
> >  board/bachmann/ot1200/ot1200.c|   2 +-
> >  board/barco/platinum/platinum.c   |   2 +-
> >  board/barco/titanium/titanium.c   |   4 +-
> >  board/beckhoff/mx53cx9020/mx53cx9020.c|   4 +-
> >  board/boundary/nitrogen6x/nitrogen6x.c|   4 +-
> >  board/ccv/xpress/xpress.c |   2 +-
> >  board/compulab/cl-som-imx7/cl-som-imx7.c  |   6 +-
> >  board/compulab/cl-som-imx7/common.c   |   6 +-
> >  board/compulab/cl-som-imx7/common.h   |   8 +-
> >  board/compulab/cl-som-imx7/mux.c  |   8 +-
> >  board/compulab/cl-som-imx7/spl.c  |   6 +-
> >  board/compulab/cm_fx6/cm_fx6.c|   4 +-
> >  board/compulab/cm_fx6/common.c|   4 +-
> >  board/compulab/cm_fx6/spl.c   |   2 +-
> >  board/congatec/cgtqmx6eval/cgtqmx6eval.c  |   4 +-
> >  board/dhelectronics/dh_imx6/dh_imx6.c |   4 +-
> >  board/dhelectronics/dh_imx6/dh_imx6_spl.c |   2 +-
> >  board/el/el6x/el6x.c  |   4 +-
> >  board/embest/mx6boards/mx6boards.c|   4 +-
> >  board/freescale/imx8mq_evk/imx8mq_evk.c   |   2 +-
> >  board/freescale/imx8mq_evk/spl.c  |   2 +-
> >  board/freescale/imx8qxp_mek/imx8qxp_mek.c |   2 +-
> >  board/freescale/mx25pdk/mx25pdk.c |   6 +-
> >  board/freescale/mx35pdk/mx35pdk.c |   4 +-
> >  board/freescale/mx51evk/mx51evk.c |   6 +-
> >  board/freescale/mx53ard/mx53ard.c |   4 +-
> >  board/freescale/mx53evk/mx53evk.c |   4 +-
> >  board/freescale/mx53loco/mx53loco.c   |   4 +-
> >  board/freescale/mx53smd/mx53smd.c |   4 +-
> >  board/freescale/mx6qarm2/mx6qarm2.c   |   4 +-
> >  board/freescale/mx6sabreauto/mx6sabreauto.c   |   4 +-
> >  board/freescale/mx6sabresd/mx6sabresd.c   |   4 +-
> >  board/freescale/mx6slevk/mx6slevk.c   |   2 +-
> >  .../freescale/mx6sxsabreauto/mx6sxsabreauto.c |   2 +-
> >  board/freescale/mx6sxsabresd/mx6sxsabresd.c 

Re: [U-Boot] [EXT] Re: [PATCH 2/2] fsl_qspi: Improve QSPI driver to incorporate 4 byte commands

2019-05-23 Thread Ashish Kumar


> -Original Message-
> From: Schrempf Frieder 
> Sent: Thursday, May 2, 2019 12:38 PM
> To: Ashish Kumar ; Vignesh Raghavendra
> ; Rajat Srivastava ; u-
> b...@lists.denx.de; ja...@openedev.com
> Subject: Re: [EXT] Re: [U-Boot] [PATCH 2/2] fsl_qspi: Improve QSPI driver to
> incorporate 4 byte commands
> 
> Caution: EXT Email
> 
> Hi Ashish,
> 
> On 01.05.19 07:32, Ashish Kumar wrote:
> >
> >
> >> -Original Message-
> >> From: U-Boot  On Behalf Of Schrempf
> >> Frieder
> >> Sent: Tuesday, April 30, 2019 1:14 PM
> >> To: Vignesh Raghavendra ; Rajat Srivastava
> >> ; u-boot@lists.denx.de;
> ja...@openedev.com
> >> Subject: [EXT] Re: [U-Boot] [PATCH 2/2] fsl_qspi: Improve QSPI driver
> >> to incorporate 4 byte commands
> >>
> >> Caution: EXT Email
> >>
> >> Hi,
> >>
> >> On 26.04.19 06:58, Vignesh Raghavendra wrote:
> >>>
> >>>
> >>> On 25/04/19 5:20 PM, Rajat Srivastava wrote:
> 
> 
> > -Original Message-
> > From: Vignesh Raghavendra 
> > Sent: Wednesday, April 24, 2019 10:17 PM
> > To: Rajat Srivastava ;
> > u-boot@lists.denx.de; ja...@openedev.com
> > Cc: Ashish Kumar 
> > Subject: [EXT] Re: [PATCH 2/2] fsl_qspi: Improve QSPI driver to
> > incorporate 4 byte commands
> >
> > Caution: EXT Email
> >
> > On 24-Apr-19 6:10 PM, Rajat Srivastava wrote:
> >> Signed-off-by: Ashish Kumar 
> >> Signed-off-by: Rajat Srivastava 
> >
> > Commit message is missing.
> 
>  I'll add proper commit message in the next patch version.
> 
> > But from $patch subject, I infer that $patch is adding new feature
> > and not actually fixing something broken?
> 
>  Earlier the framework was designed to work for only 3-byte opcodes
>  but our controller supports flashes of size greater than 16 MB. As
>  a workaround, FSL QSPI driver used to explicitly send 4-byte
>  opcodes for 3-byte opcodes sent by framework to the flash. Also
>  there used to exist a temporary patch for framework which never got
>  accepted In
> >> upstream.
>  Now the new framework supports 4-byte opcodes and FSL QSPI driver
>  needs correction. I am not introducing any new feature. I am just
>  fixing the driver to suit the current framework.
> 
> >>>
> >>> With SPL_FLASH_BAR set fsl_qspi driver should never see 4 byte
> >>> opcodes and should work like it did before. I guess you are disabling
> SPI_FLASH_BAR?
> >>>
> >>> Please add all details to the commit message and I recommend you to
> >>> move the driver over to spi-mem as soon as possible. Else you would
> >>> have to keep handling new opcodes in your driver as and when
> >>> spi-nor-core
> >> changes.
> >>>
> >>> Regards
> >>> Vignesh
> >>>
>  Please let me know your feedback.
> 
>  Regards
>  Rajat
> 
> > If so, you should move the driver over to use spi-mem APIs instead
> > of adding more features and hard coding more flash specific
> > commands in
> >> the driver.
> > This makes driver duplicate more of spi-nor core code. I
> > discourage adding new features w/o moving driver over to spi-mem.
> > IMHO, converting the driver would not be a huge effort. And I
> > believe its already
> >> done in kernel.
> >>
> >> I started moving the driver to spi-mem, by porting the kernel driver
> >> over to U- Boot. I still have some Kconfig dependency problem for the
> >> LS2081 platform (CONFIG_SPI_MEM is not enabled implicitly), that
> >> needs to be solved, otherwise it should be more or less ready.
> > Hi Frieder,
> >
> > What is the change, it seems it is moving the driver from Linux as it is to
> uboot ?
> 
> Yes, it's moving the current Linux driver to U-Boot with some small
> compatibility changes and simplifications.
> 
> > I am not sure how stable is the current Linux driver, since it is not yet 
> > tested
> by FSL/NXP system test team. Last time I tested the current Linux
> driver(QSPI) it was functional in only 1-1-1 mode. Moving to u-boot may not
> be good idea at this point of time.
> 
> The current mainline Linux driver is a SPI controller driver using the SPI MEM
> API and it replaced the old SPI NOR driver in Linux 5.1. If nothing went wrong
> in the upstreaming process, the driver should be just as good as the old one,
> while bringing all the advantages of the new SPI MEM interface. The driver
> does support 1-1-1 mode, just like all other modes supported by the QSPI
> controller.
> 
> While upstreaming to the kernel, the driver was tested by Han Xu and Yogesh
> Gaur.
Hi Frieder,

I had a discussion Han Xu, He was also able to find some defects with current 
linux QSPI driver on i.mx7 platform.

I had also tried testing this with QUAD/DUAL on LS1088 and It was not 
functional.
"s25fl512s",  INFO(0x010220, 0x4d00, 256 * 1024, 256,  SPI_NOR_DUAL_READ 
|SPI_NOR_QUAD_READ | USE_CLSR| SPI_NOR_4B_OPCODES),

I will be debugging further and update with findings in sometime.

Regards 
Ashish 
> 
> > 

[U-Boot] [PATCH PATCH v3 01/12] spl: fit: Add support for applying DT overlay

2019-05-23 Thread Jean-Jacques Hiblot
From: Michal Simek 

doc/uImage.FIT/overlay-fdt-boot.txt is describing how to create FIT
image with DT overlays in it.
Add support for this feature to SPL.

Here is the ZynqMP fragment where dtb points to full DT and dtbo is
overlay which should be applied on the top of dtb.
config {
description = "ATF with full u-boot overlay";
firmware = "atf";
loadables = "uboot";
fdt = "dtb", "dtbo";
};

The whole feature depends on OF_LIBFDT_OVERLAY which is adding +4kB code
and 0 for platforms which are not enabling this feature.

Signed-off-by: Michal Simek 
Signed-off-by: Jean-Jacques Hiblot 

---

Changes in v3:
- Add a new config option: SPL_LOAD_FIT_APPLY_OVERLAY. By default, it is
not selected.

Changes in v2: None

 Kconfig  | 10 ++
 common/spl/spl_fit.c | 27 +--
 2 files changed, 35 insertions(+), 2 deletions(-)

diff --git a/Kconfig b/Kconfig
index 5f5c5ccfd6..8197c9066a 100644
--- a/Kconfig
+++ b/Kconfig
@@ -398,6 +398,16 @@ config SPL_LOAD_FIT
  particular it can handle selecting from multiple device tree
  and passing the correct one to U-Boot.
 
+config SPL_LOAD_FIT_APPLY_OVERLAY
+   bool "Enable SPL applying DT overlays from FIT"
+   depends on SPL_LOAD_FIT
+   select OF_LIBFDT_OVERLAY
+   default n
+   help
+ The device tree is loaded from the FIT image. Allow the SPL is to
+ also load device-tree overlays from the FIT image an apply them
+ over the device tree.
+
 config SPL_LOAD_FIT_FULL
bool "Enable SPL loading U-Boot as a FIT"
select SPL_FIT
diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
index 87ecf0bb9e..3fbcb969f8 100644
--- a/common/spl/spl_fit.c
+++ b/common/spl/spl_fit.c
@@ -278,10 +278,10 @@ static int spl_fit_append_fdt(struct spl_image_info 
*spl_image,
  void *fit, int images, ulong base_offset)
 {
struct spl_image_info image_info;
-   int node, ret;
+   int node, ret, index = 0;
 
/* Figure out which device tree the board wants to use */
-   node = spl_fit_get_image_node(fit, images, FIT_FDT_PROP, 0);
+   node = spl_fit_get_image_node(fit, images, FIT_FDT_PROP, index++);
if (node < 0) {
debug("%s: cannot find FDT node\n", __func__);
return node;
@@ -303,8 +303,31 @@ static int spl_fit_append_fdt(struct spl_image_info 
*spl_image,
 #if !CONFIG_IS_ENABLED(FIT_IMAGE_TINY)
/* Try to make space, so we can inject details on the loadables */
ret = fdt_shrink_to_minimum(spl_image->fdt_addr, 8192);
+   if (ret < 0)
+   return ret;
 #endif
+#if defined(CONFIG_SPL_LOAD_FIT_APPLY_OVERLAY)
+   for (; ; index++) {
+   node = spl_fit_get_image_node(fit, images, FIT_FDT_PROP, index);
+   if (node < 0) {
+   debug("%s: No additional FDT node\n", __func__);
+   return 0;
+   }
 
+   ret = spl_load_fit_image(info, sector, fit, base_offset, node,
+&image_info);
+   if (ret < 0)
+   return ret;
+
+   ret = fdt_overlay_apply_verbose(spl_image->fdt_addr,
+   (void *)image_info.load_addr);
+   if (ret)
+   return ret;
+
+   debug("%s: DT overlay %s applied\n", __func__,
+ fit_get_name(fit, node, NULL));
+   }
+#endif
return ret;
 }
 
-- 
2.17.1

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[U-Boot] [PATCH PATCH v3 04/12] spl: fit: Do not fail immediately if an overlay is not available

2019-05-23 Thread Jean-Jacques Hiblot
If one overlay that must be applied cannot be found in the FIT, the current
implementation stops applying the overlays. Let's make it skip only the
failing overlay instead.

Signed-off-by: Jean-Jacques Hiblot 
---

Changes in v3: None
Changes in v2: None

 common/spl/spl_fit.c | 6 +-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
index b521ee68e6..d5e3858ed0 100644
--- a/common/spl/spl_fit.c
+++ b/common/spl/spl_fit.c
@@ -315,9 +315,13 @@ static int spl_fit_append_fdt(struct spl_image_info 
*spl_image,
 
for (; ; index++) {
node = spl_fit_get_image_node(fit, images, FIT_FDT_PROP, index);
-   if (node < 0) {
+   if (node == -E2BIG) {
debug("%s: No additional FDT node\n", __func__);
return 0;
+   } else if (node < 0) {
+   debug("%s: unable to find FDT node %d\n", __func__,
+ index);
+   continue;
}
 
image_info.load_addr = (ulong)tmpbuffer;
-- 
2.17.1

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[U-Boot] [PATCH PATCH v3 03/12] spl: fit: allocate a temporary buffer to load the overlays

2019-05-23 Thread Jean-Jacques Hiblot
If the node describing an overlay does not specify a load address, it will
be loaded at the address previously used.
Fixing it by allocating a temporary 64kB region that will be used as a
default load address.

Signed-off-by: Jean-Jacques Hiblot 
---

Changes in v3: None
Changes in v2: None

 common/spl/spl_fit.c | 14 ++
 1 file changed, 14 insertions(+)

diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
index c1c982f002..b521ee68e6 100644
--- a/common/spl/spl_fit.c
+++ b/common/spl/spl_fit.c
@@ -9,6 +9,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 
 #ifndef CONFIG_SYS_BOOTM_LEN
@@ -302,6 +303,16 @@ static int spl_fit_append_fdt(struct spl_image_info 
*spl_image,
spl_image->fdt_addr = (void *)image_info.load_addr;
 #if !CONFIG_IS_ENABLED(FIT_IMAGE_TINY)
 #if defined(CONFIG_SPL_LOAD_FIT_APPLY_OVERLAY)
+   void *tmpbuffer;
+   /*
+* allocate 64kB of memory. This will be used to store the DT overlay
+* before it is applied. It may not be used depending on how the
+* overlay is stored.
+*/
+   tmpbuffer = malloc(64 * 1024);
+   if (!tmpbuffer)
+   debug("%s: unable to allocate space for overlays\n", __func__);
+
for (; ; index++) {
node = spl_fit_get_image_node(fit, images, FIT_FDT_PROP, index);
if (node < 0) {
@@ -309,6 +320,7 @@ static int spl_fit_append_fdt(struct spl_image_info 
*spl_image,
return 0;
}
 
+   image_info.load_addr = (ulong)tmpbuffer;
ret = spl_load_fit_image(info, sector, fit, base_offset, node,
 &image_info);
if (ret < 0)
@@ -327,6 +339,8 @@ static int spl_fit_append_fdt(struct spl_image_info 
*spl_image,
debug("%s: DT overlay %s applied\n", __func__,
  fit_get_name(fit, node, NULL));
}
+   if (tmpbuffer)
+   free(tmpbuffer);
 #endif
/* Try to make space, so we can inject details on the loadables */
ret = fdt_shrink_to_minimum(spl_image->fdt_addr, 8192);
-- 
2.17.1

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[U-Boot] [PATCH PATCH v3 02/12] spl: fit: Make room in the FDT before applying overlays

2019-05-23 Thread Jean-Jacques Hiblot
Make room in the FDT before applying the overlay, otherwise it may fail if
the overlay is big. As the exact added size is not known in advance, just
add the size of the overlay.
Move after the end of the application of the overlays, the resize  of the
FDT for the injection of the details on the loadables.

Signed-off-by: Jean-Jacques Hiblot 
---

Changes in v3: None
Changes in v2: None

 common/spl/spl_fit.c | 16 +++-
 1 file changed, 11 insertions(+), 5 deletions(-)

diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
index 3fbcb969f8..c1c982f002 100644
--- a/common/spl/spl_fit.c
+++ b/common/spl/spl_fit.c
@@ -301,11 +301,6 @@ static int spl_fit_append_fdt(struct spl_image_info 
*spl_image,
/* Make the load-address of the FDT available for the SPL framework */
spl_image->fdt_addr = (void *)image_info.load_addr;
 #if !CONFIG_IS_ENABLED(FIT_IMAGE_TINY)
-   /* Try to make space, so we can inject details on the loadables */
-   ret = fdt_shrink_to_minimum(spl_image->fdt_addr, 8192);
-   if (ret < 0)
-   return ret;
-#endif
 #if defined(CONFIG_SPL_LOAD_FIT_APPLY_OVERLAY)
for (; ; index++) {
node = spl_fit_get_image_node(fit, images, FIT_FDT_PROP, index);
@@ -319,6 +314,11 @@ static int spl_fit_append_fdt(struct spl_image_info 
*spl_image,
if (ret < 0)
return ret;
 
+   /* Make room in FDT for changes coming from the overlay */
+   ret = fdt_increase_size(spl_image->fdt_addr, image_info.size);
+   if (ret < 0)
+   return ret;
+
ret = fdt_overlay_apply_verbose(spl_image->fdt_addr,
(void *)image_info.load_addr);
if (ret)
@@ -328,6 +328,12 @@ static int spl_fit_append_fdt(struct spl_image_info 
*spl_image,
  fit_get_name(fit, node, NULL));
}
 #endif
+   /* Try to make space, so we can inject details on the loadables */
+   ret = fdt_shrink_to_minimum(spl_image->fdt_addr, 8192);
+   if (ret < 0)
+   return ret;
+#endif
+
return ret;
 }
 
-- 
2.17.1

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[U-Boot] [PATCH PATCH v3 11/12] spl: fit: constify the output parameter of spl_fit_get_image_name()

2019-05-23 Thread Jean-Jacques Hiblot
There is no need for it to be non-constant. Making it constant, allows to
return constant string without warning.

Signed-off-by: Jean-Jacques Hiblot 
---

Changes in v3: None
Changes in v2: None

 common/spl/spl_fit.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
index d772f2db64..8c5d15c3c8 100644
--- a/common/spl/spl_fit.c
+++ b/common/spl/spl_fit.c
@@ -39,7 +39,7 @@ __weak ulong board_spl_fit_size_align(ulong size)
  */
 static int spl_fit_get_image_name(const void *fit, int images,
  const char *type, int index,
- char **outname)
+ const char **outname)
 {
const char *name, *str;
__maybe_unused int node;
@@ -94,7 +94,7 @@ static int spl_fit_get_image_name(const void *fit, int images,
 static int spl_fit_get_image_node(const void *fit, int images,
  const char *type, int index)
 {
-   char *str;
+   const char *str;
int err;
int node;
 
@@ -363,7 +363,7 @@ static int spl_fit_record_loadable(const void *fit, int 
images, int index,
 {
int ret = 0;
 #if !CONFIG_IS_ENABLED(FIT_IMAGE_TINY)
-   char *name;
+   const char *name;
int node;
 
ret = spl_fit_get_image_name(fit, images, "loadables",
-- 
2.17.1

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[U-Boot] [PATCH PATCH v3 12/12] spl: fit: Allow the board to tell if more images must be loaded from FIT

2019-05-23 Thread Jean-Jacques Hiblot
spl_fit_get_image_name() is used to get the names of the images that the
SPL must load from the FIT. It relies on the content of a property present
in the FIT. The list of images is thus statically defined in the FIT.
With this scheme, it becomes quickly hard to manage combinations of more
than a hand few of images.
To address this problem, give the board-level code the opportunity to
add to the list of images. The images from the FIT property are loaded
first, and then the board_fit_get_additionnal_images() is called to
get more image names.

Signed-off-by: Jean-Jacques Hiblot 

---

Changes in v3:
- removed the RFC prefix. This work will be needed soon by TI's AM65x
platform. and can probably benefit other modular platforms
- removed the last patch that provided an example of how to use this with
on a DRA76.
- removed the patch that made u-boot.img a symlink to u-boot.itb because
it breaks the build of many platforms (because files required to build the
ITB are missing)
- removed the patch to reduce the footprint of the am335x SPL. (already
merged)
- Made the boot flow more permissive (don't fail immediately if an overlay
is not present) and more verbose when an error occures
- handle the dependencies of the FIT generation in a more generic way
- use a dedicated kconfig option to enable the application of the overlays
by the SPL.

Changes in v2:
- reworked board_fit_get_additionnal_images() and how it used in spl_fit.c
- removed dtbo generation from dtso files and use .dts extension for the
  overlays
- add dynamic allocation usage in a separate patch
- defconfig change for the am335x_evm

 common/spl/spl_fit.c | 28 +---
 include/spl.h| 16 
 2 files changed, 41 insertions(+), 3 deletions(-)

diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
index 8c5d15c3c8..f1e0ad8d73 100644
--- a/common/spl/spl_fit.c
+++ b/common/spl/spl_fit.c
@@ -25,6 +25,12 @@ __weak ulong board_spl_fit_size_align(ulong size)
return size;
 }
 
+__weak const char *board_fit_get_additionnal_images(int index,
+   const char *type)
+{
+   return NULL;
+}
+
 /**
  * spl_fit_get_image_name(): By using the matching configuration subnode,
  * retrieve the name of an image, specified by a property name and an index
@@ -45,6 +51,7 @@ static int spl_fit_get_image_name(const void *fit, int images,
__maybe_unused int node;
int conf_node;
int len, i;
+   bool found = true;
 
conf_node = fit_find_config_node(fit);
if (conf_node < 0) {
@@ -70,12 +77,27 @@ static int spl_fit_get_image_name(const void *fit, int 
images,
for (i = 0; i < index; i++) {
str = strchr(str, '\0') + 1;
if (!str || (str - name >= len)) {
-   debug("no string for index %d\n", index);
-   return -E2BIG;
+   found = false;
+   break;
}
}
 
-   *outname = (char *)str;
+   if (!found) {
+   /*
+* no string in the property for this index. Check if the board
+* level code can supply one.
+*/
+   str = board_fit_get_additionnal_images(index - i - 1, type);
+   if (str)
+   found = true;
+   }
+
+   if (!found) {
+   debug("no string for index %d\n", index);
+   return -E2BIG;
+   }
+
+   *outname = str;
return 0;
 }
 
diff --git a/include/spl.h b/include/spl.h
index a9aaef345f..b7a5d6a995 100644
--- a/include/spl.h
+++ b/include/spl.h
@@ -370,6 +370,22 @@ void board_spl_fit_post_load(ulong load_addr, size_t 
length);
  */
 ulong board_spl_fit_size_align(ulong size);
 
+/**
+ * board_fit_get_additionnal_images - Get additional image names from board-
+ *   level code.
+ * This function can be used to provide the image names based on runtime
+ * detection. A classic use-case would when DTBOs are used to describe
+ * additionnal daughter cards.
+ *
+ * @param indexIndex of the image. Starts at 0 and gets incremented 
after each
+ * call to this function.
+ * @param type The type of image. For example, "fdt" for DTBs
+ *
+ * @return The name of the node describing the image. NULL indicates that
+ * there no more images to get from this function.
+ */
+const char *board_fit_get_additionnal_images(int index, const char *type);
+
 /**
  * spl_perform_fixups() - arch/board-specific callback before processing
  *the boot-payload
-- 
2.17.1

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[U-Boot] [PATCH PATCH v3 08/12] Makefile: Fix u-boot.itb generation when building outside the source tree

2019-05-23 Thread Jean-Jacques Hiblot
Include the object tree and the source tree in the search path of the
FIT compîler (dtc). This allows to use paths relative to the root of the
source or object trees in the ITS instead of working backward from the
actual location of the ITS.
It also allows to use a build directory different of the source directory.

Signed-off-by: Jean-Jacques Hiblot 
---

Changes in v3: None
Changes in v2: None

 Makefile| 5 +++--
 board/theobroma-systems/lion_rk3368/fit_spl_atf.its | 6 +++---
 board/theobroma-systems/puma_rk3399/fit_spl_atf.its | 8 
 3 files changed, 10 insertions(+), 9 deletions(-)

diff --git a/Makefile b/Makefile
index b3ac1a9b8a..f0ee4a21e2 100644
--- a/Makefile
+++ b/Makefile
@@ -900,7 +900,8 @@ cmd_mkimage = $(objtree)/tools/mkimage 
$(MKIMAGEFLAGS_$(@F)) -d $< $@ \
>$(MKIMAGEOUTPUT) $(if $(KBUILD_VERBOSE:0=), && cat $(MKIMAGEOUTPUT))
 
 quiet_cmd_mkfitimage = MKIMAGE $@
-cmd_mkfitimage = $(objtree)/tools/mkimage $(MKIMAGEFLAGS_$(@F)) -f 
$(U_BOOT_ITS) -p $(CONFIG_FIT_EXTERNAL_OFFSET) $@\
+cmd_mkfitimage = $(objtree)/tools/mkimage $(MKIMAGEFLAGS_$(@F)) -D "-i $(obj) 
-i $(src)"\
+   -f $(U_BOOT_ITS) $@ -p $(CONFIG_FIT_EXTERNAL_OFFSET)\
>$(MKIMAGEOUTPUT) $(if $(KBUILD_VERBOSE:0=), && cat $(MKIMAGEOUTPUT))
 
 quiet_cmd_cat = CAT $@
@@ -1206,7 +1207,7 @@ endif
 SPL_FIT_SOURCE := $(subst ",,$(CONFIG_SPL_FIT_SOURCE))
 SPL_FIT_GENERATOR := $(subst ",,$(CONFIG_SPL_FIT_GENERATOR))
 ifneq ($(SPL_FIT_SOURCE),)
-U_BOOT_ITS = $(SPL_FIT_SOURCE)
+U_BOOT_ITS = $(src)/$(SPL_FIT_SOURCE)
 else
 ifneq ($(SPL_FIT_GENERATOR),)
 U_BOOT_ITS := u-boot.its
diff --git a/board/theobroma-systems/lion_rk3368/fit_spl_atf.its 
b/board/theobroma-systems/lion_rk3368/fit_spl_atf.its
index 6b04fbc7da..69202a117b 100644
--- a/board/theobroma-systems/lion_rk3368/fit_spl_atf.its
+++ b/board/theobroma-systems/lion_rk3368/fit_spl_atf.its
@@ -14,7 +14,7 @@
images {
uboot {
description = "U-Boot (64-bit)";
-   data = /incbin/("../../../u-boot-nodtb.bin");
+   data = /incbin/("u-boot-nodtb.bin");
type = "standalone";
os = "U-Boot";
arch = "arm64";
@@ -23,7 +23,7 @@
};
atf {
description = "ARM Trusted Firmware";
-   data = /incbin/("../../../bl31-rk3368.bin");
+   data = /incbin/("bl31-rk3368.bin");
type = "firmware";
os = "arm-trusted-firmware";
arch = "arm64";
@@ -34,7 +34,7 @@
 
fdt {
description = "RK3368-uQ7 (Lion) flat device-tree";
-   data = /incbin/("../../../u-boot.dtb");
+   data = /incbin/("u-boot.dtb");
type = "flat_dt";
compression = "none";
};
diff --git a/board/theobroma-systems/puma_rk3399/fit_spl_atf.its 
b/board/theobroma-systems/puma_rk3399/fit_spl_atf.its
index 530f059f3d..659183ecc1 100644
--- a/board/theobroma-systems/puma_rk3399/fit_spl_atf.its
+++ b/board/theobroma-systems/puma_rk3399/fit_spl_atf.its
@@ -14,7 +14,7 @@
images {
uboot {
description = "U-Boot (64-bit)";
-   data = /incbin/("../../../u-boot-nodtb.bin");
+   data = /incbin/("u-boot-nodtb.bin");
type = "standalone";
os = "U-Boot";
arch = "arm64";
@@ -23,7 +23,7 @@
};
atf {
description = "ARM Trusted Firmware";
-   data = /incbin/("../../../bl31-rk3399.bin");
+   data = /incbin/("bl31-rk3399.bin");
type = "firmware";
arch = "arm64";
os = "arm-trusted-firmware";
@@ -33,14 +33,14 @@
};
pmu {
description = "Cortex-M0 firmware";
-   data = /incbin/("../../../rk3399m0.bin");
+   data = /incbin/("rk3399m0.bin");
type = "pmu-firmware";
compression = "none";
load = <0x18>;
 };
fdt {
description = "RK3399-Q7 (Puma) flat device-tree";
-   data = /incbin/("../../../u-boot.dtb");
+   data = /incbin/("u-boot.dtb");
type = "flat_dt";
compression = "none";
};
-- 
2.17.1

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[U-Boot] [PATCH PATCH v3 05/12] spl: fit: be more verbose when an error occurs when applying the overlays

2019-05-23 Thread Jean-Jacques Hiblot
There are many ways the overlay application can fail.
2 of them are probably the most common:
- the application itself failed. Usually this is comes from an unresolved
  reference
- DTBO not available in FIT (could be because of a typo)

In both case it is good to be more explicit about the error and at least
show which overlay is failing.

Signed-off-by: Jean-Jacques Hiblot 
---

Changes in v3: None
Changes in v2: None

 common/spl/spl_fit.c | 7 +--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
index d5e3858ed0..d772f2db64 100644
--- a/common/spl/spl_fit.c
+++ b/common/spl/spl_fit.c
@@ -106,7 +106,7 @@ static int spl_fit_get_image_node(const void *fit, int 
images,
 
node = fdt_subnode_offset(fit, images, str);
if (node < 0) {
-   debug("cannot find image node '%s': %d\n", str, node);
+   pr_err("cannot find image node '%s': %d\n", str, node);
return -EINVAL;
}
 
@@ -337,8 +337,11 @@ static int spl_fit_append_fdt(struct spl_image_info 
*spl_image,
 
ret = fdt_overlay_apply_verbose(spl_image->fdt_addr,
(void *)image_info.load_addr);
-   if (ret)
+   if (ret) {
+   pr_err("failed to apply DT overlay %s\n",
+  fit_get_name(fit, node, NULL));
return ret;
+   }
 
debug("%s: DT overlay %s applied\n", __func__,
  fit_get_name(fit, node, NULL));
-- 
2.17.1

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[U-Boot] [PATCH PATCH v3 10/12] Makefile: Query the SPL Fit Generator for its dependencies

2019-05-23 Thread Jean-Jacques Hiblot
To reduce the complexity of the Makefile, let the generator tell what its
dependencies are. For this purpose use the "--deps" option.

Signed-off-by: Jean-Jacques Hiblot 
---

Changes in v3: None
Changes in v2: None

 Makefile   | 9 ++---
 arch/arm/mach-imx/mkimage_fit_atf.sh   | 7 +++
 arch/arm/mach-rockchip/make_fit_atf.py | 8 
 board/sunxi/mksunxi_fit_atf.sh | 5 +
 4 files changed, 22 insertions(+), 7 deletions(-)

diff --git a/Makefile b/Makefile
index 048d12340b..3f8899b91b 100644
--- a/Makefile
+++ b/Makefile
@@ -1211,13 +1211,8 @@ U_BOOT_ITS = $(src)/$(SPL_FIT_SOURCE)
 else
 ifneq ($(SPL_FIT_GENERATOR),)
 U_BOOT_ITS := u-boot.its
-ifeq ($(CONFIG_SPL_FIT_GENERATOR),"arch/arm/mach-imx/mkimage_fit_atf.sh")
-U_BOOT_ITS_DEPS += u-boot-nodtb.bin
-endif
-ifeq ($(CONFIG_SPL_FIT_GENERATOR),"arch/arm/mach-rockchip/make_fit_atf.py")
-U_BOOT_ITS_DEPS += u-boot
-endif
-$(U_BOOT_ITS): $(U_BOOT_ITS_DEPS) FORCE
+U_BOOT_ITS_DEPS += $(shell $(srctree)/$(SPL_FIT_GENERATOR) --deps $(BOARD))
+$(U_BOOT_ITS): u-boot-nodtb.bin $(U_BOOT_ITS_DEPS) FORCE
$(srctree)/$(SPL_FIT_GENERATOR) $(BOARD) \
$(patsubst %,arch/$(ARCH)/dts/%.dtb,$(subst ",,$(CONFIG_OF_LIST))) > $@
 endif
diff --git a/arch/arm/mach-imx/mkimage_fit_atf.sh 
b/arch/arm/mach-imx/mkimage_fit_atf.sh
index 45b325665e..45a81fbad3 100755
--- a/arch/arm/mach-imx/mkimage_fit_atf.sh
+++ b/arch/arm/mach-imx/mkimage_fit_atf.sh
@@ -11,6 +11,13 @@
 [ -z "$ATF_LOAD_ADDR" ] && ATF_LOAD_ADDR="0x0091"
 [ -z "$BL33_LOAD_ADDR" ] && BL33_LOAD_ADDR="0x4020"
 
+if [ x"$1" = x"--deps" ]; then
+   echo $BL31
+   echo "tee.bin"
+   echo "u-boot-nodtb.bin"
+   exit 0
+fi
+
 if [ ! -f $BL31 ]; then
echo "ERROR: BL31 file $BL31 NOT found" >&2
exit 0
diff --git a/arch/arm/mach-rockchip/make_fit_atf.py 
b/arch/arm/mach-rockchip/make_fit_atf.py
index 4138b04a37..afd734e736 100755
--- a/arch/arm/mach-rockchip/make_fit_atf.py
+++ b/arch/arm/mach-rockchip/make_fit_atf.py
@@ -192,11 +192,19 @@ def get_bl31_segments_info(bl31_file_name):
 paddr = seg[ELF_SEG_P_PADDR]
 print('paddr: %08x' % paddr)
 
+def show_deps_and_exit():
+   print("u-boot")
+   print("bl31.elf")
+   sys.exit(0)
+
 def main():
 uboot_elf="./u-boot"
 bl31_elf="./bl31.elf"
 FIT_ITS=sys.stdout
 
+if sys.argv[1] == "--deps":
+   show_deps_and_exit()
+
 opts, args = getopt.getopt(sys.argv[1:], "o:u:b:h")
 for opt, val in opts:
 if opt == "-o":
diff --git a/board/sunxi/mksunxi_fit_atf.sh b/board/sunxi/mksunxi_fit_atf.sh
index 0dc7ab4348..8f87514a6f 100755
--- a/board/sunxi/mksunxi_fit_atf.sh
+++ b/board/sunxi/mksunxi_fit_atf.sh
@@ -5,6 +5,11 @@
 #
 # usage: $0  [ [https://lists.denx.de/listinfo/u-boot


[U-Boot] [PATCH PATCH v3 09/12] Makefile: Pass the board name to the FIT generator scripts

2019-05-23 Thread Jean-Jacques Hiblot
Currently the FIT generator scripts are passed only a list of dtbs.
However some platforms may also require information about the board itself.

Signed-off-by: Jean-Jacques Hiblot 
---

Changes in v3: None
Changes in v2: None

 Makefile   | 2 +-
 arch/arm/mach-imx/mkimage_fit_atf.sh   | 3 ++-
 arch/arm/mach-rockchip/make_fit_atf.py | 5 +++--
 board/sunxi/mksunxi_fit_atf.sh | 2 ++
 4 files changed, 8 insertions(+), 4 deletions(-)

diff --git a/Makefile b/Makefile
index f0ee4a21e2..048d12340b 100644
--- a/Makefile
+++ b/Makefile
@@ -1218,7 +1218,7 @@ ifeq 
($(CONFIG_SPL_FIT_GENERATOR),"arch/arm/mach-rockchip/make_fit_atf.py")
 U_BOOT_ITS_DEPS += u-boot
 endif
 $(U_BOOT_ITS): $(U_BOOT_ITS_DEPS) FORCE
-   $(srctree)/$(SPL_FIT_GENERATOR) \
+   $(srctree)/$(SPL_FIT_GENERATOR) $(BOARD) \
$(patsubst %,arch/$(ARCH)/dts/%.dtb,$(subst ",,$(CONFIG_OF_LIST))) > $@
 endif
 endif
diff --git a/arch/arm/mach-imx/mkimage_fit_atf.sh 
b/arch/arm/mach-imx/mkimage_fit_atf.sh
index 38c9858e84..45b325665e 100755
--- a/arch/arm/mach-imx/mkimage_fit_atf.sh
+++ b/arch/arm/mach-imx/mkimage_fit_atf.sh
@@ -4,7 +4,7 @@
 # script to generate FIT image source for i.MX8MQ boards with
 # ARM Trusted Firmware and multiple device trees (given on the command line)
 #
-# usage: $0  [ [  [ [&2
 fi
 
+shift
 for dtname in $*
 do
echo "$dtname size: " >&2
diff --git a/arch/arm/mach-rockchip/make_fit_atf.py 
b/arch/arm/mach-rockchip/make_fit_atf.py
index d1faff1957..4138b04a37 100755
--- a/arch/arm/mach-rockchip/make_fit_atf.py
+++ b/arch/arm/mach-rockchip/make_fit_atf.py
@@ -4,7 +4,7 @@ A script to generate FIT image source for rockchip boards
 with ARM Trusted Firmware
 and multiple device trees (given on the command line)
 
-usage: $0  [ [  [ [https://lists.denx.de/listinfo/u-boot


[U-Boot] [PATCH PATCH v3 06/12] Makefile.lib: include /__symbols__ in dtb if SPL_LOAD_FIT_APPLY_OVERLAY is enabled

2019-05-23 Thread Jean-Jacques Hiblot
In order to apply an overlay to a DTB. The DTB must have been generated
with the option '-@'.

Signed-off-by: Jean-Jacques Hiblot 
---

Changes in v3: None
Changes in v2: None

 scripts/Makefile.lib | 4 
 1 file changed, 4 insertions(+)

diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib
index de67677f61..4b9f333d57 100644
--- a/scripts/Makefile.lib
+++ b/scripts/Makefile.lib
@@ -292,6 +292,10 @@ cmd_dt_S_dtb=  
\
 $(obj)/%.dtb.S: $(obj)/%.dtb
$(call cmd,dt_S_dtb)
 
+ifeq ($(CONFIG_SPL_LOAD_FIT_APPLY_OVERLAY),y)
+DTC_FLAGS += -@
+endif
+
 quiet_cmd_dtc = DTC $@
 # Modified for U-Boot
 # Bring in any U-Boot-specific include at the end of the file
-- 
2.17.1

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[U-Boot] [PATCH PATCH v3 07/12] Makefile: Fix tests for CONFIG_SPL_LOAD_FIT and CONFIG_SPL_FIT_GENERATOR

2019-05-23 Thread Jean-Jacques Hiblot
The current tests do to handle well the cases where those variables are not
defined. When CONFIG_SPL_LOAD_FIT is not defined, U_BOOT_ITS gets defined
as an empty string.
Fixing it by using intermediate variables with the quotes removed

Signed-off-by: Jean-Jacques Hiblot 
---

Changes in v3: None
Changes in v2: None

 Makefile | 11 +++
 1 file changed, 7 insertions(+), 4 deletions(-)

diff --git a/Makefile b/Makefile
index 059978bfe6..b3ac1a9b8a 100644
--- a/Makefile
+++ b/Makefile
@@ -1200,12 +1200,15 @@ ifndef CONFIG_SYS_UBOOT_START
 CONFIG_SYS_UBOOT_START := 0
 endif
 
+
 # Boards with more complex image requirments can provide an .its source file
 # or a generator script
-ifneq ($(CONFIG_SPL_FIT_SOURCE),"")
-U_BOOT_ITS = $(subst ",,$(CONFIG_SPL_FIT_SOURCE))
+SPL_FIT_SOURCE := $(subst ",,$(CONFIG_SPL_FIT_SOURCE))
+SPL_FIT_GENERATOR := $(subst ",,$(CONFIG_SPL_FIT_GENERATOR))
+ifneq ($(SPL_FIT_SOURCE),)
+U_BOOT_ITS = $(SPL_FIT_SOURCE)
 else
-ifneq ($(CONFIG_SPL_FIT_GENERATOR),"")
+ifneq ($(SPL_FIT_GENERATOR),)
 U_BOOT_ITS := u-boot.its
 ifeq ($(CONFIG_SPL_FIT_GENERATOR),"arch/arm/mach-imx/mkimage_fit_atf.sh")
 U_BOOT_ITS_DEPS += u-boot-nodtb.bin
@@ -1214,7 +1217,7 @@ ifeq 
($(CONFIG_SPL_FIT_GENERATOR),"arch/arm/mach-rockchip/make_fit_atf.py")
 U_BOOT_ITS_DEPS += u-boot
 endif
 $(U_BOOT_ITS): $(U_BOOT_ITS_DEPS) FORCE
-   $(srctree)/$(CONFIG_SPL_FIT_GENERATOR) \
+   $(srctree)/$(SPL_FIT_GENERATOR) \
$(patsubst %,arch/$(ARCH)/dts/%.dtb,$(subst ",,$(CONFIG_OF_LIST))) > $@
 endif
 endif
-- 
2.17.1

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Re: [U-Boot] [PATCH] ARM: imx: apalis_imx6: Drop ad-hoc SATA binding

2019-05-23 Thread Marcel Ziswiler
On Sun, 2019-05-12 at 22:43 +0200, Marek Vasut wrote:
> Drop the ad-hoc AHCI binding code, this is superseded by
> CONFIG_DWC_AHSATA_AHCI=y resp. drivers/ata/dwc_ahsata.c
> 
> Signed-off-by: Marek Vasut 

Works fine, thanks!

Acked-by: Marcel Ziswiler 

> Cc: Fabio Estevam 
> Cc: Marcel Ziswiler 
> Cc: Max Krummenacher 
> Cc: Stefan Agner 
> Cc: Stefano Babic 
> ---
>  board/toradex/apalis_imx6/apalis_imx6.c | 49 -
> 
>  1 file changed, 49 deletions(-)
> 
> diff --git a/board/toradex/apalis_imx6/apalis_imx6.c
> b/board/toradex/apalis_imx6/apalis_imx6.c
> index 3e59185438..b502d4ef13 100644
> --- a/board/toradex/apalis_imx6/apalis_imx6.c
> +++ b/board/toradex/apalis_imx6/apalis_imx6.c
> @@ -1131,52 +1131,3 @@ U_BOOT_DEVICE(mxc_serial) = {
>   .name = "serial_mxc",
>   .platdata = &mxc_serial_plat,
>  };
> -
> -#if CONFIG_IS_ENABLED(AHCI)
> -static int sata_imx_probe(struct udevice *dev)
> -{
> - int i, err;
> -
> - for (i = 0; i < APALIS_IMX6_SATA_INIT_RETRIES; i++) {
> - err = setup_sata();
> - if (err) {
> - printf("SATA setup failed: %d\n", err);
> - return err;
> - }
> -
> - udelay(100);
> -
> - err = dwc_ahsata_probe(dev);
> - if (!err)
> - break;
> -
> - /* There is no device on the SATA port */
> - if (sata_dm_port_status(0, 0) == 0)
> - break;
> -
> - /* There's a device, but link not established. Retry */
> - device_remove(dev, DM_REMOVE_NORMAL);
> - }
> -
> - return 0;
> -}
> -
> -struct ahci_ops sata_imx_ops = {
> - .port_status = dwc_ahsata_port_status,
> - .reset  = dwc_ahsata_bus_reset,
> - .scan   = dwc_ahsata_scan,
> -};
> -
> -static const struct udevice_id sata_imx_ids[] = {
> - { .compatible = "fsl,imx6q-ahci" },
> - { }
> -};
> -
> -U_BOOT_DRIVER(sata_imx) = {
> - .name   = "dwc_ahci",
> - .id = UCLASS_AHCI,
> - .of_match   = sata_imx_ids,
> - .ops= &sata_imx_ops,
> - .probe  = sata_imx_probe,
> -};
> -#endif /* AHCI */
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[U-Boot] [PATCH 1/7] armv8: lx2160a: The lx2160a platform supports the I2C driver model.

2019-05-23 Thread Chuanhua Han
DM_I2C_COMPAT is a compatibility layer that allows using the non-DM I2C
API when DM_I2C is used.When DM_I2C_COMPAT is not enabled for
compilation, a compilation error will be generated. This patch solves
the problem that the i2c-related api of the lx2160a platform does not
support dm.

Signed-off-by: Chuanhua Han 
---
 arch/arm/cpu/armv8/fsl-layerscape/Kconfig |  8 ---
 board/freescale/common/emc2305.c  | 21 ++
 board/freescale/common/qixis.c| 17 +
 board/freescale/common/sys_eeprom.c   | 84 +--
 board/freescale/common/vid.c  | 84 +++
 board/freescale/lx2160a/lx2160a.c |  8 +++
 drivers/ddr/fsl/main.c| 36 +-
 7 files changed, 245 insertions(+), 13 deletions(-)

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig 
b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
index a843c1eb65..f3eaab960b 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
+++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
@@ -234,14 +234,6 @@ config ARCH_LX2160A
select ARCH_EARLY_INIT_R
select BOARD_EARLY_INIT_F
select SYS_I2C_MXC
-   select SYS_I2C_MXC_I2C1
-   select SYS_I2C_MXC_I2C2
-   select SYS_I2C_MXC_I2C3
-   select SYS_I2C_MXC_I2C4
-   select SYS_I2C_MXC_I2C5
-   select SYS_I2C_MXC_I2C6
-   select SYS_I2C_MXC_I2C7
-   select SYS_I2C_MXC_I2C8
imply DISTRO_DEFAULTS
imply PANIC_HANG
imply SCSI
diff --git a/board/freescale/common/emc2305.c b/board/freescale/common/emc2305.c
index 8523084da9..b1ca051db2 100644
--- a/board/freescale/common/emc2305.c
+++ b/board/freescale/common/emc2305.c
@@ -24,10 +24,22 @@ void set_fan_speed(u8 data)
   I2C_EMC2305_FAN5};
 
for (index = 0; index < NUM_OF_FANS; index++) {
+#ifndef CONFIG_DM_I2C
if (i2c_write(I2C_EMC2305_ADDR, Fan[index], 1, &data, 1) != 0) {
printf("Error: failed to change fan speed @%x\n",
   Fan[index]);
}
+#else
+   struct udevice *dev;
+
+   if (i2c_get_chip_for_busnum(0, I2C_EMC2305_ADDR, 1, &dev))
+   continue;
+
+   if (dm_i2c_write(dev, Fan[index], &data, 1) != 0) {
+   printf("Error: failed to change fan speed @%x\n",
+  Fan[index]);
+   }
+#endif
}
 }
 
@@ -36,6 +48,15 @@ void emc2305_init(void)
u8 data;
 
data = I2C_EMC2305_CMD;
+#ifndef CONFIG_DM_I2C
if (i2c_write(I2C_EMC2305_ADDR, I2C_EMC2305_CONF, 1, &data, 1) != 0)
printf("Error: failed to configure EMC2305\n");
+#else
+   struct udevice *dev;
+
+   if (!i2c_get_chip_for_busnum(0, I2C_EMC2305_ADDR, 1, &dev))
+   if (dm_i2c_write(dev, I2C_EMC2305_CONF, &data, 1))
+   printf("Error: failed to configure EMC2305\n");
+#endif
+
 }
diff --git a/board/freescale/common/qixis.c b/board/freescale/common/qixis.c
index f1b98bcd2a..2c4c4ae108 100644
--- a/board/freescale/common/qixis.c
+++ b/board/freescale/common/qixis.c
@@ -24,13 +24,30 @@
 #ifdef CONFIG_SYS_I2C_FPGA_ADDR
 u8 qixis_read_i2c(unsigned int reg)
 {
+#ifndef CONFIG_DM_I2C
return i2c_reg_read(CONFIG_SYS_I2C_FPGA_ADDR, reg);
+#else
+   struct udevice *dev;
+
+   if (i2c_get_chip_for_busnum(0, CONFIG_SYS_I2C_FPGA_ADDR, 1, &dev))
+   return 0xff;
+
+   return dm_i2c_reg_read(dev, reg);
+#endif
 }
 
 void qixis_write_i2c(unsigned int reg, u8 value)
 {
u8 val = value;
+#ifndef CONFIG_DM_I2C
i2c_reg_write(CONFIG_SYS_I2C_FPGA_ADDR, reg, val);
+#else
+   struct udevice *dev;
+
+   if (!i2c_get_chip_for_busnum(0, CONFIG_SYS_I2C_FPGA_ADDR, 1, &dev))
+   dm_i2c_reg_write(dev, reg, val);
+#endif
+
 }
 #endif
 
diff --git a/board/freescale/common/sys_eeprom.c 
b/board/freescale/common/sys_eeprom.c
index ab0fe0baf1..ff76cef411 100644
--- a/board/freescale/common/sys_eeprom.c
+++ b/board/freescale/common/sys_eeprom.c
@@ -148,23 +148,42 @@ static int read_eeprom(void)
 {
int ret;
 #ifdef CONFIG_SYS_EEPROM_BUS_NUM
+#ifndef CONFIG_DM_I2C
unsigned int bus;
+#endif
 #endif
 
if (has_been_read)
return 0;
 
 #ifdef CONFIG_SYS_EEPROM_BUS_NUM
+#ifndef CONFIG_DM_I2C
bus = i2c_get_bus_num();
i2c_set_bus_num(CONFIG_SYS_EEPROM_BUS_NUM);
 #endif
+#endif
 
-   ret = i2c_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0, 
CONFIG_SYS_I2C_EEPROM_ADDR_LEN,
-   (void *)&e, sizeof(e));
+#ifndef CONFIG_DM_I2C
+   ret = i2c_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0,
+  CONFIG_SYS_I2C_EEPROM_ADDR_LEN,
+  (void *)&e, sizeof(e));
+#else
+   struct udevice *dev;
+#ifdef CONFIG_SYS_EEPROM_BUS_NUM
+   ret = i2c_get_chip_for_busnum(CONFIG_SYS_EEPROM_BUS_NUM,
+ CONFIG_SYS_I2C_EEPROM_ADDR, 1, &dev);
+#

[U-Boot] [PATCH 3/7] armv8: dts: fsl-lx2160a: add i2c controller and gpio DT nodes

2019-05-23 Thread Chuanhua Han
In lx2160a soc, there are eight i2c controllers, this patch adds i2c
nodes for lx2160a, and the gpio2 nodes on which the i2c4 controller
depends.

Signed-off-by: Chuanhua Han 
---
 arch/arm/dts/fsl-lx2160a.dtsi | 101 ++
 1 file changed, 101 insertions(+)

diff --git a/arch/arm/dts/fsl-lx2160a.dtsi b/arch/arm/dts/fsl-lx2160a.dtsi
index 28220781d3..8a91cdb7dc 100644
--- a/arch/arm/dts/fsl-lx2160a.dtsi
+++ b/arch/arm/dts/fsl-lx2160a.dtsi
@@ -49,6 +49,96 @@
 <1 10 0x8>; /* Hypervisor PPI, active-low */
};
 
+   i2c0: i2c@200 {
+   compatible = "fsl,vf610-i2c";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   reg = <0x0 0x200 0x0 0x1>;
+   interrupts = <0 34 4>;
+   clock-names = "i2c";
+   clocks = <&clockgen 4 7>;
+   scl-gpio = <&gpio2 15 0>;
+   status = "disabled";
+   };
+
+   i2c1: i2c@201 {
+   compatible = "fsl,vf610-i2c";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   reg = <0x0 0x201 0x0 0x1>;
+   interrupts = <0 34 4>;
+   clock-names = "i2c";
+   clocks = <&clockgen 4 7>;
+   status = "disabled";
+   };
+
+   i2c2: i2c@202 {
+   compatible = "fsl,vf610-i2c";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   reg = <0x0 0x202 0x0 0x1>;
+   interrupts = <0 35 4>;
+   clock-names = "i2c";
+   clocks = <&clockgen 4 7>;
+   status = "disabled";
+   };
+
+   i2c3: i2c@203 {
+   compatible = "fsl,vf610-i2c";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   reg = <0x0 0x203 0x0 0x1>;
+   interrupts = <0 35 4>;
+   clock-names = "i2c";
+   clocks = <&clockgen 4 7>;
+   status = "disabled";
+   };
+
+   i2c4: i2c@204 {
+   compatible = "fsl,vf610-i2c";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   reg = <0x0 0x204 0x0 0x1>;
+   interrupts = <0 74 4>;
+   clock-names = "i2c";
+   clocks = <&clockgen 4 7>;
+   scl-gpio = <&gpio2 16 0>;
+   status = "disabled";
+   };
+
+   i2c5: i2c@205 {
+   compatible = "fsl,vf610-i2c";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   reg = <0x0 0x205 0x0 0x1>;
+   interrupts = <0 74 4>;
+   clock-names = "i2c";
+   clocks = <&clockgen 4 7>;
+   status = "disabled";
+   };
+
+   i2c6: i2c@206 {
+   compatible = "fsl,vf610-i2c";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   reg = <0x0 0x206 0x0 0x1>;
+   interrupts = <0 75 4>;
+   clock-names = "i2c";
+   clocks = <&clockgen 4 7>;
+   status = "disabled";
+   };
+
+   i2c7: i2c@207 {
+   compatible = "fsl,vf610-i2c";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   reg = <0x0 0x207 0x0 0x1>;
+   interrupts = <0 75 4>;
+   clock-names = "i2c";
+   clocks = <&clockgen 4 7>;
+   status = "disabled";
+   };
+
uart0: serial@21c {
compatible = "arm,pl011";
reg = <0x0 0x21c 0x0 0x1000>;
@@ -102,6 +192,17 @@
num-cs = <6>;
};
 
+   gpio2: gpio@232 {
+   compatible = "fsl,qoriq-gpio";
+   reg = <0x0 0x232 0x0 0x1>;
+   interrupts = <0 37 4>;
+   gpio-controller;
+   little-endian;
+   #gpio-cells = <2>;
+   interrupt-controller;
+   #interrupt-cells = <2>;
+   };
+
usb0: usb3@310 {
compatible = "fsl,layerscape-dwc3";
reg = <0x0 0x310 0x0 0x1>;
-- 
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[U-Boot] [PATCH 5/7] drivers: i2c: mxc: Solve the compiler error when using i2c dm mode

2019-05-23 Thread Chuanhua Han
This patch solved the following compilation error:

1.Remove the definition of CONFIG_SYS_I2C to solve the following
compilation issue:
In file included from include/config.h:8:0,
 from include/common.h:20:
include/config_fallbacks.h:51:4: error: #error "Cannot define
CONFIG_SYS_I2C when CONFIG_DM_I2C is used"
 #  error "Cannot define CONFIG_SYS_I2C when CONFIG_DM_I2C is used"
^
In file included from include/config.h:8:0,
 from include/common.h:20:
include/config_fallbacks.h:51:4: error: #error "Cannot define
CONFIG_SYS_I2C when CONFIG_DM_I2C is used"
 #  error "Cannot define CONFIG_SYS_I2C when CONFIG_DM_I2C is used"
^

2.Remove the definition of CONFIG_SYS_I2C_EARLY_INIT to solve the
following compilation issue:
board/freescale/lx2160a/lx2160a.c: In function 'board_early_init_f':
board/freescale/lx2160a/lx2160a.c:108:2: warning: implicit declaration
of function 'i2c_early_init_f'; did you mean 'arch_early_init_r'?
[-Wimplicit-function-declaration]
  i2c_early_init_f();
  ^~~~
  arch_early_init_r

3.Move the enable_i2c_clk function definition to resolve the following
compilation issues:
  drivers/i2c/mxc_i2c.c: In function 'mxc_i2c_probe':
  drivers/i2c/mxc_i2c.c:824:8: warning: implicit declaration of function
'enable_i2c_clk';
  did you mean 'enable_irq_wake'? [-Wimplicit-function-declaration]
  ret = enable_i2c_clk(1, bus->seq);
^~
enable_irq_wake

Signed-off-by: Chuanhua Han 
---
 arch/arm/include/asm/arch-fsl-layerscape/config.h |  2 --
 drivers/i2c/mxc_i2c.c | 15 ---
 2 files changed, 8 insertions(+), 9 deletions(-)

diff --git a/arch/arm/include/asm/arch-fsl-layerscape/config.h 
b/arch/arm/include/asm/arch-fsl-layerscape/config.h
index eb21c09e01..5f87499980 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/config.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/config.h
@@ -178,8 +178,6 @@
 #elif defined(CONFIG_ARCH_LX2160A)
 #define TZPC_BASE  0x0220
 #define TZPCDECPROT_0_SET_BASE (TZPC_BASE + 0x804)
-#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_EARLY_INIT
 #define SRDS_MAX_LANES  8
 #ifndef L1_CACHE_BYTES
 #define L1_CACHE_SHIFT 6
diff --git a/drivers/i2c/mxc_i2c.c b/drivers/i2c/mxc_i2c.c
index f3811eb0c5..241367bac8 100644
--- a/drivers/i2c/mxc_i2c.c
+++ b/drivers/i2c/mxc_i2c.c
@@ -558,6 +558,14 @@ static int i2c_read_data(struct mxc_i2c_bus *i2c_bus, 
uchar chip, uchar *buf,
return 0;
 }
 
+int __enable_i2c_clk(unsigned char enable, unsigned int i2c_num)
+{
+   return 1;
+}
+
+int enable_i2c_clk(unsigned char enable, unsigned int i2c_num)
+   __attribute__((weak, alias("__enable_i2c_clk")));
+
 #ifndef CONFIG_DM_I2C
 /*
  * Read data from I2C device
@@ -723,13 +731,6 @@ static int mxc_i2c_probe(struct i2c_adapter *adap, uint8_t 
chip)
return bus_i2c_write(i2c_get_base(adap), chip, 0, 0, NULL, 0);
 }
 
-int __enable_i2c_clk(unsigned char enable, unsigned i2c_num)
-{
-   return 1;
-}
-int enable_i2c_clk(unsigned char enable, unsigned i2c_num)
-   __attribute__((weak, alias("__enable_i2c_clk")));
-
 void bus_i2c_init(int index, int speed, int unused,
  int (*idle_bus_fn)(void *p), void *idle_bus_data)
 {
-- 
2.17.1

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[U-Boot] [PATCH 2/7] configs: lx2160a: enable DM support for pcf2127 rtc

2019-05-23 Thread Chuanhua Han
Enable related configs to support pcf2127 rtc DM feature.

Signed-off-by: Chuanhua Han 
Signed-off-by: Biwen Li 
---
 configs/lx2160ardb_tfa_SECURE_BOOT_defconfig | 5 +
 configs/lx2160ardb_tfa_defconfig | 5 +
 2 files changed, 10 insertions(+)

diff --git a/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig 
b/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig
index 5cb29fd9ca..d56aa6d333 100644
--- a/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig
+++ b/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig
@@ -58,3 +58,8 @@ CONFIG_RSA=y
 CONFIG_SPL_RSA=y
 CONFIG_RSA_SOFTWARE_EXP=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
+CONFIG_DM_I2C=y
+CONFIG_DM_RTC=y
+CONFIG_DM_GPIO=y
+CONFIG_CMD_DATE=y
+CONFIG_RTC_PCF2127=y
diff --git a/configs/lx2160ardb_tfa_defconfig b/configs/lx2160ardb_tfa_defconfig
index 94f58a832f..059e877b21 100644
--- a/configs/lx2160ardb_tfa_defconfig
+++ b/configs/lx2160ardb_tfa_defconfig
@@ -57,3 +57,8 @@ CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
+CONFIG_DM_I2C=y
+CONFIG_DM_RTC=y
+CONFIG_DM_GPIO=y
+CONFIG_CMD_DATE=y
+CONFIG_RTC_PCF2127=y
-- 
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[U-Boot] [PATCH 4/7] armv8: lx2160ardb : Add pcf2127 node

2019-05-23 Thread Chuanhua Han
This patch adds the pcf2127-rtc node under the i2c4 node.

Signed-off-by: Chuanhua Han 
---
 arch/arm/dts/fsl-lx2160a-rdb.dts | 19 +++
 1 file changed, 19 insertions(+)

diff --git a/arch/arm/dts/fsl-lx2160a-rdb.dts b/arch/arm/dts/fsl-lx2160a-rdb.dts
index 4b526449a1..ca71fbea42 100644
--- a/arch/arm/dts/fsl-lx2160a-rdb.dts
+++ b/arch/arm/dts/fsl-lx2160a-rdb.dts
@@ -17,6 +17,16 @@
model = "NXP Layerscape LX2160ARDB Board";
compatible = "fsl,lx2160ardb", "fsl,lx2160a";
 
+   aliases {
+   i2c0 = &i2c0;
+   i2c1 = &i2c1;
+   i2c2 = &i2c2;
+   i2c3 = &i2c3;
+   i2c4 = &i2c4;
+   i2c5 = &i2c5;
+   i2c6 = &i2c6;
+   i2c7 = &i2c7;
+   };
 };
 
 &esdhc0 {
@@ -27,6 +37,15 @@
status = "okay";
 };
 
+&i2c4 {
+   status = "okay";
+
+   rtc@51 {
+   compatible = "pcf2127-rtc";
+   reg = <0x51>;
+   };
+};
+
 &sata0 {
status = "okay";
 };
-- 
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Re: [U-Boot] [EXT] Re: [PATCH] i2c: pcf2127: fix bug that read wrong time

2019-05-23 Thread Chuanhua Han


> -Original Message-
> From: Heiko Schocher 
> Sent: 2019年5月23日 11:29
> To: Chuanhua Han 
> Cc: Lukasz Majewski ; u-boot@lists.denx.de; Biwen Li
> ; s...@chromium.org; Stefano Babic ;
> Meng Yi 
> Subject: Re: [EXT] Re: [PATCH] i2c: pcf2127: fix bug that read wrong time
> 
> Caution: EXT Email
> 
> Hello Chuanhua Han,
> 
> Am 22.05.2019 um 14:45 schrieb Chuanhua Han:
> >
> >
> >> -Original Message-
> >> From: Lukasz Majewski 
> >> Sent: 2019年5月22日 19:32
> >> To: Chuanhua Han 
> >> Cc: h...@denx.de; u-boot@lists.denx.de; Biwen Li ;
> >> s...@chromium.org; Stefano Babic 
> >> Subject: Re: [EXT] Re: [PATCH] i2c: pcf2127: fix bug that read wrong
> >> time
> >>
> >> On Wed, 22 May 2019 09:31:35 +
> >> Chuanhua Han  wrote:
> >>
>  -Original Message-
>  From: Lukasz Majewski 
>  Sent: 2019年5月22日 16:41
>  To: Chuanhua Han 
>  Cc: h...@denx.de; u-boot@lists.denx.de; Biwen Li ;
>  s...@chromium.org; Stefano Babic 
>  Subject: Re: [EXT] Re: [PATCH] i2c: pcf2127: fix bug that read
>  wrong time
> 
>  Hi Chuanhua,
> 
> >> -Original Message-
> >> From: Lukasz Majewski 
> >> Sent: 2019年5月22日 15:16
> >> To: Chuanhua Han 
> >> Cc: h...@denx.de; u-boot@lists.denx.de; Biwen Li
> >> ; s...@chromium.org
> >> Subject: [EXT] Re: [PATCH] i2c: pcf2127: fix bug that read wrong
> >> time
> >>
> >> Hi Chuanhua,
> >>
> >>> Because i2c driver does not generate a stop bit when reading
> >>> registers of pcf2127
> >>
> >> The change (in the common i2c code) is rather large when
> >> considering the description above.
> >>
> >> Could you write a more detailed patch description? Is this only
> >> the problem with i2c in DM?
> > OK, This is a problem with the i2c transport framework. After
> > writing the register address that you want to read, the stop
> > signal is missing before reading the register data.
> >>
> >> Is the same code (as introduced in this commit) available in
> >> Linux kernel?
> > The kernel does not have such a problem
> 
>  Do you know maybe why such issue is not present on Linux kernel?
> >>> The kernel code is encapsulated when reading the pcf2127 register,
> >>> which separates the read and write, thus generating a stop signal
> >>> before reading the register. Eg: Here is the wrapper made by the
> >>> kernel code: static int pcf2127_i2c_read(void *context, const void
> >>> *reg, size_t reg_size, void *val, size_t val_size) {
> >>>  struct device *dev = context;
> >>>  struct i2c_client *client = to_i2c_client(dev);
> >>>  int ret;
> >>>
> >>>  if (WARN_ON(reg_size != 1))
> >>>  return -EINVAL;
> >>>
> >>>  ret = i2c_master_send(client, reg, 1);
> >>>  if (ret != 1)
> >>>  return ret < 0 ? ret : -EIO;
> >>>
> >>>  ret = i2c_master_recv(client, val, val_size);
> >>>  if (ret != val_size)
> >>>  return ret < 0 ? ret : -EIO;
> >>>
> >>>  return 0;
> >>> }
> >>
> >> That was my point - the same shall be done in the pcf2127 driver.
> >> This is a slow device, so we can afford for this.
> > There is no similar api in the uboot code to split the read data into the
> address of the send register and receive the data.
> > Uboot encapsulates the transmit register address and the read data, so no
> stop signal is generated.
> 
> If this API is missing, please introduce it. But not in one big patch instead 
> split
> it into:
> 
> - introduce I2C_M_RD_NEED_STOP_BIT
> 
> - support flag I2C_M_RD_NEED_STOP_BIT in driver drivers/i2c/mxc_i2c.c
> 
>or may we need a more common approach to this?
> 
> - pcf2127 driver changes
> 
> Also, as Lukasz mentioned, provide commit messages with more information,
> what you do and why.
Ok, Next I will split the patch and provide a more detailed description 
messages.
> 
> >>
> 
> >> How the error is reproduced? What are the symptoms of it?
> > You can use the i2c command to read the register data of pcf2127.
> 
>  So the problem is with using "i2c ..." commands from U-Boot prompt?
> >>> Yes,but adding debugging to the rtc driver is also the same problem
> 
> > You will find that you want to read the address 0 of the register,
> > but the data of the 1 address is read, and the data read later
> > will be offset.
> 
>  As fair as I can tell the pcf2127 has its own DM aware driver at
>  driver/rtc/pcf2127.c.
> 
>  Is this driver broken so you need to modify the generic i.MX I2C
>  code? Have you tried to test this driver on your setup?
> >>> Pcf2127 driver also has problems, has been modified, need i2c
> >>> general code to support
> >>
> >> Just one remark the mxc_i2c.c is IMX specific I2C code. Not the generic 
> >> one.
> > ok
> >>
> >> Moreover, it looks like the same approach (first send, then read) is
> >> performed in th

[U-Boot] [PATCH 7/7] armv8: lx2160ardb : Add slave nodes under the i2c0 controller

2019-05-23 Thread Chuanhua Han
This patch adds some slave nodes to support the i2c dm on the device
side under the i2c0 controller.

Signed-off-by: Chuanhua Han 
---
 arch/arm/dts/fsl-lx2160a-rdb.dts | 51 
 1 file changed, 51 insertions(+)

diff --git a/arch/arm/dts/fsl-lx2160a-rdb.dts b/arch/arm/dts/fsl-lx2160a-rdb.dts
index ca71fbea42..c6b4131338 100644
--- a/arch/arm/dts/fsl-lx2160a-rdb.dts
+++ b/arch/arm/dts/fsl-lx2160a-rdb.dts
@@ -27,6 +27,16 @@
i2c6 = &i2c6;
i2c7 = &i2c7;
};
+
+   sb_3v3: regulator-sb3v3 {
+   compatible = "regulator-fixed";
+   regulator-name = "MC34717-3.3VSB";
+   regulator-min-microvolt = <330>;
+   regulator-max-microvolt = <330>;
+   regulator-boot-on;
+   regulator-always-on;
+   };
+
 };
 
 &esdhc0 {
@@ -37,6 +47,47 @@
status = "okay";
 };
 
+&i2c0 {
+   status = "okay";
+
+   i2c-mux@77 {
+   compatible = "nxp,pca9547";
+   reg = <0x77>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   i2c@2 {
+   #address-cells = <1>;
+   #size-cells = <0>;
+   reg = <0x2>;
+
+   power-monitor@40 {
+   compatible = "ti,ina220";
+   reg = <0x40>;
+   shunt-resistor = <1000>;
+   };
+   };
+
+   i2c@3 {
+   #address-cells = <1>;
+   #size-cells = <0>;
+   reg = <0x3>;
+
+   temperature-sensor@4c {
+   compatible = "nxp,sa56004";
+   reg = <0x4c>;
+   vcc-supply = <&sb_3v3>;
+   };
+
+   temperature-sensor@4d {
+   compatible = "nxp,sa56004";
+   reg = <0x4d>;
+   vcc-supply = <&sb_3v3>;
+   };
+   };
+   };
+};
+
 &i2c4 {
status = "okay";
 
-- 
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[U-Boot] [PATCH 6/7] gpio: do not include on ARCH_LX2160A

2019-05-23 Thread Chuanhua Han
As no gpio.h is defined for this architecture, to avoid
compilation failure, do not include  for
arch ls2160a.

Signed-off-by: Chuanhua Han 
---
 arch/arm/include/asm/gpio.h | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/arm/include/asm/gpio.h b/arch/arm/include/asm/gpio.h
index 370031f2ac..f78b976e10 100644
--- a/arch/arm/include/asm/gpio.h
+++ b/arch/arm/include/asm/gpio.h
@@ -1,6 +1,7 @@
 #if !defined(CONFIG_ARCH_UNIPHIER) && !defined(CONFIG_ARCH_STI) && \
!defined(CONFIG_ARCH_K3) && !defined(CONFIG_ARCH_BCM6858) && \
-   !defined(CONFIG_ARCH_BCM63158) && !defined(CONFIG_ARCH_ROCKCHIP)
+   !defined(CONFIG_ARCH_BCM63158) && !defined(CONFIG_ARCH_ROCKCHIP) && \
+   !defined(CONFIG_ARCH_LX2160A)
 #include 
 #endif
 #include 
-- 
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Re: [U-Boot] [EXT] Re: [PATCH] i2c: pcf2127: fix bug that read wrong time

2019-05-23 Thread Chuanhua Han


> -Original Message-
> From: Lukasz Majewski 
> Sent: 2019年5月23日 13:54
> To: Heiko Schocher 
> Cc: Chuanhua Han ; u-boot@lists.denx.de; Biwen Li
> ; s...@chromium.org; Stefano Babic ;
> Meng Yi 
> Subject: Re: [EXT] Re: [PATCH] i2c: pcf2127: fix bug that read wrong time
> 
> Hi Heiko,
> 
> > Hello Chuanhua Han,
> >
> > Am 22.05.2019 um 14:45 schrieb Chuanhua Han:
> > >
> > >
> > >> -Original Message-
> > >> From: Lukasz Majewski 
> > >> Sent: 2019年5月22日 19:32
> > >> To: Chuanhua Han 
> > >> Cc: h...@denx.de; u-boot@lists.denx.de; Biwen Li ;
> > >> s...@chromium.org; Stefano Babic 
> > >> Subject: Re: [EXT] Re: [PATCH] i2c: pcf2127: fix bug that read
> > >> wrong time
> > >>
> > >> On Wed, 22 May 2019 09:31:35 +
> > >> Chuanhua Han  wrote:
> > >>
> >  -Original Message-
> >  From: Lukasz Majewski 
> >  Sent: 2019年5月22日 16:41
> >  To: Chuanhua Han 
> >  Cc: h...@denx.de; u-boot@lists.denx.de; Biwen Li
> >  ; s...@chromium.org; Stefano Babic
> >   Subject: Re: [EXT] Re: [PATCH] i2c: pcf2127:
> >  fix bug that read wrong time
> > 
> >  Hi Chuanhua,
> > 
> > >> -Original Message-
> > >> From: Lukasz Majewski 
> > >> Sent: 2019年5月22日 15:16
> > >> To: Chuanhua Han 
> > >> Cc: h...@denx.de; u-boot@lists.denx.de; Biwen Li
> > >> ; s...@chromium.org
> > >> Subject: [EXT] Re: [PATCH] i2c: pcf2127: fix bug that read
> > >> wrong time
> > >>
> > >> Hi Chuanhua,
> > >>
> > >>> Because i2c driver does not generate a stop bit when reading
> > >>> registers of pcf2127
> > >>
> > >> The change (in the common i2c code) is rather large when
> > >> considering the description above.
> > >>
> > >> Could you write a more detailed patch description? Is this only
> > >> the problem with i2c in DM?
> > > OK, This is a problem with the i2c transport framework. After
> > > writing the register address that you want to read, the stop
> > > signal is missing before reading the register data.
> > >>
> > >> Is the same code (as introduced in this commit) available in
> > >> Linux kernel?
> > > The kernel does not have such a problem
> > 
> >  Do you know maybe why such issue is not present on Linux kernel?
> > >>> The kernel code is encapsulated when reading the pcf2127 register,
> > >>> which separates the read and write, thus generating a stop signal
> > >>> before reading the register. Eg: Here is the wrapper made by the
> > >>> kernel code: static int pcf2127_i2c_read(void *context, const void
> > >>> *reg, size_t reg_size, void *val, size_t val_size) {
> > >>>  struct device *dev = context;
> > >>>  struct i2c_client *client = to_i2c_client(dev);
> > >>>  int ret;
> > >>>
> > >>>  if (WARN_ON(reg_size != 1))
> > >>>  return -EINVAL;
> > >>>
> > >>>  ret = i2c_master_send(client, reg, 1);
> > >>>  if (ret != 1)
> > >>>  return ret < 0 ? ret : -EIO;
> > >>>
> > >>>  ret = i2c_master_recv(client, val, val_size);
> > >>>  if (ret != val_size)
> > >>>  return ret < 0 ? ret : -EIO;
> > >>>
> > >>>  return 0;
> > >>> }
> > >>
> > >> That was my point - the same shall be done in the pcf2127 driver.
> > >> This is a slow device, so we can afford for this.
> > > There is no similar api in the uboot code to split the read data
> > > into the address of the send register and receive the data. Uboot
> > > encapsulates the transmit register address and the read data, so no
> > > stop signal is generated.
> >
> > If this API is missing, please introduce it. But not in one big patch
> > instead split it into:
> >
> > - introduce I2C_M_RD_NEED_STOP_BIT
> >
> > - support flag I2C_M_RD_NEED_STOP_BIT in driver drivers/i2c/mxc_i2c.c
> >
> >or may we need a more common approach to this?
> >
> > - pcf2127 driver changes
> >
> > Also, as Lukasz mentioned, provide commit messages with more
> > information, what you do and why.
> 
> Verbose commit messages help with understanding the _real_ problem being
> solved by the patch. Also are helpful in the future as a documentation and
> reference.
I'll sort out the details in the next patch
> 
> >
> > >>
> > 
> > >> How the error is reproduced? What are the symptoms of it?
> > > You can use the i2c command to read the register data of
> > > pcf2127.
> > 
> >  So the problem is with using "i2c ..." commands from U-Boot
> >  prompt?
> > >>> Yes,but adding debugging to the rtc driver is also the same
> > >>> problem
> > 
> > > You will find that you want to read the address 0 of the
> > > register, but the data of the 1 address is read, and the data
> > > read later will be offset.
> > 
> >  As fair as I can tell the pcf2127 has its own DM aware driver at
> >  driver/rtc/pcf2127.c.
> > 
> >  Is this driver broken so you need to modify the ge

[U-Boot] [PATCH PATCH v3 00/12] Add support for applications of overlays in SPL

2019-05-23 Thread Jean-Jacques Hiblot

The purpose of this series is to provide the SPL with ability to apply
overlays for u-boot. this is only a RFC so far, to get a feedback on the
approach.

Our use-case is the support of the daughter boards of the AM65x EVM. In
Linux, each board is supported by a unique overlay. The presence of the
boards is detected at runtime, and some useful features (like USB) are
implemented on those daughter boards. Instead of providing multiple dtbs
and fall in a combinatorial pit, we propose to use DT overlays.

Patch #1 "spl: fit: Add support for applying DT overlay" has been posted
a few weeks ago by Michal Simek.
Patch #2 to #5 amend Michal's patch.
Patch #6 to #8 are simple fixes for the Makefile
Patch #9 is not required but relates to this series and will be required
later by the AM6x platform
Patch #10 is used to reduce the complexity of the Makefile by having FIT
generator scripts provide their dependencies
Patch #12 adds a way to dynamically select the DT overlays. That is were we
would use HW detection to select the required overlays. In that case, the
board-level code tells what overlay it needs (it gives the name of the
node).

On arm, if overlay are supported, this series increases the size of the SPL
by 3.2 kB.

Travis build : https://travis-ci.org/jjhiblot/u-boot/builds/535686392
For a strange reason, buildman on travis show errors for sun8i ans sun50i,
but pass when I run it locally.

Changes in v3:
- Add a new config option: SPL_LOAD_FIT_APPLY_OVERLAY. By default, it is
not selected.
- removed the RFC prefix. This work will be needed soon by TI's AM65x
platform. and can probably benefit other modular platforms
- removed the last patch that provided an example of how to use this with
on a DRA76.
- removed the patch that made u-boot.img a symlink to u-boot.itb because
it breaks the build of many platforms (because files required to build the
ITB are missing)
- removed the patch to reduce the footprint of the am335x SPL. (already
merged)
- Made the boot flow more permissive (don't fail immediately if an overlay
is not present) and more verbose when an error occures
- handle the dependencies of the FIT generation in a more generic way
- use a dedicated kconfig option to enable the application of the overlays
by the SPL.

Changes in v2:
- reworked board_fit_get_additionnal_images() and how it used in spl_fit.c
- removed dtbo generation from dtso files and use .dts extension for the
  overlays
- add dynamic allocation usage in a separate patch
- defconfig change for the am335x_evm

Jean-Jacques Hiblot (11):
  spl: fit: Make room in the FDT before applying overlays
  spl: fit: allocate a temporary buffer to load the overlays
  spl: fit: Do not fail immediately if an overlay is not available
  spl: fit: be more verbose when an error occurs when applying the
overlays
  Makefile.lib: include /__symbols__ in dtb if
SPL_LOAD_FIT_APPLY_OVERLAY is enabled
  Makefile: Fix tests for CONFIG_SPL_LOAD_FIT and
CONFIG_SPL_FIT_GENERATOR
  Makefile: Fix u-boot.itb generation when building outside the source
tree
  Makefile: Pass the board name to the FIT generator scripts
  Makefile: Query the SPL Fit Generator for its dependencies
  spl: fit: constify the output parameter of spl_fit_get_image_name()
  spl: fit: Allow the board to tell if more images must be loaded from
FIT

Michal Simek (1):
  spl: fit: Add support for applying DT overlay

 Kconfig   | 10 +++
 Makefile  | 23 +++--
 arch/arm/mach-imx/mkimage_fit_atf.sh  | 10 ++-
 arch/arm/mach-rockchip/make_fit_atf.py| 13 ++-
 board/sunxi/mksunxi_fit_atf.sh|  7 ++
 .../lion_rk3368/fit_spl_atf.its   |  6 +-
 .../puma_rk3399/fit_spl_atf.its   |  8 +-
 common/spl/spl_fit.c  | 90 +--
 include/spl.h | 16 
 scripts/Makefile.lib  |  4 +
 10 files changed, 156 insertions(+), 31 deletions(-)

-- 
2.17.1

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[U-Boot] [PATCH 1/1] apalis/colibri imx6: provide proper fdtfile value

2019-05-23 Thread Igor Opaniuk
Provide proper fdtfile env variable value before invoking distro_bootcmd
command.

Signed-off-by: Igor Opaniuk 
---
 include/configs/apalis_imx6.h  | 2 +-
 include/configs/colibri_imx6.h | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/include/configs/apalis_imx6.h b/include/configs/apalis_imx6.h
index 9d9e16e5d9..c27ba6ca6b 100644
--- a/include/configs/apalis_imx6.h
+++ b/include/configs/apalis_imx6.h
@@ -186,7 +186,7 @@
 #define CONFIG_EXTRA_ENV_SETTINGS \
BOOTENV \
"bootcmd=run emmcboot ; echo ; echo emmcboot failed ; " \
-   "run distro_bootcmd ; " \
+   "setenv fdtfile ${fdt_file}; run distro_bootcmd ; " \
"usb start ; " \
"setenv stdout serial,vga ; setenv stdin serial,usbkbd\0" \
"boot_file=zImage\0" \
diff --git a/include/configs/colibri_imx6.h b/include/configs/colibri_imx6.h
index b540b3e074..1cdf83d82d 100644
--- a/include/configs/colibri_imx6.h
+++ b/include/configs/colibri_imx6.h
@@ -190,7 +190,7 @@
 #define CONFIG_EXTRA_ENV_SETTINGS \
BOOTENV \
"bootcmd=run emmcboot ; echo ; echo emmcboot failed ; " \
-   "run distro_bootcmd ; " \
+   "setenv fdtfile ${fdt_file}; run distro_bootcmd ; " \
"usb start ; " \
"setenv stdout serial,vga ; setenv stdin serial,usbkbd\0" \
"boot_file=zImage\0" \
-- 
2.17.1

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[U-Boot] [PATCHv2 2/2] SPL: Default to disabling legacy image support when using FIT

2019-05-23 Thread Tom Rini
When we have a FIT image being used by SPL by default that means the
most common case is that we'll never run into a legacy image.  Disable
legacy image support by default in that case to reclaim space.

Signed-off-by: Tom Rini 
---
 common/spl/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/common/spl/Kconfig b/common/spl/Kconfig
index c7cd34449a52..55dba0d42069 100644
--- a/common/spl/Kconfig
+++ b/common/spl/Kconfig
@@ -101,7 +101,7 @@ config SPL_RAW_IMAGE_SUPPORT
 
 config SPL_LEGACY_IMAGE_SUPPORT
bool "Support SPL loading and booting of Legacy images"
-   default y if !TI_SECURE_DEVICE
+   default y if !TI_SECURE_DEVICE && !SPL_LOAD_FIT
help
  SPL will support loading and booting Legacy images when this option
  is y. If this is not set, SPL will move on to other available
-- 
2.7.4

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[U-Boot] [PATCHv2 1/2] configs: Rename CONFIG_IMAGE_FORMAT_LEGACY to CONFIG_LEGACY_IMAGE_FORMAT

2019-05-23 Thread Tom Rini
The name CONFIG_LEGACY_IMAGE_FORMAT reads slightly better along with
allowing us to avoid a rather nasty Kbuild/Kconfig issue down the line
with CONFIG_IS_ENABLED(IMAGE_FORMAT_LEGACY).  In a few places outside of
cmd/ switch to using CONFIG_IS_ENABLED() to test what is set.

Signed-off-by: Tom Rini 
---
 Kconfig|  4 ++--
 arch/arm/mach-imx/hab.c|  2 +-
 cmd/bootm.c|  6 +++---
 cmd/disk.c |  4 ++--
 cmd/fdc.c  |  4 ++--
 cmd/fpga.c |  2 +-
 cmd/nand.c |  4 ++--
 cmd/source.c   |  4 ++--
 cmd/ximg.c |  6 +++---
 common/bootm.c |  8 
 common/image-fdt.c |  6 +++---
 common/image.c | 10 +-
 configs/bcm963158_ram_defconfig|  2 +-
 configs/bcm968580xref_ram_defconfig|  2 +-
 configs/gardena-smart-gateway-mt7688-ram_defconfig |  2 +-
 configs/gardena-smart-gateway-mt7688_defconfig |  2 +-
 configs/ids8313_defconfig  |  2 +-
 configs/imx6dl_icore_nand_defconfig|  2 +-
 configs/imx6q_icore_nand_defconfig |  2 +-
 configs/imx6qdl_icore_mipi_defconfig   |  2 +-
 configs/imx6qdl_icore_mmc_defconfig|  2 +-
 configs/imx6qdl_icore_nand_defconfig   |  2 +-
 configs/imx6qdl_icore_rqs_defconfig|  2 +-
 configs/imx6ul_geam_mmc_defconfig  |  2 +-
 configs/imx6ul_geam_nand_defconfig |  2 +-
 configs/imx6ul_isiot_emmc_defconfig|  2 +-
 configs/imx6ul_isiot_nand_defconfig|  2 +-
 configs/linkit-smart-7688-ram_defconfig|  2 +-
 configs/linkit-smart-7688_defconfig|  2 +-
 configs/syzygy_hub_defconfig   |  2 +-
 configs/xilinx_versal_mini_defconfig   |  2 +-
 configs/xilinx_zynqmp_mini_defconfig   |  2 +-
 configs/xilinx_zynqmp_mini_qspi_defconfig  |  2 +-
 configs/zynq_cc108_defconfig   |  2 +-
 configs/zynq_dlc20_rev1_0_defconfig|  2 +-
 configs/zynq_microzed_defconfig|  2 +-
 configs/zynq_z_turn_defconfig  |  2 +-
 configs/zynq_zc702_defconfig   |  2 +-
 configs/zynq_zc706_defconfig   |  2 +-
 configs/zynq_zc770_xm010_defconfig |  2 +-
 configs/zynq_zc770_xm011_defconfig |  2 +-
 configs/zynq_zc770_xm011_x16_defconfig |  2 +-
 configs/zynq_zc770_xm012_defconfig |  2 +-
 configs/zynq_zc770_xm013_defconfig |  2 +-
 configs/zynq_zed_defconfig |  2 +-
 configs/zynq_zybo_defconfig|  2 +-
 configs/zynq_zybo_z7_defconfig |  2 +-
 doc/uImage.FIT/signature.txt   |  2 +-
 include/image.h|  2 +-
 49 files changed, 67 insertions(+), 67 deletions(-)

diff --git a/Kconfig b/Kconfig
index 5f5c5ccfd6b6..cb67d183e339 100644
--- a/Kconfig
+++ b/Kconfig
@@ -317,7 +317,7 @@ config FIT_SIGNATURE
  check the legacy image format is disabled by default, so that
  unsigned images cannot be loaded. If a board needs the legacy image
  format support in this case, enable it using
- CONFIG_IMAGE_FORMAT_LEGACY.
+ CONFIG_LEGACY_IMAGE_FORMAT.
 
 config FIT_SIGNATURE_MAX_SIZE
hex "Max size of signed FIT structures"
@@ -446,7 +446,7 @@ endif # SPL
 
 endif # FIT
 
-config IMAGE_FORMAT_LEGACY
+config LEGACY_IMAGE_FORMAT
bool "Enable support for the legacy image format"
default y if !FIT_SIGNATURE
help
diff --git a/arch/arm/mach-imx/hab.c b/arch/arm/mach-imx/hab.c
index d42a15e8772a..632237ee2a8c 100644
--- a/arch/arm/mach-imx/hab.c
+++ b/arch/arm/mach-imx/hab.c
@@ -310,7 +310,7 @@ static ulong get_image_ivt_offset(ulong img_addr)
 
buf = map_sysmem(img_addr, 0);
switch (genimg_get_format(buf)) {
-#if defined(CONFIG_IMAGE_FORMAT_LEGACY)
+#if CONFIG_IS_ENABLED(LEGACY_IMAGE_FORMAT)
case IMAGE_FORMAT_LEGACY:
return (image_get_image_size((image_header_t *)img_addr)
+ 0x1000 - 1)  & ~(0x1000 - 1);
diff --git a/cmd/bootm.c b/cmd/bootm.c
index c3a063474ac6..41b341e2e538 100644
--- a/cmd/bootm.c
+++ b/cmd/bootm.c
@@ -249,7 +249,7 @@ static int image_info(ulong addr)
printf("\n## Checking Image at %08lx ...\n", addr);
 
switch (genimg_get_format(hdr)) {
-#if defined(CONFIG_IMAGE_FORMAT_LEGACY)
+#if defined(CONFIG_LEGACY_IMAGE_FORMAT)
case IMAGE_FORMAT_LEGAC

[U-Boot] [PATCH] board: am335x/mux: configure the pins for 8-bit data transfer on MMC1

2019-05-23 Thread Jean-Jacques Hiblot
This is required for proper operation of the 8-bit data transfers.
This fixes transient errors seen on BeagleBone Black.

Signed-off-by: Jean-Jacques Hiblot 
---
 board/ti/am335x/mux.c | 4 
 1 file changed, 4 insertions(+)

diff --git a/board/ti/am335x/mux.c b/board/ti/am335x/mux.c
index 37a599768b..6e1ede3933 100644
--- a/board/ti/am335x/mux.c
+++ b/board/ti/am335x/mux.c
@@ -93,6 +93,10 @@ static struct module_pin_mux mmc0_pin_mux_sk_evm[] = {
 };
 
 static struct module_pin_mux mmc1_pin_mux[] = {
+   {OFFSET(gpmc_ad7), (MODE(1) | RXACTIVE | PULLUP_EN)},   /* MMC1_DAT7 */
+   {OFFSET(gpmc_ad6), (MODE(1) | RXACTIVE | PULLUP_EN)},   /* MMC1_DAT6 */
+   {OFFSET(gpmc_ad5), (MODE(1) | RXACTIVE | PULLUP_EN)},   /* MMC1_DAT5 */
+   {OFFSET(gpmc_ad4), (MODE(1) | RXACTIVE | PULLUP_EN)},   /* MMC1_DAT4 */
{OFFSET(gpmc_ad3), (MODE(1) | RXACTIVE | PULLUP_EN)},   /* MMC1_DAT3 */
{OFFSET(gpmc_ad2), (MODE(1) | RXACTIVE | PULLUP_EN)},   /* MMC1_DAT2 */
{OFFSET(gpmc_ad1), (MODE(1) | RXACTIVE | PULLUP_EN)},   /* MMC1_DAT1 */
-- 
2.17.1

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Re: [U-Boot] [PATCHv2 2/2] SPL: Default to disabling legacy image support when using FIT

2019-05-23 Thread Jean-Jacques Hiblot


On 23/05/2019 13:14, Tom Rini wrote:

When we have a FIT image being used by SPL by default that means the
most common case is that we'll never run into a legacy image.  Disable
legacy image support by default in that case to reclaim space.

Signed-off-by: Tom Rini 
---
  common/spl/Kconfig | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/common/spl/Kconfig b/common/spl/Kconfig
index c7cd34449a52..55dba0d42069 100644
--- a/common/spl/Kconfig
+++ b/common/spl/Kconfig
@@ -101,7 +101,7 @@ config SPL_RAW_IMAGE_SUPPORT
  
  config SPL_LEGACY_IMAGE_SUPPORT

bool "Support SPL loading and booting of Legacy images"
-   default y if !TI_SECURE_DEVICE
+   default y if !TI_SECURE_DEVICE && !SPL_LOAD_FIT
help
  SPL will support loading and booting Legacy images when this option
  is y. If this is not set, SPL will move on to other available


reviewed-by and tested-by : Jean-Jacques Hiblot 

Building for arm, the reduction in size is around 50 bytes

JJ

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[U-Boot] x86 FSP 2

2019-05-23 Thread Simon Glass
Hi Bin,

I'm looking at Apollo Lake and it seems to use a newer FSP version
(2.0). The API differences seem to be fairly minor but the packaging
seems a little more complicated.

I'm thinking of introducing a Kconfig for this and moving the existing
fsp implementation into an arch/x86/lib/fsp1 directory and adding an
fsp2 there also. What do you think? Have you done anything with this
newer version?

Regards,
Simon
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[U-Boot] [PATCHv2 0/8] dm: pci: add Freescale PowerPC PCIe driver

2019-05-23 Thread Z.q. Hou
From: Hou Zhiqiang 

Add PCIe DM driver for Freescale PowerPC PCIe controllers.

Hou Zhiqiang (8):
  powerpc: mpc85xx: Move CONFIG_FSL_PCIE_DISABLE_ASPM to Kconfig
  powerpc: mpc85xx: Move CONFIG_FSL_PCIE_RESET to Kconfig
  powerpc: mpc85xx: Update the condition to compile PCI routines
  powerpc: T208xQDS: Compile the legacy PCIe routines conditionally
  t2080: dts: Added PCIe DT nodes
  dm: pci: add Freescale PowerPC PCIe driver
  powerpc: T208xQDS: Disable legacy PCIe driver
  configs: T2080QDS: Enable PCIe driver

 arch/powerpc/cpu/mpc85xx/Kconfig  |  29 +
 arch/powerpc/cpu/mpc85xx/pci.c|   2 +-
 arch/powerpc/dts/t2080.dtsi   |  48 ++
 arch/powerpc/include/asm/config_mpc85xx.h |   5 -
 board/freescale/t208xqds/pci.c|   2 +
 configs/T2080QDS_NAND_defconfig   |   4 +
 configs/T2080QDS_SDCARD_defconfig |   4 +
 configs/T2080QDS_SPIFLASH_defconfig   |   4 +
 configs/T2080QDS_defconfig|   4 +
 drivers/pci/Kconfig   |   8 +
 drivers/pci/Makefile  |   1 +
 drivers/pci/pcie_fsl.c| 611 ++
 drivers/pci/pcie_fsl.h|  57 ++
 drivers/pci/pcie_fsl_fixup.c  |  51 ++
 include/configs/BSC9132QDS.h  |   1 -
 include/configs/C29XPCIE.h|   1 -
 include/configs/MPC8536DS.h   |   1 -
 include/configs/MPC8544DS.h   |   1 -
 include/configs/MPC8548CDS.h  |   1 -
 include/configs/MPC8568MDS.h  |   1 -
 include/configs/MPC8569MDS.h  |   1 -
 include/configs/MPC8572DS.h   |   1 -
 include/configs/P1010RDB.h|   1 -
 include/configs/P1022DS.h |   1 -
 include/configs/P1023RDB.h|   1 -
 include/configs/T208xQDS.h|  19 -
 include/configs/T208xRDB.h|   1 -
 include/configs/UCP1020.h |   1 -
 include/configs/controlcenterd.h  |   1 -
 include/configs/p1_p2_rdb_pc.h|   1 -
 include/configs/p1_twr.h  |   1 -
 include/configs/sbc8548.h |   1 -
 include/configs/xpedite537x.h |   1 -
 include/configs/xpedite550x.h |   1 -
 34 files changed, 824 insertions(+), 44 deletions(-)
 create mode 100644 drivers/pci/pcie_fsl.c
 create mode 100644 drivers/pci/pcie_fsl.h
 create mode 100644 drivers/pci/pcie_fsl_fixup.c

-- 
2.17.1

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[U-Boot] [PATCHv2 1/8] powerpc: mpc85xx: Move CONFIG_FSL_PCIE_DISABLE_ASPM to Kconfig

2019-05-23 Thread Z.q. Hou
From: Hou Zhiqiang 

Use the Kconfig option to select the PCIe ASPM errata.

Signed-off-by: Hou Zhiqiang 
---
V2:
 - New patch.

 arch/powerpc/cpu/mpc85xx/Kconfig  | 8 
 arch/powerpc/include/asm/config_mpc85xx.h | 5 -
 2 files changed, 8 insertions(+), 5 deletions(-)

diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig
index 0057f195b3..02bc1caa3f 100644
--- a/arch/powerpc/cpu/mpc85xx/Kconfig
+++ b/arch/powerpc/cpu/mpc85xx/Kconfig
@@ -702,6 +702,7 @@ config ARCH_P1011
select SYS_FSL_ERRATUM_A005125
select SYS_FSL_ERRATUM_ELBC_A001
select SYS_FSL_ERRATUM_ESDHC111
+   select FSL_PCIE_DISABLE_ASPM
select SYS_FSL_HAS_DDR3
select SYS_FSL_HAS_SEC
select SYS_FSL_SEC_BE
@@ -716,6 +717,7 @@ config ARCH_P1020
select SYS_FSL_ERRATUM_A005125
select SYS_FSL_ERRATUM_ELBC_A001
select SYS_FSL_ERRATUM_ESDHC111
+   select FSL_PCIE_DISABLE_ASPM
select SYS_FSL_HAS_DDR3
select SYS_FSL_HAS_SEC
select SYS_FSL_SEC_BE
@@ -735,6 +737,7 @@ config ARCH_P1021
select SYS_FSL_ERRATUM_A005125
select SYS_FSL_ERRATUM_ELBC_A001
select SYS_FSL_ERRATUM_ESDHC111
+   select FSL_PCIE_DISABLE_ASPM
select SYS_FSL_HAS_DDR3
select SYS_FSL_HAS_SEC
select SYS_FSL_SEC_BE
@@ -782,6 +785,7 @@ config ARCH_P1024
select SYS_FSL_ERRATUM_A005125
select SYS_FSL_ERRATUM_ELBC_A001
select SYS_FSL_ERRATUM_ESDHC111
+   select FSL_PCIE_DISABLE_ASPM
select SYS_FSL_HAS_DDR3
select SYS_FSL_HAS_SEC
select SYS_FSL_SEC_BE
@@ -802,6 +806,7 @@ config ARCH_P1025
select SYS_FSL_ERRATUM_A005125
select SYS_FSL_ERRATUM_ELBC_A001
select SYS_FSL_ERRATUM_ESDHC111
+   select FSL_PCIE_DISABLE_ASPM
select SYS_FSL_HAS_DDR3
select SYS_FSL_HAS_SEC
select SYS_FSL_SEC_BE
@@ -1431,6 +1436,9 @@ config SYS_P4080_ERRATUM_SERDES_A001
 config SYS_P4080_ERRATUM_SERDES_A005
bool
 
+config FSL_PCIE_DISABLE_ASPM
+   bool
+
 config SYS_FSL_QORIQ_CHASSIS1
bool
 
diff --git a/arch/powerpc/include/asm/config_mpc85xx.h 
b/arch/powerpc/include/asm/config_mpc85xx.h
index 7c963cdc35..946e74a93b 100644
--- a/arch/powerpc/include/asm/config_mpc85xx.h
+++ b/arch/powerpc/include/asm/config_mpc85xx.h
@@ -61,19 +61,16 @@
 /* P1011 is single core version of P1020 */
 #elif defined(CONFIG_ARCH_P1011)
 #define CONFIG_TSECV2
-#define CONFIG_FSL_PCIE_DISABLE_ASPM
 #define CONFIG_USB_MAX_CONTROLLER_COUNT2
 
 #elif defined(CONFIG_ARCH_P1020)
 #define CONFIG_TSECV2
-#define CONFIG_FSL_PCIE_DISABLE_ASPM
 #ifndef CONFIG_USB_MAX_CONTROLLER_COUNT
 #define CONFIG_USB_MAX_CONTROLLER_COUNT2
 #endif
 
 #elif defined(CONFIG_ARCH_P1021)
 #define CONFIG_TSECV2
-#define CONFIG_FSL_PCIE_DISABLE_ASPM
 #define QE_MURAM_SIZE  0x6000UL
 #define MAX_QE_RISC1
 #define QE_NUM_OF_SNUM 28
@@ -95,14 +92,12 @@
 /* P1024 is lower end variant of P1020 */
 #elif defined(CONFIG_ARCH_P1024)
 #define CONFIG_TSECV2
-#define CONFIG_FSL_PCIE_DISABLE_ASPM
 #define CONFIG_USB_MAX_CONTROLLER_COUNT2
 
 /* P1025 is lower end variant of P1021 */
 #elif defined(CONFIG_ARCH_P1025)
 #define CONFIG_USB_MAX_CONTROLLER_COUNT1
 #define CONFIG_TSECV2
-#define CONFIG_FSL_PCIE_DISABLE_ASPM
 #define QE_MURAM_SIZE  0x6000UL
 #define MAX_QE_RISC1
 #define QE_NUM_OF_SNUM 28
-- 
2.17.1

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[U-Boot] [PATCHv2 2/8] powerpc: mpc85xx: Move CONFIG_FSL_PCIE_RESET to Kconfig

2019-05-23 Thread Z.q. Hou
From: Hou Zhiqiang 

Use the Kconfig option to select the PCIe reset errata.

Signed-off-by: Hou Zhiqiang 
---
V2:
 - New patch.

 arch/powerpc/cpu/mpc85xx/Kconfig | 21 +
 include/configs/BSC9132QDS.h |  1 -
 include/configs/C29XPCIE.h   |  1 -
 include/configs/MPC8536DS.h  |  1 -
 include/configs/MPC8544DS.h  |  1 -
 include/configs/MPC8548CDS.h |  1 -
 include/configs/MPC8568MDS.h |  1 -
 include/configs/MPC8569MDS.h |  1 -
 include/configs/MPC8572DS.h  |  1 -
 include/configs/P1010RDB.h   |  1 -
 include/configs/P1022DS.h|  1 -
 include/configs/P1023RDB.h   |  1 -
 include/configs/T208xQDS.h   |  1 -
 include/configs/T208xRDB.h   |  1 -
 include/configs/UCP1020.h|  1 -
 include/configs/controlcenterd.h |  1 -
 include/configs/p1_p2_rdb_pc.h   |  1 -
 include/configs/p1_twr.h |  1 -
 include/configs/sbc8548.h|  1 -
 include/configs/xpedite537x.h|  1 -
 include/configs/xpedite550x.h|  1 -
 21 files changed, 21 insertions(+), 20 deletions(-)

diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig
index 02bc1caa3f..5c23efcf66 100644
--- a/arch/powerpc/cpu/mpc85xx/Kconfig
+++ b/arch/powerpc/cpu/mpc85xx/Kconfig
@@ -533,6 +533,7 @@ config ARCH_BSC9132
select SYS_FSL_ERRATUM_ESDHC111
select SYS_FSL_ERRATUM_I2C_A004447
select SYS_FSL_ERRATUM_IFC_A002769
+   select FSL_PCIE_RESET
select SYS_FSL_HAS_DDR3
select SYS_FSL_HAS_SEC
select SYS_FSL_SEC_BE
@@ -551,6 +552,7 @@ config ARCH_C29X
select SYS_FSL_DDR_VER_46
select SYS_FSL_ERRATUM_A005125
select SYS_FSL_ERRATUM_ESDHC111
+   select FSL_PCIE_RESET
select SYS_FSL_HAS_DDR3
select SYS_FSL_HAS_SEC
select SYS_FSL_SEC_BE
@@ -566,6 +568,7 @@ config ARCH_MPC8536
select FSL_LAW
select SYS_FSL_ERRATUM_A004508
select SYS_FSL_ERRATUM_A005125
+   select FSL_PCIE_RESET
select SYS_FSL_HAS_DDR2
select SYS_FSL_HAS_DDR3
select SYS_FSL_HAS_SEC
@@ -594,6 +597,7 @@ config ARCH_MPC8544
bool
select FSL_LAW
select SYS_FSL_ERRATUM_A005125
+   select FSL_PCIE_RESET
select SYS_FSL_HAS_DDR2
select SYS_FSL_HAS_SEC
select SYS_FSL_SEC_BE
@@ -609,6 +613,7 @@ config ARCH_MPC8548
select SYS_FSL_ERRATUM_NMG_LBC103
select SYS_FSL_ERRATUM_NMG_ETSEC129
select SYS_FSL_ERRATUM_I2C_A004447
+   select FSL_PCIE_RESET
select SYS_FSL_HAS_DDR2
select SYS_FSL_HAS_DDR1
select SYS_FSL_HAS_SEC
@@ -633,6 +638,7 @@ config ARCH_MPC8560
 config ARCH_MPC8568
bool
select FSL_LAW
+   select FSL_PCIE_RESET
select SYS_FSL_HAS_DDR2
select SYS_FSL_HAS_SEC
select SYS_FSL_SEC_BE
@@ -643,6 +649,7 @@ config ARCH_MPC8569
select FSL_LAW
select SYS_FSL_ERRATUM_A004508
select SYS_FSL_ERRATUM_A005125
+   select FSL_PCIE_RESET
select SYS_FSL_HAS_DDR3
select SYS_FSL_HAS_SEC
select SYS_FSL_SEC_BE
@@ -657,6 +664,7 @@ config ARCH_MPC8572
select SYS_FSL_ERRATUM_A005125
select SYS_FSL_ERRATUM_DDR_115
select SYS_FSL_ERRATUM_DDR111_DDR134
+   select FSL_PCIE_RESET
select SYS_FSL_HAS_DDR2
select SYS_FSL_HAS_DDR3
select SYS_FSL_HAS_SEC
@@ -681,6 +689,7 @@ config ARCH_P1010
select SYS_FSL_ERRATUM_P1010_A003549
select SYS_FSL_ERRATUM_SEC_A003571
select SYS_FSL_ERRATUM_IFC_A003399
+   select FSL_PCIE_RESET
select SYS_FSL_HAS_DDR3
select SYS_FSL_HAS_SEC
select SYS_FSL_SEC_BE
@@ -718,6 +727,7 @@ config ARCH_P1020
select SYS_FSL_ERRATUM_ELBC_A001
select SYS_FSL_ERRATUM_ESDHC111
select FSL_PCIE_DISABLE_ASPM
+   select FSL_PCIE_RESET
select SYS_FSL_HAS_DDR3
select SYS_FSL_HAS_SEC
select SYS_FSL_SEC_BE
@@ -738,6 +748,7 @@ config ARCH_P1021
select SYS_FSL_ERRATUM_ELBC_A001
select SYS_FSL_ERRATUM_ESDHC111
select FSL_PCIE_DISABLE_ASPM
+   select FSL_PCIE_RESET
select SYS_FSL_HAS_DDR3
select SYS_FSL_HAS_SEC
select SYS_FSL_SEC_BE
@@ -759,6 +770,7 @@ config ARCH_P1022
select SYS_FSL_ERRATUM_ELBC_A001
select SYS_FSL_ERRATUM_ESDHC111
select SYS_FSL_ERRATUM_SATA_A001
+   select FSL_PCIE_RESET
select SYS_FSL_HAS_DDR3
select SYS_FSL_HAS_SEC
select SYS_FSL_SEC_BE
@@ -772,6 +784,7 @@ config ARCH_P1023
select SYS_FSL_ERRATUM_A004508
select SYS_FSL_ERRATUM_A005125
select SYS_FSL_ERRATUM_I2C_A004447
+   select FSL_PCIE_RESET
select SYS_FSL_HAS_DDR3
select SYS_FSL_HAS_SEC
select SYS_FSL_SEC_BE
@@ -786,6 +799,7 @@ config ARCH_P1024
select SYS_FSL_ERRATUM_ELBC_A001
select SYS_FSL_ERRATUM_ESDHC111
select FSL_PCIE_DISABLE_ASPM
+   select FSL_PCIE_RESET
  

[U-Boot] [PATCHv2 3/8] powerpc: mpc85xx: Update the condition to compile PCI routines

2019-05-23 Thread Z.q. Hou
From: Hou Zhiqiang 

Compile the routines of mpc85xx/pci.c when both FSL_PCI_INIT
and DM_PCI are not enabled.

Signed-off-by: Hou Zhiqiang 
Reviewed-by: Simon Glass 
---
V2:
 - No change.

 arch/powerpc/cpu/mpc85xx/pci.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/powerpc/cpu/mpc85xx/pci.c b/arch/powerpc/cpu/mpc85xx/pci.c
index 90ccc3427c..1d0213a513 100644
--- a/arch/powerpc/cpu/mpc85xx/pci.c
+++ b/arch/powerpc/cpu/mpc85xx/pci.c
@@ -12,7 +12,7 @@
 #include 
 #include 
 
-#if !defined(CONFIG_FSL_PCI_INIT)
+#if !defined(CONFIG_FSL_PCI_INIT) && !defined(CONFIG_DM_PCI)
 
 #ifndef CONFIG_SYS_PCI1_MEM_BUS
 #define CONFIG_SYS_PCI1_MEM_BUS CONFIG_SYS_PCI1_MEM_BASE
-- 
2.17.1

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[U-Boot] [PATCHv2 7/8] powerpc: T208xQDS: Disable legacy PCIe driver

2019-05-23 Thread Z.q. Hou
From: Hou Zhiqiang 

Disable legacy PCIe driver and remove unused PCIe macros.

Signed-off-by: Hou Zhiqiang 
Reviewed-by: Simon Glass 
---
V2:
 - No change.

 include/configs/T208xQDS.h | 18 --
 1 file changed, 18 deletions(-)

diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h
index 7a07679069..f58bea7e39 100644
--- a/include/configs/T208xQDS.h
+++ b/include/configs/T208xQDS.h
@@ -507,49 +507,31 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_PCIE2   /* PCIE controller 2 */
 #define CONFIG_PCIE3   /* PCIE controller 3 */
 #define CONFIG_PCIE4   /* PCIE controller 4 */
-#define CONFIG_FSL_PCI_INIT/* Use common FSL init code */
 #define CONFIG_SYS_PCI_64BIT   /* enable 64-bit PCI resources */
 /* controller 1, direct to uli, tgtid 3, Base address 2 */
 #define CONFIG_SYS_PCIE1_MEM_VIRT  0x8000
-#define CONFIG_SYS_PCIE1_MEM_BUS   0xe000
 #define CONFIG_SYS_PCIE1_MEM_PHYS  0xcull
-#define CONFIG_SYS_PCIE1_MEM_SIZE  0x2000  /* 512M */
 #define CONFIG_SYS_PCIE1_IO_VIRT   0xf800
-#define CONFIG_SYS_PCIE1_IO_BUS0x
 #define CONFIG_SYS_PCIE1_IO_PHYS   0xff800ull
-#define CONFIG_SYS_PCIE1_IO_SIZE   0x0001  /* 64k */
 
 /* controller 2, Slot 2, tgtid 2, Base address 201000 */
 #define CONFIG_SYS_PCIE2_MEM_VIRT  0xa000
-#define CONFIG_SYS_PCIE2_MEM_BUS   0xe000
 #define CONFIG_SYS_PCIE2_MEM_PHYS  0xc2000ull
-#define CONFIG_SYS_PCIE2_MEM_SIZE  0x1000 /* 256M */
 #define CONFIG_SYS_PCIE2_IO_VIRT   0xf801
-#define CONFIG_SYS_PCIE2_IO_BUS0x
 #define CONFIG_SYS_PCIE2_IO_PHYS   0xff801ull
-#define CONFIG_SYS_PCIE2_IO_SIZE   0x0001  /* 64k */
 
 /* controller 3, Slot 1, tgtid 1, Base address 202000 */
 #define CONFIG_SYS_PCIE3_MEM_VIRT  0xb000
-#define CONFIG_SYS_PCIE3_MEM_BUS   0xe000
 #define CONFIG_SYS_PCIE3_MEM_PHYS  0xc3000ull
-#define CONFIG_SYS_PCIE3_MEM_SIZE  0x1000  /* 256M */
 #define CONFIG_SYS_PCIE3_IO_VIRT   0xf802
-#define CONFIG_SYS_PCIE3_IO_BUS0x
 #define CONFIG_SYS_PCIE3_IO_PHYS   0xff802ull
-#define CONFIG_SYS_PCIE3_IO_SIZE   0x0001  /* 64k */
 
 /* controller 4, Base address 203000 */
 #define CONFIG_SYS_PCIE4_MEM_VIRT   0xc000
-#define CONFIG_SYS_PCIE4_MEM_BUS   0xe000
 #define CONFIG_SYS_PCIE4_MEM_PHYS  0xc4000ull
-#define CONFIG_SYS_PCIE4_MEM_SIZE  0x1000  /* 256M */
-#define CONFIG_SYS_PCIE4_IO_BUS0x
 #define CONFIG_SYS_PCIE4_IO_PHYS   0xff803ull
-#define CONFIG_SYS_PCIE4_IO_SIZE   0x0001  /* 64k */
 
 #ifdef CONFIG_PCI
-#define CONFIG_PCI_INDIRECT_BRIDGE
 #define CONFIG_PCI_SCAN_SHOW   /* show pci devices on startup */
 #endif
 
-- 
2.17.1

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[U-Boot] [PATCHv2 6/8] dm: pci: add Freescale PowerPC PCIe driver

2019-05-23 Thread Z.q. Hou
From: Hou Zhiqiang 

Add PCIe DM driver for Freescale PowerPC PCIe controllers.

Signed-off-by: Hou Zhiqiang 
---
V2:
 - Add more detail in the PCIE_FSL help info.
 - Sort the included header files.
 - Romve key word 'inline' from fsl_pcie_link_up().
 - Add comments for some members of structure fsl_pcie.
 - Change to determine erratums by IS_ENABLED().
 - Romve unnecessary header file including from pcie_fsl.h.
 - Add info when can't find the DT node to fixup.
 - To avoid compile error, add a null function pci_of_setup()
   when CONFIG_OF_BOARD_SETUP is not enabled. 

 drivers/pci/Kconfig  |   8 +
 drivers/pci/Makefile |   1 +
 drivers/pci/pcie_fsl.c   | 611 +++
 drivers/pci/pcie_fsl.h   |  57 
 drivers/pci/pcie_fsl_fixup.c |  51 +++
 5 files changed, 728 insertions(+)
 create mode 100644 drivers/pci/pcie_fsl.c
 create mode 100644 drivers/pci/pcie_fsl.h
 create mode 100644 drivers/pci/pcie_fsl_fixup.c

diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig
index 1521885bde..e679aa1a93 100644
--- a/drivers/pci/Kconfig
+++ b/drivers/pci/Kconfig
@@ -60,6 +60,14 @@ config PCIE_DW_MVEBU
  Armada-8K SoCs. The PCIe controller on Armada-8K is based on
  DesignWare hardware.
 
+config PCIE_FSL
+   bool "FSL PowerPC PCIe support"
+   depends on DM_PCI
+   help
+ Say Y here if you want to enable PCIe controller support on FSL
+ PowerPC MPC85xx, MPC86xx, B series, P series and T series SoCs.
+ This driver does not support SRIO_PCIE_BOOT feature.
+
 config PCI_RCAR_GEN2
bool "Renesas RCar Gen2 PCIe driver"
depends on DM_PCI
diff --git a/drivers/pci/Makefile b/drivers/pci/Makefile
index 4923641895..d984848266 100644
--- a/drivers/pci/Makefile
+++ b/drivers/pci/Makefile
@@ -30,6 +30,7 @@ obj-$(CONFIG_SH7780_PCI) +=pci_sh7780.o
 obj-$(CONFIG_PCI_TEGRA) += pci_tegra.o
 obj-$(CONFIG_PCI_AARDVARK) += pci-aardvark.o
 obj-$(CONFIG_PCIE_DW_MVEBU) += pcie_dw_mvebu.o
+obj-$(CONFIG_PCIE_FSL) += pcie_fsl.o pcie_fsl_fixup.o
 obj-$(CONFIG_PCIE_LAYERSCAPE) += pcie_layerscape.o
 obj-$(CONFIG_PCIE_LAYERSCAPE) += pcie_layerscape_fixup.o
 obj-$(CONFIG_PCI_XILINX) += pcie_xilinx.o
diff --git a/drivers/pci/pcie_fsl.c b/drivers/pci/pcie_fsl.c
new file mode 100644
index 00..bfb207e788
--- /dev/null
+++ b/drivers/pci/pcie_fsl.c
@@ -0,0 +1,611 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * Copyright 2019 NXP
+ * Copyright 2007-2012 Freescale Semiconductor, Inc.
+ *
+ * PCIe DM U-Boot driver for Freescale PowerPC SoCs
+ * Author: Hou Zhiqiang 
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include "pcie_fsl.h"
+
+LIST_HEAD(fsl_pcie_list);
+
+static int fsl_pcie_link_up(struct fsl_pcie *pcie);
+
+static int fsl_pcie_addr_valid(struct fsl_pcie *pcie, pci_dev_t bdf)
+{
+   struct udevice *bus = pcie->bus;
+
+   if (!pcie->enabled)
+   return -ENXIO;
+
+   if (PCI_BUS(bdf) < bus->seq)
+   return -EINVAL;
+
+   if (PCI_BUS(bdf) > bus->seq && (!fsl_pcie_link_up(pcie) || pcie->mode))
+   return -EINVAL;
+
+   if (PCI_BUS(bdf) == bus->seq && (PCI_DEV(bdf) > 0 || PCI_FUNC(bdf) > 0))
+   return -EINVAL;
+
+   if (PCI_BUS(bdf) == (bus->seq + 1) && (PCI_DEV(bdf) > 0))
+   return -EINVAL;
+
+   return 0;
+}
+
+static int fsl_pcie_read_config(struct udevice *bus, pci_dev_t bdf,
+   uint offset, ulong *valuep,
+   enum pci_size_t size)
+{
+   struct fsl_pcie *pcie = dev_get_priv(bus);
+   ccsr_fsl_pci_t *regs = pcie->regs;
+   u32 val;
+
+   if (fsl_pcie_addr_valid(pcie, bdf)) {
+   *valuep = pci_get_ff(size);
+   return 0;
+   }
+
+   bdf = bdf - PCI_BDF(bus->seq, 0, 0);
+   val = bdf | (offset & 0xfc) | ((offset & 0xf00) << 16) | 0x8000;
+   out_be32(®s->cfg_addr, val);
+
+   sync();
+
+   switch (size) {
+   case PCI_SIZE_8:
+   *valuep = in_8((u8 *)®s->cfg_data + (offset & 3));
+   break;
+   case PCI_SIZE_16:
+   *valuep = in_le16((u16 *)((u8 *)®s->cfg_data +
+ (offset & 2)));
+   break;
+   case PCI_SIZE_32:
+   *valuep = in_le32(®s->cfg_data);
+   break;
+   }
+
+   return 0;
+}
+
+static int fsl_pcie_write_config(struct udevice *bus, pci_dev_t bdf,
+uint offset, ulong value,
+enum pci_size_t size)
+{
+   struct fsl_pcie *pcie = dev_get_priv(bus);
+   ccsr_fsl_pci_t *regs = pcie->regs;
+   u32 val;
+   u8 val_8;
+   u16 val_16;
+   u32 val_32;
+
+   if (fsl_pcie_addr_valid(pcie, bdf))
+   return 0;
+
+   bdf = bdf - PCI_BDF(bus->seq, 0, 0);
+   val = bdf | (offset & 0xfc) | ((offset & 0xf00) << 16) | 0x8000;
+   out_be32(

[U-Boot] [PATCHv2 4/8] powerpc: T208xQDS: Compile the legacy PCIe routines conditionally

2019-05-23 Thread Z.q. Hou
From: Hou Zhiqiang 

Compile the legacy PCIe initialization reoutines only when DM_PCI
is not enabled.

Signed-off-by: Hou Zhiqiang 
Reviewed-by: Simon Glass 
---
V2:
 - No change.

 board/freescale/t208xqds/pci.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/board/freescale/t208xqds/pci.c b/board/freescale/t208xqds/pci.c
index c761aea0ac..ef26f14c46 100644
--- a/board/freescale/t208xqds/pci.c
+++ b/board/freescale/t208xqds/pci.c
@@ -11,6 +11,7 @@
 #include 
 #include 
 
+#if !defined(CONFIG_DM_PCI)
 void pci_init_board(void)
 {
fsl_pcie_init_board(0);
@@ -20,3 +21,4 @@ void pci_of_setup(void *blob, bd_t *bd)
 {
FT_FSL_PCI_SETUP;
 }
+#endif
-- 
2.17.1

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[U-Boot] [PATCHv2 5/8] t2080: dts: Added PCIe DT nodes

2019-05-23 Thread Z.q. Hou
From: Hou Zhiqiang 

T2080 integrated 4 PCIe controllers, which is compatible with
the PCI Express™ Base Specification, Revision 3.0, and this
patch is to add DT node for each PCIe controller.

Signed-off-by: Hou Zhiqiang 
Reviewed-by: Simon Glass 
---
V2:
 - No change.

 arch/powerpc/dts/t2080.dtsi | 48 +
 1 file changed, 48 insertions(+)

diff --git a/arch/powerpc/dts/t2080.dtsi b/arch/powerpc/dts/t2080.dtsi
index db65ea5725..89b2c618ae 100644
--- a/arch/powerpc/dts/t2080.dtsi
+++ b/arch/powerpc/dts/t2080.dtsi
@@ -59,4 +59,52 @@
clock-frequency = <0x0>;
};
};
+
+   pcie@ffe24 {
+   compatible = "fsl,pcie-t2080", "fsl,pcie-fsl-qoriq";
+   reg = <0xf 0xfe24 0x0 0x4000>;   /* registers */
+   law_trgt_if = <0>;
+   #address-cells = <3>;
+   #size-cells = <2>;
+   device_type = "pci";
+   bus-range = <0x0 0xff>;
+   ranges = <0x0100 0x0 0x 0xf 0xf800 0x0 
0x0001   /* downstream I/O */
+ 0x0200 0x0 0xe000 0xc 0x 0x0 
0x2000>; /* non-prefetchable memory */
+   };
+
+   pcie@ffe25 {
+   compatible = "fsl,pcie-t2080", "fsl,pcie-fsl-qoriq";
+   reg = <0xf 0xfe25 0x0 0x1000>;   /* registers */
+   law_trgt_if = <1>;
+   #address-cells = <3>;
+   #size-cells = <2>;
+   device_type = "pci";
+   bus-range = <0x0 0xff>;
+   ranges = <0x0100 0x0 0x 0xf 0xf801 0x0 
0x0001   /* downstream I/O */
+ 0x0200 0x0 0xe000 0xc 0x2000 0x0 
0x1000>; /* non-prefetchable memory */
+   };
+
+   pcie@ffe26 {
+   compatible = "fsl,pcie-t2080", "fsl,pcie-fsl-qoriq";
+   reg = <0xf 0xfe26 0x0 0x1000>;   /* registers */
+   law_trgt_if = <2>;
+   #address-cells = <3>;
+   #size-cells = <2>;
+   device_type = "pci";
+   bus-range = <0x0 0xff>;
+   ranges = <0x0100 0x0 0x 0xf 0xf802 0x0 
0x0001   /* downstream I/O */
+ 0x0200 0x0 0xe000 0xc 0x3000 0x0 
0x1000>; /* non-prefetchable memory */
+   };
+
+   pcie@ffe27 {
+   compatible = "fsl,pcie-t2080", "fsl,pcie-fsl-qoriq";
+   reg = <0xf 0xfe27 0x0 0x1000>;   /* registers */
+   law_trgt_if = <3>;
+   #address-cells = <3>;
+   #size-cells = <2>;
+   device_type = "pci";
+   bus-range = <0x0 0xff>;
+   ranges = <0x0100 0x0 0x 0xf 0xf803 0x0 
0x0001   /* downstream I/O */
+ 0x0200 0x0 0xe000 0xc 0x4000 0x0 
0x1000>; /* non-prefetchable memory */
+   };
 };
-- 
2.17.1

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[U-Boot] [PATCHv2 8/8] configs: T2080QDS: Enable PCIe driver

2019-05-23 Thread Z.q. Hou
From: Hou Zhiqiang 

Enable the DM PCIe driver in T2080QDS defconfig.

Signed-off-by: Hou Zhiqiang 
---
V2:
 - Enable PCIe in NAND flash, SD card and SPI flash boot defconfig.

 configs/T2080QDS_NAND_defconfig | 4 
 configs/T2080QDS_SDCARD_defconfig   | 4 
 configs/T2080QDS_SPIFLASH_defconfig | 4 
 configs/T2080QDS_defconfig  | 4 
 4 files changed, 16 insertions(+)

diff --git a/configs/T2080QDS_NAND_defconfig b/configs/T2080QDS_NAND_defconfig
index 948a05af89..d04e223c23 100644
--- a/configs/T2080QDS_NAND_defconfig
+++ b/configs/T2080QDS_NAND_defconfig
@@ -38,6 +38,7 @@ 
CONFIG_MTDPARTS_DEFAULT="mtdparts=fe800.nor:1m(uboot),5m(kernel),128k(dtb),9
 CONFIG_OF_CONTROL=y
 CONFIG_DEFAULT_DEVICE_TREE="t2080qds"
 CONFIG_ENV_IS_IN_NAND=y
+CONFIG_DM=y
 CONFIG_FSL_CAAM=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD_NOR_FLASH=y
@@ -54,6 +55,9 @@ CONFIG_PHYLIB=y
 CONFIG_PHY_AQUANTIA=y
 CONFIG_E1000=y
 CONFIG_MII=y
+CONFIG_DM_PCI=y
+CONFIG_DM_PCI_COMPAT=y
+CONFIG_PCIE_FSL=y
 CONFIG_SYS_NS16550=y
 CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
diff --git a/configs/T2080QDS_SDCARD_defconfig 
b/configs/T2080QDS_SDCARD_defconfig
index 30e87df3bb..7292de750b 100644
--- a/configs/T2080QDS_SDCARD_defconfig
+++ b/configs/T2080QDS_SDCARD_defconfig
@@ -38,6 +38,7 @@ 
CONFIG_MTDPARTS_DEFAULT="mtdparts=fe800.nor:1m(uboot),5m(kernel),128k(dtb),9
 CONFIG_OF_CONTROL=y
 CONFIG_DEFAULT_DEVICE_TREE="t2080qds"
 CONFIG_ENV_IS_IN_MMC=y
+CONFIG_DM=y
 CONFIG_FSL_CAAM=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD_NOR_FLASH=y
@@ -53,6 +54,9 @@ CONFIG_PHYLIB=y
 CONFIG_PHY_AQUANTIA=y
 CONFIG_E1000=y
 CONFIG_MII=y
+CONFIG_DM_PCI=y
+CONFIG_DM_PCI_COMPAT=y
+CONFIG_PCIE_FSL=y
 CONFIG_SYS_NS16550=y
 CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
diff --git a/configs/T2080QDS_SPIFLASH_defconfig 
b/configs/T2080QDS_SPIFLASH_defconfig
index 0cccb3a85d..d85cc8d9d1 100644
--- a/configs/T2080QDS_SPIFLASH_defconfig
+++ b/configs/T2080QDS_SPIFLASH_defconfig
@@ -39,6 +39,7 @@ 
CONFIG_MTDPARTS_DEFAULT="mtdparts=fe800.nor:1m(uboot),5m(kernel),128k(dtb),9
 CONFIG_OF_CONTROL=y
 CONFIG_DEFAULT_DEVICE_TREE="t2080qds"
 CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_DM=y
 CONFIG_FSL_CAAM=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD_NOR_FLASH=y
@@ -54,6 +55,9 @@ CONFIG_PHYLIB=y
 CONFIG_PHY_AQUANTIA=y
 CONFIG_E1000=y
 CONFIG_MII=y
+CONFIG_DM_PCI=y
+CONFIG_DM_PCI_COMPAT=y
+CONFIG_PCIE_FSL=y
 CONFIG_SYS_NS16550=y
 CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
diff --git a/configs/T2080QDS_defconfig b/configs/T2080QDS_defconfig
index 79cf4424b4..df1c5183e5 100644
--- a/configs/T2080QDS_defconfig
+++ b/configs/T2080QDS_defconfig
@@ -28,6 +28,7 @@ 
CONFIG_MTDPARTS_DEFAULT="mtdparts=fe800.nor:1m(uboot),5m(kernel),128k(dtb),9
 CONFIG_OF_CONTROL=y
 CONFIG_DEFAULT_DEVICE_TREE="t2080qds"
 CONFIG_ENV_IS_IN_FLASH=y
+CONFIG_DM=y
 CONFIG_FSL_CAAM=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD_NOR_FLASH=y
@@ -43,6 +44,9 @@ CONFIG_PHYLIB=y
 CONFIG_PHY_AQUANTIA=y
 CONFIG_E1000=y
 CONFIG_MII=y
+CONFIG_DM_PCI=y
+CONFIG_DM_PCI_COMPAT=y
+CONFIG_PCIE_FSL=y
 CONFIG_SYS_NS16550=y
 CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
-- 
2.17.1

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Re: [U-Boot] [PATCH] ata: ahci: enable bus mastering

2019-05-23 Thread Christian Gmeiner
Hi Simon,

Am Mi., 22. Mai 2019 um 20:40 Uhr schrieb Simon Glass :
>
> Hi Christian,
>
> On Wed, 22 May 2019 at 02:40, Christian Gmeiner
>  wrote:
> >
> > When using the coreboot target CONFIG_DM_SCSI gets set to y. This has the 
> > effect
> > that the current 'enable bus mastering' logic gets not compiled in. This 
> > change
>
> Where is it missing? Is it because U-Boot is not scanning the PCI bus?
>

PCI bus scanning is all fine - but the driver does not enable bus
mastering which results in:

=> scsi scan
scanning bus for devices...
ahci mmio_base=0xc4f4b000
ahci_host_init: start
cap 0xe536ff01 port_map 0x3 n_ports 2
SATA link ok.
Spinning up device on SATA port 0... Target spinup took 0 ms.
ok.
PORT_SCR_ERR 0x0
PORT_IRQ_STAT 0x0
SATA port 0 status: 0x123
SATA link 1 timeout.
HOST_CTL 0x8000
HOST_CTL 0x8002
AHCI 0001.0301 32 slots 2 ports 6 Gbps 0x3 impl SATA mode
flags: 64bit ncq pm clo only pmp pio slum part apst
Enter start port: 0
Port 0 status: 123
cmd_slot = 7a88e800
cmd_tbl_dma = 7a88ea00
Exit start port 0
Can not start port 0
Enter ahci_device_data_io: for port 0
ahci_dcache_flush_range: flush dcache: [0x7a88e800, 0x7a88f100)
ahci_dcache_flush_range: flush dcache: [0x7a875340, 0x7a875540)
timeout exit!
scsi_ahci: SCSI inquiry command failure.
SCSI command 0x12 ret errno -5
Enter ahci_device_data_io: for port 1
No Link on port 1!
scsi_ahci: SCSI inquiry command failure.
SCSI command 0x12 ret errno -5
=>

> > fixes ahci problems I am seeing on an Intel Apollolake device.
> >
> > Signed-off-by: Christian Gmeiner 
> > ---
> >  drivers/ata/ahci.c | 6 ++
> >  1 file changed, 6 insertions(+)
> >
> > diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c
> > index e3135bb75f..3f9348a8b3 100644
> > --- a/drivers/ata/ahci.c
> > +++ b/drivers/ata/ahci.c
> > @@ -1174,6 +1174,12 @@ int ahci_probe_scsi(struct udevice *ahci_dev, ulong 
> > base)
> >  int ahci_probe_scsi_pci(struct udevice *ahci_dev)
> >  {
> > ulong base;
> > +   u16 cmd;
> > +
> > +   /* Enable bus mastering. */
>
> Please don't put . at the end.
>

Ok

> > +   dm_pci_read_config16(ahci_dev, PCI_COMMAND, &cmd);
> > +   cmd |= PCI_COMMAND_MASTER;
> > +   dm_pci_write_config16(ahci_dev, PCI_COMMAND, cmd);
>
> See dm_pci_clrset_config16()
>

Ahhh... sounds fine.

-- 
greets
--
Christian Gmeiner, MSc

https://christian-gmeiner.info
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Re: [U-Boot] [PATCH] ata: ahci: enable bus mastering

2019-05-23 Thread Christian Gmeiner
Hi Bin,

Am Do., 23. Mai 2019 um 04:17 Uhr schrieb Bin Meng :
>
> Hi Christian,
>
> On Thu, May 23, 2019 at 2:40 AM Simon Glass  wrote:
> >
> > Hi Christian,
> >
> > On Wed, 22 May 2019 at 02:40, Christian Gmeiner
> >  wrote:
> > >
> > > When using the coreboot target CONFIG_DM_SCSI gets set to y. This has the 
> > > effect
> > > that the current 'enable bus mastering' logic gets not compiled in. This 
> > > change
> >
> > Where is it missing? Is it because U-Boot is not scanning the PCI bus?
>
> If this is the case, we should fix similar issue on other devices, not
> just only SATA.
>

In the ahci driver there is some bus master stuff - but not build with
the coreboot configuration.
See:
https://git.denx.de/?p=u-boot.git;a=blob;f=drivers/ata/ahci.c;h=e3135bb75fddb303cd3e826f02926df0c25e2cfe;hb=HEAD#l325

Other drivers I am using on this platform are fine and do the bus
master enable thing.
- e1000
- xhci

> >
> > > fixes ahci problems I am seeing on an Intel Apollolake device.
> > >
> > > Signed-off-by: Christian Gmeiner 
> > > ---
> > >  drivers/ata/ahci.c | 6 ++
> > >  1 file changed, 6 insertions(+)
> > >
>

-- 
greets
--
Christian Gmeiner, MSc

https://christian-gmeiner.info
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Re: [U-Boot] [PATCHv2 2/2] SPL: Default to disabling legacy image support when using FIT

2019-05-23 Thread Tom Rini
On Thu, May 23, 2019 at 02:18:13PM +0200, Jean-Jacques Hiblot wrote:
> 
> On 23/05/2019 13:14, Tom Rini wrote:
> >When we have a FIT image being used by SPL by default that means the
> >most common case is that we'll never run into a legacy image.  Disable
> >legacy image support by default in that case to reclaim space.
> >
> >Signed-off-by: Tom Rini 
> >---
> >  common/spl/Kconfig | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> >
> >diff --git a/common/spl/Kconfig b/common/spl/Kconfig
> >index c7cd34449a52..55dba0d42069 100644
> >--- a/common/spl/Kconfig
> >+++ b/common/spl/Kconfig
> >@@ -101,7 +101,7 @@ config SPL_RAW_IMAGE_SUPPORT
> >  config SPL_LEGACY_IMAGE_SUPPORT
> > bool "Support SPL loading and booting of Legacy images"
> >-default y if !TI_SECURE_DEVICE
> >+default y if !TI_SECURE_DEVICE && !SPL_LOAD_FIT
> > help
> >   SPL will support loading and booting Legacy images when this option
> >   is y. If this is not set, SPL will move on to other available
> 
> reviewed-by and tested-by : Jean-Jacques Hiblot 

Thanks!

> Building for arm, the reduction in size is around 50 bytes

Yup, with gcc-7.3, on the platforms that set SPL_LOAD_FIT it's generally
an 84 bytes savings on aarch64 and 40 bytes on arm32.

-- 
Tom


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Re: [U-Boot] Cannot boot mx6qsabred with 2019.07-rc2

2019-05-23 Thread Fabio Estevam
Hi Peng,

On Tue, May 21, 2019 at 10:38 PM Peng Fan  wrote:

> > I will send a v2 removing CONFIG_SPL_DM.
>
> So what is the real direction moving to use SPL driver, non-dm is allowed in 
> future?

We are very limited in space when CONFIG_SPL_DM is used on imx6q-sabresd.

With CONFIG_SPL_DM selected the size increase due to the three dtb's
is about 8kB.

Even with CONFIG_SPL_DM disabled we ony have 1kB of free space, so I
still want to optimize the size further.

Two options that I want also to remove are:

CONFIG_SPL_FS_EXT4=y
CONFIG_SPL_I2C_SUPPORT=y

We are at -rc2 now, and I would really like to have mx6sabresd booting again.

Please check my v2 series and see if it looks good.

Thanks
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Re: [U-Boot] [PATCH 1/3] arm64: zynqmp: xil_io.h: declare functions as static

2019-05-23 Thread Luca Ceresoli
Hi,

On 22/05/19 13:26, Michal Simek wrote:
> On 10. 05. 19 10:15, Luca Ceresoli wrote:
>> Fixes chekcpatch warnings when building zynqmp defconfigs:
> 
> it is not checkpatch who reports this. It is sparse.

Good catch, will fix.

-- 
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Re: [U-Boot] [PATCH 2/3] arm64: zynqmp: add tool to minimize psu_init_gpl.c files

2019-05-23 Thread Luca Ceresoli
Hi,

On 22/05/19 13:11, Michal Simek wrote:
> On 10. 05. 19 10:15, Luca Ceresoli wrote:
>> This script transforms a pair of psu_init_gpl.c and .h files produced by
>> the Xilinx Vivado tool for ZynqMP into a smaller psu_init_gpl.c file that
>> is checkpatch compliant.
>>
>> Based on a script by Michal Simek.
>>
>> Signed-off-by: Luca Ceresoli 
>> ---
>>  tools/zynqmp_psu_init_minimize.sh | 129 ++
>>  1 file changed, 129 insertions(+)
>>  create mode 100755 tools/zynqmp_psu_init_minimize.sh
>>
>> diff --git a/tools/zynqmp_psu_init_minimize.sh 
>> b/tools/zynqmp_psu_init_minimize.sh
>> new file mode 100755
>> index ..932426348df4
>> --- /dev/null
>> +++ b/tools/zynqmp_psu_init_minimize.sh
>> @@ -0,0 +1,129 @@
>> +#!/bin/bash
>> +# SPDX-License-Identifier: GPL-2.0+
>> +# Copyright (C) 2018 Michal Simek 
>> +# Copyright (C) 2019 Luca Ceresoli 
>> +
>> +# Transform a pair of psu_init_gpl.c and .h files produced by the Xilinx
>> +# Vivado tool for ZynqMP into a smaller psu_init_gpl.c file that is almost
>> +# checkpatch compliant. Minor coding style might still be needed. Must be
>> +# run from the top-level U-Boot source directory.
>> +#
>> +# Usage:   zynqmp_psu_init_minimize.sh INPUT_DIR OUTPUT_DIR
>> +# Example: zynqmp_psu_init_minimize.sh \
>> +#  /path/to/original/psu_init_gpl_c_and_h/ \
>> +#  board/xilinx/zynqmp//
>> +# Note:INPUT_DIR must contain both .c and .h files
>> +
>> +set -o errexit -o errtrace
>> +set -o nounset
>> +
>> +IN="${1}/psu_init_gpl.c"
>> +OUT="${2}/psu_init_gpl.c"
> 
> Output looks good but there should be a fix when script is called
> without parameters.

Sure. Will be in v2.

-- 
Luca
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Re: [U-Boot] [PATCH 3/3] arm64: zynqmp: add support for Avnet UltraZed-EV Starter Kit

2019-05-23 Thread Luca Ceresoli
Hi,

On 22/05/19 12:24, Michal Simek wrote:
> On 10. 05. 19 10:15, Luca Ceresoli wrote:
>> Avnet UltraZed-EV Starter Kit is composed by the UltraZed-EV SoM and the
>> only publicly-available compatible carrier card. The SoM is based on the EV
>> version of the Xilinx ZynqMP SoC+FPGA.
>>
>> The psu_init_gpl.c file has been generated from the board definition files
>> at [0] using Vivado 2018.3. It has then minimized by
>> tools/zynqmp_psu_init_minimize.sh and slightly fixed manually.
>>
>> [0] 
>> https://github.com/Avnet/bdf/tree/3686c9ff7d2f0467fb4fcf39f861b8d6ff183b12/ultrazed_7ev_cc/1.1
>>
>> Signed-off-by: Luca Ceresoli 
>>
>> ---
>>
>> Whole patchset tested on:
>>  - current u-boot/master, as is
>>  - current u-boot-microblaze/master
>>  - current u-boot-microblaze/master with the addtion of
>>commit f89d6133eef2 ("configs: move CONFIG_SPL_TEXT_BASE to Kconfig")

[...]

>> diff --git a/arch/arm/dts/avnet-ultrazedev.dts 
>> b/arch/arm/dts/avnet-ultrazedev.dts
>> new file mode 100644
>> index ..34d506a28e88
>> --- /dev/null
>> +++ b/arch/arm/dts/avnet-ultrazedev.dts

[...]

>> +/* I2C peripherals on carrier card */
> 
> This is the biggest issue I have with this patch. It is SOM which should
> be described in separate file and then we have carried board.
> That's why please separate DTS file.

Absolutely! Will do.

>> +&i2c_cc {
>> +/* Microchip 24AA025E48T-I/OT: 2K I2C Serial EEPROMs with EUI-48 */
>> +eeprom: eeprom@51 {
>> +compatible = "at,24c02", "i2c-eeprom";
>> +reg = <0x51>;
>> +};
>> +
>> +/* Versa Clock 5P49V5935B */
>> +vc5: clock-generator@6a {
>> +compatible = "idt,5p49v5935";
>> +reg = <0x6a>;
>> +#clock-cells = <1>;
>> +};
>> +};
>> +
>> +/* Ethernet:
>> + * - Marvell 88E1512-A0-NNP2I000 PHY on SOM
>> + * - RJ-45 on Carrier Card
>> + */
> 
> This is interesting.
> 
>> +&gem3 {
>> +status = "okay";
>> +phy-mode = "rgmii-id";
>> +};

Well, the phy-mode is related to the MAC-PHY link, while the existence
of a connector is carrier-dependent. So I think the right thing to do
here is:

In the SOM dtsi:

&gem3 {
phy-mode = "rgmii-id";
};

and in the carrier dts:

&gem3 {
status = "okay";
};

Does it look OK?

>> diff --git a/board/xilinx/zynqmp/avnet-ultrazedev/psu_init_gpl.c 
>> b/board/xilinx/zynqmp/avnet-ultrazedev/psu_init_gpl.c
>> new file mode 100644
>> index ..44e683dcee3f
>> --- /dev/null
>> +++ b/board/xilinx/zynqmp/avnet-ultrazedev/psu_init_gpl.c

[...]

>> +static int init_serdes(void)
>> +{
> 
> I can't see any description for serdes in DT. That's why you can likely
> remove the whole this function if you are not using GTs.

I see. Actually the board has USB, but I didn't use it, so it's not in
DT. I'll remove all the serdes code in v2.

>> diff --git a/configs/avnet_ultrazedev_defconfig 
>> b/configs/avnet_ultrazedev_defconfig
>> new file mode 100644
>> index ..932be1cfb07a
>> --- /dev/null
>> +++ b/configs/avnet_ultrazedev_defconfig
>> @@ -0,0 +1,64 @@
>> +CONFIG_ARM=y
>> +CONFIG_ARCH_ZYNQMP=y
>> +CONFIG_SYS_TEXT_BASE=0x800
>> +CONFIG_SYS_MALLOC_F_LEN=0x8000
>> +CONFIG_SPL=y
>> +CONFIG_DEBUG_UART_BASE=0xff00
>> +CONFIG_DEBUG_UART_CLOCK=1
>> +CONFIG_SPL_SPI_FLASH_SUPPORT=y
>> +CONFIG_SPL_SPI_SUPPORT=y
>> +CONFIG_SPL_ZYNQMP_TWO_SDHCI=y
>> +CONFIG_DEBUG_UART=y
>> +CONFIG_DISTRO_DEFAULTS=y
>> +CONFIG_FIT=y
>> +CONFIG_FIT_VERBOSE=y
>> +CONFIG_SPL_LOAD_FIT=y
>> +CONFIG_BOOTDELAY=0
>> +# CONFIG_DISPLAY_CPUINFO is not set
>> +CONFIG_SPL_TEXT_BASE=0xfffc
>> +CONFIG_SPL_OS_BOOT=y
>> +CONFIG_SYS_PROMPT="ZynqMP> "
>> +CONFIG_CMD_MEMTEST=y
>> +CONFIG_CMD_FPGA_LOADBP=y
>> +CONFIG_CMD_FPGA_LOADP=y
>> +CONFIG_CMD_MMC=y
>> +CONFIG_CMD_SF=y
>> +CONFIG_CMD_SPI=y
>> +CONFIG_CMD_TIME=y
>> +CONFIG_CMD_TIMER=y
>> +CONFIG_CMD_EXT4_WRITE=y
>> +CONFIG_SPL_OF_CONTROL=y
>> +CONFIG_DEFAULT_DEVICE_TREE="avnet-ultrazedev"
>> +CONFIG_NET_RANDOM_ETHADDR=y
>> +CONFIG_SPL_DM=y
>> +CONFIG_SPL_DM_SEQ_ALIAS=y
>> +CONFIG_CLK_ZYNQMP=y
>> +CONFIG_FPGA_XILINX=y
>> +CONFIG_FPGA_ZYNQMPPL=y
>> +CONFIG_DM_GPIO=y
>> +CONFIG_DM_I2C=y
>> +CONFIG_SYS_I2C_CADENCE=y
>> +CONFIG_I2C_MUX=y
>> +CONFIG_I2C_MUX_PCA954x=y
>> +CONFIG_MISC=y
>> +CONFIG_I2C_EEPROM=y
>> +CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET=0xfa
>> +CONFIG_MMC_SDHCI=y
>> +CONFIG_MMC_SDHCI_ZYNQ=y
>> +CONFIG_SPI_FLASH=y
>> +CONFIG_SPI_FLASH_BAR=y
>> +CONFIG_SF_DUAL_FLASH=y
>> +CONFIG_SPI_FLASH_ISSI=y
>> +CONFIG_SPI_FLASH_MACRONIX=y
>> +CONFIG_SPI_FLASH_SPANSION=y
>> +CONFIG_SPI_FLASH_STMICRO=y
>> +CONFIG_SPI_FLASH_WINBOND=y
>> +# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
>> +CONFIG_ZYNQ_GEM=y
>> +CONFIG_DEBUG_UART_ZYNQ=y
>> +CONFIG_DEBUG_UART_ANNOUNCE=y
>> +CONFIG_ZYNQ_SERIAL=y
>> +CONFIG_SPI=y
>> +CONFIG_ZYNQMP_GQSPI=y
>> +CONFIG_OF_LIBFDT_OVERLAY=y
>> +CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
> 
> FYI: I need to take a look how to remove these board stuff and have only
> one generic defconfig for all these boards.

Good ide

Re: [U-Boot] Cannot boot mx6qsabred with 2019.07-rc2

2019-05-23 Thread Tom Rini
On Thu, May 23, 2019 at 10:49:11AM -0300, Fabio Estevam wrote:
> Hi Peng,
> 
> On Tue, May 21, 2019 at 10:38 PM Peng Fan  wrote:
> 
> > > I will send a v2 removing CONFIG_SPL_DM.
> >
> > So what is the real direction moving to use SPL driver, non-dm is allowed 
> > in future?
> 
> We are very limited in space when CONFIG_SPL_DM is used on imx6q-sabresd.
> 
> With CONFIG_SPL_DM selected the size increase due to the three dtb's
> is about 8kB.
> 
> Even with CONFIG_SPL_DM disabled we ony have 1kB of free space, so I
> still want to optimize the size further.

So with CONFIG_SPL_DM we're overflowing by ~7kB?

> Two options that I want also to remove are:
> 
> CONFIG_SPL_FS_EXT4=y
> CONFIG_SPL_I2C_SUPPORT=y
> 
> We are at -rc2 now, and I would really like to have mx6sabresd booting again.
> 
> Please check my v2 series and see if it looks good.

We certainly want to do something to fix the regression, agreed.

Looking at the config, can we just use a fake DTB for SPL that works on
all 3 boards, rather than 3 DTBs?

-- 
Tom


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Re: [U-Boot] Cannot boot mx6qsabred with 2019.07-rc2

2019-05-23 Thread Marek Vasut
On 5/23/19 3:59 PM, Tom Rini wrote:
> On Thu, May 23, 2019 at 10:49:11AM -0300, Fabio Estevam wrote:
>> Hi Peng,
>>
>> On Tue, May 21, 2019 at 10:38 PM Peng Fan  wrote:
>>
 I will send a v2 removing CONFIG_SPL_DM.
>>>
>>> So what is the real direction moving to use SPL driver, non-dm is allowed 
>>> in future?
>>
>> We are very limited in space when CONFIG_SPL_DM is used on imx6q-sabresd.
>>
>> With CONFIG_SPL_DM selected the size increase due to the three dtb's
>> is about 8kB.
>>
>> Even with CONFIG_SPL_DM disabled we ony have 1kB of free space, so I
>> still want to optimize the size further.
> 
> So with CONFIG_SPL_DM we're overflowing by ~7kB?
> 
>> Two options that I want also to remove are:
>>
>> CONFIG_SPL_FS_EXT4=y
>> CONFIG_SPL_I2C_SUPPORT=y
>>
>> We are at -rc2 now, and I would really like to have mx6sabresd booting again.
>>
>> Please check my v2 series and see if it looks good.
> 
> We certainly want to do something to fix the regression, agreed.
> 
> Looking at the config, can we just use a fake DTB for SPL that works on
> all 3 boards, rather than 3 DTBs?

Mind you, all of that seems like a workaround. Removing functionality
just to fit the monster with DM/DT in is a no-go. R-Car Gen2 doesn't use
DM/DT in SPL because it just won't fit and I believe that absolutely
makes sense ; why should we impose DM/DT in SPL on MX6 only to make it
less usable?

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Marek Vasut
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Re: [U-Boot] x86 FSP 2

2019-05-23 Thread Bin Meng
Hi Simon,

On Thu, May 23, 2019 at 8:20 PM Simon Glass  wrote:
>
> Hi Bin,
>
> I'm looking at Apollo Lake and it seems to use a newer FSP version
> (2.0). The API differences seem to be fairly minor but the packaging
> seems a little more complicated.
>

I have investigated FSP 2.0 architecture before, and IIRC your
understanding is correct. Unfortunately I did not get a chance to
support one of the Apollo Lake CRB.

> I'm thinking of introducing a Kconfig for this and moving the existing
> fsp implementation into an arch/x86/lib/fsp1 directory and adding an
> fsp2 there also. What do you think? Have you done anything with this
> newer version?
>

Sounds good to me. I have a Oxbow Hill CRB here. If it is the same
board you want to support, I can help testing.

Regards,
Bin
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Re: [U-Boot] Cannot boot mx6qsabred with 2019.07-rc2

2019-05-23 Thread Abel Vesa
On 19-05-23 09:59:05, Tom Rini wrote:
> On Thu, May 23, 2019 at 10:49:11AM -0300, Fabio Estevam wrote:
> > Hi Peng,
> > 
> > On Tue, May 21, 2019 at 10:38 PM Peng Fan  wrote:
> > 
> > > > I will send a v2 removing CONFIG_SPL_DM.
> > >
> > > So what is the real direction moving to use SPL driver, non-dm is allowed 
> > > in future?
> > 
> > We are very limited in space when CONFIG_SPL_DM is used on imx6q-sabresd.
> > 
> > With CONFIG_SPL_DM selected the size increase due to the three dtb's
> > is about 8kB.
> > 
> > Even with CONFIG_SPL_DM disabled we ony have 1kB of free space, so I
> > still want to optimize the size further.
> 
> So with CONFIG_SPL_DM we're overflowing by ~7kB?
> 

Well, the mandatory requirements here are as follow (AFAIK):
1. keep one binary for all imx6dl imx6[qp|dl|q]-sabresd
2. have DM support in SPL

So I guess we have to either prioritize the other needed configs and
leave out the one we can do without. That, ofcourse, if we still want
to fit in and we still want one binary for all three sabresd boards.

> > Two options that I want also to remove are:
> > 
> > CONFIG_SPL_FS_EXT4=y
> > CONFIG_SPL_I2C_SUPPORT=y
> > 
> > We are at -rc2 now, and I would really like to have mx6sabresd booting 
> > again.
> > 
> > Please check my v2 series and see if it looks good.
> 
> We certainly want to do something to fix the regression, agreed.
> 
> Looking at the config, can we just use a fake DTB for SPL that works on
> all 3 boards, rather than 3 DTBs?
> 
> -- 
> Tom



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Re: [U-Boot] [PATCHv2 8/8] configs: T2080QDS: Enable PCIe driver

2019-05-23 Thread Bin Meng
On Thu, May 23, 2019 at 8:22 PM Z.q. Hou  wrote:
>
> From: Hou Zhiqiang 
>
> Enable the DM PCIe driver in T2080QDS defconfig.
>
> Signed-off-by: Hou Zhiqiang 
> ---
> V2:
>  - Enable PCIe in NAND flash, SD card and SPI flash boot defconfig.
>
>  configs/T2080QDS_NAND_defconfig | 4 
>  configs/T2080QDS_SDCARD_defconfig   | 4 
>  configs/T2080QDS_SPIFLASH_defconfig | 4 
>  configs/T2080QDS_defconfig  | 4 
>  4 files changed, 16 insertions(+)
>
> diff --git a/configs/T2080QDS_NAND_defconfig b/configs/T2080QDS_NAND_defconfig
> index 948a05af89..d04e223c23 100644
> --- a/configs/T2080QDS_NAND_defconfig
> +++ b/configs/T2080QDS_NAND_defconfig
> @@ -38,6 +38,7 @@ 
> CONFIG_MTDPARTS_DEFAULT="mtdparts=fe800.nor:1m(uboot),5m(kernel),128k(dtb),9
>  CONFIG_OF_CONTROL=y
>  CONFIG_DEFAULT_DEVICE_TREE="t2080qds"
>  CONFIG_ENV_IS_IN_NAND=y
> +CONFIG_DM=y
>  CONFIG_FSL_CAAM=y
>  CONFIG_FSL_ESDHC=y
>  CONFIG_MTD_NOR_FLASH=y
> @@ -54,6 +55,9 @@ CONFIG_PHYLIB=y
>  CONFIG_PHY_AQUANTIA=y
>  CONFIG_E1000=y
>  CONFIG_MII=y
> +CONFIG_DM_PCI=y
> +CONFIG_DM_PCI_COMPAT=y

I think we should avoid adding DM_PCI_COMPAT.

> +CONFIG_PCIE_FSL=y
>  CONFIG_SYS_NS16550=y
>  CONFIG_SPI=y
>  CONFIG_FSL_ESPI=y
> diff --git a/configs/T2080QDS_SDCARD_defconfig 
> b/configs/T2080QDS_SDCARD_defconfig
> index 30e87df3bb..7292de750b 100644
> --- a/configs/T2080QDS_SDCARD_defconfig
> +++ b/configs/T2080QDS_SDCARD_defconfig
> @@ -38,6 +38,7 @@ 
> CONFIG_MTDPARTS_DEFAULT="mtdparts=fe800.nor:1m(uboot),5m(kernel),128k(dtb),9
>  CONFIG_OF_CONTROL=y
>  CONFIG_DEFAULT_DEVICE_TREE="t2080qds"
>  CONFIG_ENV_IS_IN_MMC=y
> +CONFIG_DM=y
>  CONFIG_FSL_CAAM=y
>  CONFIG_FSL_ESDHC=y
>  CONFIG_MTD_NOR_FLASH=y
> @@ -53,6 +54,9 @@ CONFIG_PHYLIB=y
>  CONFIG_PHY_AQUANTIA=y
>  CONFIG_E1000=y
>  CONFIG_MII=y
> +CONFIG_DM_PCI=y
> +CONFIG_DM_PCI_COMPAT=y
> +CONFIG_PCIE_FSL=y
>  CONFIG_SYS_NS16550=y
>  CONFIG_SPI=y
>  CONFIG_FSL_ESPI=y
> diff --git a/configs/T2080QDS_SPIFLASH_defconfig 
> b/configs/T2080QDS_SPIFLASH_defconfig
> index 0cccb3a85d..d85cc8d9d1 100644
> --- a/configs/T2080QDS_SPIFLASH_defconfig
> +++ b/configs/T2080QDS_SPIFLASH_defconfig
> @@ -39,6 +39,7 @@ 
> CONFIG_MTDPARTS_DEFAULT="mtdparts=fe800.nor:1m(uboot),5m(kernel),128k(dtb),9
>  CONFIG_OF_CONTROL=y
>  CONFIG_DEFAULT_DEVICE_TREE="t2080qds"
>  CONFIG_ENV_IS_IN_SPI_FLASH=y
> +CONFIG_DM=y
>  CONFIG_FSL_CAAM=y
>  CONFIG_FSL_ESDHC=y
>  CONFIG_MTD_NOR_FLASH=y
> @@ -54,6 +55,9 @@ CONFIG_PHYLIB=y
>  CONFIG_PHY_AQUANTIA=y
>  CONFIG_E1000=y
>  CONFIG_MII=y
> +CONFIG_DM_PCI=y
> +CONFIG_DM_PCI_COMPAT=y
> +CONFIG_PCIE_FSL=y
>  CONFIG_SYS_NS16550=y
>  CONFIG_SPI=y
>  CONFIG_FSL_ESPI=y
> diff --git a/configs/T2080QDS_defconfig b/configs/T2080QDS_defconfig
> index 79cf4424b4..df1c5183e5 100644
> --- a/configs/T2080QDS_defconfig
> +++ b/configs/T2080QDS_defconfig
> @@ -28,6 +28,7 @@ 
> CONFIG_MTDPARTS_DEFAULT="mtdparts=fe800.nor:1m(uboot),5m(kernel),128k(dtb),9
>  CONFIG_OF_CONTROL=y
>  CONFIG_DEFAULT_DEVICE_TREE="t2080qds"
>  CONFIG_ENV_IS_IN_FLASH=y
> +CONFIG_DM=y
>  CONFIG_FSL_CAAM=y
>  CONFIG_FSL_ESDHC=y
>  CONFIG_MTD_NOR_FLASH=y
> @@ -43,6 +44,9 @@ CONFIG_PHYLIB=y
>  CONFIG_PHY_AQUANTIA=y
>  CONFIG_E1000=y
>  CONFIG_MII=y
> +CONFIG_DM_PCI=y
> +CONFIG_DM_PCI_COMPAT=y
> +CONFIG_PCIE_FSL=y
>  CONFIG_SYS_NS16550=y
>  CONFIG_SPI=y
>  CONFIG_FSL_ESPI=y
> --

Regards,
Bin
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Re: [U-Boot] Cannot boot mx6qsabred with 2019.07-rc2

2019-05-23 Thread Tom Rini
On Thu, May 23, 2019 at 02:08:23PM +, Abel Vesa wrote:
> On 19-05-23 09:59:05, Tom Rini wrote:
> > On Thu, May 23, 2019 at 10:49:11AM -0300, Fabio Estevam wrote:
> > > Hi Peng,
> > > 
> > > On Tue, May 21, 2019 at 10:38 PM Peng Fan  wrote:
> > > 
> > > > > I will send a v2 removing CONFIG_SPL_DM.
> > > >
> > > > So what is the real direction moving to use SPL driver, non-dm is 
> > > > allowed in future?
> > > 
> > > We are very limited in space when CONFIG_SPL_DM is used on imx6q-sabresd.
> > > 
> > > With CONFIG_SPL_DM selected the size increase due to the three dtb's
> > > is about 8kB.
> > > 
> > > Even with CONFIG_SPL_DM disabled we ony have 1kB of free space, so I
> > > still want to optimize the size further.
> > 
> > So with CONFIG_SPL_DM we're overflowing by ~7kB?
> 
> Well, the mandatory requirements here are as follow (AFAIK):
> 1. keep one binary for all imx6dl imx6[qp|dl|q]-sabresd
> 2. have DM support in SPL
> 
> So I guess we have to either prioritize the other needed configs and
> leave out the one we can do without. That, ofcourse, if we still want
> to fit in and we still want one binary for all three sabresd boards.

Well, no, you don't have to use DM in SPL.  But what I'm wondering is if
we need qp/dl/q specific information at the SPL stage or if that can
wait until we're doing the real U-Boot.

-- 
Tom


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Re: [U-Boot] Cannot boot mx6qsabred with 2019.07-rc2

2019-05-23 Thread Michael Nazzareno Trimarchi
Hi

On Thu, May 23, 2019 at 4:33 PM Tom Rini  wrote:
>
> On Thu, May 23, 2019 at 02:08:23PM +, Abel Vesa wrote:
> > On 19-05-23 09:59:05, Tom Rini wrote:
> > > On Thu, May 23, 2019 at 10:49:11AM -0300, Fabio Estevam wrote:
> > > > Hi Peng,
> > > >
> > > > On Tue, May 21, 2019 at 10:38 PM Peng Fan  wrote:
> > > >
> > > > > > I will send a v2 removing CONFIG_SPL_DM.
> > > > >
> > > > > So what is the real direction moving to use SPL driver, non-dm is 
> > > > > allowed in future?
> > > >
> > > > We are very limited in space when CONFIG_SPL_DM is used on 
> > > > imx6q-sabresd.
> > > >
> > > > With CONFIG_SPL_DM selected the size increase due to the three dtb's
> > > > is about 8kB.
> > > >
> > > > Even with CONFIG_SPL_DM disabled we ony have 1kB of free space, so I
> > > > still want to optimize the size further.
> > >
> > > So with CONFIG_SPL_DM we're overflowing by ~7kB?
> >
> > Well, the mandatory requirements here are as follow (AFAIK):
> > 1. keep one binary for all imx6dl imx6[qp|dl|q]-sabresd
> > 2. have DM support in SPL
> >
> > So I guess we have to either prioritize the other needed configs and
> > leave out the one we can do without. That, ofcourse, if we still want
> > to fit in and we still want one binary for all three sabresd boards.
>
> Well, no, you don't have to use DM in SPL.  But what I'm wondering is if
> we need qp/dl/q specific information at the SPL stage or if that can
> wait until we're doing the real U-Boot.
>

Is dcd table take space?

Michael

> --
> Tom
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Re: [U-Boot] Cannot boot mx6qsabred with 2019.07-rc2

2019-05-23 Thread Tom Rini
On Thu, May 23, 2019 at 04:47:59PM +0200, Michael Nazzareno Trimarchi wrote:
> Hi
> 
> On Thu, May 23, 2019 at 4:33 PM Tom Rini  wrote:
> >
> > On Thu, May 23, 2019 at 02:08:23PM +, Abel Vesa wrote:
> > > On 19-05-23 09:59:05, Tom Rini wrote:
> > > > On Thu, May 23, 2019 at 10:49:11AM -0300, Fabio Estevam wrote:
> > > > > Hi Peng,
> > > > >
> > > > > On Tue, May 21, 2019 at 10:38 PM Peng Fan  wrote:
> > > > >
> > > > > > > I will send a v2 removing CONFIG_SPL_DM.
> > > > > >
> > > > > > So what is the real direction moving to use SPL driver, non-dm is 
> > > > > > allowed in future?
> > > > >
> > > > > We are very limited in space when CONFIG_SPL_DM is used on 
> > > > > imx6q-sabresd.
> > > > >
> > > > > With CONFIG_SPL_DM selected the size increase due to the three dtb's
> > > > > is about 8kB.
> > > > >
> > > > > Even with CONFIG_SPL_DM disabled we ony have 1kB of free space, so I
> > > > > still want to optimize the size further.
> > > >
> > > > So with CONFIG_SPL_DM we're overflowing by ~7kB?
> > >
> > > Well, the mandatory requirements here are as follow (AFAIK):
> > > 1. keep one binary for all imx6dl imx6[qp|dl|q]-sabresd
> > > 2. have DM support in SPL
> > >
> > > So I guess we have to either prioritize the other needed configs and
> > > leave out the one we can do without. That, ofcourse, if we still want
> > > to fit in and we still want one binary for all three sabresd boards.
> >
> > Well, no, you don't have to use DM in SPL.  But what I'm wondering is if
> > we need qp/dl/q specific information at the SPL stage or if that can
> > wait until we're doing the real U-Boot.
> 
> Is dcd table take space?

The DCD table is included in that hard size limit, but yes, if there's
QP/DL/Q specific stuff that we could handle via the plugin mechanism or
similar, that might be part of the solution.

-- 
Tom


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Re: [U-Boot] Cannot boot mx6qsabred with 2019.07-rc2

2019-05-23 Thread Tom Rini
On Thu, May 23, 2019 at 04:04:17PM +0200, Marek Vasut wrote:
> On 5/23/19 3:59 PM, Tom Rini wrote:
> > On Thu, May 23, 2019 at 10:49:11AM -0300, Fabio Estevam wrote:
> >> Hi Peng,
> >>
> >> On Tue, May 21, 2019 at 10:38 PM Peng Fan  wrote:
> >>
>  I will send a v2 removing CONFIG_SPL_DM.
> >>>
> >>> So what is the real direction moving to use SPL driver, non-dm is allowed 
> >>> in future?
> >>
> >> We are very limited in space when CONFIG_SPL_DM is used on imx6q-sabresd.
> >>
> >> With CONFIG_SPL_DM selected the size increase due to the three dtb's
> >> is about 8kB.
> >>
> >> Even with CONFIG_SPL_DM disabled we ony have 1kB of free space, so I
> >> still want to optimize the size further.
> > 
> > So with CONFIG_SPL_DM we're overflowing by ~7kB?
> > 
> >> Two options that I want also to remove are:
> >>
> >> CONFIG_SPL_FS_EXT4=y
> >> CONFIG_SPL_I2C_SUPPORT=y
> >>
> >> We are at -rc2 now, and I would really like to have mx6sabresd booting 
> >> again.
> >>
> >> Please check my v2 series and see if it looks good.
> > 
> > We certainly want to do something to fix the regression, agreed.
> > 
> > Looking at the config, can we just use a fake DTB for SPL that works on
> > all 3 boards, rather than 3 DTBs?
> 
> Mind you, all of that seems like a workaround. Removing functionality
> just to fit the monster with DM/DT in is a no-go. R-Car Gen2 doesn't use
> DM/DT in SPL because it just won't fit and I believe that absolutely
> makes sense ; why should we impose DM/DT in SPL on MX6 only to make it
> less usable?

Setting aside that as I said you don't have to use DM in SPL, maybe it's
also worth noting you don't have to provide "describes the whole board"
DTB files.  If as far as SPL is concerned there's no difference between
board A, B and C, just make a DTS that describes the relevant hardware.

Also, platdata can help here too.

-- 
Tom


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Re: [U-Boot] [PATCH v3 1/6] spl: add Kconfig option to clear bss early

2019-05-23 Thread Andreas Dannenberg
Simon & Simon,

On Wed, May 22, 2019 at 05:08:40PM -0500, Andreas Dannenberg wrote:
> Hi Simon (Glass)
> 
> On Tue, May 21, 2019 at 06:53:31PM -0600, Simon Glass wrote:
> 
> > > > > Not having BSS available to carry over certain state to the
> > > > > board_init_r() world would lead to a bunch of hacky changes across
> > > > > the board I'm afraid, more below.
> > > >
> > > > This is really unfortunate.
> > > >
> > > > It seems to me that we have two choises:
> > > >
> > > > 1. Hack around with board_init_f() such as to remove the distinction
> > > > between this and board_init_r().
> > > >
> > > > 2. Enter board_init_r() without DRAM ready, and deal with setting it up 
> > > > there.
> > > >
> > > > I feel that the second solution is worth exploring. We could have some
> > > > board-specific init in board_init_r(). We already have
> > > > spl_board_init() so perhaps we could have spl_early_board_init()
> > > > called right near the top?
> > > >
> > > > We can refactor a few of the functions in spl/spl.c so they can be
> > > > called from board-specific code if necessary. We could also add new
> > > > flags to global_data to control the behaviour of the SPL code, and the
> > > > board code could set these.
> 
> I have an alternative solution working, that essentially makes
> board_init_f() more useful. I understand that this is not what you
> wanted to see but I wanted to throw it out here anyways so we can have
> another look at it.
> 
> Please see attached RFC for the general concept of allowing to move BSS
> setup prior to board_init_f for SPL via Kconfig option. This should also
> allow a few folks to get rid of the "hacky" memset() calls to manually
> clear BSS in board_initf() and with this bring some cleanup across the
> board (no pun intended). Of course such solution would need to go along
> with comment/documentation updates that are not yet comprehended in this
> RFC.

Ok I just realized yesterday after I sent that RFC that it was
essentially the same approach that was already part of Simon's patch
series here... give or take that my approach was using a macro to avoid
the duplication of BSS clearing code in crt0.S. So it's not really
adding to the discussion here of coming up with something entirely
different. Should have looked at the original patch more closely, my
bad.

--
Andreas Dannenberg
Texas Instruments Inc

> Background, I played with the adding a hook early into SPL's
> board_init_r() but as expected it was not very straightforward. One
> challenge for example is that gd/stack are "relocated" to DDR prior to
> board_init_r(), but since I don't have DDR until I can use BSS to bring
> up DDR, adding a hook into board_init_r() to bringup DDR I couldn't see
> a good way to both avoid doing and then to re-do some of that stuff
> usually done in crt0.S after my early board_init_r() hook has ran
> without making changes to crt0.S itself...
> 
> I'm still thinking about it...
> 
> --
> Andreas Dannenberg
> Texas Instruments Inc
> 


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[U-Boot] [PATCH v3 0/3] Add 'bcb' command to read/modify/write Android BCB

2019-05-23 Thread Eugeniu Rosca
The motivation behind the 'bcb' command is explained in the
second ("cmd: Add 'bcb' command *") patch.

The first patch does the necessary fixing and polishing of
include/android_bootloader_message.h and is a hard prerequisite
for this series.

The third patch relocates the Android README to doc/android and creates
a brand new doc/android/bcb.txt covering the purpose/usage of 'bcb'.

v3:
 - [Simon Glass] Lots of review comments handled in cmd/bcb.c.
 - [Simon Glass, Sam Protsenko] Renamed and enriched android docs.
 - Placed detailed stats in each patch.

v2:
 - [Heinrich Schuchardt] Implement sub-commands via U_BOOT_CMD_MKENT.
 - Polished the code. Ensured no warnings returned by sparse, smatch,
   `cppcheck --force --enable=all --inconclusive`, make W=1.
 - Tested on R-Car-H3-ES20 ULCB-KF.

v1:
 - https://patchwork.ozlabs.org/cover/1080393/

Eugeniu Rosca (3):
  include: android_bootloader_message.h: Minimize the diff to AOSP
  cmd: Add 'bcb' command to read/modify/write BCB fields
  doc: relocate/rename Android README and add BCB overview

 cmd/Kconfig   |  17 +
 cmd/Makefile  |   1 +
 cmd/bcb.c | 340 ++
 doc/{README.avb2 => android/avb2.txt} |   0
 doc/android/bcb.txt   |  89 +
 .../fastboot.txt} |   0
 include/android_bootloader_message.h  | 126 ---
 7 files changed, 515 insertions(+), 58 deletions(-)
 create mode 100644 cmd/bcb.c
 rename doc/{README.avb2 => android/avb2.txt} (100%)
 create mode 100644 doc/android/bcb.txt
 rename doc/{README.android-fastboot => android/fastboot.txt} (100%)

-- 
2.21.0

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[U-Boot] [PATCH v3 1/3] include: android_bootloader_message.h: Minimize the diff to AOSP

2019-05-23 Thread Eugeniu Rosca
Perform the following updates:
 - Relocate the commit id from the file to the description of U-Boot
   commit. The AOSP commit is c784ce50e8c10eaf70e1f97e24e8324aef45faf5.
   This is done to avoid stale references in the file itself. The
   reasoning is in https://patchwork.ozlabs.org/patch/1098056/#2170209.
 - Minimize the diff to AOSP, to decrease the effort of the next AOSP
   backports. The background can be found in:
   https://patchwork.ozlabs.org/patch/1080394/#2168454.
 - Guard the static_assert() calls by #ifndef __UBOOT__ ... #endif,
   to avoid compilation failures of files including the header.

Signed-off-by: Eugeniu Rosca 
Reviewed-by: Sam Protsenko 
---
v3:
 - Added 'Reviewed-by: Sam Protsenko'
v2:
 - Newly pushed. No changes.
 - https://patchwork.ozlabs.org/patch/1101108/
---
 include/android_bootloader_message.h | 126 +++
 1 file changed, 68 insertions(+), 58 deletions(-)

diff --git a/include/android_bootloader_message.h 
b/include/android_bootloader_message.h
index b84789f02227..286d7ab0f31e 100644
--- a/include/android_bootloader_message.h
+++ b/include/android_bootloader_message.h
@@ -2,7 +2,7 @@
  * This is from the Android Project,
  * Repository: https://android.googlesource.com/platform/bootable/recovery
  * File: bootloader_message/include/bootloader_message/bootloader_message.h
- * Commit: c784ce50e8c10eaf70e1f97e24e8324aef45faf5
+ * Commit: See U-Boot commit description
  *
  * Copyright (C) 2008 The Android Open Source Project
  *
@@ -12,18 +12,24 @@
 #ifndef __ANDROID_BOOTLOADER_MESSAGE_H
 #define __ANDROID_BOOTLOADER_MESSAGE_H
 
+#ifndef __UBOOT__
+#include 
+#include 
+#include 
+#else
 /* compiler.h defines the types that otherwise are included from stdint.h and
  * stddef.h
  */
 #include 
+#endif
 
-/* Spaces used by misc partition are as below:
- * 0   - 2K For bootloader_message
- * 2K  - 16KUsed by Vendor's bootloader (the 2K - 4K range may be 
optionally used
- *  as bootloader_message_ab struct)
- * 16K - 64KUsed by uncrypt and recovery to store wipe_package for A/B 
devices
- * Note that these offsets are admitted by bootloader,recovery and uncrypt, so 
they
- * are not configurable without changing all of them. */
+// Spaces used by misc partition are as below:
+// 0   - 2K For bootloader_message
+// 2K  - 16KUsed by Vendor's bootloader (the 2K - 4K range may be 
optionally used
+//  as bootloader_message_ab struct)
+// 16K - 64KUsed by uncrypt and recovery to store wipe_package for A/B 
devices
+// Note that these offsets are admitted by bootloader,recovery and uncrypt, so 
they
+// are not configurable without changing all of them.
 static const size_t BOOTLOADER_MESSAGE_OFFSET_IN_MISC = 0;
 static const size_t WIPE_PACKAGE_OFFSET_IN_MISC = 16 * 1024;
 
@@ -61,17 +67,17 @@ struct bootloader_message {
 char status[32];
 char recovery[768];
 
-/* The 'recovery' field used to be 1024 bytes.  It has only ever
- * been used to store the recovery command line, so 768 bytes
- * should be plenty.  We carve off the last 256 bytes to store the
- * stage string (for multistage packages) and possible future
- * expansion. */
+// The 'recovery' field used to be 1024 bytes.  It has only ever
+// been used to store the recovery command line, so 768 bytes
+// should be plenty.  We carve off the last 256 bytes to store the
+// stage string (for multistage packages) and possible future
+// expansion.
 char stage[32];
 
-/* The 'reserved' field used to be 224 bytes when it was initially
- * carved off from the 1024-byte recovery field. Bump it up to
- * 1184-byte so that the entire bootloader_message struct rounds up
- * to 2048-byte. */
+// The 'reserved' field used to be 224 bytes when it was initially
+// carved off from the 1024-byte recovery field. Bump it up to
+// 1184-byte so that the entire bootloader_message struct rounds up
+// to 2048-byte.
 char reserved[1184];
 };
 
@@ -79,10 +85,12 @@ struct bootloader_message {
  * We must be cautious when changing the bootloader_message struct size,
  * because A/B-specific fields may end up with different offsets.
  */
+#ifndef __UBOOT__
 #if (__STDC_VERSION__ >= 201112L) || defined(__cplusplus)
 static_assert(sizeof(struct bootloader_message) == 2048,
   "struct bootloader_message size changes, which may break A/B 
devices");
 #endif
+#endif /* __UBOOT__ */
 
 /**
  * The A/B-specific bootloader message structure (4-KiB).
@@ -108,7 +116,7 @@ struct bootloader_message_ab {
 char slot_suffix[32];
 char update_channel[128];
 
-/* Round up the entire struct to 4096-byte. */
+// Round up the entire struct to 4096-byte.
 char reserved[1888];
 };
 
@@ -116,26 +124,28 @@ struct bootloader_message_ab {
  * Be cautious about the struct size change, in case we put anything post
  * bootloader_message_ab struct (b/29159185).
  */
+#ifndef __UBOOT__
 #if

[U-Boot] [PATCH v3 3/3] doc: relocate/rename Android README and add BCB overview

2019-05-23 Thread Eugeniu Rosca
Rename:
 - doc/{README.avb2 => android/avb2.txt}
 - doc/{README.android-fastboot => android/fastboot.txt}

Add a new file documenting the 'bcb' command:
 - doc/android/bcb.txt

The new directory structure has been reviewed by Simon in
https://patchwork.ozlabs.org/patch/1101107/#2176031 .

Signed-off-by: Eugeniu Rosca 
---
v3:
 - Newly pushed.
---
 doc/{README.avb2 => android/avb2.txt} |  0
 doc/android/bcb.txt   | 89 +++
 .../fastboot.txt} |  0
 3 files changed, 89 insertions(+)
 rename doc/{README.avb2 => android/avb2.txt} (100%)
 create mode 100644 doc/android/bcb.txt
 rename doc/{README.android-fastboot => android/fastboot.txt} (100%)

diff --git a/doc/README.avb2 b/doc/android/avb2.txt
similarity index 100%
rename from doc/README.avb2
rename to doc/android/avb2.txt
diff --git a/doc/android/bcb.txt b/doc/android/bcb.txt
new file mode 100644
index ..7b7177cacf21
--- /dev/null
+++ b/doc/android/bcb.txt
@@ -0,0 +1,89 @@
+Android Bootloader Control Block (BCB)
+
+The purpose behind this file is to:
+ - give an overview of BCB w/o duplicating public documentation
+ - describe the main BCB use-cases which concern U-Boot
+ - reflect current support status in U-Boot
+ - mention any relevant U-Boot build-time tunables
+ - precisely exemplify one or more use-cases
+
+Additions and fixes are welcome!
+
+
+1. OVERVIEW
+-
+Bootloader Control Block (BCB) is a well established term/acronym in
+the Android namespace which refers to a location in a dedicated raw
+(i.e. FS-unaware) flash (e.g. eMMC) partition, usually called "misc",
+which is used as media for exchanging messages between Android userspace
+(particularly recovery [1]) and an Android-capable bootloader.
+
+On higher level, BCB provides a way to implement a subset of Android
+Bootloader Requirements [2], amongst which are:
+ - Android-specific bootloader flow [3]
+ - Get the "reboot reason" (and act accordingly) [4]
+ - Get/pass a list of commands from/to recovery [1]
+ - TODO
+
+
+2. 'BCB'. SHELL COMMAND OVERVIEW
+---
+The 'bcb' command provides a CLI to facilitate the development of the
+requirements enumerated above. Below is the command's help message:
+
+=> bcb
+bcb - Load/set/clear/test/dump/store Android BCB fields
+
+Usage:
+bcb load  - load  BCB from mmc :
+bcb set  - set   BCB  to 
+bcb clear []  - clear BCB  or all fields
+bcb test - test  BCB  against 
+bcb dump  - dump  BCB 
+bcb store- store BCB back to mmc
+
+Legend:
+   - MMC device index containing the BCB partition
+  - MMC partition index or name containing the BCB
+ - one of {command,status,recovery,stage,reserved}
+- the binary operator used in 'bcb test':
+  '=' returns true if  matches the string stored in 
+  '~' returns true if  matches a subset of 's string
+   - string/text provided as input to bcb {set,test}
+  NOTE: any ':' character in  will be replaced by line feed
+  during 'bcb set' and used as separator by upper layers
+
+
+3. 'BCB'. EXAMPLE OF GETTING REBOOT REASON
+---
+if bcb load 1 misc; then
+# valid BCB found
+if bcb test command = bootonce-bootloader; then
+bcb clear command; bcb store;
+# do the equivalent of AOSP ${fastbootcmd}
+# i.e. call fastboot
+else if bcb test command = boot-recovery; then
+bcb clear command; bcb store;
+# do the equivalent of AOSP ${recoverycmd}
+# i.e. do anything required for booting into recovery
+else
+# boot Android OS normally
+fi
+else
+# corrupted/non-existent BCB
+# report error or boot non-Android OS (platform-specific)
+fi
+
+
+4. ENABLE ON YOUR BOARD
+---
+The following Kconfig options must be enabled:
+CONFIG_PARTITIONS=y
+CONFIG_MMC=y
+CONFIG_BCB=y
+
+[1] https://android.googlesource.com/platform/bootable/recovery
+[2] https://source.android.com/devices/bootloader
+[3] https://patchwork.ozlabs.org/patch/746835/
+("[U-Boot,5/6] Initial support for the Android Bootloader flow")
+[4] https://source.android.com/devices/bootloader/boot-reason
diff --git a/doc/README.android-fastboot b/doc/android/fastboot.txt
similarity index 100%
rename from doc/README.android-fastboot
rename to doc/android/fastboot.txt
-- 
2.21.0

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[U-Boot] [PATCH v3 2/3] cmd: Add 'bcb' command to read/modify/write BCB fields

2019-05-23 Thread Eugeniu Rosca
'Bootloader Control Block' (BCB) is a well established term/acronym in
the Android namespace which refers to a location in a dedicated raw
(i.e. FS-unaware) flash (e.g. eMMC) partition, usually called "misc",
which is used as media for exchanging messages between Android userspace
(particularly recovery [1]) and an Android-capable bootloader.

On higher level, this allows implementing a subset of Android Bootloader
Requirements [2], amongst which is the Android-specific bootloader
flow [3]. Regardless how the latter is implemented in U-Boot ([3] being
the most memorable example), reading/writing/dumping the BCB fields in
the development process from inside the U-Boot is a convenient feature.
Hence, make it available to the users.

Some usage examples of the new command recorded on R-Car H3ULCB-KF
('>>>' is an overlay on top of the original console output):

=> bcb
bcb - Load/set/clear/test/dump/store Android BCB fields

Usage:
bcb load  - load  BCB from mmc :
bcb set  - set   BCB  to 
bcb clear []  - clear BCB  or all fields
bcb test - test  BCB  against 
bcb dump  - dump  BCB 
bcb store- store BCB back to mmc

Legend:
   - MMC device index containing the BCB partition
  - MMC partition index or name containing the BCB
 - one of {command,status,recovery,stage,reserved}
- the binary operator used in 'bcb test':
  '=' returns true if  matches the string stored in 
  '~' returns true if  matches a subset of 's string
   - string/text provided as input to bcb {set,test}
  NOTE: any ':' character in  will be replaced by line feed
  during 'bcb set' and used as separator by upper layers

=> bcb dump command
Error: Please, load BCB first!
 >>> Users must specify mmc device and partition before any other call

=> bcb load 1 misc
=> bcb load 1 1
 >>> The two calls are equivalent (assuming "misc" has index 1)

=> bcb dump command
: 62 6f 6f 74 6f 6e 63 65 2d 73 68 65 6c 6c 00 72bootonce-shell.r
0010: 79 00 72 00 00 00 00 00 00 00 00 00 00 00 00 00y.r.
 >>> The output is in binary/string format for convenience
 >>> The output size matches the size of inspected BCB field
 >>> (32 bytes in case of 'command')

=> bcb test command = bootonce-shell && echo true
true
=> bcb test command = bootonce-shell- && echo true
=> bcb test command = bootonce-shel && echo true
 >>> The '=' operator returns 'true' on perfect match

=> bcb test command ~ bootonce-shel && echo true
true
=> bcb test command ~ bootonce-shell && echo true
true
 >>> The '~' operator returns 'true' on substring match

=> bcb set command recovery
=> bcb dump command
: 72 65 63 6f 76 65 72 79 00 73 68 65 6c 6c 00 72recovery.shell.r
0010: 79 00 72 00 00 00 00 00 00 00 00 00 00 00 00 00y.r.
 >>> The new value is NULL-terminated and stored in the BCB field

=> bcb set recovery "msg1:msg2:msg3"
=> bcb dump recovery
0040: 6d 73 67 31 0a 6d 73 67 32 0a 6d 73 67 33 00 00msg1.msg2.msg3..
0050: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0060: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 >>> --- snip ---
 >>> Every ':' is replaced by line-feed '\n' (0xA). The latter is used
 >>> as separator between individual commands by Android userspace

=> bcb store
 >>> Flush/store the BCB structure to MMC

[1] https://android.googlesource.com/platform/bootable/recovery
[2] https://source.android.com/devices/bootloader
[3] https://patchwork.ozlabs.org/patch/746835/
("[U-Boot,5/6] Initial support for the Android Bootloader flow")

Signed-off-by: Eugeniu Rosca 
---
v3:
 - [Simon Glass] Allow 'strsep' to modify the argv[n] string in-place
   rather than duplicating it with 'strdup'. Remove #include 
 - [Simon Glass] Call bcb_is_misused() _once_ in do_bcb()
 - [Simon Glass] Report error codes if IO fails in do_bcb_{load,store}
 - [Simon Glass] Leave one empty line above top-level returns
   (note: checkpatch is indifferent about this)
 - [Simon Glass] Replace strncmp with '==' operator for single-character
   strings in do_bcb_test(), which reduces compiled object size
 - Reorder the functions to match the cmd_bcb_sub table
 - Improve error reporting:
   - s/Error: Unknown field/Error: Unknown bcb field/
   - s/debug Error: Unexpected BCB command/
  printf Error: 'bcb %s' not supported/
   - s/Error: BCB not loaded/Error: Please, load BCB first/
 - Make sure static analysis is clean:
   - cppcheck --force --enable=all --inconclusive
   - sparse/make C=2
   - make W=1
   - smatch
 - Re-test on R-Car H3ULCB-KF
 - Compile/boot/smoke-test on sandbox
v2:
 - [Heinrich Schuchardt] Implement sub-commands via U_BOOT_CMD_MKENT.
 - Polished the code. Ensured no warnings returned by sparse, smatch,
   `cppcheck --force --enable=all --inconclusive`, make W=1.
 - Tested on R-Car-H3-ES20 ULCB-KF.
 - https://patchwork.ozlabs.org/patch/1101107/

v1:
 - https://patchwork.ozla

Re: [U-Boot] [PATCHv2 8/8] configs: T2080QDS: Enable PCIe driver

2019-05-23 Thread Z.q. Hou
Hi Bin,

Thanks a lot for your comments!

> -Original Message-
> From: Bin Meng [mailto:bmeng...@gmail.com]
> Sent: 2019年5月23日 22:23
> To: Z.q. Hou 
> Cc: u-boot@lists.denx.de; Prabhakar Kushwaha
> ; w...@denx.de; Shengzhou Liu
> ; Jagdish Gediya ;
> s...@chromium.org; ley.foon@intel.com; s...@denx.de; M.h. Lian
> ; Xiaowei Bao 
> Subject: Re: [PATCHv2 8/8] configs: T2080QDS: Enable PCIe driver
> 
> On Thu, May 23, 2019 at 8:22 PM Z.q. Hou  wrote:
> >
> > From: Hou Zhiqiang 
> >
> > Enable the DM PCIe driver in T2080QDS defconfig.
> >
> > Signed-off-by: Hou Zhiqiang 
> > ---
> > V2:
> >  - Enable PCIe in NAND flash, SD card and SPI flash boot defconfig.
> >
> >  configs/T2080QDS_NAND_defconfig | 4 
> >  configs/T2080QDS_SDCARD_defconfig   | 4 
> >  configs/T2080QDS_SPIFLASH_defconfig | 4 
> >  configs/T2080QDS_defconfig  | 4 
> >  4 files changed, 16 insertions(+)
> >
> > diff --git a/configs/T2080QDS_NAND_defconfig
> > b/configs/T2080QDS_NAND_defconfig index 948a05af89..d04e223c23
> 100644
> > --- a/configs/T2080QDS_NAND_defconfig
> > +++ b/configs/T2080QDS_NAND_defconfig
> > @@ -38,6 +38,7 @@
> >
> CONFIG_MTDPARTS_DEFAULT="mtdparts=fe800.nor:1m(uboot),5m(kern
> el),1
> > 28k(dtb),9
> >  CONFIG_OF_CONTROL=y
> >  CONFIG_DEFAULT_DEVICE_TREE="t2080qds"
> >  CONFIG_ENV_IS_IN_NAND=y
> > +CONFIG_DM=y
> >  CONFIG_FSL_CAAM=y
> >  CONFIG_FSL_ESDHC=y
> >  CONFIG_MTD_NOR_FLASH=y
> > @@ -54,6 +55,9 @@ CONFIG_PHYLIB=y
> >  CONFIG_PHY_AQUANTIA=y
> >  CONFIG_E1000=y
> >  CONFIG_MII=y
> > +CONFIG_DM_PCI=y
> > +CONFIG_DM_PCI_COMPAT=y
> 
> I think we should avoid adding DM_PCI_COMPAT.

Without this macro the non-DM Endpoint driver (such as e1000) won't work.
 
> > +CONFIG_PCIE_FSL=y
> >  CONFIG_SYS_NS16550=y
> >  CONFIG_SPI=y
> >  CONFIG_FSL_ESPI=y
> > diff --git a/configs/T2080QDS_SDCARD_defconfig
> > b/configs/T2080QDS_SDCARD_defconfig
> > index 30e87df3bb..7292de750b 100644
> > --- a/configs/T2080QDS_SDCARD_defconfig
> > +++ b/configs/T2080QDS_SDCARD_defconfig
> > @@ -38,6 +38,7 @@
> >
> CONFIG_MTDPARTS_DEFAULT="mtdparts=fe800.nor:1m(uboot),5m(kern
> el),1
> > 28k(dtb),9
> >  CONFIG_OF_CONTROL=y
> >  CONFIG_DEFAULT_DEVICE_TREE="t2080qds"
> >  CONFIG_ENV_IS_IN_MMC=y
> > +CONFIG_DM=y
> >  CONFIG_FSL_CAAM=y
> >  CONFIG_FSL_ESDHC=y
> >  CONFIG_MTD_NOR_FLASH=y
> > @@ -53,6 +54,9 @@ CONFIG_PHYLIB=y
> >  CONFIG_PHY_AQUANTIA=y
> >  CONFIG_E1000=y
> >  CONFIG_MII=y
> > +CONFIG_DM_PCI=y
> > +CONFIG_DM_PCI_COMPAT=y
> > +CONFIG_PCIE_FSL=y
> >  CONFIG_SYS_NS16550=y
> >  CONFIG_SPI=y
> >  CONFIG_FSL_ESPI=y
> > diff --git a/configs/T2080QDS_SPIFLASH_defconfig
> > b/configs/T2080QDS_SPIFLASH_defconfig
> > index 0cccb3a85d..d85cc8d9d1 100644
> > --- a/configs/T2080QDS_SPIFLASH_defconfig
> > +++ b/configs/T2080QDS_SPIFLASH_defconfig
> > @@ -39,6 +39,7 @@
> >
> CONFIG_MTDPARTS_DEFAULT="mtdparts=fe800.nor:1m(uboot),5m(kern
> el),1
> > 28k(dtb),9
> >  CONFIG_OF_CONTROL=y
> >  CONFIG_DEFAULT_DEVICE_TREE="t2080qds"
> >  CONFIG_ENV_IS_IN_SPI_FLASH=y
> > +CONFIG_DM=y
> >  CONFIG_FSL_CAAM=y
> >  CONFIG_FSL_ESDHC=y
> >  CONFIG_MTD_NOR_FLASH=y
> > @@ -54,6 +55,9 @@ CONFIG_PHYLIB=y
> >  CONFIG_PHY_AQUANTIA=y
> >  CONFIG_E1000=y
> >  CONFIG_MII=y
> > +CONFIG_DM_PCI=y
> > +CONFIG_DM_PCI_COMPAT=y
> > +CONFIG_PCIE_FSL=y
> >  CONFIG_SYS_NS16550=y
> >  CONFIG_SPI=y
> >  CONFIG_FSL_ESPI=y
> > diff --git a/configs/T2080QDS_defconfig b/configs/T2080QDS_defconfig
> > index 79cf4424b4..df1c5183e5 100644
> > --- a/configs/T2080QDS_defconfig
> > +++ b/configs/T2080QDS_defconfig
> > @@ -28,6 +28,7 @@
> >
> CONFIG_MTDPARTS_DEFAULT="mtdparts=fe800.nor:1m(uboot),5m(kern
> el),1
> > 28k(dtb),9
> >  CONFIG_OF_CONTROL=y
> >  CONFIG_DEFAULT_DEVICE_TREE="t2080qds"
> >  CONFIG_ENV_IS_IN_FLASH=y
> > +CONFIG_DM=y
> >  CONFIG_FSL_CAAM=y
> >  CONFIG_FSL_ESDHC=y
> >  CONFIG_MTD_NOR_FLASH=y
> > @@ -43,6 +44,9 @@ CONFIG_PHYLIB=y
> >  CONFIG_PHY_AQUANTIA=y
> >  CONFIG_E1000=y
> >  CONFIG_MII=y
> > +CONFIG_DM_PCI=y
> > +CONFIG_DM_PCI_COMPAT=y
> > +CONFIG_PCIE_FSL=y
> >  CONFIG_SYS_NS16550=y
> >  CONFIG_SPI=y
> >  CONFIG_FSL_ESPI=y
> > --
> 
> Regards,
> Bin

Thanks,
Zhiqiang
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Re: [U-Boot] Cannot boot mx6qsabred with 2019.07-rc2

2019-05-23 Thread Jagan Teki
On Fri, May 17, 2019 at 6:09 PM Fabio Estevam  wrote:
>
> On Thu, May 16, 2019 at 11:29 PM Peng Fan  wrote:
>
> > You could enable DEBUG in SPL, and disable SPL_SDP because of size will 
> > exceeds.
> > Then see what happends.
>
> Even without DEBUG enabled we get useful error messages:
>
> U-Boot SPL 2019.07-rc2 (May 17 2019 - 09:30:33 -0300)
> Trying to boot from MMC1
> spl: could not find mmc device 0. error: -19
> SPL: failed to boot from all boot devices
> ### ERROR ### Please RESET the board ###
>
> This means that
> err = uclass_get_device(UCLASS_MMC, mmc_dev, &dev); fails inside
> common/spl/spl_mmc.c
>
> Why does this happen?
>
> About the size difference:
>
> Original defconfig generates an SPL of 76800 bytes
> With CONFIG_SPL_DM=y removed the SPL size goes to 68608 bytes.
>
> > I have no idea, then. My board is REV C4, chip 1.5
>
> Mine is rev C2 with i.MX6Q rev1.2

Don't know whether this is SPL size issue or not? can you try
SPL_OF_PLATDATA and TINY* I can see the size reduced with 64512 bytes
(one build issue on fdtdec_get_int undefined)
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Re: [U-Boot] Cannot boot mx6qsabred with 2019.07-rc2

2019-05-23 Thread Fabio Estevam
On Thu, May 23, 2019 at 1:11 PM Jagan Teki  wrote:

> Don't know whether this is SPL size issue or not? can you try
> SPL_OF_PLATDATA and TINY* I can see the size reduced with 64512 bytes
> (one build issue on fdtdec_get_int undefined)

Yes, it does not build with CONFIG_SPL_OF_PLATDATA:

lib/built-in.o: In function `fdtdec_parse_phandle_with_args':
/home/fabio/u-boot/lib/fdtdec.c:788: undefined reference to `fdtdec_get_int'
drivers/built-in.o: In function `fsl_esdhc_probe':
/home/fabio/u-boot/drivers/mmc/fsl_esdhc.c:1480: undefined reference
to `fdtdec_get_int'
/home/fabio/u-boot/drivers/mmc/fsl_esdhc.c:1482: undefined reference
to `fdtdec_get_int'
/home/fabio/u-boot/drivers/mmc/fsl_esdhc.c:1485: undefined reference
to `fdtdec_get_int'
scripts/Makefile.spl:404: recipe for target 'spl/u-boot-spl' failed
make[1]: *** [spl/u-boot-spl] Error 1

Thanks for the suggestions, but at this point I prefer to go with the
removal of CONFIG_SPL_DM.

For 2019.07 it would be really nice if we could fix these two issues:

1. Allow to load a FIT image via Serial Download Protocol

2. Detect the SPL size overflow in build-time
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Re: [U-Boot] Cannot boot mx6qsabred with 2019.07-rc2

2019-05-23 Thread Jagan Teki
On Thu, May 23, 2019 at 10:18 PM Fabio Estevam  wrote:
>
> On Thu, May 23, 2019 at 1:11 PM Jagan Teki  wrote:
>
> > Don't know whether this is SPL size issue or not? can you try
> > SPL_OF_PLATDATA and TINY* I can see the size reduced with 64512 bytes
> > (one build issue on fdtdec_get_int undefined)
>
> Yes, it does not build with CONFIG_SPL_OF_PLATDATA:
>
> lib/built-in.o: In function `fdtdec_parse_phandle_with_args':
> /home/fabio/u-boot/lib/fdtdec.c:788: undefined reference to `fdtdec_get_int'

Couldn't dig much here, would be happy someone can find this?

> drivers/built-in.o: In function `fsl_esdhc_probe':
> /home/fabio/u-boot/drivers/mmc/fsl_esdhc.c:1480: undefined reference
> to `fdtdec_get_int'
> /home/fabio/u-boot/drivers/mmc/fsl_esdhc.c:1482: undefined reference
> to `fdtdec_get_int'
> /home/fabio/u-boot/drivers/mmc/fsl_esdhc.c:1485: undefined reference

These we can fix, by supporting platdata support into driver.

> to `fdtdec_get_int'
> scripts/Makefile.spl:404: recipe for target 'spl/u-boot-spl' failed
> make[1]: *** [spl/u-boot-spl] Error 1
>
> Thanks for the suggestions, but at this point I prefer to go with the
> removal of CONFIG_SPL_DM.

We have 45 days to release, I think we can make these fixes quite
normally what do you think? fsl_esdhc.c build I can mark a patch in
few days if required.

>
> For 2019.07 it would be really nice if we could fix these two issues:
>
> 1. Allow to load a FIT image via Serial Download Protocol
>
> 2. Detect the SPL size overflow in build-time

1) We are working on this, 2) can be done.
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Re: [U-Boot] Cannot boot mx6qsabred with 2019.07-rc2

2019-05-23 Thread Fabio Estevam
On Thu, May 23, 2019 at 2:07 PM Jagan Teki  wrote:

> We have 45 days to release, I think we can make these fixes quite
> normally what do you think? fsl_esdhc.c build I can mark a patch in
> few days if required.

Sure, bug fixes are always welcome :-)

> >
> > For 2019.07 it would be really nice if we could fix these two issues:
> >
> > 1. Allow to load a FIT image via Serial Download Protocol
> >
> > 2. Detect the SPL size overflow in build-time
>
> 1) We are working on this, 2) can be done.

Cool, please keep me in the loop for the Serial Download Protocol issue.

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Re: [U-Boot] Cannot boot mx6qsabred with 2019.07-rc2

2019-05-23 Thread Schrempf Frieder
On 23.05.19 19:07, Jagan Teki wrote:
> On Thu, May 23, 2019 at 10:18 PM Fabio Estevam  wrote:
>>
>> On Thu, May 23, 2019 at 1:11 PM Jagan Teki  
>> wrote:
>>
>>> Don't know whether this is SPL size issue or not? can you try
>>> SPL_OF_PLATDATA and TINY* I can see the size reduced with 64512 bytes
>>> (one build issue on fdtdec_get_int undefined)
>>
>> Yes, it does not build with CONFIG_SPL_OF_PLATDATA:
>>
>> lib/built-in.o: In function `fdtdec_parse_phandle_with_args':
>> /home/fabio/u-boot/lib/fdtdec.c:788: undefined reference to `fdtdec_get_int'
> 
> Couldn't dig much here, would be happy someone can find this?
> 
>> drivers/built-in.o: In function `fsl_esdhc_probe':
>> /home/fabio/u-boot/drivers/mmc/fsl_esdhc.c:1480: undefined reference
>> to `fdtdec_get_int'
>> /home/fabio/u-boot/drivers/mmc/fsl_esdhc.c:1482: undefined reference
>> to `fdtdec_get_int'
>> /home/fabio/u-boot/drivers/mmc/fsl_esdhc.c:1485: undefined reference
> 
> These we can fix, by supporting platdata support into driver.
> 
>> to `fdtdec_get_int'
>> scripts/Makefile.spl:404: recipe for target 'spl/u-boot-spl' failed
>> make[1]: *** [spl/u-boot-spl] Error 1
>>
>> Thanks for the suggestions, but at this point I prefer to go with the
>> removal of CONFIG_SPL_DM.
> 
> We have 45 days to release, I think we can make these fixes quite
> normally what do you think? fsl_esdhc.c build I can mark a patch in
> few days if required.
> 
>>
>> For 2019.07 it would be really nice if we could fix these two issues:
>>
>> 1. Allow to load a FIT image via Serial Download Protocol
>>
>> 2. Detect the SPL size overflow in build-time
> 
> 1) We are working on this, 2) can be done.

As luck would have it, I needed to load a FIT via SDP today, so I came 
up with a quick patch (see below). There are probably better ways to do 
this, but it works.

#

commit 408b9d26eea48e6f85dd087750629f7a4095c73d
Author: Frieder Schrempf 
Date:   Thu May 23 14:52:47 2019 +0200

 Allow SPL to load and boot FIT via SDP

diff --git a/common/spl/spl_sdp.c b/common/spl/spl_sdp.c
index 807256e908..8f990a83a3 100644
--- a/common/spl/spl_sdp.c
+++ b/common/spl/spl_sdp.c
@@ -25,10 +25,13 @@ static int spl_sdp_load_image(struct spl_image_info 
*spl_image,
return -ENODEV;
}

-   /* This command typically does not return but jumps to an image */
-   sdp_handle(controller_index);
-   pr_err("SDP ended\n");
+   /*
+* This command either loads a legacy image, jumps and never returns,
+* or it loads a FIT image and returns it to be handled by the SPL code.
+*/
+   ret = sdp_handle(controller_index, spl_image);
+   debug("SDP ended\n");

-   return -EINVAL;
+   return ret;
  }
  SPL_LOAD_IMAGE_METHOD("USB SDP", 0, BOOT_DEVICE_BOARD, 
spl_sdp_load_image);
diff --git a/drivers/usb/gadget/f_sdp.c b/drivers/usb/gadget/f_sdp.c
index ae97ab2b49..5690060a2f 100644
--- a/drivers/usb/gadget/f_sdp.c
+++ b/drivers/usb/gadget/f_sdp.c
@@ -638,7 +638,18 @@ static u32 sdp_jump_imxheader(void *address)
return 0;
  }

-static void sdp_handle_in_ep(void)
+#ifdef CONFIG_SPL_LOAD_FIT
+static ulong sdp_fit_read(struct spl_load_info *load, ulong sector,
+ ulong count, void *buf)
+{
+   debug("%s: sector %lx, count %lx, buf %lx\n",
+ __func__, sector, count, (ulong)buf);
+   memcpy(buf, (void *)(load->dev + sector), count);
+   return count;
+}
+#endif
+
+static void sdp_handle_in_ep(struct spl_image_info *spl_image)
  {
u8 *data = sdp_func->in_req->buf;
u32 status;
@@ -689,11 +700,25 @@ static void sdp_handle_in_ep(void)

/* If imx header fails, try some U-Boot specific headers */
if (status) {
+   image_header_t *header =
+   (void *)(u64)sdp_func->jmp_address;
  #ifdef CONFIG_SPL_BUILD
+#ifdef CONFIG_SPL_LOAD_FIT
+   if (image_get_magic(header) == FDT_MAGIC) {
+   struct spl_load_info load;
+
+   printf("Found FIT\n");
+   load.dev = (void *)(u64)sdp_func->jmp_address;
+   load.bl_len = 1;
+   load.read = sdp_fit_read;
+   spl_load_simple_fit(spl_image, &load, 0,
+   header);
+   return;
+   }
+#endif
/* In SPL, allow jumps to U-Boot images */
struct spl_image_info spl_image = {};
-   spl_parse_image_header(&spl_image,
-   (struct image_header *)sdp_func->jmp_address);
+   spl_parse_image_header(&spl_image, header);
jump_to_image_no_args(&spl_image);
  #else
/* In U-Boot, allow jumps to scripts */
@@ -715,19 +740,

[U-Boot] [PATCH v4 00/15] Add Support for eMMC in AM65x-evm

2019-05-23 Thread Faiz Abbas
Add Support for eMMC in TI's AM65x-evm. The series starts
by syncing the sdhci0 node from the kernel. Then it adds APIs and
changes to the driver required for handling the driver's integrated
phy. The current maximum supported speed is DDR52. Higher speeds and
tuning support will be added in a subsequent series.

Tested on top of Andreas's sysfw loader patches here:
https://www.mail-archive.com/u-boot@lists.denx.de/msg325811.html

Changes in v4:
1. Dropped the patch including regmap_read_poll_timeout() because that support 
was
   already added by someone else
2. Fixed a NULL pointer exception in patch 8.
3. Rebased on top of latest master
4. Added extra patches to support GPT partitions in user partition
5. Added Support for environment in eMMC by default

Changes in v3:
Patch 9: Got rid of variable ret

Changes in v2:
Patch 9: Fixed return value
Patch 12: Fixed spacing

Faiz Abbas (15):
  arm64: dts: k3: Sync sdhci0 node from kernel and change driver name
  mmc: am654_sdhci: Remove quirks
  regmap: Add API regmap_init_mem_index()
  mmc: sdhci: Add support for sdhci-caps-mask
  mmc: sdhci: Make sdhci_set_clock() non static
  arm: dts: k3: Add phy specific properties to SD card node
  mmc: sdhci: Make set_ios_post() return int
  mmc: am654_sdhci: Add Support for PHY
  configs: am65x_evm: Enable CONFIG_REGMAP
  mmc: am654_sdhci: Use f_max in mmc_config
  mmc: sdhci: Add support for HOST_CONTROL2 and setting UHS timings
  mmc: am654_sdhci: Add a platform specific set_control_reg() callback
  configs: am65x: Add configs to support environment in eMMC
  am65x_evm: Add Support for creating a filesystem GPT partition in eMMC
  configs: am65x_evm_a53: Add Support for creating GPT partitions

 arch/arm/dts/k3-am65-main.dtsi   |  22 ++
 arch/arm/dts/k3-am654-base-board-u-boot.dtsi |  30 +-
 arch/arm/dts/k3-am654-base-board.dts |  28 ++
 arch/arm/dts/k3-am654-r5-base-board.dts  |  25 ++
 configs/am65x_evm_a53_defconfig  |  11 +-
 configs/am65x_evm_r5_defconfig   |   4 +-
 drivers/core/regmap.c|  42 +++
 drivers/mmc/Kconfig  |   9 +-
 drivers/mmc/Makefile |   2 +-
 drivers/mmc/am654_sdhci.c| 339 +++
 drivers/mmc/k3_arsan_sdhci.c | 109 --
 drivers/mmc/sdhci.c  |  47 ++-
 drivers/mmc/xenon_sdhci.c|   4 +-
 drivers/mmc/zynq_sdhci.c |  31 +-
 include/configs/am65x_evm.h  |  19 +-
 include/regmap.h |   2 +
 include/sdhci.h  |  22 +-
 17 files changed, 561 insertions(+), 185 deletions(-)
 create mode 100644 drivers/mmc/am654_sdhci.c
 delete mode 100644 drivers/mmc/k3_arsan_sdhci.c

-- 
2.17.1

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[U-Boot] [PATCH v4 01/15] arm64: dts: k3: Sync sdhci0 node from kernel and change driver name

2019-05-23 Thread Faiz Abbas
Sync the sdhci0 node from kernel. This changes the compatible that is
required to be there in the driver. Change the same for the SD card node
which is not yet supported in kernel. This also syncs the main_pmx0 node
as a side effect.

Also change the name of the driver to match the compatible in kernel.

Signed-off-by: Faiz Abbas 
Reviewed-by: Tom Rini 
---
 arch/arm/dts/k3-am65-main.dtsi| 22 
 arch/arm/dts/k3-am654-base-board-u-boot.dtsi  | 27 ++
 arch/arm/dts/k3-am654-base-board.dts  | 28 +++
 arch/arm/dts/k3-am654-r5-base-board.dts   | 24 +
 configs/am65x_evm_a53_defconfig   |  2 +-
 configs/am65x_evm_r5_defconfig|  2 +-
 drivers/mmc/Kconfig   |  8 ++---
 drivers/mmc/Makefile  |  2 +-
 .../mmc/{k3_arsan_sdhci.c => am654_sdhci.c}   | 36 +--
 9 files changed, 102 insertions(+), 49 deletions(-)
 rename drivers/mmc/{k3_arsan_sdhci.c => am654_sdhci.c} (68%)

diff --git a/arch/arm/dts/k3-am65-main.dtsi b/arch/arm/dts/k3-am65-main.dtsi
index adcd6341e4..84fed12fbd 100644
--- a/arch/arm/dts/k3-am65-main.dtsi
+++ b/arch/arm/dts/k3-am65-main.dtsi
@@ -69,4 +69,26 @@
clock-frequency = <4800>;
current-speed = <115200>;
};
+
+   main_pmx0: pinmux@11c000 {
+   compatible = "pinctrl-single";
+   reg = <0x0 0x11c000 0x0 0x2e4>;
+   #pinctrl-cells = <1>;
+   pinctrl-single,register-width = <32>;
+   pinctrl-single,function-mask = <0x>;
+   };
+
+   sdhci0: sdhci@4f8 {
+   compatible = "ti,am654-sdhci-5.1";
+   reg = <0x0 0x4f8 0x0 0x260>, <0x0 0x4f9 0x0 0x134>;
+   power-domains = <&k3_pds 47>;
+   clocks = <&k3_clks 47 0>, <&k3_clks 47 1>;
+   clock-names = "clk_ahb", "clk_xin";
+   interrupts = ;
+   mmc-ddr-1_8v;
+   mmc-hs200-1_8v;
+   ti,otap-del-sel = <0x2>;
+   ti,trm-icp = <0x8>;
+   dma-coherent;
+   };
 };
diff --git a/arch/arm/dts/k3-am654-base-board-u-boot.dtsi 
b/arch/arm/dts/k3-am654-base-board-u-boot.dtsi
index f5c8253831..589a90f9f9 100644
--- a/arch/arm/dts/k3-am654-base-board-u-boot.dtsi
+++ b/arch/arm/dts/k3-am654-base-board-u-boot.dtsi
@@ -19,14 +19,6 @@
 &cbass_main{
u-boot,dm-spl;
 
-   main_pmx0: pinmux@11c000 {
-   compatible = "pinctrl-single";
-   reg = <0x0 0x11c000 0x0 0x2e4>;
-   #pinctrl-cells = <1>;
-   pinctrl-single,register-width = <32>;
-   pinctrl-single,function-mask = <0x>;
-   };
-
main_pmx1: pinmux@11c2e8 {
compatible = "pinctrl-single";
reg = <0x0 0x11c2e8 0x0 0x24>;
@@ -35,17 +27,8 @@
pinctrl-single,function-mask = <0x>;
};
 
-   sdhci0: sdhci@04F8 {
-   compatible = "arasan,sdhci-5.1";
-   reg = <0x0 0x4F8 0x0 0x1000>,
- <0x0 0x4F9 0x0 0x400>;
-   clocks = <&k3_clks 47 1>;
-   power-domains = <&k3_pds 47>;
-   max-frequency = <2500>;
-   };
-
sdhci1: sdhci@04FA {
-   compatible = "arasan,sdhci-5.1";
+   compatible = "ti,am654-sdhci-5.1";
reg = <0x0 0x4FA 0x0 0x1000>,
  <0x0 0x4FB 0x0 0x400>;
clocks = <&k3_clks 48 1>;
@@ -164,7 +147,8 @@
AM65X_IOPAD(0x0190, PIN_INPUT_PULLUP, 0)/* 
(A24) MMC0_DAT5 */
AM65X_IOPAD(0x018c, PIN_INPUT_PULLUP, 0)/* 
(B26) MMC0_DAT6 */
AM65X_IOPAD(0x0188, PIN_INPUT_PULLUP, 0)/* 
(D25) MMC0_DAT7 */
-   AM65X_IOPAD(0x01b0, PIN_INPUT, 0)   
/* (C25) MMC0_DS */
+   AM65X_IOPAD(0x01b4, PIN_INPUT_PULLUP, 0)/* 
(A23) MMC0_SDCD */
+   AM65X_IOPAD(0x01b0, PIN_INPUT, 0)   /* 
(C25) MMC0_DS */
>;
u-boot,dm-spl;
};
@@ -198,11 +182,6 @@
 
 &sdhci0 {
u-boot,dm-spl;
-   status = "okay";
-   non-removable;
-   bus-width = <8>;
-   pinctrl-names = "default";
-   pinctrl-0 = <&main_mmc0_pins_default>;
 };
 
 &sdhci1 {
diff --git a/arch/arm/dts/k3-am654-base-board.dts 
b/arch/arm/dts/k3-am654-base-board.dts
index af6956fdc1..ab233916c6 100644
--- a/arch/arm/dts/k3-am654-base-board.dts
+++ b/arch/arm/dts/k3-am654-base-board.dts
@@ -6,6 +6,7 @@
 /dts-v1/;
 
 #include "k3-am654.dtsi"
+#include 
 
 / {
compatible =  "ti,am654-evm", "ti,am654";
@@ -34,3 +35,30 @@
};
};
 };
+
+&main_pmx0 {
+   main_mmc0_pins_default: main_mmc0_pins_default {
+   pinctrl-single,pins = <
+  

[U-Boot] [PATCH v4 10/15] mmc: am654_sdhci: Use f_max in mmc_config

2019-05-23 Thread Faiz Abbas
Use f_max provided in mmc_config and remove it from the platform
specific data.

Signed-off-by: Faiz Abbas 
---
 drivers/mmc/am654_sdhci.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/mmc/am654_sdhci.c b/drivers/mmc/am654_sdhci.c
index ede8a02b9b..2f8ecc383d 100644
--- a/drivers/mmc/am654_sdhci.c
+++ b/drivers/mmc/am654_sdhci.c
@@ -67,7 +67,6 @@
 struct am654_sdhci_plat {
struct mmc_config cfg;
struct mmc mmc;
-   unsigned int f_max;
struct regmap *base;
bool non_removable;
u32 otap_del_sel;
@@ -199,6 +198,7 @@ static int am654_sdhci_probe(struct udevice *dev)
struct am654_sdhci_plat *plat = dev_get_platdata(dev);
struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
struct sdhci_host *host = dev_get_priv(dev);
+   struct mmc_config *cfg = &plat->cfg;
struct power_domain sdhci_pwrdmn;
struct clk clk;
unsigned long clock;
-- 
2.17.1

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[U-Boot] [PATCH v4 02/15] mmc: am654_sdhci: Remove quirks

2019-05-23 Thread Faiz Abbas
The host controller works perfectly well without having to add any
quirks. Remove them.

Signed-off-by: Faiz Abbas 
Reviewed-by: Tom Rini 
---
 drivers/mmc/am654_sdhci.c | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/drivers/mmc/am654_sdhci.c b/drivers/mmc/am654_sdhci.c
index 3afdb58293..69914deb0c 100644
--- a/drivers/mmc/am654_sdhci.c
+++ b/drivers/mmc/am654_sdhci.c
@@ -54,9 +54,6 @@ static int am654_sdhci_probe(struct udevice *dev)
return clock;
}
 
-   host->quirks = SDHCI_QUIRK_WAIT_SEND_CMD |
-  SDHCI_QUIRK_BROKEN_R1B;
-
host->max_clk = clock;
 
ret = sdhci_setup_cfg(&plat->cfg, host, plat->f_max,
-- 
2.17.1

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[U-Boot] [PATCH v4 03/15] regmap: Add API regmap_init_mem_index()

2019-05-23 Thread Faiz Abbas
In device nodes with more than one entry in the reg property,
it is sometimes useful to regmap only of the entries. Add an
API regmap_init_mem_index() to facilitate this.

Signed-off-by: Faiz Abbas 
Reviewed-by: Tom Rini 
---
 drivers/core/regmap.c | 42 ++
 include/regmap.h  |  2 ++
 2 files changed, 44 insertions(+)

diff --git a/drivers/core/regmap.c b/drivers/core/regmap.c
index 5ef0f71c8b..d1d12eef38 100644
--- a/drivers/core/regmap.c
+++ b/drivers/core/regmap.c
@@ -108,6 +108,48 @@ static int init_range(ofnode node, struct regmap_range 
*range, int addr_len,
return 0;
 }
 
+int regmap_init_mem_index(ofnode node, struct regmap **mapp, int index)
+{
+   struct regmap *map;
+   int addr_len, size_len;
+   int ret;
+
+   addr_len = ofnode_read_simple_addr_cells(ofnode_get_parent(node));
+   if (addr_len < 0) {
+   debug("%s: Error while reading the addr length (ret = %d)\n",
+ ofnode_get_name(node), addr_len);
+   return addr_len;
+   }
+
+   size_len = ofnode_read_simple_size_cells(ofnode_get_parent(node));
+   if (size_len < 0) {
+   debug("%s: Error while reading the size length: (ret = %d)\n",
+ ofnode_get_name(node), size_len);
+   return size_len;
+   }
+
+   map = regmap_alloc(1);
+   if (!map)
+   return -ENOMEM;
+
+   ret = init_range(node, map->ranges, addr_len, size_len, index);
+   if (ret)
+   return ret;
+
+   if (ofnode_read_bool(node, "little-endian"))
+   map->endianness = REGMAP_LITTLE_ENDIAN;
+   else if (ofnode_read_bool(node, "big-endian"))
+   map->endianness = REGMAP_BIG_ENDIAN;
+   else if (ofnode_read_bool(node, "native-endian"))
+   map->endianness = REGMAP_NATIVE_ENDIAN;
+   else /* Default: native endianness */
+   map->endianness = REGMAP_NATIVE_ENDIAN;
+
+   *mapp = map;
+
+   return ret;
+}
+
 int regmap_init_mem(ofnode node, struct regmap **mapp)
 {
struct regmap_range *range;
diff --git a/include/regmap.h b/include/regmap.h
index 3cd7a66cea..0854200a9c 100644
--- a/include/regmap.h
+++ b/include/regmap.h
@@ -330,6 +330,8 @@ int regmap_init_mem(ofnode node, struct regmap **mapp);
 int regmap_init_mem_platdata(struct udevice *dev, fdt_val_t *reg, int count,
 struct regmap **mapp);
 
+int regmap_init_mem_index(ofnode node, struct regmap **mapp, int index);
+
 /**
  * regmap_get_range() - Obtain the base memory address of a regmap range
  *
-- 
2.17.1

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[U-Boot] [PATCH v4 08/15] mmc: am654_sdhci: Add Support for PHY

2019-05-23 Thread Faiz Abbas
Add support in the driver for handling phy specific registers.

Signed-off-by: Faiz Abbas 
Reviewed-by: Tom Rini 
---
 drivers/mmc/Kconfig   |   1 +
 drivers/mmc/am654_sdhci.c | 229 +-
 2 files changed, 224 insertions(+), 6 deletions(-)

diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig
index 0062ad1bb9..41e8a270d8 100644
--- a/drivers/mmc/Kconfig
+++ b/drivers/mmc/Kconfig
@@ -458,6 +458,7 @@ config MMC_SDHCI_AM654
depends on ARCH_K3
depends on MMC_SDHCI
depends on DM_MMC && OF_CONTROL && BLK
+   depends on REGMAP
help
  Support for Secure Digital Host Controller Interface (SDHCI)
  controllers present on TI's AM654 SOCs.
diff --git a/drivers/mmc/am654_sdhci.c b/drivers/mmc/am654_sdhci.c
index 69914deb0c..ede8a02b9b 100644
--- a/drivers/mmc/am654_sdhci.c
+++ b/drivers/mmc/am654_sdhci.c
@@ -10,16 +10,190 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 
+/* CTL_CFG Registers */
+#define CTL_CFG_2  0x14
+
+#define SLOTTYPE_MASK  GENMASK(31, 30)
+#define SLOTTYPE_EMBEDDED  BIT(30)
+
+/* PHY Registers */
+#define PHY_CTRL1  0x100
+#define PHY_CTRL2  0x104
+#define PHY_CTRL3  0x108
+#define PHY_CTRL4  0x10C
+#define PHY_CTRL5  0x110
+#define PHY_CTRL6  0x114
+#define PHY_STAT1  0x130
+#define PHY_STAT2  0x134
+
+#define IOMUX_ENABLE_SHIFT 31
+#define IOMUX_ENABLE_MASK  BIT(IOMUX_ENABLE_SHIFT)
+#define OTAPDLYENA_SHIFT   20
+#define OTAPDLYENA_MASKBIT(OTAPDLYENA_SHIFT)
+#define OTAPDLYSEL_SHIFT   12
+#define OTAPDLYSEL_MASKGENMASK(15, 12)
+#define STRBSEL_SHIFT  24
+#define STRBSEL_MASK   GENMASK(27, 24)
+#define SEL50_SHIFT8
+#define SEL50_MASK BIT(SEL50_SHIFT)
+#define SEL100_SHIFT   9
+#define SEL100_MASKBIT(SEL100_SHIFT)
+#define DLL_TRIM_ICP_SHIFT 4
+#define DLL_TRIM_ICP_MASK  GENMASK(7, 4)
+#define DR_TY_SHIFT20
+#define DR_TY_MASK GENMASK(22, 20)
+#define ENDLL_SHIFT1
+#define ENDLL_MASK BIT(ENDLL_SHIFT)
+#define DLLRDY_SHIFT   0
+#define DLLRDY_MASKBIT(DLLRDY_SHIFT)
+#define PDB_SHIFT  0
+#define PDB_MASK   BIT(PDB_SHIFT)
+#define CALDONE_SHIFT  1
+#define CALDONE_MASK   BIT(CALDONE_SHIFT)
+#define RETRIM_SHIFT   17
+#define RETRIM_MASKBIT(RETRIM_SHIFT)
+
+#define DRIVER_STRENGTH_50_OHM 0x0
+#define DRIVER_STRENGTH_33_OHM 0x1
+#define DRIVER_STRENGTH_66_OHM 0x2
+#define DRIVER_STRENGTH_100_OHM0x3
+#define DRIVER_STRENGTH_40_OHM 0x4
+
 #define AM654_SDHCI_MIN_FREQ   40
 
 struct am654_sdhci_plat {
struct mmc_config cfg;
struct mmc mmc;
unsigned int f_max;
+   struct regmap *base;
+   bool non_removable;
+   u32 otap_del_sel;
+   u32 trm_icp;
+   u32 drv_strength;
+   bool dll_on;
 };
 
+static int am654_sdhci_set_ios_post(struct sdhci_host *host)
+{
+   struct udevice *dev = host->mmc->dev;
+   struct am654_sdhci_plat *plat = dev_get_platdata(dev);
+   unsigned int speed = host->mmc->clock;
+   int sel50, sel100;
+   u32 mask, val;
+   int ret;
+
+   /* Reset SD Clock Enable */
+   val = sdhci_readw(host, SDHCI_CLOCK_CONTROL);
+   val &= ~SDHCI_CLOCK_CARD_EN;
+   sdhci_writew(host, val, SDHCI_CLOCK_CONTROL);
+
+   /* power off phy */
+   if (plat->dll_on) {
+   regmap_update_bits(plat->base, PHY_CTRL1, ENDLL_MASK, 0);
+
+   plat->dll_on = false;
+   }
+
+   /* restart clock */
+   sdhci_set_clock(host->mmc, speed);
+
+   /* switch phy back on */
+   if (speed > AM654_SDHCI_MIN_FREQ) {
+   mask = OTAPDLYENA_MASK | OTAPDLYSEL_MASK;
+   val = (1 << OTAPDLYENA_SHIFT) |
+ (plat->otap_del_sel << OTAPDLYSEL_SHIFT);
+   regmap_update_bits(plat->base, PHY_CTRL4,
+  mask, val);
+   switch (speed) {
+   case 2:
+   sel50 = 0;
+   sel100 = 0;
+   break;
+   case 1:
+   sel50 = 0;
+   sel100 = 1;
+   break;
+   default:
+   sel50 = 1;
+   sel100 = 0;
+   }
+
+   /* Configure PHY DLL frequency */
+   mask = SEL50_MASK | SEL100_MASK;
+   val = (sel50 << SEL50_SHIFT) | (sel100 << SEL100_SHIFT);
+   regmap_update_bits(plat->base, PHY_CTRL5,
+  mask, val);
+   /* Configure DLL TRIM */
+   mask = DLL_TRIM_ICP_MASK;
+   val = plat->trm_icp << DLL_TRIM_ICP_SHIFT;
+
+   /* Configure DLL driver strength */
+   mask |= DR_TY_

[U-Boot] [PATCH v4 07/15] mmc: sdhci: Make set_ios_post() return int

2019-05-23 Thread Faiz Abbas
Make set_ios_post() return int to faciliate error handling in
platform drivers.

Signed-off-by: Faiz Abbas 
---
 drivers/mmc/sdhci.c   | 2 +-
 drivers/mmc/xenon_sdhci.c | 4 +++-
 include/sdhci.h   | 2 +-
 3 files changed, 5 insertions(+), 3 deletions(-)

diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c
index 4646dbec9f..75e6567631 100644
--- a/drivers/mmc/sdhci.c
+++ b/drivers/mmc/sdhci.c
@@ -583,7 +583,7 @@ static int sdhci_set_ios(struct mmc *mmc)
 
/* If available, call the driver specific "post" set_ios() function */
if (host->ops && host->ops->set_ios_post)
-   host->ops->set_ios_post(host);
+   return host->ops->set_ios_post(host);
 
return 0;
 }
diff --git a/drivers/mmc/xenon_sdhci.c b/drivers/mmc/xenon_sdhci.c
index b576511338..829b75683b 100644
--- a/drivers/mmc/xenon_sdhci.c
+++ b/drivers/mmc/xenon_sdhci.c
@@ -326,7 +326,7 @@ static void xenon_mask_cmd_conflict_err(struct sdhci_host 
*host)
 }
 
 /* Platform specific function for post set_ios configuration */
-static void xenon_sdhci_set_ios_post(struct sdhci_host *host)
+static int xenon_sdhci_set_ios_post(struct sdhci_host *host)
 {
struct xenon_sdhci_priv *priv = host->mmc->priv;
uint speed = host->mmc->tran_speed;
@@ -364,6 +364,8 @@ static void xenon_sdhci_set_ios_post(struct sdhci_host 
*host)
 
/* Re-init the PHY */
xenon_mmc_phy_set(host);
+
+   return 0;
 }
 
 /* Install a driver specific handler for post set_ios configuration */
diff --git a/include/sdhci.h b/include/sdhci.h
index 820cd16e92..3dcbc14965 100644
--- a/include/sdhci.h
+++ b/include/sdhci.h
@@ -247,7 +247,7 @@ struct sdhci_ops {
 #endif
int (*get_cd)(struct sdhci_host *host);
void(*set_control_reg)(struct sdhci_host *host);
-   void(*set_ios_post)(struct sdhci_host *host);
+   int (*set_ios_post)(struct sdhci_host *host);
void(*set_clock)(struct sdhci_host *host, u32 div);
int (*platform_execute_tuning)(struct mmc *host, u8 opcode);
void (*set_delay)(struct sdhci_host *host);
-- 
2.17.1

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[U-Boot] [PATCH v4 06/15] arm: dts: k3: Add phy specific properties to SD card node

2019-05-23 Thread Faiz Abbas
With changes in the driver requiring phy related properties,
add the same for the SD card node to prevent breaking boot with
the driver update.

Signed-off-by: Faiz Abbas 
Reviewed-by: Tom Rini 
---
 arch/arm/dts/k3-am654-base-board-u-boot.dtsi | 3 +++
 arch/arm/dts/k3-am654-r5-base-board.dts  | 1 +
 2 files changed, 4 insertions(+)

diff --git a/arch/arm/dts/k3-am654-base-board-u-boot.dtsi 
b/arch/arm/dts/k3-am654-base-board-u-boot.dtsi
index 589a90f9f9..c43888f36d 100644
--- a/arch/arm/dts/k3-am654-base-board-u-boot.dtsi
+++ b/arch/arm/dts/k3-am654-base-board-u-boot.dtsi
@@ -34,6 +34,8 @@
clocks = <&k3_clks 48 1>;
power-domains = <&k3_pds 48>;
max-frequency = <2500>;
+   ti,otap-del-sel = <0x2>;
+   ti,trm-icp = <0x8>;
};
 
 };
@@ -190,4 +192,5 @@
pinctrl-names = "default";
pinctrl-0 = <&main_mmc1_pins_default>;
sdhci-caps-mask = <0x7 0x0>;
+   ti,driver-strength-ohm = <50>;
 };
diff --git a/arch/arm/dts/k3-am654-r5-base-board.dts 
b/arch/arm/dts/k3-am654-r5-base-board.dts
index 56eae4f971..7114df3d79 100644
--- a/arch/arm/dts/k3-am654-r5-base-board.dts
+++ b/arch/arm/dts/k3-am654-r5-base-board.dts
@@ -184,4 +184,5 @@
clock-names = "clk_xin";
clocks = <&clk_200mhz>;
/delete-property/ power-domains;
+   ti,driver-strength-ohm = <50>;
 };
-- 
2.17.1

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[U-Boot] [PATCH v4 12/15] mmc: am654_sdhci: Add a platform specific set_control_reg() callback

2019-05-23 Thread Faiz Abbas
From: Faiz Abbas 

Add a platform specific set_control_reg() callback to help switch to
UHS speed modes.

Signed-off-by: Faiz Abbas 
Reviewed-by: Tom Rini 
---
 drivers/mmc/am654_sdhci.c | 18 +-
 1 file changed, 17 insertions(+), 1 deletion(-)

diff --git a/drivers/mmc/am654_sdhci.c b/drivers/mmc/am654_sdhci.c
index 2f8ecc383d..f1f27e4add 100644
--- a/drivers/mmc/am654_sdhci.c
+++ b/drivers/mmc/am654_sdhci.c
@@ -75,6 +75,21 @@ struct am654_sdhci_plat {
bool dll_on;
 };
 
+static void am654_sdhci_set_control_reg(struct sdhci_host *host)
+{
+   struct mmc *mmc = (struct mmc *)host->mmc;
+   u32 reg;
+
+   if (IS_SD(host->mmc) &&
+   mmc->signal_voltage == MMC_SIGNAL_VOLTAGE_180) {
+   reg = sdhci_readw(host, SDHCI_HOST_CONTROL2);
+   reg |= SDHCI_CTRL_VDD_180;
+   sdhci_writew(host, reg, SDHCI_HOST_CONTROL2);
+   }
+
+   sdhci_set_uhs_timing(host);
+}
+
 static int am654_sdhci_set_ios_post(struct sdhci_host *host)
 {
struct udevice *dev = host->mmc->dev;
@@ -155,7 +170,8 @@ static int am654_sdhci_set_ios_post(struct sdhci_host *host)
 }
 
 const struct sdhci_ops am654_sdhci_ops = {
-   .set_ios_post = &am654_sdhci_set_ios_post,
+   .set_ios_post   = &am654_sdhci_set_ios_post,
+   .set_control_reg= &am654_sdhci_set_control_reg,
 };
 
 int am654_sdhci_init(struct am654_sdhci_plat *plat)
-- 
2.17.1

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[U-Boot] [PATCH v4 05/15] mmc: sdhci: Make sdhci_set_clock() non static

2019-05-23 Thread Faiz Abbas
The am654_sdhci driver needs to switch the clock off
before disabling its phy dll and needs to re-enable
the clock before enabling the phy again.

Therefore, make the sdhci_set_clock() function accessible
in the am654_sdhci driver.

Signed-off-by: Faiz Abbas 
Reviewed-by: Tom Rini 
---
 drivers/mmc/sdhci.c | 2 +-
 include/sdhci.h | 1 +
 2 files changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c
index fa6bb0a944..4646dbec9f 100644
--- a/drivers/mmc/sdhci.c
+++ b/drivers/mmc/sdhci.c
@@ -409,7 +409,7 @@ static int sdhci_execute_tuning(struct udevice *dev, uint 
opcode)
return 0;
 }
 #endif
-static int sdhci_set_clock(struct mmc *mmc, unsigned int clock)
+int sdhci_set_clock(struct mmc *mmc, unsigned int clock)
 {
struct sdhci_host *host = mmc->priv;
unsigned int div, clk = 0, timeout;
diff --git a/include/sdhci.h b/include/sdhci.h
index eee493ab5f..820cd16e92 100644
--- a/include/sdhci.h
+++ b/include/sdhci.h
@@ -470,6 +470,7 @@ int add_sdhci(struct sdhci_host *host, u32 f_max, u32 
f_min);
 #ifdef CONFIG_DM_MMC
 /* Export the operations to drivers */
 int sdhci_probe(struct udevice *dev);
+int sdhci_set_clock(struct mmc *mmc, unsigned int clock);
 extern const struct dm_mmc_ops sdhci_ops;
 #else
 #endif
-- 
2.17.1

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[U-Boot] [PATCH v4 04/15] mmc: sdhci: Add support for sdhci-caps-mask

2019-05-23 Thread Faiz Abbas
Add Support for masking some bits in the capabilities
register of a host controller.

Also remove the redundant readl() into caps1.

Signed-off-by: Faiz Abbas 
Reviewed-by: Tom Rini 
---
 drivers/mmc/sdhci.c | 15 ++-
 1 file changed, 10 insertions(+), 5 deletions(-)

diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c
index e2bb90abbd..fa6bb0a944 100644
--- a/drivers/mmc/sdhci.c
+++ b/drivers/mmc/sdhci.c
@@ -8,6 +8,7 @@
  */
 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -643,8 +644,15 @@ int sdhci_setup_cfg(struct mmc_config *cfg, struct 
sdhci_host *host,
u32 f_max, u32 f_min)
 {
u32 caps, caps_1 = 0;
+   u32 mask[2] = {0};
+   int ret;
+
+   ret = dev_read_u32_array(host->mmc->dev, "sdhci-caps-mask",
+mask, 2);
+   if (ret && ret != -1)
+   return ret;
 
-   caps = sdhci_readl(host, SDHCI_CAPABILITIES);
+   caps = ~mask[1] & sdhci_readl(host, SDHCI_CAPABILITIES);
 
 #ifdef CONFIG_MMC_SDHCI_SDMA
if (!(caps & SDHCI_CAN_DO_SDMA)) {
@@ -684,7 +692,7 @@ int sdhci_setup_cfg(struct mmc_config *cfg, struct 
sdhci_host *host,
 
/* Check whether the clock multiplier is supported or not */
if (SDHCI_GET_VERSION(host) >= SDHCI_SPEC_300) {
-   caps_1 = sdhci_readl(host, SDHCI_CAPABILITIES_1);
+   caps_1 = ~mask[0] & sdhci_readl(host, SDHCI_CAPABILITIES_1);
host->clk_mul = (caps_1 & SDHCI_CLOCK_MUL_MASK) >>
SDHCI_CLOCK_MUL_SHIFT;
}
@@ -741,9 +749,6 @@ int sdhci_setup_cfg(struct mmc_config *cfg, struct 
sdhci_host *host,
cfg->host_caps &= ~MMC_MODE_HS_52MHz;
}
 
-   if (SDHCI_GET_VERSION(host) >= SDHCI_SPEC_300)
-   caps_1 = sdhci_readl(host, SDHCI_CAPABILITIES_1);
-
if (!(cfg->voltages & MMC_VDD_165_195) ||
(host->quirks & SDHCI_QUIRK_NO_1_8_V))
caps_1 &= ~(SDHCI_SUPPORT_SDR104 | SDHCI_SUPPORT_SDR50 |
-- 
2.17.1

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[U-Boot] [PATCH v4 14/15] am65x_evm: Add Support for creating a filesystem GPT partition in eMMC

2019-05-23 Thread Faiz Abbas
Add Support for creating a GPT partition for the filesystem in eMMC.
The filesystem is created in the user partition (partition 0).

Signed-off-by: Faiz Abbas 
---
 include/configs/am65x_evm.h | 9 +++--
 1 file changed, 7 insertions(+), 2 deletions(-)

diff --git a/include/configs/am65x_evm.h b/include/configs/am65x_evm.h
index 0bf82b853e..ea365b979b 100644
--- a/include/configs/am65x_evm.h
+++ b/include/configs/am65x_evm.h
@@ -58,6 +58,10 @@
 
 #define CONFIG_SYS_BOOTM_LEN   SZ_64M
 
+#define PARTS_DEFAULT \
+   /* Linux partitions */ \
+   "name=rootfs,start=0,size=-,uuid=${uuid_gpt_rootfs}\0"
+
 /* U-Boot general configuration */
 #define EXTRA_ENV_AM65X_BOARD_SETTINGS \
"findfdt="  \
@@ -72,7 +76,7 @@
"name_kern=Image\0" \
"console=ttyS2,115200n8\0"  \
"args_all=setenv optargs earlycon=ns16550a,mmio32,0x0280\0" \
-   "run_kern=booti ${loadaddr} ${rd_spec} ${fdtaddr}\0"
+   "run_kern=booti ${loadaddr} ${rd_spec} ${fdtaddr}\0"\
 
 /* U-Boot MMC-specific configuration */
 #define EXTRA_ENV_AM65X_BOARD_SETTINGS_MMC \
@@ -84,7 +88,8 @@
"init_mmc=run args_all args_mmc\0"  \
"get_fdt_mmc=load mmc ${bootpart} ${fdtaddr} ${bootdir}/${name_fdt}\0" \
"get_kern_mmc=load mmc ${bootpart} ${loadaddr} "\
-   "${bootdir}/${name_kern}\0"
+   "${bootdir}/${name_kern}\0" \
+   "partitions=" PARTS_DEFAULT
 
 /* Incorporate settings into the U-Boot environment */
 #define CONFIG_EXTRA_ENV_SETTINGS  \
-- 
2.17.1

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[U-Boot] [PATCH v4 09/15] configs: am65x_evm: Enable CONFIG_REGMAP

2019-05-23 Thread Faiz Abbas
Add Support for CONFIG_REGMAP.

Signed-off-by: Faiz Abbas 
Reviewed-by: Tom Rini 
---
 configs/am65x_evm_a53_defconfig | 2 ++
 configs/am65x_evm_r5_defconfig  | 2 ++
 2 files changed, 4 insertions(+)

diff --git a/configs/am65x_evm_a53_defconfig b/configs/am65x_evm_a53_defconfig
index ff41d66e4d..3f6cf7e6b3 100644
--- a/configs/am65x_evm_a53_defconfig
+++ b/configs/am65x_evm_a53_defconfig
@@ -47,6 +47,8 @@ CONFIG_ENV_FAT_DEVICE_AND_PART="1:1"
 CONFIG_DM=y
 CONFIG_SPL_DM=y
 CONFIG_SPL_DM_SEQ_ALIAS=y
+CONFIG_REGMAP=y
+CONFIG_SPL_REGMAP=y
 CONFIG_CLK=y
 CONFIG_SPL_CLK=y
 CONFIG_CLK_TI_SCI=y
diff --git a/configs/am65x_evm_r5_defconfig b/configs/am65x_evm_r5_defconfig
index 6caed51939..fe96c9801e 100644
--- a/configs/am65x_evm_r5_defconfig
+++ b/configs/am65x_evm_r5_defconfig
@@ -51,6 +51,8 @@ CONFIG_ENV_FAT_DEVICE_AND_PART="1:1"
 CONFIG_DM=y
 CONFIG_SPL_DM=y
 CONFIG_SPL_DM_SEQ_ALIAS=y
+CONFIG_REGMAP=y
+CONFIG_SPL_REGMAP=y
 CONFIG_SPL_OF_TRANSLATE=y
 CONFIG_CLK=y
 CONFIG_SPL_CLK=y
-- 
2.17.1

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[U-Boot] [PATCH v4 13/15] configs: am65x: Add configs to support environment in eMMC

2019-05-23 Thread Faiz Abbas
Add configs such that U-boot environment is in eMMC by default.

Signed-off-by: Faiz Abbas 
---
 configs/am65x_evm_a53_defconfig |  5 ++---
 include/configs/am65x_evm.h | 10 ++
 2 files changed, 12 insertions(+), 3 deletions(-)

diff --git a/configs/am65x_evm_a53_defconfig b/configs/am65x_evm_a53_defconfig
index 3f6cf7e6b3..5fd9aacd68 100644
--- a/configs/am65x_evm_a53_defconfig
+++ b/configs/am65x_evm_a53_defconfig
@@ -41,9 +41,7 @@ CONFIG_SPL_OF_CONTROL=y
 CONFIG_DEFAULT_DEVICE_TREE="k3-am654-base-board"
 CONFIG_SPL_MULTI_DTB_FIT=y
 CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y
-CONFIG_ENV_IS_IN_FAT=y
-CONFIG_ENV_FAT_INTERFACE="mmc"
-CONFIG_ENV_FAT_DEVICE_AND_PART="1:1"
+CONFIG_ENV_IS_IN_MMC=y
 CONFIG_DM=y
 CONFIG_SPL_DM=y
 CONFIG_SPL_DM_SEQ_ALIAS=y
@@ -76,3 +74,4 @@ CONFIG_SOC_TI=y
 CONFIG_SYSRESET=y
 CONFIG_SPL_SYSRESET=y
 CONFIG_SYSRESET_TI_SCI=y
+CONFIG_FAT_WRITE=y
diff --git a/include/configs/am65x_evm.h b/include/configs/am65x_evm.h
index a90f38edc9..0bf82b853e 100644
--- a/include/configs/am65x_evm.h
+++ b/include/configs/am65x_evm.h
@@ -92,6 +92,16 @@
EXTRA_ENV_AM65X_BOARD_SETTINGS  \
EXTRA_ENV_AM65X_BOARD_SETTINGS_MMC
 
+/* MMC ENV related defines */
+#ifdef CONFIG_ENV_IS_IN_MMC
+#define CONFIG_SYS_MMC_ENV_DEV 0
+#define CONFIG_SYS_MMC_ENV_PART1
+#define CONFIG_ENV_SIZE(128 << 10)
+#define CONFIG_ENV_OFFSET  0x68
+#define CONFIG_ENV_OFFSET_REDUND   (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
+#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
+#endif
+
 /* Now for the remaining common defines */
 #include 
 
-- 
2.17.1

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[U-Boot] [PATCH v4 15/15] configs: am65x_evm_a53: Add Support for creating GPT partitions

2019-05-23 Thread Faiz Abbas
Add Support for creating GPT partitions in U-boot.

Signed-off-by: Faiz Abbas 
---
 configs/am65x_evm_a53_defconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/configs/am65x_evm_a53_defconfig b/configs/am65x_evm_a53_defconfig
index 5fd9aacd68..43d2ccc5ed 100644
--- a/configs/am65x_evm_a53_defconfig
+++ b/configs/am65x_evm_a53_defconfig
@@ -30,12 +30,12 @@ CONFIG_SPL_REMOTEPROC=y
 CONFIG_SPL_YMODEM_SUPPORT=y
 CONFIG_CMD_ASKENV=y
 # CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPT=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_REMOTEPROC=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_TIME=y
 # CONFIG_ISO_PARTITION is not set
-# CONFIG_EFI_PARTITION is not set
 CONFIG_OF_CONTROL=y
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_DEFAULT_DEVICE_TREE="k3-am654-base-board"
-- 
2.17.1

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[U-Boot] [PATCH v4 11/15] mmc: sdhci: Add support for HOST_CONTROL2 and setting UHS timings

2019-05-23 Thread Faiz Abbas
From: Faiz Abbas 

The HOST_CONTROL2 register is a part of SDHC v3.00 and not just specific
to arasan/zynq controllers. Add the same to sdhci.h.

Also create a common API to set UHS timings in HOST_CONTROL2.

Signed-off-by: Faiz Abbas 
Reviewed-by: Tom Rini 
---
 drivers/mmc/sdhci.c  | 28 
 drivers/mmc/zynq_sdhci.c | 31 ++-
 include/sdhci.h  | 19 ++-
 3 files changed, 48 insertions(+), 30 deletions(-)

diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c
index 75e6567631..79edb18fe5 100644
--- a/drivers/mmc/sdhci.c
+++ b/drivers/mmc/sdhci.c
@@ -533,6 +533,34 @@ static void sdhci_set_power(struct sdhci_host *host, 
unsigned short power)
sdhci_writeb(host, pwr, SDHCI_POWER_CONTROL);
 }
 
+void sdhci_set_uhs_timing(struct sdhci_host *host)
+{
+   struct mmc *mmc = (struct mmc *)host->mmc;
+   u32 reg;
+
+   reg = sdhci_readw(host, SDHCI_HOST_CONTROL2);
+   reg &= ~SDHCI_CTRL_UHS_MASK;
+
+   switch (mmc->selected_mode) {
+   case UHS_SDR50:
+   case MMC_HS_52:
+   reg |= SDHCI_CTRL_UHS_SDR50;
+   break;
+   case UHS_DDR50:
+   case MMC_DDR_52:
+   reg |= SDHCI_CTRL_UHS_DDR50;
+   break;
+   case UHS_SDR104:
+   case MMC_HS_200:
+   reg |= SDHCI_CTRL_UHS_SDR104;
+   break;
+   default:
+   reg |= SDHCI_CTRL_UHS_SDR12;
+   }
+
+   sdhci_writew(host, reg, SDHCI_HOST_CONTROL2);
+}
+
 #ifdef CONFIG_DM_MMC
 static int sdhci_set_ios(struct udevice *dev)
 {
diff --git a/drivers/mmc/zynq_sdhci.c b/drivers/mmc/zynq_sdhci.c
index 08023783de..b39e1d7a19 100644
--- a/drivers/mmc/zynq_sdhci.c
+++ b/drivers/mmc/zynq_sdhci.c
@@ -48,11 +48,6 @@ static const u8 mode2timing[] = {
[MMC_HS_200] = MMC_HS200_BUS_SPEED,
 };
 
-#define SDHCI_HOST_CTRL2   0x3E
-#define SDHCI_CTRL2_MODE_MASK  0x7
-#define SDHCI_18V_SIGNAL   0x8
-#define SDHCI_CTRL_EXEC_TUNING 0x0040
-#define SDHCI_CTRL_TUNED_CLK   0x80
 #define SDHCI_TUNING_LOOP_COUNT40
 
 static void arasan_zynqmp_dll_reset(struct sdhci_host *host, u8 deviceid)
@@ -190,30 +185,8 @@ static void arasan_sdhci_set_control_reg(struct sdhci_host 
*host)
}
 
if (mmc->selected_mode > SD_HS &&
-   mmc->selected_mode <= UHS_DDR50) {
-   reg = sdhci_readw(host, SDHCI_HOST_CTRL2);
-   reg &= ~SDHCI_CTRL2_MODE_MASK;
-   switch (mmc->selected_mode) {
-   case UHS_SDR12:
-   reg |= UHS_SDR12_BUS_SPEED;
-   break;
-   case UHS_SDR25:
-   reg |= UHS_SDR25_BUS_SPEED;
-   break;
-   case UHS_SDR50:
-   reg |= UHS_SDR50_BUS_SPEED;
-   break;
-   case UHS_SDR104:
-   reg |= UHS_SDR104_BUS_SPEED;
-   break;
-   case UHS_DDR50:
-   reg |= UHS_DDR50_BUS_SPEED;
-   break;
-   default:
-   break;
-   }
-   sdhci_writew(host, reg, SDHCI_HOST_CTRL2);
-   }
+   mmc->selected_mode <= UHS_DDR50)
+   sdhci_set_uhs_timing(host);
 }
 #endif
 
diff --git a/include/sdhci.h b/include/sdhci.h
index 3dcbc14965..01addb7a60 100644
--- a/include/sdhci.h
+++ b/include/sdhci.h
@@ -144,7 +144,23 @@
 
 #define SDHCI_ACMD12_ERR   0x3C
 
-/* 3E-3F reserved */
+#define SDHCI_HOST_CONTROL20x3E
+#define  SDHCI_CTRL_UHS_MASK   0x0007
+#define  SDHCI_CTRL_UHS_SDR12  0x
+#define  SDHCI_CTRL_UHS_SDR25  0x0001
+#define  SDHCI_CTRL_UHS_SDR50  0x0002
+#define  SDHCI_CTRL_UHS_SDR104 0x0003
+#define  SDHCI_CTRL_UHS_DDR50  0x0004
+#define  SDHCI_CTRL_HS400  0x0005 /* Non-standard */
+#define  SDHCI_CTRL_VDD_1800x0008
+#define  SDHCI_CTRL_DRV_TYPE_MASK  0x0030
+#define  SDHCI_CTRL_DRV_TYPE_B 0x
+#define  SDHCI_CTRL_DRV_TYPE_A 0x0010
+#define  SDHCI_CTRL_DRV_TYPE_C 0x0020
+#define  SDHCI_CTRL_DRV_TYPE_D 0x0030
+#define  SDHCI_CTRL_EXEC_TUNING0x0040
+#define  SDHCI_CTRL_TUNED_CLK  0x0080
+#define  SDHCI_CTRL_PRESET_VAL_ENABLE  0x8000
 
 #define SDHCI_CAPABILITIES 0x40
 #define  SDHCI_TIMEOUT_CLK_MASK0x003F
@@ -467,6 +483,7 @@ int sdhci_bind(struct udevice *dev, struct mmc *mmc, struct 
mmc_config *cfg);
 int add_sdhci(struct sdhci_host *host, u32 f_max, u32 f_min);
 #endif /* !CONFIG_BLK */
 
+void sdhci_set_uhs_timing(struct sdhci_host *host);
 #ifdef CONFIG_DM_MMC
 /* Export the operations to drivers */
 int sdhci_probe(struct udevice *dev);
-- 
2.17.1

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Re: [U-Boot] Cannot boot mx6qsabred with 2019.07-rc2

2019-05-23 Thread Fabio Estevam
Hi Schrempf,

On Thu, May 23, 2019 at 2:26 PM Schrempf Frieder
 wrote:

> As luck would have it, I needed to load a FIT via SDP today, so I came
> up with a quick patch (see below). There are probably better ways to do
> this, but it works.

Thanks for your patch!

I would like to give it a try, but it does not apply against U-Boot mainline.

I manually applied it, but failed to build:

cmd/usb_gadget_sdp.c: In function ‘do_sdp’:
cmd/usb_gadget_sdp.c:35:2: error: too few arguments to function ‘sdp_handle’
  sdp_handle(controller_index);

Could you please rebase it against U-Boot mainline and post it like a
formal patch?

Thanks
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Re: [U-Boot] Please pull u-boot-dm

2019-05-23 Thread Tom Rini
On Wed, May 22, 2019 at 07:13:24AM -0600, Simon Glass wrote:

> Hi Tom,
> 
> Results here:
> 
> https://travis-ci.org/sglass68/u-boot/builds/535552345
> 
> The following changes since commit e1a2ed7180adeefb6164239a18249dca5701319d:
> 
>   Merge git://git.denx.de/u-boot-mpc83xx (2019-05-21 07:13:35 -0400)
> 
> are available in the Git repository at:
> 
>   git://git.denx.de/u-boot-dm.git tags/dm-pull-22may19
> 
> for you to fetch changes up to ee730a7cd2afe445e53e92b5c37396a5b118f7af:
> 
>   dm: core: Fix dm_extended_scan_fdt() (2019-05-21 17:33:23 -0600)
> 

Applied to u-boot/master, thanks!

-- 
Tom


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Re: [U-Boot] Cannot boot mx6qsabred with 2019.07-rc2

2019-05-23 Thread Marek Vasut
On 5/23/19 4:50 PM, Tom Rini wrote:
> On Thu, May 23, 2019 at 04:47:59PM +0200, Michael Nazzareno Trimarchi wrote:
>> Hi
>>
>> On Thu, May 23, 2019 at 4:33 PM Tom Rini  wrote:
>>>
>>> On Thu, May 23, 2019 at 02:08:23PM +, Abel Vesa wrote:
 On 19-05-23 09:59:05, Tom Rini wrote:
> On Thu, May 23, 2019 at 10:49:11AM -0300, Fabio Estevam wrote:
>> Hi Peng,
>>
>> On Tue, May 21, 2019 at 10:38 PM Peng Fan  wrote:
>>
 I will send a v2 removing CONFIG_SPL_DM.
>>>
>>> So what is the real direction moving to use SPL driver, non-dm is 
>>> allowed in future?
>>
>> We are very limited in space when CONFIG_SPL_DM is used on imx6q-sabresd.
>>
>> With CONFIG_SPL_DM selected the size increase due to the three dtb's
>> is about 8kB.
>>
>> Even with CONFIG_SPL_DM disabled we ony have 1kB of free space, so I
>> still want to optimize the size further.
>
> So with CONFIG_SPL_DM we're overflowing by ~7kB?

 Well, the mandatory requirements here are as follow (AFAIK):
 1. keep one binary for all imx6dl imx6[qp|dl|q]-sabresd
 2. have DM support in SPL

 So I guess we have to either prioritize the other needed configs and
 leave out the one we can do without. That, ofcourse, if we still want
 to fit in and we still want one binary for all three sabresd boards.
>>>
>>> Well, no, you don't have to use DM in SPL.  But what I'm wondering is if
>>> we need qp/dl/q specific information at the SPL stage or if that can
>>> wait until we're doing the real U-Boot.
>>
>> Is dcd table take space?
> 
> The DCD table is included in that hard size limit, but yes, if there's
> QP/DL/Q specific stuff that we could handle via the plugin mechanism or
> similar, that might be part of the solution.

You do need Q/DL/S specific stuff in SPL for e.g. pinmux .
And you want to minimize the DCD table and move all that logic into SPL,
since the DCD is rather limited.

-- 
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Marek Vasut
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Re: [U-Boot] Cannot boot mx6qsabred with 2019.07-rc2

2019-05-23 Thread Marek Vasut
On 5/23/19 5:17 PM, Tom Rini wrote:
> On Thu, May 23, 2019 at 04:04:17PM +0200, Marek Vasut wrote:
>> On 5/23/19 3:59 PM, Tom Rini wrote:
>>> On Thu, May 23, 2019 at 10:49:11AM -0300, Fabio Estevam wrote:
 Hi Peng,

 On Tue, May 21, 2019 at 10:38 PM Peng Fan  wrote:

>> I will send a v2 removing CONFIG_SPL_DM.
>
> So what is the real direction moving to use SPL driver, non-dm is allowed 
> in future?

 We are very limited in space when CONFIG_SPL_DM is used on imx6q-sabresd.

 With CONFIG_SPL_DM selected the size increase due to the three dtb's
 is about 8kB.

 Even with CONFIG_SPL_DM disabled we ony have 1kB of free space, so I
 still want to optimize the size further.
>>>
>>> So with CONFIG_SPL_DM we're overflowing by ~7kB?
>>>
 Two options that I want also to remove are:

 CONFIG_SPL_FS_EXT4=y
 CONFIG_SPL_I2C_SUPPORT=y

 We are at -rc2 now, and I would really like to have mx6sabresd booting 
 again.

 Please check my v2 series and see if it looks good.
>>>
>>> We certainly want to do something to fix the regression, agreed.
>>>
>>> Looking at the config, can we just use a fake DTB for SPL that works on
>>> all 3 boards, rather than 3 DTBs?
>>
>> Mind you, all of that seems like a workaround. Removing functionality
>> just to fit the monster with DM/DT in is a no-go. R-Car Gen2 doesn't use
>> DM/DT in SPL because it just won't fit and I believe that absolutely
>> makes sense ; why should we impose DM/DT in SPL on MX6 only to make it
>> less usable?
> 
> Setting aside that as I said you don't have to use DM in SPL

Right, that's an important concensus .

>, maybe it's
> also worth noting you don't have to provide "describes the whole board"
> DTB files.

That's what u-boot,dm-spl and CONFIG_OF_SPL_REMOVE_PROPS is for, yes ?

> If as far as SPL is concerned there's no difference between
> board A, B and C, just make a DTS that describes the relevant hardware.

Right

> Also, platdata can help here too.
> 


-- 
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Re: [U-Boot] Cannot boot mx6qsabred with 2019.07-rc2

2019-05-23 Thread Marek Vasut
On 5/23/19 7:45 PM, Fabio Estevam wrote:
> Hi Schrempf,
> 
> On Thu, May 23, 2019 at 2:26 PM Schrempf Frieder
>  wrote:
> 
>> As luck would have it, I needed to load a FIT via SDP today, so I came
>> up with a quick patch (see below). There are probably better ways to do
>> this, but it works.
> 
> Thanks for your patch!
> 
> I would like to give it a try, but it does not apply against U-Boot mainline.
> 
> I manually applied it, but failed to build:
> 
> cmd/usb_gadget_sdp.c: In function ‘do_sdp’:
> cmd/usb_gadget_sdp.c:35:2: error: too few arguments to function ‘sdp_handle’
>   sdp_handle(controller_index);
> 
> Could you please rebase it against U-Boot mainline and post it like a
> formal patch?

And add a SoB line .

Why do you need to load fitImage via SDP btw ?

-- 
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Marek Vasut
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Re: [U-Boot] Cannot boot mx6qsabred with 2019.07-rc2

2019-05-23 Thread Fabio Estevam
Hi Marek,

On Thu, May 23, 2019 at 2:54 PM Marek Vasut  wrote:

> Why do you need to load fitImage via SDP btw ?

Let's suppose a i.MX6 board that boots from eMMC is bricked and we
need to load a new U-Boot to repair it.

imx_usb_loader is a very convenient tool to achieve this.

This method has been working well for a long time, but after DM
transition we can no longer load and run SPL + u-boot-dtb.img via SDP.
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Re: [U-Boot] [PATCH v6] ARM: am335x: Add phyCORE AM335x R2 support

2019-05-23 Thread Marek Vasut
On 5/8/19 1:22 PM, Niel Fourie wrote:
> Support for Phytech phyCORE AM335x R2 SOM (PCL060) on the Phytec
> phyBOARD-Wega AM335x.
> 
> CPU  : AM335X-GP rev 2.1
> Model: Phytec AM335x phyBOARD-WEGA
> DRAM:  256 MiB
> NAND:  256 MiB
> MMC:   OMAP SD/MMC: 0
> eth0: ethernet@4a10
> 
> Working:
>  - Eth0
>  - i2C
>  - MMC/SD
>  - NAND
>  - UART
>  - USB (host)
> 
> Device trees were taken from Linux mainline:
> commit 37624b58542f ("Linux 5.1-rc7")
> 
> Signed-off-by: Niel Fourie 
> Reviewed-by: Heiko Schocher 

Tested-by: Marek Vasut 

Minor nits below...

[...]

> diff --git a/board/phytec/phycore_am335x_r2/board.c 
> b/board/phytec/phycore_am335x_r2/board.c
> new file mode 100644
> index 00..2f5bca27c2
> --- /dev/null
> +++ b/board/phytec/phycore_am335x_r2/board.c
> @@ -0,0 +1,259 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * board.c
> + *
> + * Board functions for Phytec phyCORE-AM335x R2 (pcl060) based boards

PCL060 / PCM060

[...]

> diff --git a/board/phytec/phycore_am335x_r2/board.h 
> b/board/phytec/phycore_am335x_r2/board.h
> new file mode 100644
> index 00..68c3d56aa5
> --- /dev/null
> +++ b/board/phytec/phycore_am335x_r2/board.h
> @@ -0,0 +1,24 @@
> +/* SPDX-License-Identifier: GPL-2.0+ */
> +/*
> + * board.h
> + *
> + * Phytec phyCORE-AM335x (pcl060) boards information header

PCL060 / PCM060

[...]

> diff --git a/configs/phycore-am335x-r2-wega_defconfig 
> b/configs/phycore-am335x-r2-wega_defconfig
> new file mode 100644
> index 00..d8ff60
> --- /dev/null
> +++ b/configs/phycore-am335x-r2-wega_defconfig
> @@ -0,0 +1,79 @@
> +CONFIG_ARM=y

It would be useful to enable CMD_DHCP and CMD_PING

[...]

> diff --git a/include/configs/phycore_am335x_r2.h 
> b/include/configs/phycore_am335x_r2.h
> new file mode 100644
> index 00..31a07062a0
> --- /dev/null
> +++ b/include/configs/phycore_am335x_r2.h
> @@ -0,0 +1,130 @@
> +/* SPDX-License-Identifier: GPL-2.0+ */
> +/*
> + * phycore_am335x_r2.h
> + *
> + * Phytec phyCORE-AM335x R2 (pcl060) boards information header

PCL060 / PCM060

[...]

-- 
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Marek Vasut
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